Group iii nitride laminate, and method for manufacturing group iii nitride laminate
The SiC substrate surface treatment process for group III nitride laminates addresses surface defects by forming and removing a Si-deficient region, enhancing device characteristics and yield through reduced defect densities.
Patent Information
- Application Number
- JP2023221652
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2025-07-09
AI Technical Summary
Group III nitride laminates used in semiconductor elements like HEMTs often suffer from surface defects, which hinder the achievement of desired device characteristics.
A method involving a SiC substrate surface treatment process that includes forming and removing a Si-deficient region using halogen- and hydrogen-containing gases to reduce surface defects, followed by epitaxial growth of a group III nitride crystal, ensuring an average defect density of 10.0 pieces/cm² or less and a maximum defect density of 50.0 pieces/cm² or less in 10 mm² regions.
The method effectively reduces surface defects, enabling high device characteristics and improved yield by stabilizing the semiconductor device performance and reducing local defect variations.
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Figure 2025103920000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a group III nitride laminate and a method for manufacturing the group III nitride laminate.
Background Art
[0002] Group III nitride-based high electron mobility transistors (HEMTs) are widely used as power amplifiers for base stations of mobile phones (for example, Patent Document 1). In group III nitride-based HEMTs, the power that can be input per element can be significantly increased compared to conventionally used Si-based devices. As a result, the base station can be miniaturized, and the installation cost can be significantly reduced.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] Semiconductor elements such as HEMTs are manufactured from group III nitride laminates. According to the study by the present inventors, surface defects may exist in the group III nitride laminate, and desired device characteristics may not be obtained in the semiconductor element due to the surface defects.
[0005] An object of the present invention is to provide a technique for reducing surface defects in a group III nitride laminate.
Means for Solving the Problems
[0006] According to one aspect of the present invention, a SiC substrate, A stacked structure provided on a substrate and formed by epitaxially growing a group III nitride crystal, comprising, The stacked structure, In the internal region excluding a width of 5 mm from the outer edge of its surface, the average density of surface defects having a size of 0.165 μm or more and 2.0 μm or less is 10.0 pieces / cm 2 or less, When the internal region is divided into a plurality of regions of 10 mm square and the density of the surface defects in each divided region is measured, the maximum value of the density is 50.0 pieces / cm 2 or less, A group III nitride laminate is provided.
[0007] According to another aspect of the present invention, (a) A step of preparing a SiC substrate; (b) A step of supplying a halogen-containing gas to the SiC substrate to desorb Si from the main surface of the SiC substrate and forming a Si-deficient region in the surface layer of the main surface; (c) A step of supplying a hydrogen-containing gas to the SiC substrate having the Si-deficient region formed thereon to remove the Si-deficient region and performing surface treatment on the main surface; (d) A step of growing a group III nitride crystal on the main surface after the treatment; A method for manufacturing a group III nitride laminate having the above is provided.
Advantages of the Invention
[0008] According to the present invention, surface defects can be reduced in a group III nitride laminate.
Brief Description of the Drawings
[0009]
Figure 1
Figure 2
Figure 3
Figure 4A
Figure 4B
Figure 5A
Figure 5B
MODE FOR CARRYING OUT THE INVENTION
[0010] <One Embodiment> Next, an embodiment of the present invention will be described below with reference to the drawings. Note that the present invention is not limited to these examples, and is intended to be defined by the claims and to include all modifications within the meaning and scope equivalent to the claims.
[0011] (1) Group-III Nitride Stack The group-III nitride stack according to this embodiment will be described with reference to FIG. 1. FIG. 1 is a schematic cross-sectional view showing the group-III nitride stack according to this embodiment.
[0012] In the following, in a crystal such as a group-III nitride semiconductor having a wurtzite structure, the <0001> axis is referred to as the "c-axis", and the (0001) plane is referred to as the "c-plane".
[0013] As shown in FIG. 1, the group-III nitride stack 1 (hereinafter also referred to as the "stack 1") includes, for example, an SiC substrate 10 and a stacked structure 20 formed by epitaxially growing a group-III nitride crystal. The stacked structure 20 is formed by crystal growth of a group-III nitride crystal. In this embodiment, a case where the stacked structure 20 includes a nucleation layer 30, a channel layer 40, a barrier layer 50 and a cap layer 60 as functional layers will be described as an example. The functional layer is In x Al y Ga (1-x-y)It is composed of a group-III nitride crystal represented by the compositional formula N(0≦x≦1, 0≦y≦1, x + y≦1).
[0014] (SiC substrate) The SiC substrate 10 is a base substrate for epitaxially growing the laminated structure 20. As will be described later, the SiC substrate 10 is configured such that its main surface 11 is surface-treated and the surface defects can be reduced when the laminated structure 20 is crystal-grown on the main surface 11. At least a part of the main surface 11 is surface-treated, and preferably the whole of it is surface-treated. As the SiC constituting the SiC substrate 10, for example, semi-insulating SiC of polytype 4H or polytype 6H is used. Here, "semi-insulating" means, for example, a state where the specific resistance is 10 5 Ω·cm or more. The surface of the SiC substrate 10 that serves as the base for growing the laminated structure 20 is, for example, the (0001) plane (silicon plane of the c-plane).
[0015] The SiC substrate 10 preferably has a large area, for example, to improve the productivity in manufacturing semiconductor elements. Specifically, the diameter of the SiC substrate 10 is, for example, 2 inches (50 mm) or more, preferably 4 inches (100 mm) or more, and more preferably 6 inches (150 mm) or more.
[0016] The thickness of the SiC substrate 10 is not particularly limited, but it depends on the diameter of the SiC substrate 10. Specifically, the thickness of the SiC substrate 10 with a diameter of 2 inches is, for example, 300 μm or more and 500 μm or less (typically 430 μm), the thickness of the SiC substrate 10 with a diameter of 4 inches is, for example, 400 μm or more and 1000 μm or less (typically 500 μm), and the thickness of the SiC substrate 10 with a diameter of 6 inches is, for example, 400 μm or more and 1500 μm or less (typically 500 μm).
[0017] (Nucleation layer) The nucleation layer 30 is provided on the SiC substrate 10. The nucleation layer 30 functions as a nucleation layer that generates crystal nuclei for growing the channel layer 40 described later. The nucleation layer 30 is formed by epitaxially growing a group III nitride crystal on the main surface 11 of the SiC substrate 10 that has been surface-treated. For example, the nucleation layer 30 is composed of AlN. The thickness of the nucleation layer 30 is not particularly limited, but is preferably, for example, 1 nm or more and 100 nm or less.
[0018] (Channel layer) The channel layer 40 is provided on the nucleation layer 30. The channel layer 40 functions as a channel layer through which electrons travel during the operation of a semiconductor device such as a HEMT. The channel layer 40 is formed, for example, by epitaxially growing a group III nitride crystal on the main surface of the nucleation layer 30. The channel layer 40 is composed of a group III nitride represented by the composition formula In x Al y Ga (1-x-y) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), and is composed of, for example, GaN. The low-index crystal plane closest to the main surface of the channel layer 40 is, for example, the c-plane ((0001) plane, Ga plane). The thickness of the channel layer 40 is not particularly limited, but is preferably, for example, 3 nm or more and less than 1 μm. The thickness of the channel layer 40 can be appropriately changed according to the characteristics required for the semiconductor device. For example, it may be made thicker when reducing the leakage current and thinner when improving the RF response speed. Note that the channel layer 40 may be provided directly on the nucleation layer 30, or may be provided on the nucleation layer 30 via a known buffer layer provided on the nucleation layer 30.
[0019] (Barrier layer) The barrier layer 50 is provided on the channel layer 40. The barrier layer 50 functions as a barrier layer that generates a two-dimensional electron gas (2DEG) in the channel layer 40 and spatially confines the 2DEG within the channel layer 40. The barrier layer 50 is formed, for example, by heteroepitaxially growing a group III nitride crystal on the main surface of the channel layer 40. For example, the barrier layer 50 is composed of a group III nitride having a smaller electron affinity than the group III nitride crystal constituting the channel layer 40, such as AlGaN containing aluminum (Al) and gallium (Ga). The thickness of the barrier layer 50 is preferably, for example, 1 nm or more and 80 nm or less.
[0020] (Cap layer) The cap layer 60 is provided on the barrier layer 50. The cap layer 60 is interposed between the barrier layer 50 and the electrode provided thereon in order to improve the device characteristics (such as controllability of the threshold voltage) of a semiconductor device such as a HEMT. The cap layer 60 is formed as needed and may be omitted.
[0021] (Surface defects) In the laminate 1 of the present embodiment, a laminated structure 20 is formed by epitaxial growth on the main surface 11 obtained by surface-treating the SiC substrate 10. Therefore, the laminated structure 20 is configured such that the generation of surface defects is suppressed and the density thereof is reduced.
[0022] Here, the surface defects in the laminated structure 20 will be described.
[0023] Surface defects are caused by complex factors such as the surface state and crystallinity of the underlying substrate. For example, during crystal growth, surface defects may occur on the surface of locations where there are dislocations with large strains or locally concentrated dislocations. Also, for example, surface defects may occur on the crystal surface due to foreign substances adhering to the underlying surface or surface roughness, etc., which are caused by the surface state of the underlying layer. Also, for example, when impurities are mixed into the crystal during growth, surface defects may occur on the crystal surface. Also, for example, although there are various polytypes in the SiC substrate 10, the polytypes on its surface may not be uniform, and due to this difference in polytypes, abnormalities may occur in crystal growth, and surface defects may occur. Specifically, in the SiC substrate 10, there are various polytypes such as 3C, 4H, 6H, etc. However, even for a substrate of the 6H polytype, for example, polytypes other than 6H may exist on its surface. It is presumed that this difference in polytypes causes surface defects during crystal growth.
[0024] Surface defects are minute irregularities (growth pits) that have manifested on the surface of the laminated structure 20 due to these complex factors. Surface defects can be confirmed and detected from the condition of reflection and scattering of the irradiated light when the surface of the laminated structure 20 is irradiated with a laser beam and scanned. In the present embodiment, surface defects, when viewed in plan, have a size of 0.165 μm or more and 2.0 μm or less, and are those generated by crystal growth, and substantially do not include foreign substances (for example, external particles) adhering to the crystal surface. Note that the surface of the laminated structure 20 refers to the surface of the uppermost layer of the laminated structure 20. In the present embodiment, since the uppermost layer of the laminated structure 20 is the cap layer 60, the surface of the laminated structure 20 is the surface of the cap layer 60.
[0025] In the present embodiment, the average density of surface defects in the laminated structure 20 is 10.0 pieces / cm 2 or less, and preferably 7.0 pieces / cm 2 or less, and 5.0 pieces / cm 2The following is more preferable. Here, the average density of surface defects will be described with reference to FIG. 2. FIG. 2 is a diagram for explaining the density of surface defects and is a schematic top view of the surface of the laminated structure 20. As shown in FIG. 2, the average density of surface defects is the total number of surface defects present in the internal region 21A (the region surrounded by the broken line in the figure) excluding a width of 5 mm from the outer edge on the surface 21 of the laminated structure 20, divided by the area of the internal region 21A, and indicates the number of surface defects per unit area. In the present embodiment, since the uppermost layer of the laminated structure 20 is the cap layer 60, the average density of surface defects on the surface of the cap layer 60 is 10.0 pieces / cm 2 The following is obtained. Hereinafter, the density of surface defects will be simply referred to as defect density, and the average density of surface defects will also be referred to as average defect density.
[0026] Further, the laminated structure 20 is formed on the main surface 11 subjected to surface treatment, thereby suppressing the local generation of surface defects. That is, in the laminated structure 20, the generation of locations where the density of surface defects locally protrudes and becomes high is suppressed. Specifically, the laminated structure 20 divides the internal region excluding a width of 5 mm from the outer edge on its surface into a plurality of regions of 10 mm square, and when the density of surface defects in each divided region is measured, the maximum value of the density is 50.0 pieces / cm 2 The following, and 30.0 pieces / cm 2 The following is preferable, and 20.0 pieces / cm 2 The following is more preferable. As shown in FIG. 2, the maximum value of the density of surface defects is obtained by dividing the internal region 21A into a grid pattern and extracting a region having a 10 mm square as a divided region 21B (the hatched region in the figure), and adopting the maximum value among the densities of surface defects in each divided region 21B. Note that regions that do not satisfy a 10 mm square, for example, regions existing between the broken line and the divided region 21B in FIG. 2, are excluded from the calculation of the maximum value of the defect density. On the other hand, the minimum value of the defect density is not particularly limited, but for example, 0 pieces / cm 2 It is good to be.
[0027] (2) Method for manufacturing group III nitride laminate Next, with reference to FIG. 3, a method for manufacturing a group-III nitride laminate according to this embodiment will be described. FIG. 3 is a flowchart showing the method for manufacturing a group-III nitride laminate according to this embodiment.
[0028] The method for manufacturing a group-III nitride laminate according to this embodiment includes, for example, an SiC substrate preparation step S10, a cleaning and degreasing step S20, a loading step S30, a hydrogen annealing step S40, a modification layer formation step S50, a modification layer removal step S60, a nucleation layer formation step S70, a channel layer formation step S80, a barrier layer formation step S90, a cap layer formation step S100, and an unloading step S110.
[0029] (S10: SiC substrate preparation step) First, an SiC substrate 10 is prepared. As the SiC substrate 10, a substrate in which SiC is exposed on the surface and no components other than SiC are substantially laminated on the surface can be used. As the SiC substrate 10, for example, a polytype 4H or 6H semi-insulating SiC substrate can be used.
[0030] (S20: Cleaning and degreasing step) Subsequently, the SiC substrate 10 may be subjected to, for example, known cleaning and degreasing treatments. As the cleaning and degreasing, acids, alkaline aqueous solutions, organic solvents, surfactants, pure water, etc. can be used.
[0031] (S30: Loading step) Subsequently, the SiC substrate 10 that has been cleaned and degreased is loaded into the processing container of a known film-forming apparatus. In this embodiment, surface treatments including the hydrogen annealing step S40 to the modification layer removal step S60 described later are performed using a film-forming apparatus for crystal growth such as the nucleation layer formation step S70 to the cap layer formation step S100.
[0032] The film forming apparatus includes a processing chamber, a gas supply mechanism, a susceptor, and a heater. The susceptor is disposed in the processing chamber, is capable of placing the SiC substrate 10 thereon, and is configured to heat the SiC substrate 10 by the heater. The gas supply mechanism is configured to supply a predetermined processing gas into the processing chamber. As the film forming apparatus, either a hot wall type or a cold wall type may be used. From the viewpoint of sufficiently increasing the processing temperature of the surface treatment described later and performing the surface treatment more reliably, a cold wall type processing apparatus is preferable.
[0033] As the film forming apparatus, for example, a MOVPE apparatus that grows by the metalorganic vapor phase epitaxy (MOVPE) method, an HVPE apparatus that grows by the hydride vapor phase epitaxy (HVPE) method, or the like can be used. Hereinafter, the case of using a MOVPE apparatus will be described as an example.
[0034] (S40: Hydrogen annealing step) Subsequently, the SiC substrate 10 placed on the susceptor in the processing chamber is annealed in a reducing atmosphere. The SiC substrate 10 is heated, for example, in a hydrogen gas (H2 gas) atmosphere, and hydrogen annealing treatment is performed. According to the hydrogen annealing treatment, the oxide film (natural oxide film, etc.) formed on the surface of the SiC substrate 10 can be removed, and the surface treatment by the subsequent altered layer forming step S50 and altered layer removing step S60 can be performed more reliably. In the hydrogen annealing treatment, the treatment temperature is, for example, 950 °C or higher and 1300 °C or lower, and the treatment time is, for example, 10 seconds or longer and 600 seconds or shorter.
[0035] (S50: Altered layer forming step) Next, before growing the group-III nitride crystal, a Si-deficient region is formed as a modified layer on the main surface 11 of the SiC substrate 10. Specifically, the SiC substrate 10 placed on the susceptor is heated to a predetermined temperature by a heater, and a halogen-containing gas is supplied as a processing gas by a gas supply mechanism. By this supply, silicon (Si) can be desorbed from the main surface 11 to form a Si-deficient region on the main surface 11. It is presumed that the Si-deficient region is formed by the reaction of SiC constituting the main surface 11 with the halogen-containing gas to generate silicon halide gas and the desorption of Si. The carbon (C) remaining in the Si-deficient region may be graphitized.
[0036] The Si-deficient region corresponds to the surface layer portion of the main surface 11 in the SiC substrate 10. Its thickness may be at least one atomic layer and is not particularly limited.
[0037] In the modified layer formation step S50, it is preferable to perform the treatment under conditions such that a Si-deficient region is formed over the entire area of the main surface 11 of the SiC substrate 10. For example, as shown in FIG. 4A, when a Si-deficient region 12 is formed in a part of the main surface 11 of the SiC substrate 10, as shown in FIG. 4B, a part of the main surface 11 will be surface-modified in the modified layer removal step S60 described later. When crystal growth is performed on the main surface 11 where this part has been modified, surface defects may locally increase and be unevenly distributed on the unmodified portions. On the other hand, for example, as shown in FIG. 5A, when the Si-deficient region 12 is formed over the entire area of the main surface 11, as shown in FIG. 5B, it becomes possible to modify the entire area of the main surface 11 in the modified layer removal step S60. As a result, when forming the laminated structure 20, the variation in surface defects in the plane of the laminated structure 20 can be suppressed. That is, the in-plane distribution of surface defects can be improved. Also, the surface defects can be reduced, and the average defect density of the laminated structure 20 can be reduced.
[0038] As the processing conditions for the altered layer formation step S50, there are, for example, the processing temperature (heating temperature of the SiC substrate 10) and the processing time. From the perspective of forming the Si-deficient region over the entire main surface 11 and suppressing variations in the in-plane distribution of surface defects, the processing temperature is preferably 850°C or higher and 1150°C or lower, and more preferably 900°C or higher and 1100°C or lower. As the processing time, for example, it is preferably 120 seconds or longer and 720 seconds or shorter. Further, from the perspective of forming the Si-deficient region over the entire main surface 11, it is preferable to control the processing temperature to be uniform over the entire surface of the SiC substrate 10.
[0039] Also, in the altered layer formation step S50, the halogen-containing gas may be supplied, for example, mixed with an inert gas such as nitrogen gas (N 2 ) to adjust the reactivity. In the processing vessel, the supplied halogen-containing gas is mixed with a carrier gas or the like and diluted to a predetermined concentration. The concentration of the halogen-containing gas indicates the molar ratio of the halogen-containing gas in the atmosphere inside the reaction vessel. Although this concentration is not particularly limited, from the perspective of causing Si desorption over the entire main surface 11 of the SiC substrate 10 while not causing excessive desorption in the thickness direction, it is preferably 0.1% or higher and less than 2%, and more preferably 0.1% or higher and 1.5% or lower.
[0040] As the halogen-containing gas, it is preferable to use at least one gas selected from the group consisting of F2 gas, Cl2 gas, Br2 gas, I2 gas, NF3 gas, ClF3 gas, HF gas, HCl gas, HBr gas, and HI gas. According to these gases, Si can be desorbed from SiC, and the Si-deficient region can be formed more reliably. Note that, for example, nitrogen gas (N2 gas) may be used as the atmosphere gas for the Si desorption treatment.
[0041] (S60: Altered layer removal step) Subsequently, within the processing chamber of the same MOVPE apparatus, a Si-deficient region as a modified layer is removed from the main surface 11 of the SiC substrate 10. Here, since the inside of the processing chamber has become a halogen-containing gas atmosphere in the modified layer formation step S50, for example, after replacing the inside of the processing chamber with N2 gas, while heating the SiC substrate 10, a hydrogen-containing gas is supplied as a processing gas into the processing chamber by a gas supply mechanism. By this supply, the Si-deficient region formed on the surface of the main surface 11 is removed. It is presumed that the removal of the Si-deficient region is performed by the C component contained in the Si-deficient region reacting with the hydrogen-containing gas to generate a hydrocarbon gas and the C desorbing. Since the Si-deficient region can be a factor causing surface defects, the occurrence of surface defects can be suppressed by removing the Si-deficient region. Note that the replacement of the gas inside the processing chamber may be performed, for example, by stopping the supply of the halogen-containing gas, temporarily increasing the pressure while raising the temperature inside the processing chamber, and then lowering the pressure again.
[0042] In the modified layer removal step S60, it is preferable to perform the treatment under conditions such that the Si-deficient region is removed from the entire area of the main surface 11. Thereby, the Si-deficient region can be removed over the entire area of the main surface 11, and the occurrence of surface defects due to the Si-deficient region can be suppressed. As a result, the average defect density of the stacked structure 20 can be reduced, and the local distribution (non-uniformity) of surface defects can be suppressed.
[0043] Examples of the processing conditions for the modified layer removal step S60 include the processing temperature (heating temperature of the SiC substrate 10) and the processing time. From the viewpoint of removing the Si-deficient region from the entire area of the main surface 11, the processing temperature is preferably 1050°C or higher and 1250°C or lower, and more preferably 1100°C or higher and 1200°C or lower. The processing time is preferably, for example, 150 seconds or longer and 600 seconds or shorter. Also, from the viewpoint of removing the Si-deficient region over the entire area of the main surface 11, it is preferable to control the processing temperature to be uniform over the entire surface of the SiC substrate 10.
[0044] Also, it is preferable that the processing temperature in the altered layer removal step S60 be higher than the processing temperature in the altered layer formation step S50. Thereby, the desorption of C is promoted, and the Si-deficient region can be more reliably removed. By setting the processing temperature relatively low in the altered layer formation step S50, excessive desorption of Si on the surface of the SiC substrate 10 is suppressed, while by setting the processing temperature relatively high in the altered layer removal step S60, the Si-deficient region formed in the altered layer formation step S50 can be more reliably removed.
[0045] From the viewpoint of suitably removing the Si-deficient region, as the hydrogen-containing gas, it is preferable to use at least any one gas selected from the group consisting of H2 gas, NH3 gas, N2H2 gas, N2H4 gas, and N3H8 gas. Note that, as the ambient gas for the Si-deficient region removal treatment, for example, N2 gas or H2 gas may be used.
[0046] (S70: Nucleation layer formation step) Next, III-nitride crystals are grown epitaxially on the main surface 11 of the SiC substrate 10 in the processing container continuously to the altered layer removal step S60. Here, for example, a single crystal of AlN is heteroepitaxially grown to form a nucleation layer 30. The nucleation layer 30 is formed on the surface-modified main surface 11 of the SiC substrate 10.
[0047] When the nucleation layer 30 is formed of, for example, AlN, as the group-III (Al) source gas, for example, trimethylaluminum (TMA) gas is used. As the N source gas, for example, NH3 gas is used. These source gases may be mixed with a carrier gas using hydrogen (H2) gas, nitrogen (N2) gas, or a mixed gas thereof and supplied.
[0048] As crystal growth conditions for forming the nucleation layer 30, there are, for example, growth temperature, V / III ratio, and growth pressure, etc., and these may be set to conventionally known numerical values. Here, the "V / III ratio" refers to the ratio of the supply amount (partial pressure) of the group-V (N) source gas to the supply amount (partial pressure) of the group-III (Al) source gas.
[0049] (S80: Channel layer formation step) Next, a group-III nitride crystal is grown epitaxially on the upper surface of the nucleation layer 30 within the processing vessel of the same MOVPE apparatus. Here, for example, a single crystal of GaN is heteroepitaxially grown to form a channel layer 40.
[0050] When the channel layer 40 is formed of, for example, GaN, as the group-III (Ga) source gas, for example, trimethylgallium (Ga(CH3)3, TMG) gas is used. As the N source gas, for example, NH3 gas is used. These source gases may be supplied after being mixed with a carrier gas using hydrogen (H2) gas, nitrogen (N2) gas, or a mixed gas thereof.
[0051] Examples of the crystal growth conditions for forming the channel layer 40 include the growth temperature, V / III ratio, and growth pressure, etc., and these may be set to conventionally known numerical values.
[0052] (S90: Barrier layer formation step) Next, within the processing vessel of the same MOVPE apparatus, a single crystal of a group-III nitride having a smaller electron affinity than the group-III nitride crystal constituting the channel layer 40 is heteroepitaxially grown on the upper surface of the channel layer 40 to form a barrier layer 50.
[0053] When the barrier layer 50 is formed of a single crystal of, for example, AlN, AlGaN, InAlN, or AlInGaN, as the Al source gas, for example, trimethylaluminum (Al(CH3)3, TMA) gas is used. As the In source gas, for example, trimethylindium (In(CH3)3, TMI) gas is used. For the other gases, the same gases as in the channel layer formation step S80 are used.
[0054] (S100: Cap layer formation step) Next, within the processing vessel of the same MOVPE apparatus, for example, GaN is heteroepitaxially grown as a single crystal of a group-III nitride on the upper surface of the barrier layer 50 to form a cap layer 60.
[0055] (S110: Removal process) Subsequently, the laminate 1 is removed from the processing container. Thus, the laminate 1 of the present embodiment is obtained.
[0056] (3) Effects obtained by the present embodiment According to the present embodiment, one or more of the following effects can be obtained.
[0057] (a) In the SiC substrate 10, even if cleaning, degreasing, and hydrogen annealing treatment are performed before crystal growth to improve the state of the underlying surface, when the laminated structure 20 is formed, surface defects may not be stably reduced. As described above, as factors causing surface defects, the surface state of the SiC substrate 10 (such as surface roughness and differences in polytype), and the concentration of dislocations, etc. are considered, and it is presumed that these effects cannot be sufficiently suppressed by cleaning, degreasing, etc. In this regard, in the present embodiment, before growing the group III nitride crystal on the main surface 11 of the SiC substrate 10, the formation and removal of the Si-deficient region as a modified layer are performed on the SiC substrate 10 in advance. In the modified layer formation step S50, by supplying a halogen-containing gas, Si is desorbed from the main surface 11 of the SiC substrate 10 to form a Si-deficient region on the main surface 11. Further, in the modified layer removal step S60, by supplying a hydrogen-containing gas, the Si-deficient region is removed. Thereby, the main surface 11 can be modified at the atomic layer level. By performing crystal growth on this surface-modified main surface 11, the average defect density of the laminated structure 20 can be reduced. In addition, it is possible to suppress the local occurrence and uneven distribution of surface defects in the laminated structure 20.
[0058] (b) The laminated structure 20 of the laminate 1 is formed by growing a group III nitride crystal on the main surface 11 subjected to the surface treatment shown in (a) above, so that the average defect density on its surface becomes 10.0 pieces / cm 2 or less, and the maximum value of the defect density in each divided region 21B when the internal region 21A is divided is 50.0 pieces / cm 2It is as follows. According to such a laminate 1, since the average defect density is low, high device characteristics can be realized when manufacturing a semiconductor device. Further, since the maximum value of the defect density in the plane is low and the uneven distribution of surface defects is suppressed, the yield of the semiconductor device can be improved.
[0059] (c) It is preferable to perform the altered layer removal step S60 under conditions such that the Si-deficient region as the altered layer is removed from the entire main surface 11. Thereby, the Si-deficient region that can cause surface defects is removed, and the average defect density and the maximum value of surface defects can be further reduced. Specifically, the average defect density of the laminated structure 20 is 7.0 pieces / cm 2 Hereinafter, the maximum value of the defect density can be 30.0 pieces / cm 2 or less.
[0060] (d) From the viewpoint of more surely realizing the effect of (c) above, it is preferable that the processing temperature in the altered layer removal step S60 is 1050°C or higher and 1250°C or lower. Also, it is preferable that the processing time is 150 seconds or longer and 600 seconds or shorter.
[0061] (e) Further, together with the treatment of (c) above, it is preferable to perform the altered layer formation step S50 under conditions such that Si-deficient regions are formed over the entire main surface 11 of the SiC substrate 10. Thereby, it becomes possible to modify the entire main surface 11. Therefore, surface defects can be uniformly reduced on the surface of the laminated structure 20, and local generation of surface defects can be more surely suppressed. Specifically, the average defect density of the laminated structure 20 is 5.0 pieces / cm 2 Hereinafter, the maximum value of the defect density can be 20.0 pieces / cm 2 or less.
[0062] (f) From the viewpoint of more surely realizing the effect of (e) above, it is preferable that the processing temperature in the altered layer formation step S50 is 850°C or higher and 1150°C or lower. Also, it is preferable that the processing time is 120 seconds or longer and 720 seconds or shorter.
[0063] (g) It is preferable that the processing temperature in the deteriorated layer removal step S60 is higher than that in the deteriorated layer formation step S50. Thereby, while suppressing the excessive formation of the Si defect region as the deteriorated layer, the activity of C desorption in the deteriorated layer removal step S60 can be enhanced, and the formed Si defect region can be more reliably removed.
[0064] (h) It is preferable that the surface treatment including the deteriorated layer formation step S50 and the deteriorated layer removal step S60 and the crystal growth of the laminated structure 20 are continuously performed in the same film forming apparatus. Thereby, the productivity when manufacturing the laminate 1 can be improved. Further, contamination due to the exposure of the SiC substrate 10 to the atmosphere can be avoided, and the generation of surface defects can be further suppressed. As a result, the device characteristics and reliability of the semiconductor device manufactured using the laminate 1 can be improved.
[0065] <Other Embodiments> The embodiments of the present invention have been specifically described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist thereof.
[0066] In the above-described embodiment, the case where the laminate 1 includes the laminated structure 20 composed of the nucleation layer 30, the channel layer 40, the barrier layer 50, and the cap layer 60 has been described, but the present invention is not limited thereto. For example, the laminated structure 20 may be configured by laminating the nucleation layer 30 and the channel layer 40. Further, for example, the laminated structure 20 may be configured by laminating the nucleation layer 30, the channel layer 40, and the barrier layer 50. Further, for example, the laminated structure 20 may be configured such that an AlN layer is interposed between the channel layer 40 and the barrier layer 50. Further, for example, the laminated structure 20 may be configured such that an InGaN layer or AlGaN is interposed in the channel layer 40. In any case, surface defects may occur on the surface of the layer constituting the uppermost surface of the laminated structure 20 depending on the surface state of the underlying substrate, but by forming and removing the deteriorated layer, the occurrence thereof can be suppressed, and the average defect density and the maximum value of the defect density in the layer constituting the uppermost surface satisfy the above predetermined values.
[0067] In the above embodiment, the growth of the nucleus generation layer 30 and the channel layer 40 is described for the case of performing by MOVPE method. However, the growth of either one or both of them may be performed by, for example, Hydride Vapor Phase Epitaxy (HVPE) method.
[0068] Also, the Si desorption treatment and the Si defect region removal treatment may be alternately performed multiple times. Although the desired effect can be obtained even when these treatments are performed only once, by repeating these, the main surface 11 of the SiC substrate 10 can be more reliably surface-treated, and the crystal quality can be more reliably improved.
Example
[0069] Next, examples according to the present disclosure will be described. These examples are an example of the present disclosure, and the present disclosure is not limited by these examples.
[0070] In this example, a group III nitride laminate was fabricated, and the defect density on its surface was evaluated. This will be specifically described below.
[0071] (1) Fabrication of group III nitride laminate In this embodiment, first, a SiC substrate was prepared. Subsequently, the SiC substrate was cleaned and degreased. The degreased SiC substrate was introduced into the processing chamber of a MOVPE apparatus. Subsequently, in a hydrogen annealing step, the SiC substrate was heated with the inside of the processing chamber being in an H2 gas atmosphere. Subsequently, in a modified layer formation step, with the inside of the processing chamber being in an N2 gas atmosphere, the SiC substrate was heated at a predetermined processing temperature and Cl2 gas was supplied as a chlorine-containing gas. At this time, the supply amount of the Cl2 gas was adjusted so that the concentration of the Cl2 gas in the atmosphere in the processing chamber became 1.1%. Thereby, Si was desorbed from the main surface of the SiC substrate, and a Si-deficient region was formed as a modified layer on the surface thereof. After the modified layer formation step, the inside of the processing chamber was replaced with an inert gas. Subsequently, in a modified layer removal step, with the inside of the processing chamber being in an N2 gas atmosphere, the SiC substrate was heated at a predetermined processing temperature and NH3 gas was supplied as a hydrogen-containing gas. Thereby, C was desorbed from the main surface of the SiC substrate, and the Si-deficient region was removed. Subsequently, in the same processing chamber, a laminated structure composed of a nucleation layer, a channel layer, a barrier layer, and a cap layer was grown on the main surface of the SiC substrate under the following growth conditions to fabricate a laminate. In this embodiment, the processing temperature and processing time of the modified layer formation step and the modified layer removal step were appropriately changed as shown in Table 1 below, and laminates of Samples 1 to 3 were fabricated. Further, the laminate of Sample 4 was fabricated by the same operations as Samples 1 to 3 except that the modified layer formation step and the modified layer removal step were not performed.
[0072] Note that the SiC substrate, the processing conditions of the hydrogen annealing treatment, and the growth conditions of each layer of the laminated structure are as follows.
[0073] (SiC Substrate) Material: SiC (semi-insulating) Diameter: 6 inches Thickness: 500 μm The low-index crystal plane closest to the bottom surface: c-plane (no pattern processing of the bottom surface) Polytype: 6H
[0074] (Processing Conditions in the Hydrogen Annealing Step) Processing Temperature: 950°C to 1300°C Processing time: 10 seconds to 600 seconds Gas atmosphere: H2 gas
[0075] (Growth conditions of the nucleation layer) Material: AlN Growth method: MOVPE method Growth temperature: 1200°C to 1290°C Designed film thickness: 10 nm to 13 nm V / III ratio: 5000 to 25000 Growth pressure: 0.059 atm to 0.098 atm
[0076] (Growth conditions of the channel layer) Material: GaN Growth method: MOVPE method Growth temperature: 1100°C to 1200°C V / III ratio: 1000 to 3000 Growth pressure: 0.098 atm to 0.197 atm Designed film thickness: 400 nm
[0077] (Growth conditions of the barrier layer) Material: AlGaN Growth method: MOVPE method Growth temperature: 1100°C to 1200°C Growth pressure: 0.098 atm to 0.197 atm Designed film thickness: 20 nm
[0078] (Cap layer) Material: GaN Growth method: MOVPE method Designed film thickness: 2 nm
[0079] (2) Evaluation For the fabricated Samples 1 to 4, surface defects on the surface of the laminated structure were detected, and their average density and in-plane distribution of the surface defects were evaluated. Specifically, using a wafer surface inspection apparatus ("YPI-MX-θ" manufactured by Yamanashi Technical Workshop Co., Ltd.), the entire surface of the laminate was irradiated with laser light, and surface defects were detected from the state of reflection and scattering of the laser light. In this example, as surface defects, those having a size of 0.165 μm or more and 2.0 μm or less when viewed from the surface were detected. When detecting the surface defects, the wavelength of the laser light was set to 375 nm, and a photomultiplier was adopted as the detector. The surface defects were detected in an environment where the number of external particles was less than 1.0 piece / cm 3 and less.
[0080] As shown in FIG. 2, the average density of the surface defects was calculated by obtaining the total number of surface defects in the internal region 21A excluding the range of 5 mm in width from the outer shape on the surface 21 of the laminated structure 20 and dividing it by the area of the internal region 21A.
[0081] The in-plane distribution of the surface defects was calculated as follows. Specifically, first, as shown in FIG. 2, the internal region 21A was divided into 10 mm square divided regions 21B. Here, regions that did not satisfy the 10 mm square were excluded, and 129 divided regions 21B were obtained. Subsequently, for each divided region 21B, the total number of surface defects was obtained, and the defect density was calculated by dividing it by the area. Then, the minimum value and the maximum value were obtained among the defect densities of each divided region 21B.
[0082] (3) Evaluation Results The results of the above-described evaluation are summarized in Table 1.
[0083]
Table 1
[0084] As shown in Table 1, in Samples 1 to 3, it was confirmed that by previously forming a modified layer (Si desorption) and removing the modified layer (C desorption) before crystal growth, the average density of surface defects across the entire surface of the laminated structure could be reduced. On the other hand, in Sample 4, although cleaning, degreasing, and hydrogen annealing treatments were performed, crystal growth was carried out without forming and removing the modified layer, and thus it was confirmed that the average density was higher compared to Samples 1 to 3. Also, in Samples 1 to 3, it was confirmed that compared to Sample 4, the maximum value of the surface defect density was lower and there were fewer locations where surface defects were locally abundant. That is, in Samples 1 to 3, it was confirmed that while reducing the average density, the in-plane distribution thereof could be improved.
[0085] Moreover, in Sample 2, it was confirmed that compared to Sample 3, while reducing the average defect density, the maximum value of the defect density could be reduced and the in-plane distribution of the defect density could be further improved. This is presumably because by setting the processing temperature in the modified layer removal step to 1120°C, which is higher than 1050°C of Sample 3, the removal of the modified layer could be further promoted. That is, in Sample 2, it is presumably because compared to Sample 3, the remaining of the modified layer on the main surface of the SiC substrate was suppressed and the surface could be treated more widely.
[0086] Furthermore, in Sample 1, it was confirmed that compared to Sample 2, while reducing the average defect density, the maximum value of the defect density could be reduced and the in-plane distribution of the defect density could be further improved. This is presumably because by setting the processing temperature of the modified layer formation step to 970°C, which is higher than 890°C of Sample 2, a modified layer was formed across the entire main surface of the SiC substrate and all of the formed modified layer could be removed. That is, in Sample 1, it is presumably because compared to Sample 2, the main surface of the SiC substrate could be more reliably surface-treated across the entire area.
[0087] As described above, by modifying the main surface of the SiC substrate through surface treatment, when a laminated structure was crystal-grown on the main surface, it was confirmed that the average defect density across the entire surface of the laminated structure could be reduced and the in-plane distribution of surface defects could also be improved.
[0088] <Preferred Embodiment of the Present Invention> The preferred embodiments of the present invention will be appended below.
[0089] (Appendix 1) An SiC substrate, A laminated structure provided on the substrate and formed by epitaxially growing a group III nitride crystal, comprising The laminated structure is In the internal region excluding a width of 5 mm from the outer edge of its surface, the average density of surface defects having a size of 0.165 μm or more and 2.0 μm or less is 10.0 pieces / cm 2 or less, When the internal region is divided into a plurality of regions of 10 mm square and the density of the surface defects in each divided region is measured, the maximum value of the density is 50.0 pieces / cm 2 or less, Group III nitride laminate.
[0090] (Appendix 2) The average defect density is 7.0 pieces / cm 2 or less, The maximum value of the defect density is 30.0 pieces / cm 2 or less, The group III nitride laminate according to Appendix 1.
[0091] (Appendix 3) The average defect density is 5.0 pieces / cm 2 or less, The maximum value of the defect density is 20.0 pieces / cm 2 or less, The group III nitride laminate according to Appendix 1.
[0092] (Appendix 4) The laminated structure is Provided on the SiC substrate, a nucleation layer containing aluminum nitride, Provided on the nucleation layer, In x Al y Ga (1-x-y)A channel layer represented by a composition formula of N(0≦x≦1, 0≦y≦1, x + y≦1), and The surface of the laminated structure is the channel layer, The group III nitride laminate according to any one of Appendices 1 to 3.
[0093] (Appendix 5) The laminated structure is Provided on the SiC substrate, a nucleation layer containing aluminum nitride, and Provided on the nucleation layer, In x Al y Ga (1-x-y) A channel layer containing a group III nitride represented by a composition formula of N(0≦x≦1, 0≦y≦1, x + y≦1), and Provided on the channel layer, In x Al y Ga (1-x-y) A functional layer containing a group III nitride represented by a composition formula of N(0≦x≦1, 0≦y≦1, x + y≦1), and is provided with The surface of the laminated structure is the functional layer, The group III nitride laminate according to any one of Appendices 1 to 3.
[0094] Having a diameter of 4 inches or more, The group III nitride laminate according to any one of Appendices 1 to 5.
[0095] (Appendix 7) (a) A step of preparing a SiC substrate, and (b) Supplying a halogen-containing gas to the SiC substrate to desorb Si from the main surface of the SiC substrate, and forming a Si-deficient region on the surface layer of the main surface, and (c) Supplying a hydrogen-containing gas to the SiC substrate on which the Si-deficient region is formed to remove the Si-deficient region, and performing surface treatment on the main surface, and (d) A step of growing a group III nitride crystal on the main surface after the treatment, and A method for manufacturing a group III nitride laminate having.
[0096] (Appendix 8) Perform the step (c) under conditions such that the Si-deficient region is removed from the entire main surface of the SiC substrate. The method for manufacturing a group III nitride laminate according to Supplementary Note 7.
[0097] (Supplementary Note 9) Perform the step (b) under conditions such that the Si-deficient region is formed over the entire main surface of the SiC substrate. The method for manufacturing a group III nitride laminate according to Supplementary Note 8.
[0098] (Supplementary Note 10) Perform the step (c) at a temperature higher than that of the step (b). The method for manufacturing a group III nitride laminate according to any one of Supplementary Notes 7 to 9.
[0099] (Supplementary Note 11) Perform the step (c) at a temperature of 1050°C to 1250°C. The method for manufacturing a group III nitride laminate according to any one of Supplementary Notes 7 to 10.
[0100] (Supplementary Note 12) Perform the step (b) at a temperature of 850°C to 1150°C. The method for manufacturing a group III nitride laminate according to any one of Supplementary Notes 7 to 11.
[0101] (Supplementary Note 13) Perform the steps (b), (c), and (d) continuously in the same processing container. The method for manufacturing a group III nitride laminate according to any one of Supplementary Notes 7 to 12.
[0102] (Supplementary Note 14) Perform the steps (b) and (c) alternately a plurality of times. The method for manufacturing a group III nitride laminate according to any one of Supplementary Notes 7 to 13.
[0103] (Supplementary Note 15) Before performing the step (b), include a step of annealing the SiC substrate in a reducing atmosphere. The method for manufacturing a group-III nitride laminate according to any one of Supplementary Notes 7 to 14.
[0104] (Supplementary Note 16) In (d), as the group-III nitride crystal, In x Al y Ga (1-x-y) a substance represented by the composition formula of N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, x + y ≤ 1) is grown. The method for manufacturing a group-III nitride laminate according to any one of Supplementary Notes 7 to 15.
Explanation of Reference Signs
[0105] 1 Group-III nitride laminate (laminate) 10 SiC substrate 20 Laminated structure 30 Nucleation layer 40 Channel layer 50 Barrier layer 60 Cap layer
Claims
1. An SiC substrate, a laminated structure provided on the substrate and formed by epitaxially growing a group III nitride crystal, comprising: wherein the laminated structure The average density of surface defects, which are sized 0.165 μm or more and 2.0 μm or less, in the internal region excluding a 5-mm width from the outer edge of the surface is 10.0 pieces / cm 2 or less, When the internal region is divided into a plurality of regions each having a size of 10 mm square and the density of the surface defects in each divided region is measured, the maximum value of the density is 50.0 pieces / cm 2 is as follows. is a group III nitride laminate.
2. The average density is 7.0 pieces / cm 2 Hereinafter, The maximum value of the density is 30.0 pieces / cm 2 or less The group III nitride laminate according to Claim 1.
3. The average density is 5.0 pieces / cm 2 Hereinafter, The maximum value of the density is 20.0 pieces / cm 2 or less The group III nitride laminate according to Claim 1.
4. wherein the laminated structure is provided on the SiC substrate and has a nucleation layer containing aluminum nitride, provided on the core generation layer, In x Al y Ga (1-x-y) a channel layer represented by a composition formula of N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), and and the surface of the laminated structure is the channel layer, The group III nitride laminate according to Claim 1 or Claim 2.
5. wherein the laminated structure is provided on the SiC substrate and has a nucleation layer containing aluminum nitride, Provided on the nuclear generation layer, In x Al y Ga (1-x-y) a channel layer containing a group-III nitride represented by a composition formula of N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), Provided on the channel layer, In x Al y Ga (1-x-y) A functional layer including a group-III nitride represented by a composition formula of N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), and and the surface of the laminated structure is the functional layer, The group III nitride laminate according to Claim 1 or Claim 2.
6. The group III nitride laminate according to Claim 1 or Claim 2, having a diameter of 4 inches or more.
7. A method for manufacturing a group III nitride laminate, comprising: (a) preparing an SiC substrate; (b) supplying a halogen-containing gas to the SiC substrate to desorb Si from the main surface of the SiC substrate and form an Si-deficient region in the surface layer of the main surface; (c) supplying a hydrogen-containing gas to the SiC substrate having the Si-deficient region formed thereon to remove the Si-deficient region and perform surface treatment on the main surface; and (d) growing a group III nitride crystal on the main surface after the treatment.
8. The method for manufacturing a group III nitride laminate according to Claim 7, wherein step (c) is performed under conditions such that the Si-deficient region is removed from the entire area of the main surface of the SiC substrate.
9. The method for manufacturing a group III nitride laminate according to Claim 8, wherein step (b) is performed under conditions such that the Si-deficient region is formed over the entire area of the main surface of the SiC substrate.
10. The method for manufacturing a group III nitride laminate according to Claim 9, wherein step (d) is performed under conditions such that the surface of the laminated structure after growth is the channel layer.
11. The method for manufacturing a group III nitride laminate according to Claim 9, wherein step (d) is performed under conditions such that the surface of the laminated structure after growth is the functional layer.
Citation Information
Patent Citations
Semiconductor device, its manufacturing method, and substrate for manufacturing the same
JP2006286741A
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