Support apparatus, support method, and support program

By replacing loop processes with conditional execution and adding stop conditions, the method addresses inefficiencies in symbolic execution for loop processes, reducing costs and ensuring accurate verification data generation.

JP2025108098APending Publication Date: 2025-07-23HITACHI LTD
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Patent Information

Application Number
JP2024001777
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-10
Publication Date
2025-07-23

AI Technical Summary

Technical Problem

Existing techniques for generating verification data using symbolic execution become costly and inefficient when dealing with loop processes in programs, leading to potential infinite loops and inaccurate reproduction of program behavior due to increased memory requirements and inability to generate proper stop conditions.

Method used

Replace loop processes with conditional execution processes, adding a conditional statement to ensure loop termination, and generate a loop-simplified program with beacon instructions to manage variable values efficiently.

Benefits of technology

Reduces processing costs and memory usage while ensuring accurate reproduction of program behavior by limiting loop executions and adding stop conditions, enabling efficient generation of verification data.

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Abstract

To efficiently generate verification data for a program if the program includes a loop process.SOLUTION: A support apparatus executes: a loop simplification process for replacing a loop process, which repeats a predetermined process as long as a predetermined condition is satisfied, with a conditional execution process, which executes the predetermined process if the predetermined condition is satisfied, included in a program, and generating a loop simplification program in which a conditional statement for checking that the predetermined condition is not satisfied is added after the predetermined process in the conditional execution process; and a fulfillment value derivation process for outputting input data to be input to the program, covering the instructions of the loop simplification program.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to a support device, a support method, and a support program.

Background Art

[0002] In order to execute a developed program in another environment, it is often necessary to change (port) the program language to another program language. In this case, it is very important to verify whether the program has been ported correctly.

[0003] In this regard, there is a method of generating verification data (patterns of program input data and output data (confirmation data)) for the program before transplantation, and using this verification data to verify whether the execution results of the program before transplantation and the program after transplantation are the same.

[0004] Patent Document 1 discloses a technique for automatically generating verification data using symbolic execution.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] However, the above-described technique has a problem that when there is a loop process in the program, the cost of the symbolic execution process becomes high. In the symbolic execution process, every time an instruction is executed, the value of the variable edited by the instruction is derived and managed. Therefore, when there is a loop process in the program, the processing cost of deriving the value of the variable increases, and further, the number of variables to be managed increases, so the required memory amount increases.

[0007] From the perspective of command coverage, it is only necessary to execute the loop process once. Therefore, although it is conceivable to limit the number of executions of the loop process, the following problems (1) and (2) occur because the actual behavior of the program cannot be reproduced. (1) Since it is impossible to generate a call destination condition for specifying the stop condition of the loop statement process, it is impossible to surely generate verification data for stopping the loop process. For example, there is a possibility that verification data in which the loop does not stop (falls into an infinite loop) is generated when verifying the program after transplantation. (2) Regarding the counter variable in the loop process, since the value after the execution of the loop process cannot be generated, the behavior after the loop process cannot be accurately reproduced.

[0008] The present invention has been made in view of such circumstances, and an object thereof is to provide a support device, a support method, and a support program capable of efficiently generating verification data for a program when the program includes a loop process.

Means for Solving the Problems

[0009] One aspect of the present invention for solving the above problems has a processor and a memory, and replaces a loop process that repeats a predetermined process as long as a predetermined condition included in the program is satisfied with a conditional execution process that executes the predetermined process when the predetermined condition is satisfied. In the conditional execution process, a loop simplification program is generated that adds a conditional statement on the condition that the predetermined condition is not satisfied after the predetermined process. A loop simplification process, and a sufficient value derivation process that outputs input data input to the program that covers the instructions of the loop simplification program.

Effects of the Invention

[0010] According to the present invention, it is possible to support efficiently generating verification data for a program when the program includes a loop process. Configurations, effects, and the like other than those described above will be clarified by the description of the following embodiments.

Brief Description of the Drawings

[0011]

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Embodiments for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following description and drawings are examples for explaining the present invention, and for the sake of clarity of explanation, appropriate omissions and simplifications are made. The present invention can also be implemented in various other forms. Unless otherwise particularly limited, each component may be in a single or plural number. The positions, sizes, shapes, ranges, etc. of the respective components shown in the drawings may not represent the actual positions, sizes, shapes, ranges, etc. in order to facilitate the understanding of the invention. For this reason, the present invention is not necessarily limited to the positions, sizes, shapes, ranges, etc. disclosed in the drawings. In the following description, various information may be described using expressions such as "table", "list", "queue", etc. However, the various information may be represented by data structures other than these. In order to indicate that it does not depend on the data structure, "XX table", "XX list", etc. may be referred to as "XX information". When explaining the identification information, expressions such as "identification information", "identifier", "name", "ID", "number", etc. are used, and these can be replaced with each other. When there are multiple components having the same or similar functions, they may be described with the same reference numeral and different subscripts. However, when it is not necessary to distinguish these multiple components, the subscripts may be omitted in the description. Also, in the following description, the processing performed by executing a program may be described. However, the program is executed by a processor (e.g., CPU, GPU), and the defined processing is performed while appropriately using a storage resource (e.g., memory) and / or an interface device (e.g., communication port), etc. Therefore, the subject of the processing may be the processor. Similarly, the subject of the processing performed by executing the program may be a controller, device, system, computer, node having a processor. The subject of the processing performed by executing the program may be an arithmetic unit and may include a dedicated circuit (e.g., FPGA or ASIC) for performing a specific processing. The program may be installed from a program source into a device such as a computer. The program source may be, for example, a program distribution server or a computer-readable storage medium. When the program source is a program distribution server, the program distribution server includes a processor and a storage resource for storing the program to be distributed, and the processor of the program distribution server may distribute the program to be distributed to other computers. Also, in the following description, two or more programs may be realized as one program, or one program may be realized as two or more programs.

[0013] <System Configuration> FIG. 1 is a diagram showing a configuration example of a program verification data generation support system 1 according to the present embodiment. The program verification data generation support system 1 includes a program verification data generation support device 10, and a data server 20 that stores a program 21 created by a user and its source code. The program 21 is a program described in a certain language (for example, COBOL). The program verification data generation support device 10 and the data server 20 are communicably connected by a wired or wireless network such as a LAN (Local Area Network), WAN (Wide Area Network), Internet, or dedicated line.

[0014] The user converts (ports) the program 21 into another program described in another language (for example, Java (registered trademark)). The program verification data generation support device 10 generates a verification data table 30, which is a list of verification data describing combinations of input data (values of input variables) and confirmation data (output values of the program for the values of the input variables) to be input to the program for verifying the correctness (program identity) of the porting. In the present embodiment, a case of generating verification data for unit testing of a program will be described as an example.

[0015] The program verification data generation support device 10 has functions of a loop simplification processing unit 101, a symbolic execution unit 102, a satisfaction value derivation unit 103, and a verification data generation unit 104.

[0016] The loop simplification processing unit 101 replaces a loop process that repeats a predetermined process as long as a predetermined condition is satisfied, which is included in the program 21, with a conditional execution process that executes a predetermined process when a predetermined condition is satisfied, and in the conditional execution process, after the predetermined process, a termination condition statement is added on the condition that the predetermined condition is not satisfied. A simplified program 111 with a beacon instruction (loop simplified program) is generated. The loop process is a process that repeats a specific process under specific conditions. The loop simplification processing unit 101 outputs the generated simplified program 111 with a beacon instruction to the symbolic execution unit 102.

[0017] The symbol execution unit 102 symbolically executes the simplified program 111 with beacon instructions to extract all the conditions of the input variables (input variable conditions) for each execution path, and generates an input variable condition table 112 representing the content of each extracted input variable condition (input rule). The symbol execution unit 102 outputs the generated input variable condition table 112 to the satisfaction value derivation unit 103.

[0018] The satisfaction value derivation unit 103 refers to the input variable condition table 112 to identify the input variable conditions that cover the instructions of the simplified program 111 with beacon instructions, and generates an instruction coverage input value 113 (input data to be input to the program 21) and an instruction coverage stub 114 that satisfy the identified input variable conditions. The satisfaction value derivation unit 103 outputs the instruction coverage input value 113 and the instruction coverage stub 114 to the verification data generation unit 104.

[0019] The verification data generation unit 104 inputs the instruction coverage input value 113 to the program 21 and executes the program 21 using the instruction coverage stub 114. Then, the verification data generation unit 104 extracts the values of each variable in the execution result. The verification data generation unit 104 generates a verification data table 30 by associating the instruction coverage input value 113 (input data) with the extracted values of each variable (output data), and outputs the generated verification data table 30.

[0020] FIG. 2 is a diagram showing an example of the hardware included in the program verification data generation support apparatus 10 and the data server 20. The program verification data generation support apparatus 10 and the data server 20 include a processing device 11 (processor) such as a CPU (Central Processing Unit), a main storage device 12 (memory) such as a RAM (Random Access Memory) or a ROM (Read Only Memory) in which programs and data are expanded, an auxiliary storage device 13 including an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a flash memory, an input device 14 such as a keyboard or a touch panel, an output device 15 such as a monitor or a display, and a communication device 16 such as a network interface card for communicating with other information processing devices.

[0021] Each function of the program verification data generation support apparatus 10 and the data server 20 described above is realized by the processing device 11 reading and executing each program for realizing each function stored in the main storage device 12 or the auxiliary storage device 13. Note that each program may be recorded in advance on an external storage medium or may be introduced when necessary via a predetermined communication network. Also, each program can be recorded and distributed, for example, on a portable or fixed recording medium. Next, the processing performed by the program verification data generation support apparatus 10 will be described.

[0022] <<Overview of Processing>> FIG. 3 is a processing flowchart for explaining the overview of the processing performed by the program verification data generation support apparatus 10. The processing shown in this figure is started, for example, when the program verification data generation support apparatus 10 receives a specified input of the program 21 from the user and receives the source code of the program 21 from the data server 20.

[0023] First, the loop simplification processing unit 101 executes loop simplification processing for simplifying the loop processing in the program 21 (S100).

[0024] <Loop Simplification Processing> FIG. 4 is a processing flow diagram for explaining the details of the loop simplification processing. FIG. 5 is a diagram for explaining an example of the loop simplification processing. The loop simplification processing unit 101 rewrites the loop processing in a problem-free form (so as to reduce the processing cost and the required memory amount) when symbolically executing the program 21 including the loop processing. Hereinafter, the case of generating the input data for the unit test of the function main() of the program 21 shown in FIG. 5 will be described as an example.

[0025] First, the loop simplification processing unit 101 extracts all loop blocks in the source code of the program 21 (S101). A loop block is a processing block of the loop processing. For example, in the example of the program 21 shown in FIG. 5, the loop simplification processing unit 101 extracts the first loop block R1 and the second loop block R2.

[0026] Subsequently, the loop simplification processing unit 101 executes the following processes S102 to S105 for each of the extracted loop blocks.

[0027] First, the loop simplification processing unit 101 determines the method of inserting a stub for updating each reference variable included in the loop conditional expression (an expression representing the condition for repeating the loop processing) of the loop block (S102). The loop simplification processing unit 101 determines "add new call" when all of the following conditions (Condition 1-1) to (Condition 1-2) are satisfied, and determines "add existing call reference variable" when all of the following conditions (Condition 2-1) to (Condition 2-3) are satisfied, and determines "do not operate the call statement" when it does not fall under either "add existing call reference variable" or "add new call". When the loop simplification processing unit 101 determines "do not operate the call statement" (S102: do not operate), it proceeds to the process of S105.

[0028] (Condition 1-1) The variable in the loop conditional expression is not included as an argument variable of the call instruction in the loop block. (Condition 1-2) The value of the variable in the loop conditional expression has been changed (e.g., incremented or decremented).

[0029] (Condition 2-1) It does not correspond to "Add new call". (Condition 2-2) There is a call instruction of another function in the loop block. (Condition 2-3) The variable in the loop conditional expression is not included as an argument variable of the call instruction in the loop block.

[0030] Figure 6 is a diagram for explaining a determination example of an insertion method of a stub for updating a reference variable in a loop conditional expression. In the loop block R1 with the loop block number "1", since the reference variable "file_no" in the loop conditional expression "not file_no == 9" is not changed during the loop process, it does not correspond to "Add new call" (Condition 2-2). Also, the loop block R1 has a call instruction "sub1()" of another function in the loop block (Condition 2-2), and the variable "file_no" in the loop conditional expression is not included as an argument variable of the call instruction "sub1()" in the loop block (Condition 2-3). Therefore, since the loop block number "1" satisfies all of (Condition 2-1) to (Condition 2-3), the determination result is "Add reference variable to existing call".

[0031] Also, in the loop block R2 with the loop block number "2", the reference variable "i" in the loop conditional expression "!(i > 50)" is incremented (Condition 1-2), and the variable "i" in the loop conditional expression is not included as an argument variable of the call instruction in the loop block (Condition 1-1). Therefore, since the loop block number "2" satisfies all of (Condition 1-1) to (Condition 1-2), the determination result is "Add new call".

[0032] When the loop simplification processing unit 101 determines "Add reference variable to existing call" (S102: Existing call), it adds the reference variable in the loop conditional expression to the arguments of the call instructions (external call instructions) of other functions included in the loop block (S103).

[0033] In the program 22 after adding the call instruction illustrated in FIG. 5, the loop simplification processing unit 101 rewrites the call instruction "sub1()" of the loop block R1 into a call instruction "sub1(file_no)" 221 that takes the reference variable "file_no" within the loop conditional expression "not file_no == 9" as an argument.

[0034] When the loop simplification processing unit 101 determines "new call addition" (S102: new call), it newly adds a call instruction (external call instruction) of another function that updates the reference variable within the loop conditional expression to the loop block (S104).

[0035] In the program 22 after adding the call instruction illustrated in FIG. 5, the loop simplification processing unit 101 adds a new call instruction "STUB_LOOP(i)" 222 that calls another function to the loop block R2.

[0036] Subsequently, the loop simplification processing unit 101 replaces the loop instruction of the loop block with a conditional statement and inserts the stop conditional statement of the loop instruction at the end of the loop block (S105). Specifically, the loop simplification processing unit 101 replaces the loop instruction with a conditional statement (if statement) that uses the loop conditional expression of the loop instruction as the conditional expression. That is, the loop simplification processing unit 101 replaces the loop processing with conditional execution processing that executes the processing within the loop when the loop conditional expression of the loop processing is true. In addition, the loop simplification processing unit 101 adds a conditional statement (if statement) of the conditional expression that stops the loop processing at the end of the loop block. That is, the loop simplification processing unit 101 adds a stop conditional statement that is conditional on the loop conditional expression not being satisfied at the end of the conditional execution processing.

[0037] In the program 23 after the conditional statement replacement and termination conditional statement insertion of the loop instruction illustrated in FIG. 5, the loop simplification processing unit 101 replaces the loop instruction "while not file_no == 9:" of the loop block R1 with the conditional statement "if not file_no == 9:" 231, and adds the termination conditional statement "if (not (not file_no == 9)):" 232 of the loop instruction to the end of the loop block. Further, the loop simplification processing unit 101 replaces the loop instruction "while!(i > 50):" of the loop block R2 with the conditional statement "if!(i > 50):" 233, and adds the termination conditional statement "if(! (!(i > 50))):" 234 of the loop instruction to the end of the loop block.

[0038] Finally, the loop simplification processing unit 101 generates a simplified program 111 with beacon instructions by inserting beacon instructions for symbolic execution into the program 23 after the conditional statement replacement and termination conditional statement insertion of the loop instruction (S106), and ends this loop simplification processing. For example, the loop simplification processing unit 101 adds processing for updating the value of a predetermined variable to the program 21 every time it passes through the conditional statement (conditional execution processing) or termination conditional statement obtained by replacing the loop instruction.

[0039] In the simplified program 111 with beacon instructions of the loop instruction illustrated in FIG. 5, the loop simplification processing unit 101 adds beacon instructions 241 to 245 in which the variable "BRANCH_NO" (initial value is 0) increases by a power of 2 in order from the top of the source code (processing order) immediately after each conditional statement (if statement). Specifically, the loop simplification processing unit 101 inserts a beacon instruction 241 that adds 1 (2 to the power of 0) to the variable "BRANCH_NO" immediately after the first conditional statement "if not file_no == 9:", inserts a beacon instruction 242 that adds 2 (2 to the power of 1) to the variable "BRANCH_NO" immediately after the second conditional statement "if (not (not file_no == 9)):", inserts a beacon instruction 243 that adds 4 (2 to the power of 2) to the variable "BRANCH_NO" immediately after the third conditional statement "if!(i > 50):", inserts a beacon instruction 244 that adds 8 (2 to the power of 3) to the variable "BRANCH_NO" immediately after the fourth conditional statement "if(! (!(i > 50))):", and inserts a beacon instruction 245 that adds 16 (2 to the power of 4) to the variable "BRANCH_NO" immediately after the fourth conditional statement "if i + j == 50:". As a result, each time each conditional statement is passed, the variable "BRANCH_NO" increases by a power of 2.

[0040] By rewriting the program 21 into the simplified program 111 with beacon instructions in this way, it is possible to reduce the cost of symbolic execution processing and generate appropriate verification data for verification of the program after transplantation.

[0041] Subsequent to the loop simplification processing, the symbolic execution unit 102 executes symbolic execution processing (S200). Specifically, the symbolic execution unit 102 extracts all input variable conditions (conditions of input values input to the program 21) in the conditional branch processing of each execution path of the simplified program 111 with beacon instructions by performing symbolic execution on the simplified program 111 with beacon instructions, and generates an input variable condition table 112 representing the content of each extracted input variable condition.

[0042] (Input Variable Condition Table) FIG. 7 is a diagram showing an example of the input variable condition table 112. The input variable condition table 112 has data items for each of BRANCH_NO1121 where the value of the variable "BRANCH_NO" is set, execution path 1122 where the number of lines of the execution path is set, input variable condition 1123 where the condition of the input variable passing through the execution path is set, and processing target 1124. For input variable conditions that are not subject to the subsequent processing by the satisfaction value derivation unit 103, "excluded" is set in the processing target 1124.

[0043] For example, in the examples shown in FIGS. 5 and 7, the symbol execution unit 102 does not pass through the loop instruction stop condition statement "if (not (not file_no == 9)):" 232 or the stop condition statement "if(! (!(i > 50))):" 232, and only passes through the loop process replaced in the conditional statement (if statement). "Excluded" is set in the processing target 1124 for BRANCH_NO "1" and BRANCH_NO "12". Such input variable conditions are because there is a risk that the loop process may not end (fall into an infinite loop).

[0044] Subsequently, the satisfaction value derivation unit 103 executes satisfaction value derivation processing (S300). Specifically, the satisfaction value derivation unit 103 refers to the input variable condition table 112, extracts input variable conditions that cover the instructions of the simplified program 111 with beacon instructions, and generates and outputs an instruction coverage input value 113 and an instruction coverage stub 114 that satisfy the extracted input variable conditions.

[0045] In the example shown in FIG. 7, the satisfaction value derivation unit 103 identifies BRANCH_NO "31" with the largest value of "BRANCH_NO" as an input variable condition that covers the instructions of the simplified program 111 with beacon instructions, and generates an instruction coverage input value 113 and an instruction coverage stub 114 that satisfy the identified input variable condition. For example, the satisfaction value derivation unit 103 generates an instruction coverage stub 114 of a call instruction for setting the value of a reference variable so as to cover the instructions of the simplified program 111 with beacon instructions.

[0046] FIG. 8 is a diagram showing an example of the instruction coverage input value 113 and the instruction coverage stub 114. In this figure, the instruction coverage input value (i = 0, j = 0) in the unit test of the main() function of the program 21 illustrated in FIG. 5, and the instruction coverage stub (sub1(file_no)) are illustrated. For example, in the instruction coverage stub (sub1(file_no)), by setting "file_no = 9", the subsequent stop condition statement "if (not (not file_no == 9)):" 232 can be passed. That is, the satisfaction value derivation unit 103 generates a stub necessary for the execution of the loop process and an input value taking into account the execution of the loop process.

[0047] Subsequently, the verification data generation unit 104 executes a verification data generation process (S400). Specifically, the verification data generation unit 104 inputs the instruction coverage input value 113 into the program 21 and executes the program 21 using the instruction coverage stub 114. Then, the verification data generation unit 104 extracts the values of each variable in the execution result, associates the instruction coverage input value 113 (input data) with the extracted values of each variable (output data) to generate a verification data table 30, and outputs the generated verification data table 30. Thereafter, the program verification data generation support apparatus 10 ends the process.

[0048] As described above, the program verification data generation support apparatus 10 according to the present embodiment replaces a loop process that repeats a predetermined process as long as a predetermined condition is satisfied with a conditional execution process that executes a predetermined process when a predetermined condition is satisfied, and in the conditional execution process, after the predetermined process, a loop simplification process for generating a loop simplification program in which a conditional statement (stop condition statement) is added on the condition that a predetermined condition is not satisfied, and a satisfaction value derivation process for outputting input data to be input to the program that covers the instructions of the loop simplification program are executed.

[0049] That is, the program verification data generation support device 10 according to the present embodiment limits the number of executions of the loop process to one by replacing the loop process with a conditional execution process. As a result, in symbolic execution, the processing cost (computation amount) for deriving the value of a variable and the memory amount for managing the variable can be reduced. Then, the program verification data generation support device 10 enables the generation of input data that surely stops the loop process by adding a stop condition statement for stopping the loop process. For example, by generating input data that passes through the stop condition statement, it is possible to surely stop the loop process (prevent falling into an infinite loop) when verifying the program after transplantation. This is because the input data that passes through the stop condition statement is input data that surely stops the loop process. Thereby, even if the loop process is executed only once, a situation similar to the case where the loop process is repeatedly executed can be reproduced. Therefore, when a program includes a loop process, it is possible to support the efficient generation of verification data for the program.

[0050] Also, in the loop simplification process, the program verification data generation support device 10 according to the present embodiment includes an external call instruction with a reference variable of a predetermined condition as an argument in a predetermined process of the conditional execution process, and generates a stub of an external call instruction for setting the value of the reference variable so as to cover the instructions of the loop simplified program in the satisfaction value derivation process.

[0051] That is, the program verification data generation support device 10 according to the present embodiment generates a stub for updating the reference variable of the conditional expression of the loop process so as to pass through the stop condition statement. Thereby, even when the loop process is executed only once, the value of the reference variable can be made the same as when the loop process is repeatedly executed, so that the behavior after the loop process can be reproduced more accurately.

[0052] In addition, in the loop simplification process, when the value of a reference variable is changed in a predetermined process in the loop process, the program verification data generation support device 10 of the present embodiment includes an external call instruction with the reference variable as an argument in the predetermined process. When the value of the reference variable is not changed in the predetermined process in the loop process and the reference variable is not included in the arguments of the call instructions included in the predetermined process in the loop process, the reference variable is added to the arguments of the call instructions.

[0053] That is, the program verification data generation support device 10 of the present embodiment includes an external call instruction with the reference variable of the conditional expression of the loop process as an argument in the conditional execution process so that the amount of change from the original program is less. Thereby, it is possible to prevent the behavior of the original program and the loop-simplified program from being significantly different.

[0054] In addition, in the loop simplification process, the program verification data generation support device 10 of the present embodiment adds a process (beacon instruction) for updating the value of a predetermined variable "BRANCH_NO" every time it passes through a conditional execution process or a stop conditional statement to the program. In the satisfaction value derivation process, based on the value of the variable "BRANCH_NO", the conditions of the input values input to the program that covers the instructions of the loop-simplified program are specified, and the input data that satisfies the conditions is output.

[0055] That is, the program verification data generation support device 10 of the present embodiment makes it possible to easily determine whether or not it has passed through a conditional execution process or a stop conditional statement based on the value of the variable "BRANCH_NO". Thereby, it is possible to derive input data that more efficiently covers the instructions of the loop-simplified program.

[0056] Also, in the satisfaction value derivation process, the program verification data generation support device 10 according to the present embodiment derives the conditions of input values (input variable condition table 112) for each execution path of the loop-simplified program by symbolic execution, and based on the value of the variable "BRANCH_NO", specifies the conditions of input values that cover the instructions of the loop-simplified program from the derived conditions of input values, and outputs the input data that satisfies the conditions.

[0057] That is, the program verification data generation support device 10 according to the present embodiment generates an input variable condition table 112 that represents the conditions of input values for each execution path of the loop-simplified program by symbolic execution. Thereby, it is possible to more efficiently specify the input data that covers the instructions of the loop-simplified program.

[0058] The present invention is not limited to the above-described embodiment, and can be implemented using any components without departing from the gist thereof. The embodiments and modifications described above are merely examples, and the present invention is not limited to these contents as long as the features of the invention are not impaired. Also, although various embodiments and modifications have been described above, the present invention is not limited to these contents. Other aspects conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention.

[0059] For example, a part of the hardware provided in each device according to the present embodiment may be provided in other devices.

[0060] Also, each program of the program verification data generation support device 10 may be provided in other devices, or a certain program may be composed of a plurality of programs, or a plurality of programs may be integrated into one program.

[0061] Also, in the present embodiment, the case where the language of the source code of program 21 is COBOL has been described, but the present invention can be applied to programs in other languages as long as they support loop processing.

[0062] Also, the system configuration described in this embodiment is an example, and some functions of the program verification data generation support device 10 and the data server 20 may be provided in other information processing devices, or some of the functions of the program verification data generation support device 10 and the data server 20 may be integrated.

Explanation of Signs

[0063] 1 Program verification data generation support system 10 Program verification data generation support device 20 Data server 101 Loop simplification processing unit 102 Symbol execution unit 103 Satisfaction value derivation unit 104 Verification data generation unit

Claims

1. having a processor and a memory, replacing a loop process that repeats a predetermined process as long as a predetermined condition included in a program is satisfied with a conditional execution process that executes the predetermined process when the predetermined condition is satisfied, and in the conditional execution process, adding a conditional statement that is conditional on the predetermined condition not being satisfied after the predetermined process, to generate a loop simplification program; a satisfaction value derivation process that inputs input data to the program and outputs the input data that covers the instructions of the loop simplification program; A support device that executes the above.

2. In the loop simplification process, including an external call instruction with a reference variable of the predetermined condition as an argument in the predetermined process of the conditional execution process, In the satisfaction value derivation process, generating a stub of the external call instruction for setting the value of the reference variable so as to cover the instructions of the loop simplification program; The support device according to claim 1.

3. In the loop simplification process, when the value of the reference variable is changed in the predetermined process in the loop process, including the external call instruction with the reference variable as an argument in the predetermined process; when the value of the reference variable is not changed in the predetermined process in the loop process and the reference variable is not included in the arguments of the call instructions included in the predetermined process in the loop process, adding the reference variable to the arguments of the call instructions; The support device according to claim 2.

4. In the loop simplification process, adding a process of updating the value of a predetermined variable every time passing through the conditional execution process or the conditional statement to the program; In the satisfaction value derivation process, specifying the conditions of the input values input to the program that cover the instructions of the loop simplification program based on the value of the predetermined variable, and outputting the input data that satisfies the conditions; The support device according to claim 1.

5. In the satisfaction value derivation process, deriving the conditions of the input values for each execution path of the loop simplification program by symbolic execution, specifying the conditions of the input values that cover the instructions of the loop simplification program from the derived conditions of the input values based on the value of the predetermined variable, and outputting the input data that satisfies the conditions; The support device according to claim 4.

6. An information processing apparatus, Replace a loop process that repeats a predetermined process as long as a predetermined condition is satisfied, which is included in a program, with a conditional execution process that executes the predetermined process when the predetermined condition is satisfied, and in the conditional execution process, after the predetermined process, generate a loop simplification program in which a conditional statement is added on the condition that the predetermined condition is not satisfied. The loop simplification process, Execute a sufficient value derivation process that outputs input data to be input to the program, covering the instructions of the loop simplification program. Support method.

7. In an information processing apparatus, Replace a loop process that repeats a predetermined process as long as a predetermined condition is satisfied, which is included in a program, with a conditional execution process that executes the predetermined process when the predetermined condition is satisfied, and in the conditional execution process, after the predetermined process, generate a loop simplification program in which a conditional statement is added on the condition that the predetermined condition is not satisfied. The loop simplification process, Execute a sufficient value derivation process that outputs input data to be input to the program, covering the instructions of the loop simplification program. Support program.

Citation Information

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