Backup power supply, control method and control program
The backup power supply device addresses the inefficiency of shared coils by using switching elements as synchronous rectifiers to charge and discharge capacitors, reducing components and enhancing efficiency.
Patent Information
- Application Number
- JP2025070424
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-04-22
- Publication Date
- 2025-07-23
- Estimated Expiration
- 2041-04-30
AI Technical Summary
The existing backup power supply devices have a high number of components due to the shared coil between boost and buck circuits, which is inefficient and increases complexity.
A backup power supply device with a control method and program that utilizes a first and second switching element, operating as a step-down and boost circuit respectively, to charge and discharge an electric double layer capacitor, and a control unit that switches these elements as synchronous rectifiers based on input voltage, reducing the need for additional rectifying elements.
This configuration reduces the number of components and improves efficiency by eliminating the need for an output rectifying element and minimizing losses, while ensuring effective charging and discharging operations.
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Figure 2025108693000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a backup power supply device, a control method, and a control program.
Background Art
[0002] Vehicles are equipped with various devices that operate using the power of a battery (for example, an accessory battery). Patent Document 1 describes a backup power supply device for operating the above devices even when the battery cannot output power due to a traffic accident or the like.
[0003] The backup power supply device described in Patent Document 1 shares a coil between a boost circuit and a buck circuit. That is, the boost circuit and the buck circuit constitute a buck-boost circuit.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] The backup power supply device described in Patent Document 1 includes an output rectifying element connected in the forward direction from the boost circuit to the terminal portion as a current output path from the electric double layer capacitor to the terminal portion. However, it is desirable to suppress the number of components.
[0006] An object of the present invention is to provide a backup power supply device, a control method, and a control program capable of suppressing the number of components.
Means for Solving the Problems
[0007] A backup power supply device according to one aspect of the present invention is An input terminal, an output terminal, a connection point electrically connected to the output terminal, and an input rectifying element having an anode electrically connected to the input terminal and a cathode electrically connected to the connection point, and a terminal portion having the same; An electric double layer capacitor having one end electrically connected to a reference potential; A first switching element having one end electrically connected to the connection point; A coil having one end electrically connected to the other end of the first switching element and the other end electrically connected to the other end of the electric double layer capacitor; A second switching element having one end electrically connected to the other end of the first switching element and one end of the coil and the other end electrically connected to a reference potential; When the input voltage input to the input terminal is equal to or higher than a predetermined first set voltage, based on the current flowing through the first switching element and the charging voltage of the electric double layer capacitor, the first switching element is switched to operate the first switching element and the coil as a step-down circuit to charge the electric double layer capacitor, and perform control in a first mode. When the input voltage is less than the first set voltage, based on the current flowing through the second switching element and the output voltage output from the output terminal, the second switching element is switched to operate the second switching element and the coil as a boost circuit to discharge the electric double layer capacitor, and perform control in a second mode. A control unit; Comprising; The control unit is: In the first mode, the second switching element is switched as a synchronous rectifying element of the step-down circuit, and in the second mode, the first switching element is switched as a synchronous rectifying element of the boost circuit. Characterized by the above.
[0008] In the backup power supply device, The control unit is: In the first mode, when the current flowing through the second switching element becomes zero or reverses, the second switching element is turned off, and in the second mode, when the current flowing through the first switching element becomes zero or reverses, the first switching element is turned off. It is characterized by this.
[0009] In the backup power supply device, The control unit makes the switching frequency in the second mode higher than the switching frequency in the first mode. It is characterized by this.
[0010] In the backup power supply device, The control unit has a first error amplifier that detects the error between the charging voltage of the electric double layer capacitor and the target charging voltage of the electric double layer capacitor, and a second error amplifier that detects the error between the output voltage and the target voltage of the output voltage, and in the first mode, the charging voltage of the electric double layer capacitor is controlled using the first error amplifier, and in the second mode, the output voltage is controlled using the second error amplifier. It is characterized by this.
[0011] In the backup power supply device, The control unit has an overvoltage protection circuit that stops the switching operations of the first switching element and the second switching element when the charging voltage of the electric double layer capacitor becomes equal to or higher than a predetermined second set voltage in the first mode, and stops the switching operations of the first switching element and the second switching element when the output voltage becomes equal to or higher than a predetermined third set voltage in the second mode. It is characterized by this.
[0012] In the backup power supply device, the control unit has a sawtooth wave generation circuit for generating a sawtooth wave that determines the switching frequencies of the first switching element and the second switching element, and performs current mode control by adding current information of the current flowing through the first switching element to the sawtooth wave in the first mode and adding current information of the current flowing through the second switching element to the sawtooth wave in the second mode. This is the gist.
[0013] In the backup power supply device, the control unit switches between the first mode and the second mode at the timing of the start of the switching period. This is the gist.
[0014] A control method according to an aspect of the present invention is a control method for a backup power supply device including an input terminal, an output terminal, a connection point electrically connected to the output terminal, a terminal unit having an input rectifying element with an anode electrically connected to the input terminal and a cathode electrically connected to the connection point, an electric double layer capacitor having one end electrically connected to a reference potential, a first switching element having one end electrically connected to the connection point, a coil having one end electrically connected to the other end of the first switching element and the other end electrically connected to the other end of the electric double layer capacitor, and a second switching element having one end electrically connected to the other end of the first switching element and one end of the coil and the other end electrically connected to the reference potential, When the input voltage input to the input terminal is equal to or higher than a predetermined first set voltage, based on the current flowing through the first switching element and the charging voltage of the electric double layer capacitor, by switching the first switching element, the first switching element and the coil are operated as a step-down circuit to charge the electric double layer capacitor, and control in a first mode is performed. When the input voltage is less than the first set voltage, based on the current flowing through the second switching element and the output voltage output from the output terminal, by switching the second switching element, the second switching element and the coil are operated as a boost circuit to discharge the electric double layer capacitor, and control in a second mode is performed. In the first mode, the second switching element is switched as a synchronous rectifier element of the step-down circuit, and in the second mode, the first switching element is switched as a synchronous rectifier element of the boost circuit. Characterized by the above.
[0015] A control program according to an aspect of the present invention is a control program for a backup power supply device including an input terminal, an output terminal, a connection point electrically connected to the output terminal, and a terminal unit having an input rectifier element with an anode electrically connected to the input terminal and a cathode electrically connected to the connection point, an electric double layer capacitor with one end electrically connected to a reference potential, a first switching element with one end electrically connected to the connection point, a coil with one end electrically connected to the other end of the first switching element and the other end electrically connected to the other end of the electric double layer capacitor, and a second switching element with one end electrically connected to the other end of the first switching element and one end of the coil and the other end electrically connected to the reference potential. When the input voltage input to the input terminal is equal to or higher than a predetermined first set voltage, based on the current flowing through the first switching element and the charging voltage of the electric double layer capacitor, the first switching element is switched to operate the first switching element and the coil as a step-down circuit to charge the electric double layer capacitor, and perform control in the first mode. When the input voltage is lower than the first set voltage, based on the current flowing through the second switching element and the output voltage output from the output terminal, the second switching element is switched to operate the second switching element and the coil as a boost circuit to discharge the electric double layer capacitor, and perform control in the second mode. In the first mode, the second switching element is switched as a synchronous rectifier element of the step-down circuit, and in the second mode, the first switching element is switched as a synchronous rectifier element of the boost circuit. Cause the processing device to execute this.
Effect of the Invention
[0016] The backup power supply device, control method, and control program according to one aspect of the present invention have the effect of suppressing the number of components.
Brief Description of the Drawings
[0017]
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[0018] Hereinafter, embodiments of the backup power supply device, control method, and control program of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited by this embodiment.
[0019] <Embodiment> FIG. 1 is a diagram showing a configuration of a backup power supply device according to the embodiment.
[0020] When the voltage V of the battery 2 is equal to or higher than a predetermined input voltage threshold, the backup power supply device 1 uses the power supplied from the battery 2 via the input terminals 1a and 1b to charge the electric double layer capacitor 3. IN When the voltage V of the battery 2 is equal to or higher than a predetermined input voltage threshold, the backup power supply device 1 uses the power supplied from the battery 2 via the input terminals 1a and 1b to charge the electric double layer capacitor 3.
[0021] The input voltage threshold corresponds to an example of the "first set voltage" of the present disclosure.
[0022] When the voltage V of the battery 2 is equal to or higher than a predetermined input voltage threshold, the backup power supply device 1 uses the power supplied from the battery 2 via the input terminals 1a and 1b to charge the electric double layer capacitor 3. INWhen the voltage is less than the input voltage threshold, a DC voltage is output from the output terminal 1c using the power charged in the electric double layer capacitor 3. The power output from the output terminal 1c is supplied to an electronic device (not shown).
[0023] The battery 2 is exemplified by an accessory battery mounted on a vehicle, but the present disclosure is not limited thereto. The voltage V IN is exemplified by 12V or 24V, but the present disclosure is not limited thereto. The input voltage threshold is exemplified by 9V, but the present disclosure is not limited thereto.
[0024] The backup power supply device 1 includes resistors R1 to R 12 up to, a capacitor C1, an electric double layer capacitor 3, a buck-boost circuit 4, a terminal portion 5, and a control portion 10. The buck-boost circuit 4 includes switching elements Q1 and Q2 and a coil L1. The terminal portion 5 includes input terminals 1a and 1b, an output terminal 1c, and a diode D1.
[0025] The input terminal 1a is electrically connected to the high potential side end of the battery 2. The input terminal 1b is electrically connected to the low potential side end of the battery 2. The low potential side end of the battery 2 is electrically connected to a reference potential. The reference potential is exemplified by a ground potential, but the present disclosure is not limited thereto.
[0026] One end of the resistor R1 is electrically connected to the input terminal 1a on the high potential side. The other end of the resistor R1 is electrically connected to one end of the resistor R2. The other end of the resistor R2 is electrically connected to the input terminal 1b on the low potential side. The resistors R1 and R2 output a voltage V1 obtained by resistively dividing the voltage V IN to the control portion 10. That is, V1 = V IN ÷ (R1 + R2) × R2.
[0027] The anode of the diode D1 is electrically connected to the input terminal 1a. The cathode of the diode D1 is electrically connected to the node N1.
[0028] Node N1 corresponds to an example of the "connection point" of the present disclosure.
[0029] Diode D1 conducts current from battery 2 to node N1 when the voltage V IN is higher than the voltage V N1 of node N1. Diode D1 blocks current from node N1 to battery 2 when the voltage V IN is lower than the voltage V N1 of node N1.
[0030] One end of capacitor C1 is electrically connected to node N1. The other end of capacitor C1 is electrically connected to input terminal 1b. Capacitor C1 stabilizes and smoothes the voltage V N1 .
[0031] When the backup power supply device 1 charges the electric double layer capacitor 3, the voltage V N1 is the input voltage, that is, the voltage V IN . When the backup power supply device 1 discharges the electric double layer capacitor 3, the voltage V N1 is the output voltage.
[0032] One end of resistor R3 is electrically connected to node N1. The other end of resistor R3 is electrically connected to one end of resistor R4. The other end of resistor R4 is electrically connected to input terminal 1b. Resistors R3 and R4 output the voltage V2 obtained by resistively dividing the voltage V N1 to the control unit 10. That is, V2 = V N1 ÷(R3 + R4) × R4.
[0033] When the backup power supply device 1 charges the electric double layer capacitor 3, the voltage V2 is a voltage proportional to the input voltage, that is, the voltage V IN (= voltage V N1 ). When the backup power supply device 1 discharges the electric double layer capacitor 3, the voltage V2 is a voltage proportional to the output voltage, that is, the voltage V N1 .
[0034] One end of resistor R5 is electrically connected to node N1. The other end of resistor R5 is electrically connected to the drain of switching element Q1. The voltage V6 at one end of resistor R5 and the voltage V7 at the other end of resistor R5 are input to control unit 10.
[0035] The source of switching element Q1 is electrically connected to one end of coil L1. A switching control signal S1 is input from control unit 10 to the gate of switching element Q1 via resistor R6.
[0036] Switching element Q1 corresponds to an example of the "first switching element" of the present disclosure.
[0037] In the present disclosure, each switching element is assumed to be a MOSFET, but it is not limited thereto. Each switching element may be a silicon power device, a GaN power device, an SiC power device, an IGBT (Insulated Gate Bipolar Transistor), or the like.
[0038] Each switching element has a parasitic diode (body diode). The parasitic diode is a pn junction between the back gate of the MOSFET and the source and drain. The parasitic diode can be used as a freewheel diode to discharge the transient reverse electromotive force when the transistor is off.
[0039] Control unit 10 can detect the current flowing between the drain and source of switching element Q1 based on the voltage across both ends of resistor R5, that is, the difference between voltage V6 and voltage V7.
[0040] In the embodiment, the backup power supply device 1 is provided with the resistor R5. However, the present disclosure is not limited to this. The control unit 10 may detect the current flowing between the drain and source of the switching element Q1 based on the voltage between the drain and source of the switching element Q1. In this case, the backup power supply device 1 may not be provided with the resistor R5. However, the on-resistance of the switching element Q1 has a larger temperature change compared to the resistor R5. Therefore, when high accuracy is required, the backup power supply device 1 may be provided with the resistor R5, and when high accuracy is not required, it is advisable to use the on-resistance of the switching element Q1.
[0041] The drain of the switching element Q2 is electrically connected to the source of the switching element Q1 and one end of the coil L1. The source of the switching element Q2 is electrically connected to one end of the resistor R8. The other end of the resistor R8 is electrically connected to the input terminal 1b. A switching control signal S2 is input from the control unit 10 to the gate of the switching element Q2 via the resistor R7.
[0042] The switching element Q2 corresponds to an example of the "second switching element" of the present disclosure.
[0043] One end of the resistor R9 is electrically connected to the source of the switching element Q2 and one end of the resistor R8. The voltage V4 at the source of the switching element Q2 and one end of the resistor R8 is input to the control unit 10 via the resistor R9.
[0044] Resistor R 10 One end of is electrically connected to the source of the switching element Q2 and one end of the resistor R8. The voltage V5 at the source of the switching element Q2 and one end of the resistor R8 is input to the control unit 10 via the resistor R 10 and is input to the control unit 10.
[0045] The control unit 10 can detect the current flowing between the drain and source of the switching element Q2 based on the voltage across the resistor R8, that is, the voltage V4 or the voltage V5.
[0046] In the embodiment, the backup power supply device 1 is provided with the resistor R8, but the present disclosure is not limited thereto. The control unit 10 may detect the current flowing between the drain and source of the switching element Q2 based on the voltage between the drain and source of the switching element Q2. In this case, the backup power supply device 1 may not be provided with the resistor R8. However, the on-resistance of the switching element Q2 has a large temperature change compared to the resistor R8. Therefore, when high accuracy is required, the backup power supply device 1 may be provided with the resistor R8, and when high accuracy is not required, the on-resistance of the switching element Q2 may be used.
[0047] The other end of the coil L1 is electrically connected to one end (high potential side end) of the electric double layer capacitor 3. The other end (low potential side end) of the electric double layer capacitor 3 is electrically connected to the input terminal 1b.
[0048] Resistor R 11 One end of is electrically connected to one end of the electric double layer capacitor 3. Resistor R 11 The other end of is electrically connected to one end of resistor R 12 One end of is electrically connected to one end of resistor R 12 The other end of is electrically connected to the other end of the electric double layer capacitor 3. Resistor R 11 And resistor R 12 Outputs the voltage V3 obtained by resistively dividing the voltage V EDLC of the electric double layer capacitor 3 to the control unit 10. That is, V3 = V EDLC ÷(R 11 +R 12 )×R 12 is.
[0049] The control unit 10 controls the buck-boost circuit 4 based on the voltages from V1 to V7.
[0050] In the mode in which the control unit 10 charges the electric double layer capacitor 3 (hereinafter referred to as the "first mode"), the voltage V INThe buck-boost circuit 4 is controlled so as to step down the voltage and output it to the electric double layer capacitor 3. In the first mode, the input voltage of the buck-boost circuit 4 is the voltage V IN and the output voltage is the voltage V EDLC .
[0051] In the first mode, the control unit 10 operates the switching element Q1 and the coil L1 as a buck circuit. Also, in the first mode, the control unit 10 operates the switching element Q1 as a main switching element and the switching element Q2 as a synchronous rectification element.
[0052] In the mode (hereinafter referred to as the "second mode") in which the control unit 10 discharges the electric double layer capacitor 3, the buck-boost circuit 4 is controlled so as to step up the voltage V EDLC and output it to the output terminal 1c. In the second mode, the input voltage of the buck-boost circuit 4 is the voltage V EDLC and the output voltage is the voltage V N1 .
[0053] In the second mode, the control unit 10 operates the switching element Q2 and the coil L1 as a boost circuit. Also, in the second mode, the control unit 10 operates the switching element Q2 as a main switching element and the switching element Q1 as a synchronous rectification element.
[0054] The control unit 10 includes a battery voltage drop monitoring unit 11, a mode switching timing adjustment unit 12, a switching frequency setting unit 13, a switching current detection unit 14, a current information detection unit 15, an overvoltage detection unit 16, an output voltage error detection unit 17, an on / off control unit 18, a drive selection unit 19, a first level shift unit 20, a second level shift unit 21, and gate drive circuits B1 and B2.
[0055] Based on the voltage V1, the battery voltage drop monitoring unit 11 monitors the voltage V INMonitors whether the voltage has dropped below the input voltage threshold. Based on the output signal from the battery voltage drop monitoring unit 11, the mode switching timing adjustment unit 12 generates a mode signal S representing the first mode or the second mode. MODE And switches it at the timing at the start of the switching period.
[0056] Figure 2 is a diagram showing the circuit configuration of the battery voltage drop monitoring unit and the mode switching timing adjustment unit of the backup power supply device according to the embodiment.
[0057] The battery voltage drop monitoring unit 11 includes a comparator 31 and a constant voltage source 32. The voltage of the constant voltage source 32 is input to the non-inverting input terminal (+ terminal) of the comparator 31. The voltage of the constant voltage source 32 is a voltage corresponding to the input voltage threshold. Specifically, the voltage of the constant voltage source 32 is ((input voltage threshold) ÷ (R1 + R2) × R2). The voltage V1 is input to the inverting input terminal (- terminal) of the comparator 31.
[0058] When the voltage V1 is equal to or higher than the voltage of the constant voltage source 32, the comparator 31 outputs a low-level signal. That is, when the voltage V of the battery 2 is equal to or higher than the input voltage threshold, the comparator 31 outputs a low-level signal. IN When it is above the input voltage threshold, a low-level signal is output.
[0059] On the other hand, when the voltage V1 is lower than the voltage of the constant voltage source 32, the comparator 31 outputs a high-level signal. That is, when the voltage V of the battery 2 is lower than the input voltage threshold, the comparator 31 outputs a high-level signal. IN When it is below the input voltage threshold, a high-level signal is output.
[0060] The mode switching timing adjustment unit 12 includes a D-type flip-flop 41 and a one-shot circuit 42.
[0061] The output signal of the comparator 31 is input to the D terminal (signal input terminal) of the D-type flip-flop 41.
[0062] The one-shot circuit 42 receives a periodic pulse signal S representing the switching period. OSCOutput a one-shot pulse to the T terminal (trigger input terminal) of the D flip-flop 41 at the timing when (described later) changes from low level to high level.
[0063] The D flip-flop 41 captures the output signal of the comparator 31 at the timing when the one-shot pulse input from the one-shot circuit 42 changes from low level to high level. The D flip-flop 41 outputs a mode signal S representing the mode from the inverted output terminal (Q bar terminal). MODE Outputs.
[0064] The mode signal S MODE represents the first mode (charging mode) when it is at a high level and represents the second mode (discharging mode) when it is at a low level.
[0065] Referring to FIG. 1 again, the switching frequency setting unit 13 outputs a periodic pulse signal S representing the switching frequency based on the mode signal S. MODE Based on OSC Outputs.
[0066] FIG. 3 is a diagram showing the circuit configuration of the switching frequency setting unit of the backup power supply device according to the embodiment.
[0067] The switching frequency setting unit 13 includes NOT gate circuits (inverting circuits) 51 and 61, constant current sources 52, 53, 56, and 57, transfer gate circuits 54, 55, 58, 64, and 65, a capacitor 59, a comparator 60, and constant voltage sources 62 and 63.
[0068] The switching frequency setting unit 13 corresponds to an example of the "sawtooth wave generation circuit" of the present disclosure.
[0069] The NOT gate circuit 51 inverts the mode signal S and outputs it to the transfer gate circuits 54 and 58. Therefore, the transfer gate circuits 54 and 58 are in an off state when the mode signal S MODE is at a high level (first mode), and the mode signal S MODE is at a low level (second mode).MODE is turned on when it is at a low level (second mode).
[0070] The low-potential side end of the capacitor 59 is electrically connected to the reference potential.
[0071] The constant current source 52 is electrically connected between the power supply potential VDD and the high-potential side end of the capacitor 59.
[0072] One end of the constant current source 53 is electrically connected to the power supply potential VDD. The other end of the constant current source 53 is electrically connected to the high-potential side end of the capacitor 59 via the transfer gate circuit 54.
[0073] Mode signal S MODE When it is at a high level (first mode), the transfer gate circuit 54 is turned off. Therefore, the capacitor 59 is charged only by the constant current source 52. Mode signal S MODE When it is at a low level (second mode), the transfer gate circuit 54 is turned on. Therefore, the capacitor 59 is charged by both the constant current sources 52 and 53. That is, since the charging current of the capacitor 59 changes according to the MODE signal value of the mode signal S, the voltage rising speed changes.
[0074] The voltage at the high-potential side end of the capacitor 59 is the sawtooth wave signal S SAW is.
[0075] The inverting input terminal (- terminal) of the comparator 60 is electrically connected to the high-potential side end of the capacitor 59. The non-inverting input terminal (+ terminal) of the comparator 60 is electrically connected to the constant voltage source 62 via the transfer gate circuit 64 and is also electrically connected to the constant voltage source 63 via the transfer gate circuit 65.
[0076] The transfer gate circuit 64 is turned on when the output signal of the comparator 60 is at a high level and is turned off when the output signal of the comparator 60 is at a low level.
[0077] The NOT gate circuit 61 inverts the output signal of the comparator 60 and outputs it to the transfer gate circuits 55 and 65. Therefore, the transfer gate circuits 55 and 65 are in the OFF state when the output signal of the comparator 60 is at the high level, and are in the ON state when the output signal of the comparator 60 is at the low level.
[0078] The comparator 60 outputs a high-level signal when the voltage of the capacitor 59 is less than the reference voltage (the voltage of the constant voltage source 62 or 63). When the output signal of the comparator 60 is at the high level, the transfer gate circuit 64 is in the ON state, so the voltage of the constant voltage source 62 is input as the reference voltage to the non-inverting input terminal of the comparator 60.
[0079] The comparator 60 outputs a low-level signal when the voltage of the capacitor 59 is greater than or equal to the reference voltage (the voltage of the constant voltage source 62 or 63). When the output signal of the comparator 60 is at the low level, the transfer gate circuit 65 is in the ON state, so the voltage of the constant voltage source 63 is input as the reference voltage to the non-inverting input terminal of the comparator 60.
[0080] That is, the reference voltage of the comparator 60 is different when changing from the low level to the high level and when the output signal changes from the high level to the low level.
[0081] The output signal of the comparator 60 is the periodic pulse signal S OSC is.
[0082] One end of the transfer gate circuit 55 is electrically connected to the high-potential side end of the capacitor 59.
[0083] The constant current source 56 is electrically connected between the other end of the transfer gate circuit 55 and the reference potential.
[0084] One end of the transfer gate circuit 58 is electrically connected to the other end of the transfer gate circuit 55.
[0085] The constant current source 57 is electrically connected between the transfer gate circuit 58 and the reference potential.
[0086] Mode signal S MODE When it is at a high level (first mode), the capacitor 59 is discharged only by the constant current source 56. Mode signal S MODE When it is at a low level (second mode), the transfer gate circuit 58 is turned on. Therefore, the capacitor 59 is discharged by both the constant current sources 56 and 57. That is, since the discharge current of the capacitor 59 changes according to the MODE signal value of the mode signal S, the voltage drop speed changes.
[0087] Summarizing the above, when the mode signal S MODE is at a high level (first mode), the capacitor 59 is charged and discharged at a relatively slow speed. Therefore, the frequencies of the sawtooth wave signal S SAW and the periodic pulse signal S OSC become relatively low.
[0088] On the other hand, when the mode signal S MODE is at a low level (second mode), the capacitor 59 is charged and discharged at a relatively fast speed. Therefore, the frequencies of the sawtooth wave signal S SAW and the periodic pulse signal S OSC become relatively high.
[0089] FIG. 4 is a diagram showing an example of the sawtooth wave signal and the periodic pulse signal of the backup power supply device according to the embodiment.
[0090] The sawtooth wave signal S SAW starts to rise from the timing t0. The rising speed of the sawtooth wave signal S SAW depends on the current values of the constant current sources 52 and 53. The periodic pulse signal S OSC becomes high level at the timing t0.
[0091] The periodic pulse signal S OSC is the sawtooth wave signal S SAW when the voltage V 100 (voltage of the constant voltage source 62) is reached at the timing t1, becomes low level. The periodic pulse signal S OSC when it becomes low level, the reference voltage changes from the voltage V 100 (voltage of the constant voltage source 62) to the voltage V 101 (voltage of the constant voltage source 63). The sawtooth wave signal S SAW starts to decrease from the timing t1. The falling speed of the sawtooth wave signal S SAW depends on the current values of the constant current sources 56 and 57.
[0092] The periodic pulse signal S OSC is the sawtooth wave signal S SAW when the voltage V 101 is reached at the timing t2, becomes high level. The periodic pulse signal S OSC when it becomes high level, the reference voltage changes from the voltage V 101 to the voltage V 100 . The sawtooth wave signal S SAW starts to rise from the timing t2.
[0093] Referring to FIG. 1 again, the first level shifter 20 level-shifts the voltages V6 and V7 to the voltage of the ground level and outputs them to the switching current detection unit 14.
[0094] The switching current detection unit 14 detects that the current flowing through the resistor R5, that is, the drain-source current of the switching element Q1 has reached zero or reversed, based on the voltages after the voltages V6 and V7 are level-shifted.
[0095] Also, the switching current detection unit 14 detects that the current flowing through the resistor R8, that is, the drain-source current of the switching element Q2 has reached zero or reversed, based on the voltage V4.
[0096] In the first mode, when the current flowing between the drain and source of the switching element Q2, which is a synchronous rectifier element, reaches zero or reverses, the switching current detection unit 14 outputs an inversion detection signal S REV to the on / off control unit 18.
[0097] Also, in the second mode, when the current flowing between the drain and source of the switching element Q1, which is a synchronous rectifier element, reaches zero or reverses, the switching current detection unit 14 outputs an inversion detection signal S REV to the on / off control unit 18.
[0098] FIG. 5 is a diagram showing the circuit configuration of the switching current detection unit of the backup power supply device according to the embodiment.
[0099] The switching current detection unit 14 includes comparators 121 and 122, transfer gate circuits 123 and 124, and a NOT gate circuit 125.
[0100] The inverting input terminal (- terminal) of the comparator 121 is electrically connected to the reference potential. The output signal of the first level shift unit 20 is input to the non-inverting input terminal (+ terminal) of the comparator 121. When the output signal of the first level shift unit 20 is greater than zero, the comparator 121 outputs a high-level signal, and when the output signal of the first level shift unit 20 is zero or less, it outputs a low-level signal.
[0101] The inverting input terminal (- terminal) of the comparator 122 is electrically connected to the reference potential. The voltage V4 is input to the non-inverting input terminal (+ terminal) of the comparator 122. When the voltage V4 is greater than zero, the comparator 122 outputs a high-level signal, and when the voltage V4 is zero or less, it outputs a low-level signal.
[0102] The NOT gate circuit 125 inverts the mode signal S MODE and outputs it to the transfer gate circuit 124.
[0103] The transfer gate circuit 123 outputs the output signal of the comparator 121 as the inversion detection signal S when the mode signal S MODE is at a high level. REV
[0104] The transfer gate circuit 124 outputs the output signal of the comparator 122 as the inversion detection signal S when the mode signal S MODE is at a low level. REV
[0105] Referring to FIG. 1 again, the second level shifter 21 level-shifts the voltages V6 and V7 to the voltage of the ground level and outputs them to the current information detection unit 15.
[0106] In the first mode, the current information detection unit 15 detects the current information of the drain-source current of the switching element Q1 which is the main switching element.
[0107] In the second mode, the current information detection unit 15 detects the current information of the drain-source current of the switching element Q2 which is the main switching element.
[0108] FIG. 6 is a diagram showing the circuit configuration of the current information detection unit of the backup power supply device according to the embodiment.
[0109] The current information detection unit 15 includes a first voltage-current conversion unit 71, diodes 72, 75, and 79, a resistor 73, a second voltage-current conversion unit 74, a NOT gate circuit 77, transfer gate circuits 76 and 80, and a third voltage-current conversion unit 78.
[0110] The first voltage-current conversion unit 71 converts the voltage of the sawtooth wave signal S SAW into a current and outputs it.
[0111] The anode of the diode 72 is electrically connected to the first voltage-current conversion unit 71. The cathode of the diode 72 is electrically connected to one end of the resistor 73. The connection point between the cathode of the diode 72 and one end of the resistor 73 is the node N2. The other end of the resistor 73 is electrically connected to the reference potential.
[0112] The voltage of the node N2 is the current information signal S CINFO is.
[0113] The second voltage-current conversion unit 74 converts the voltage after the levels of the voltages V6 and V7 are level-shifted into a current and outputs it.
[0114] The anode of the diode 75 is electrically connected to the second voltage-current conversion unit 74. The cathode of the diode 75 is electrically connected to the node N2.
[0115] The transfer gate circuit 76 is electrically connected between the anode of the diode 75 and the reference potential.
[0116] The NOT gate circuit 77 inverts the mode signal S MODE and outputs it to the transfer gate circuit 76. Therefore, the transfer gate circuit 76 is in the off state when the mode signal S MODE is at the high level (first mode), and is in the on state when the mode signal S MODE is at the low level (second mode).
[0117] When the transfer gate circuit 76 is in the off state, the output current of the second voltage-current conversion unit 74 flows to the node N2 via the diode 75. When the transfer gate circuit 76 is in the on state, the output current of the second voltage-current conversion unit 74 flows to the reference potential.
[0118] The third voltage-current conversion unit 78 converts the voltage V5 into a current and outputs it.
[0119] The anode of the diode 79 is electrically connected to the third voltage-current conversion unit 78. The cathode of the diode 79 is electrically connected to the node N2.
[0120] The transfer gate circuit 80 is electrically connected between the anode of the diode 79 and the reference potential.
[0121] The transfer gate circuit 80 is in an on state when the mode signal S MODE is at a high level (first mode), and is in an off state when the mode signal S MODE is at a low level (second mode).
[0122] When the transfer gate circuit 80 is in an on state, the output current of the third voltage-current conversion unit 78 flows to the reference potential. When the transfer gate circuit 80 is in an off state, the output current of the third voltage-current conversion unit 78 flows to the node N2 via the diode 79.
[0123] Summarizing the above, when the mode signal S MODE is at a high level (first mode), the sum of the output current of the first voltage-current conversion unit 71 and the output current of the second voltage-current conversion unit 74 flows to the node N2. That is, the current information signal S CINFO becomes a signal in which the information of the drain-source current of the switching element Q1, which is the main switching element, is added to the sawtooth wave signal S SAW .
[0124] On the other hand, when the mode signal S MODE is at a low level (second mode), the sum of the output current of the first voltage-current conversion unit 71 and the output current of the third voltage-current conversion unit 78 flows to the node N2. That is, the current information signal S CINFO becomes a signal in which the information of the drain-source current of the switching element Q2, which is the main switching element, is added to the sawtooth wave signal S SAW .
[0125] Referring to FIG. 1 again, the overvoltage detection unit 16, in the first mode, the output voltage of the buck-boost circuit 4 (voltage VEDLC ) outputs an overvoltage detection signal S when it detects that OVP it is an overvoltage.
[0126] In the second mode, when the overvoltage detection unit 16 detects that the output voltage (voltage V N1 ) of the buck-boost circuit 4 is an overvoltage, it outputs an overvoltage detection signal S OVP .
[0127] FIG. 7 is a diagram showing the circuit configuration of the overvoltage detection unit of the backup power supply device according to the embodiment.
[0128] The overvoltage detection unit 16 includes a comparator 101, constant voltage sources 102 and 103, transfer gate circuits 104, 105, 106 and 107, and a NOT gate circuit 108.
[0129] The comparator 101 corresponds to an example of the "overvoltage protection circuit" of the present disclosure.
[0130] The inverting input terminal (- terminal) of the comparator 101 is electrically connected to the constant voltage source 102 via the transfer gate circuit 104 and is also electrically connected to the constant voltage source 103 via the transfer gate circuit 105.
[0131] The voltage of the constant voltage source 102 is a voltage corresponding to a predetermined first overvoltage threshold that is the overvoltage threshold of the output voltage (voltage V EDLC ) of the buck-boost circuit 4 in the first mode. Specifically, the voltage of the constant voltage source 102 is ((the first overvoltage threshold) ÷ (R 11 + R 12 ) × R 12 ).
[0132] The voltage of the constant voltage source 103 is a voltage corresponding to a predetermined second overvoltage threshold that is the overvoltage threshold of the output voltage (voltage V N1 ) of the buck-boost circuit 4 in the second mode. Specifically, the voltage of the constant voltage source 103 is ((the second overvoltage threshold) ÷ (R3 + R4) × R4).
[0133] The first overvoltage threshold value corresponds to an example of the "second set voltage" of the present disclosure. The second overvoltage threshold value corresponds to an example of the "third set voltage" of the present disclosure.
[0134] The NOT gate circuit 108 inverts the mode signal S MODE and outputs it to the transfer gate circuits 105 and 107.
[0135] The transfer gate circuit 104 is turned on when the mode signal S MODE is at a high level (first mode), and is turned off when the mode signal S MODE is at a low level (second mode).
[0136] The transfer gate circuit 105 is turned off when the mode signal S MODE is at a high level (first mode), and is turned on when the mode signal S MODE is at a low level (second mode).
[0137] The voltage V3 is input to the non-inverting input terminal (+ terminal) of the comparator 101 via the transfer gate circuit 106. Also, the voltage V2 is input to the non-inverting input terminal of the comparator 101 via the transfer gate circuit 107.
[0138] The transfer gate circuit 106 is turned on when the mode signal S MODE is at a high level (first mode), and is turned off when the mode signal S MODE is at a low level (second mode).
[0139] The transfer gate circuit 107 is turned off when the mode signal S MODE is at a high level (first mode), and is turned on when the mode signal S MODE is at a low level (second mode).
[0140] In summary, in the first mode, when the voltage V3 is equal to or higher than the voltage of the constant voltage source 102, that is, when the voltage V EDLC is equal to or greater than the first overvoltage threshold, a high-level overvoltage detection signal S OVP In the second mode, when the voltage V2 is equal to or higher than the voltage of the constant voltage source 103, that is, when the voltage V N1 is equal to or greater than the second overvoltage threshold, a high-level overvoltage detection signal S OVP Output.
[0141] Referring again to FIG. 1, in the first mode, the output voltage error detection unit 17 detects the output voltage of the step-up / step-down circuit 4 (voltage V EDLC ) and the target voltage. ERR Output.
[0142] In the second mode, the output voltage error detection unit 17 detects the output voltage of the step-up / step-down circuit 4 (voltage V N1 ) and the target voltage. ERR Output.
[0143] FIG. 8 is a diagram illustrating a circuit configuration of an output voltage error detection unit of the backup power supply device according to the embodiment.
[0144] The output voltage error detection unit 17 includes error amplifiers (operational amplifiers) 81 and 85, constant voltage sources 82 and 86, resistors 83 and 87, capacitors 84 and 88, transfer gate circuits 89 and 90, and a NOT gate circuit 91.
[0145] The voltage of a constant voltage source 82 is input to a non-inverting input terminal (+ terminal) of the error amplifier 81. The voltage of the constant voltage source 82 is the output voltage (voltage V N1 In detail, the voltage of the constant voltage source 82 is a voltage corresponding to the target voltage ((voltage V N1 The target voltage is (R3+R4)÷(R4)×R4).
[0146] The voltage V2 is input to the inverting input terminal (- terminal) of the error amplifier 81. Negative feedback is applied between the inverting input terminal and the output terminal of the error amplifier 81 by a resistor 83 and a capacitor 84. The error amplifier 81 outputs a voltage corresponding to the difference voltage between the voltage of the constant voltage source 82 and the voltage V2.
[0147] The voltage of the constant voltage source 86 is input to the non-inverting input terminal (+ terminal) of the error amplifier 85. The voltage of the constant voltage source 86 is a voltage corresponding to the target voltage of the output voltage (voltage V EDLC ) of the buck-boost circuit 4 in the first mode. Specifically, the voltage of the constant voltage source 86 is ((the target voltage of the voltage V EDLC ) ÷ (R 11 + R 12 ) × R 12 ).
[0148] The voltage V3 is input to the inverting input terminal (- terminal) of the error amplifier 85. Negative feedback is applied between the inverting input terminal and the output terminal of the error amplifier 85 by a resistor 87 and a capacitor 88. The error amplifier 85 outputs a voltage corresponding to the difference voltage between the voltage of the constant voltage source 86 and the voltage V3.
[0149] The NOT gate circuit 91 inverts the mode signal S MODE and outputs it to the transfer gate circuit 89. Therefore, the transfer gate circuit 89 is in the off state when the mode signal S MODE is at the high level (first mode), and is in the on state when the mode signal S MODE is at the low level (second mode).
[0150] The transfer gate circuit 90 is in the on state when the mode signal S MODE is at the high level (first mode), and is in the off state when the mode signal S MODE is at the low level (second mode).
[0151] To summarize the above, the output voltage error detection unit 17 is the mode signal S MODEWhen it is at the high level (first mode), a voltage corresponding to the difference voltage between the voltage V3 and the voltage of the constant voltage source 86 is output as the error signal S ERR That is, the output voltage error detection unit 17 outputs an error signal S EDLC corresponding to the difference voltage between the voltage V ERR which is the output voltage of the buck-boost circuit 4, and the target voltage (for example, 3V).
[0152] On the other hand, when the mode signal S MODE is at the low level (second mode), the output voltage error detection unit 17 outputs a voltage corresponding to the difference voltage between the voltage V2 and the voltage of the constant voltage source 82 as the error signal S ERR That is, the output voltage error detection unit 17 outputs an error signal S N1 corresponding to the difference voltage between the voltage V ERR which is the output voltage of the buck-boost circuit 4, and the target voltage (for example, 12V).
[0153] Referring to FIG. 1 again, the on-off control unit 18 outputs a main switching control signal S OSC for controlling the main switching element, and a synchronous rectification switching control signal S REV for controlling the synchronous rectification element, based on the periodic pulse signal S CINFO , the inversion detection signal S OVP , the current information signal S ERR , the overvoltage detection signal S SW1 , and the error signal S SW2 to the drive selection unit 19.
[0154] In the first mode, the on-off control unit 18 controls the switching of the switching element Q1 and turns on the switching element Q2 during a part of the period when the switching element Q1 is off. That is, the on-off control unit 18 operates the switching element Q1 as the main switching element and operates the switching element Q2 as the synchronous rectification element to perform synchronous rectification control.
[0155] In the second mode, the on-off control unit 18 controls the switching element Q2 to perform switching control, and turns on the switching element Q1 during a part of the period when the switching element Q2 is off. That is, the on-off control unit 18 operates the switching element Q2 as the main switching element, operates the switching element Q1 as the synchronous rectification element, and performs synchronous rectification control.
[0156] The on-off control unit 18 adjusts the frequencies of the main switching control signal S SW1 , and the synchronous rectification switching control signal S SW2 to match the frequency of the periodic pulse signal S OSC . The frequency of the periodic pulse signal S OSC is higher in the second mode than in the first mode. That is, the frequencies of the main switching control signal S SW1 , and the synchronous rectification switching control signal S SW2 are higher in the second mode than in the first mode.
[0157] The on-off control unit 18 controls the main switching element and the synchronous rectification element so that the error signal S ERR approaches zero, that is, so that the output voltage of the buck-boost circuit 4 approaches the target voltage. The error signal S ERR is a signal corresponding to the difference voltage between the voltage V EDLC which is the output voltage of the buck-boost circuit 4 and the target voltage in the first mode. The error signal S ERR is a signal corresponding to the difference voltage between the voltage V N1 which is the output voltage of the buck-boost circuit 4 and the target voltage in the second mode.
[0158] The on-off control unit 18 controls the synchronous rectification element to turn off at the timing when the inversion detection signal S REV becomes high level. That is, in the first mode, the on-off control unit 18 controls the switching element Q2, which is the synchronous rectification element, to turn off at the timing when the inversion detection signal S REV becomes high level. Also, in the second mode, the on-off control unit 18 controls the synchronous rectification element to turn off at the timing when the inversion detection signal S REVAt the timing when it becomes high level, the switching element Q1, which is a synchronous rectifier element, is controlled to turn off.
[0159] The on-off control unit 18 stops the operation of the main switching element and the synchronous rectifier element when the overvoltage detection signal S OVP becomes high level.
[0160] The on-off control unit 18 performs current mode control on the main switching element and the synchronous rectifier element based on the current information signal S SAW obtained by adding the drain-source current of the main switching element to the sawtooth wave signal S CINFO .
[0161] FIG. 9 is a diagram showing an example of a sawtooth wave signal, a current information signal, an error signal, and a main switching control signal of the backup power supply device according to the embodiment.
[0162] FIG. 9(a) is a diagram showing the main switching control signal S SAW when the drain-source current of the main switching element is not added to the sawtooth wave signal S SW1 , that is, in the case of voltage mode control.
[0163] The on-off control unit 18 sets the main switching control signal S SAW to high level at the timing t 10 when the sawtooth wave signal S SW1 starts to rise.
[0164] The on-off control unit 18 sets the main switching control signal S SAW to low level at the timing t ERR when the sawtooth wave signal S 11 reaches the error signal S SW1 .
[0165] FIG. 9(b) is a diagram showing the main switching control signal S SAW when the drain-source current of the main switching element is added to the sawtooth wave signal S SW1 , that is, in the case of current mode control.
[0166] The signal 111 indicates the drain-source current of the main switching element. The current information signal S CINFO is a signal obtained by adding the signal 111 to the sawtooth wave signal S SAW .
[0167] The on-off control unit 18 makes the main switching control signal S CINFO go to the high level at the timing t 20 when the current information signal S SW1 starts to rise.
[0168] The on-off control unit 18 makes the main switching control signal S CINFO go to the low level at the timing t ERR when the current information signal S 21 reaches the error signal S SW1 . When the main switching control signal S SW1 goes to the low level, the main switching element turns off, so the signal 111 goes to the low level.
[0169] Referring to FIG. 1 again, when the mode signal S MODE is at the high level (first mode), the drive selection unit 19 outputs the main switching control signal S SW1 to the gate drive circuit B1 and outputs the synchronous rectification switching control signal S SW2 to the gate drive circuit B2.
[0170] When the mode signal S MODE is at the low level (second mode), the drive selection unit 19 outputs the main switching control signal S SW1 to the gate drive circuit B2 and outputs the synchronous rectification switching control signal S SW2 to the gate drive circuit B1.
[0171] FIG. 10 is a diagram showing the circuit configuration of the drive selection unit of the backup power supply device according to the embodiment.
[0172] The drive selection unit 19 includes AND gate circuits (logical product circuits) 131, 132, 134, and 135, OR gate circuits (logical sum circuits) 133 and 136, and a NOT gate circuit 137.
[0173] The NOT gate circuit 137 inverts the mode signal S MODE and outputs it to one input terminal of the AND gate circuit 132 and one input terminal of the AND gate circuit 134.
[0174] The mode signal S MODE is input to one input terminal of the AND gate circuit 131, and the main switching control signal S SW1 is input to the other input terminal.
[0175] The synchronous rectification switching control signal S SW2 is input to the other input terminal of the AND gate circuit 132.
[0176] The main switching control signal S SW1 is input to the other input terminal of the AND gate circuit 134.
[0177] The mode signal S MODE is input to one input terminal of the AND gate circuit 135, and the synchronous rectification switching control signal S SW2 is input to the other input terminal.
[0178] The output signal of the AND gate circuit 131 is input to one input terminal of the OR gate circuit 133, and the output signal of the AND gate circuit 132 is input to the other input terminal.
[0179] When the mode signal S MODE is at a high level (first mode), the OR gate circuit 133 outputs the main switching control signal S SW1 to the gate drive circuit B1.
[0180] When the mode signal S MODEWhen it is at a low level (second mode), the synchronous rectification switching control signal S SW2 is output to the gate drive circuit B1.
[0181] The output signal of the AND gate circuit 134 is input to one input terminal of the OR gate circuit 136, and the output signal of the AND gate circuit 135 is input to the other input terminal.
[0182] When the mode signal S MODE is at a high level (first mode), the synchronous rectification switching control signal S SW2 is output to the gate drive circuit B2.
[0183] When the mode signal S MODE is at a low level (second mode), the main switching control signal S SW1 is output to the gate drive circuit B2.
[0184] Referring to FIG. 1 again, when the mode signal S MODE is at a high level (first mode), the gate drive circuit B1 outputs the amplified switching control signal S1 of the main switching control signal S SW1 to the gate of the switching element Q1.
[0185] When the mode signal S MODE is at a low level (second mode), the gate drive circuit B1 outputs the amplified switching control signal S1 of the synchronous rectification switching control signal S SW2 to the gate of the switching element Q1.
[0186] When the mode signal S MODE is at a high level (first mode), the gate drive circuit B2 outputs the amplified switching control signal S2 of the synchronous rectification switching control signal S SW2 to the gate of the switching element Q2.
[0187] When the mode signal S MODEWhen it is at a low level (second mode), the switching control signal S SW1 amplified switching control signal S2 is output to the gate of the switching element Q2.
[0188] (Effect) [1] In the backup power supply device described in Patent Document 1, during discharge, only the second switching element is switching-controlled and the first switching element is not controlled (not operated). That is, the backup power supply device described in Patent Document 1 performs an asynchronous rectification operation.
[0189] On the other hand, in the backup power supply device 1 of the embodiment, during discharge (during the second mode), the switching element Q2 is switching-controlled, and the switching element Q1 is turned on during a part of the period when the switching element Q2 is off. That is, the backup power supply device 1 of the embodiment operates the switching element Q1 as a synchronous rectification element and performs a synchronous rectification operation.
[0190] Thereby, the backup power supply device 1 of the embodiment can eliminate the need for an output rectification element and suppress the number of components as compared with the backup power supply device described in Patent Document 1.
[0191] In the backup power supply device described in Patent Document 1, during charging, only the first switching element is switching-controlled, the second switching element is not controlled (not operated), and the second switching element functions as a diode. That is, the backup power supply device described in Patent Document 1 performs an asynchronous rectification operation.
[0192] On the other hand, in the backup power supply device 1 of the embodiment, during charging (during the first mode), the switching element Q1 is switching-controlled, and the switching element Q2 is turned on during a part of the period when the switching element Q1 is off. That is, the backup power supply device 1 of the embodiment operates the switching element Q2 as a synchronous rectification element and performs a synchronous rectification operation.
[0193] As a result, the backup power supply device 1 of the embodiment can suppress losses and improve efficiency as compared with the backup power supply device described in Patent Document 1.
[0194] [2] When the backup power supply device 1 of the embodiment is in discontinuous current operation (light load), if the synchronous rectifier element remains on, a reverse current will flow, and energy will be regenerated to the input side, resulting in a decrease in efficiency. Also, when the charging voltage of the electric double layer capacitor 3 of the backup power supply device 1 of the embodiment increases, the regenerative energy becomes larger than the charging energy, and it becomes impossible to charge up to the target voltage. Therefore, the backup power supply device 1 of the embodiment controls the synchronous rectifier element to turn off at the timing when the coil L1 sweeps out energy and the current between the drain and source of the synchronous rectifier element becomes zero or reverses, that is, the timing when the reverse detection signal S REV becomes high level. Thereby, the backup power supply device 1 of the embodiment can suppress the reverse current and suppress the decrease in efficiency. Also, the backup power supply device 1 of the embodiment can charge the charging voltage of the electric double layer capacitor 3 up to the target voltage.
[0195] [3] The backup power supply device 1 of the embodiment can charge while limiting the charging current in the first mode. However, in the second mode, the backup power supply device 1 of the embodiment has to supply power while boosting the power required by the electronic device, so a large current can flow through the circuit.
[0196] Therefore, if the switching frequency is kept constant in the second mode for the backup power supply device 1 of the embodiment, the size of the coil L1 has to be increased. On the other hand, in the first mode, for the backup power supply device 1 of the embodiment, it is desirable not to increase the switching frequency too much from the viewpoint of noise suppression.
[0197] Therefore, the switching frequency setting unit 13 sets the switching frequency in the second mode to a frequency higher than the switching frequency in the first mode. As a result, the backup power supply device 1 according to the embodiment can suppress the size of the coil L1 and can suppress noise.
[0198] [4] The backup power supply device 1 according to the embodiment, in the first mode, performs control based on the difference voltage between the voltage V EDLC of the electric double layer capacitor 3, which is the output voltage of the buck-boost circuit 4, and the target voltage (specifically, based on the voltage V3). The backup power supply device 1 according to the embodiment, in the second mode, performs control based on the difference voltage between the voltage V N1 which is the output voltage of the buck-boost circuit 4, and the target voltage (specifically, based on the voltage V2).
[0199] However, if the input side of one error amplifier is switched between the above two voltages during mode switching, problems may occur. That is, since the input voltage of the error amplifier is switched to a completely different voltage level during mode switching, the output voltage of the error amplifier before mode switching and the output voltage of the error amplifier after mode switching will be completely different voltages. Therefore, response delay and unstable operation of the output voltage of the error amplifier may occur.
[0200] Therefore, the output voltage error detection unit 17 (see FIG. 8) includes two error amplifiers 81 and 85, and switches the output sides of the error amplifiers 81 and 85 during mode switching. As a result, the error amplifiers 81 and 85 always output output voltages corresponding to their respective input voltages (even when not used for control), and response delay and unstable operation during mode switching can be suppressed.
[0201] [5] Different from an error amplifier, a comparator can switch its input voltage to a different voltage level. Therefore, the overvoltage detection unit 16 (see FIG. 7) includes one comparator 101 and switches the input voltage of the comparator 101 according to the mode. That is, in the first mode, the voltage V EDLCThe voltage V3 obtained by resistive voltage division is input to the comparator 101. In the second mode, the voltage obtained by resistively dividing the output voltage, i.e., voltage V N1 is switched at the input side of the comparator 101.
[0202] As a result, the backup power supply device 1 of the embodiment can detect overvoltage in both the first mode and the second mode with a single comparator 101, and the circuit can be suppressed.
[0203] [6] Generally, current-mode control is easier to phase-compensate than voltage-mode control, and it is possible to set a response with an increased (increased frequency gain). Therefore, the on-off control unit 18 employs current-mode control taking into account the current information signal S CINFO However, the current detection points are different between the first mode and the second mode.
[0204] Therefore, the current information detection unit 15 (see FIG. 6) switches the current information added to the sawtooth wave signal S SAW depending on the mode. That is, the current information detection unit 15 detects the current information of the current flowing between the drain and source of the switching element Q1, which is the main switching element, in the first mode. Also, the current information detection unit 15 detects the current information of the current flowing between the drain and source of the switching element Q2, which is the main switching element, in the second mode.
[0205] As a result, the backup power supply device 1 of the embodiment can achieve current-mode control in either the first mode or the second mode.
[0206] [7] The first mode and the second mode are completely different controls. Therefore, if mode switching is performed in the middle of the switching period, although it is one switching period, it will result in an abnormal operation.
[0207] Therefore, the mode switching timing adjustment unit 12 (see FIG. 2) changes the mode change condition in the middle of the switching period, that is, the voltage V INEven if the magnitude relationship with the input voltage threshold changes, wait until the start of the next switching period, that is, the rising edge of the periodic pulse signal S OSC and then switch the mode signal S MODE . Thereby, the backup power supply device 1 of the embodiment can suppress the abnormal operation.
[0208] <Supplementary Note> In the embodiment, the control unit 10 is configured by a hardware circuit, but the present disclosure is not limited thereto. The control unit 10 may be configured by a processing device (such as a CPU (Central Processing Unit) or a DSP (Digital Signal Processor)) and a program.
[0209] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalent scope thereof.
Explanation of Reference Numerals
[0210] 1 Backup power supply device 2 Battery 3 Electric double layer capacitor 4 Step-up / down circuit 5 Terminal section 10 Control unit 11 Battery voltage drop monitoring unit 12 Mode switching timing adjustment unit 13 Switching frequency setting unit 14 Switching current detection unit 15 Current information detection unit 16 Overvoltage detection unit 17 Output voltage error detection unit 18 On / off control unit 19 Drive selection unit 20 First-level shift section 21 Second-level shift section Q1, Q2 switching elements L1 coil
Claims
1. A control unit for controlling a backup power supply device that steps down a voltage in a first mode and steps up the voltage in a second mode, wherein the control unit includes a battery voltage drop monitoring unit, a mode switching timing adjustment unit, a switching frequency setting unit, a switching current detection unit, a current information detection unit, and an on / off control unit, the battery voltage drop monitoring unit monitors whether the battery voltage has dropped below a first set voltage, and outputs a high-level signal when the battery voltage is below the first set voltage, and outputs a low-level signal when the battery voltage is equal to or higher than the first set voltage, the mode switching timing adjustment unit switches a mode signal indicating the first mode or the second mode at the timing of the start of a switching period based on an output signal from the battery voltage drop monitoring unit, the switching frequency setting unit outputs a periodic pulse signal representing a switching frequency based on the mode signal, in the first mode, the switching current detection unit outputs an inversion detection signal to the on / off control unit when the current flowing through the second switching element included in the boost circuit reaches or reverses to zero, and in the second mode, outputs an inversion detection signal when the current flowing through the first switching element included in the boost circuit reaches or reverses to zero, the current information detection unit detects the current of the first switching element in the case of the first mode, and detects the current of the second switching element in the case of the second mode and outputs it as a current information signal, based on the periodic pulse signal, the inversion detection signal, and / or the current information signal, the on / off control unit operates the first switching element as a main switching element and the second switching element as a synchronous rectification element in the first mode, and operates the second switching element as a main switching element and the first switching element as a synchronous rectification element in the second mode A control unit included in a backup power supply device, characterized in that.
2. The control unit included in the backup power supply device according to Claim 1, includes a first level shift unit and a second level shift unit, the first level shift unit level-shifts the voltage to a voltage at the ground level and outputs it to the switching current detection unit, The second level shift section level-shifts the voltage to the voltage of the ground level and outputs it to the current information detection section. A control unit included in a backup power supply device, characterized in that it is configured as described above.
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