Semiconductor device

By incorporating a shallow and deep groove trench structure, the semiconductor device strengthens the fin portion, preventing damage and enhancing carrier passage, thus maintaining device integrity and reducing resistance.

JP2025109436APending Publication Date: 2025-07-25DENSO CORP +2
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Patent Information

Application Number
JP2024003321
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-12
Publication Date
2025-07-25

AI Technical Summary

Technical Problem

The fin portion of semiconductor devices is vulnerable to damage during the formation of reinforcing insulating films, leading to deterioration of device characteristics.

Method used

The semiconductor device incorporates a first trench with a shallow and deep groove portion, enhancing the strength of the fin portion by ensuring the shallow groove portion's height is lower than the deep groove portion, thereby preventing breakage and maintaining device integrity.

Benefits of technology

The enhanced fin portion strength reduces the risk of damage, maintaining the semiconductor device's characteristics and reducing on-resistance by allowing carriers to pass through multiple channels.

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Abstract

To provide a technology to suppress deterioration of semiconductor device characteristics.SOLUTION: A semiconductor device includes a body region of a second conductivity type provided on the surface side of a semiconductor substrate, in which carriers are of a first conductivity type, a first trench provided on the surface of the semiconductor substrate and adjacent to the body region, and a first trench gate electrode disposed in the first trench. In this semiconductor device, the first trench includes a shallow trench portion and a deep trench portion that is deeper than the shallow trench portion and penetrates the body region.SELECTED DRAWING: Figure 2
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Description

Technical Field

[0001] This specification discloses a technology related to semiconductor devices.

Background Art

[0002] Patent Document 1 discloses a semiconductor device. The semiconductor device of Patent Document 1 has a plurality of trench gates extending from the front surface to the back surface of a semiconductor substrate. Patent Document 1 discloses a technology for preventing a region sandwiched between trench gates, that is, the remaining portion of the substrate (fin portion) when the substrate is etched to form the trench gates, from being damaged (collapsed). Specifically, in Patent Document 1, a reinforcing insulating film thicker than the gate insulating film is formed on one side surface of the fin portion. Patent Document 1 improves the strength of the fin portion by the reinforcing insulating film and prevents the fin portion from being damaged.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] If the fin portion is reinforced with another member (insulating film) as in Patent Document 1, the strength of the fin portion is improved. However, until the insulating film is formed on the side surface of the fin portion, the fin portion remains in a fragile state. Therefore, the fin portion may be damaged before the insulating film is formed on the side surface of the fin portion, or in the process of forming the insulating film on the side surface of the fin portion. The fin portion plays the role of a functional layer that functions as a semiconductor device. Therefore, when the fin portion is damaged, the characteristics of the semiconductor device deteriorate. The purpose of this specification is to provide a technology for suppressing the deterioration of the characteristics of a semiconductor device.

Means for Solving the Problems

[0005] The semiconductor device disclosed in this specification is a semiconductor device in which carriers are of a first conductivity type, and includes a body region of a second conductivity type provided on the surface side of a semiconductor substrate, a first trench provided on the surface of the semiconductor substrate and adjacent to the body region, and a first trench gate electrode disposed in the first trench. The first trench has a shallow groove portion and a deep groove portion that is deeper than the shallow groove portion and penetrates the body region.

[0006] When a trench for forming a trench gate electrode is formed in the semiconductor substrate in the above semiconductor device, a first trench having a shallow groove portion and a deep groove portion is formed in the semiconductor substrate. In the portion where the shallow groove portion is formed, the height of the fin portion (the remaining portion between the trenches) from the bottom surface of the trench (the length of the fin portion in the thickness direction of the semiconductor substrate) is lower than that in the portion where the deep groove portion is formed. Therefore, the strength of the fin portion increases in the portion constituting the side wall of the shallow groove portion. As a result of the increase in the strength of the fin portion corresponding to the shallow groove portion, the strength of the entire fin portion increases, and breakage of the fin portion can be prevented. By preventing breakage of the fin portion, the above semiconductor device can suppress deterioration of the characteristics of the semiconductor device.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

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Figure 9

[0008] In a semiconductor device according to an example disclosed in this specification, the shallow trench may penetrate the body region.

[0009] According to this configuration, when an on-voltage is applied to the first trench gate electrode, a channel through which carriers can pass can be formed in the entire body region facing the first trench gate electrode. That is, the carriers can pass through the channel formed in the body region facing the first trench gate electrode in the shallow trench in addition to the channel formed in the body region facing the first trench gate electrode in the deep trench and move to the drift region. As a result, the on-resistance of the semiconductor device can be reduced.

[0010] In a semiconductor device according to an example disclosed in this specification, the first trench has a plurality of shallow trenches and a plurality of deep trenches, and the shallow trenches and the deep trenches may appear alternately.

[0011] According to this configuration, in a direction orthogonal to the thickness direction of the semiconductor substrate (horizontal direction), fin portions constituting the side walls of the shallow trenches appear on both sides of the fin portions constituting the side walls of the deep trenches. As a result, the strength of the entire fin portion is further increased, and breakage of the fin portion can be further prevented.

[0012] In a semiconductor device according to an example disclosed in this specification, the semiconductor device may have a plurality of first trench gate electrodes in a horizontal direction orthogonal to the thickness direction of the semiconductor substrate.

[0013] According to this configuration, the effect of improving the strength of the fin portions can be obtained at multiple locations within the semiconductor device, and further suppression of the characteristic degradation of the semiconductor device can be achieved. In this configuration, all the trench gate electrodes constituting the semiconductor device may be the first trench gate electrodes, or some of the trench gate electrodes constituting the semiconductor device may be trench gate electrodes different from the first trench gate electrodes.

[0014] In an example of the semiconductor device disclosed in this specification, a second trench provided on the surface of the semiconductor substrate and adjacent to the body region, deeper than the shallow trench portion as a whole and penetrating the body region, and a second trench gate electrode disposed in the second trench may be included. And the second trench gate electrode may be disposed between the first trench gate electrodes such that the side surfaces face the side surfaces of the first trench gate electrodes.

[0015] According to this configuration, a channel can be formed deeper into the semiconductor substrate by the second trench gate electrode. As a result, the on-resistance of the semiconductor device can be further reduced. Also, since the second trench gate electrodes do not adjoin each other in the horizontal direction, the first trench gate electrodes are positioned on at least one side surface of the fin portion. That is, a shallow trench portion is provided on at least one side surface of the fin portion. As a result, breakage of the fin portion can be prevented.

[0016] (Semiconductor Device: First Embodiment) Referring to FIG. 1, the semiconductor device 10 will be described. The semiconductor device 10 is a vertical semiconductor device and includes a semiconductor substrate 2, a source electrode 24 provided on the surface of the semiconductor substrate 2, and a drain electrode 22 provided on the back surface of the semiconductor substrate 2. Note that X, Y, and Z in the figure indicate coordinates, the Z-axis indicates the thickness direction connecting the front and back surfaces of the semiconductor substrate 2, and the X-axis and Y-axis indicate the horizontal directions orthogonal to the thickness direction. In the following description, the Z-axis may be referred to as the thickness direction, and among the horizontal directions, the X-axis direction may be referred to as the width direction and the Y-axis direction may be referred to as the length direction.

[0017] On the semiconductor substrate 2, in order from the back side, an n + -type drain region 14, an n-type drift region 12, and a p-type body region 4 are provided. Further, an n + -type source region 6 is provided inside the body region 4 (on the surface side of the body region 4). The drain region 14 is electrically connected to the drain electrode 22. The source region 6 is electrically connected to the source electrode 24. Also, the body region 4 separates the source region 6 and the drift region 12. Although not shown in the figure, a p + -type body contact region is provided inside the body region 4. The body contact region is electrically connected to the source electrode 24 and suppresses (stabilizes the potential) the increase in the potential of the body region 4. The n-type (n + -type) is an example of the first conductivity type, and the p-type (p + -type) is an example of the second conductivity type.

[0018] On the surface side of the semiconductor substrate 2, a plurality of first trench gate electrodes 30 extending in the thickness direction (Z-axis direction) are provided. The first trench gate electrode 30 is disposed in a first trench 43 provided on the surface of the semiconductor substrate 2. The first trench 43 is provided adjacent to the body region 4. The first trench gate electrode 30 extends in a stripe shape in the length direction (Y-axis direction) and is arranged at equal intervals in the width direction (X-axis direction). The interval between adjacent first trench gate electrodes 30 (fin portion 8) is adjusted to 250 nm or less. Each first trench gate electrode 30 includes a gate insulating film 34 and a gate electrode 32 filled in the gate insulating film 34. Each first trench gate electrode 30 penetrates the source region 6 and the body region 4 and reaches the drift region 12. That is, the source region 6 and the body region 4 face the gate electrode 32 with the gate insulating film 34 interposed therebetween. Note that the first trench gate electrode 30 is insulated from the source electrode 24.

[0019] In the semiconductor device 10, when a voltage exceeding the threshold voltage is applied to the first trench gate electrode 30, an inversion layer (channel) is formed on the surface of the body region 4 facing the first trench gate electrode 30. Also, as described above, in the semiconductor device 10, the width of the fin portion 8 (the distance between adjacent first trench gate electrodes 30) is adjusted to 250 nm or less. Therefore, when a voltage exceeding the threshold voltage is applied to the first trench gate electrode 30, almost the entire body region 4 becomes a channel.

[0020] Electrons supplied from the source electrode 24 to the source region 6 pass through the channel and are supplied to the drift region 12. The electrons supplied to the drift region 12 move toward the drain region 14 and are discharged from the drain electrode 22. That is, the semiconductor device 10 is turned on. In the semiconductor device 10, since almost the entire body region 4 becomes a channel, the on-resistance can be reduced.

[0021] When the application of voltage to the first trench gate electrode 30 is stopped (when the voltage applied to the first trench gate electrode 30 is made lower than the threshold voltage), the channel formed in the body region 4 disappears, and the supply of electrons from the source region 6 to the drift region 12 stops. That is, the semiconductor device 10 is turned off. The semiconductor device 10 is a normally-off type MOSFET that turns on when a voltage exceeding the threshold voltage is applied to the first trench gate electrode 30.

[0022] (Trench gate electrode) Referring to FIG. 2, the first trench gate electrode 30 will be further described. FIG. 2 shows a cross section appearing on the Y-Z plane of the first trench gate electrode 30. The dashed line 4 in the figure indicates the bottom surface of the body region 4 (the back side end of the semiconductor substrate) (see also FIG. 1). In FIG. 2, the source electrode 24 and the drain electrode 22 are not shown. As shown in FIG. 2, the first trench gate electrode 30 is disposed in the first trench 43. The first trench 43 includes a shallow groove portion 44 having a shallower depth in the thickness direction and a deep groove portion 45 having a deeper depth in the thickness direction than the shallow groove portion 44. The first trench gate portion 35 is provided in the shallow groove portion 44. The second trench gate portion 36 is provided in the deep groove portion 45. The first trench gate portion 35 and the second trench gate portion 36 are integrated to form the first trench gate electrode 30.

[0023] The first trench 43 has a plurality of shallow groove portions 44 and a plurality of deep groove portions 45. In the length direction, the shallow groove portions 44 and the deep groove portions 45 appear alternately. In other words, the first trench gate electrode 30 has a plurality of first trench gate portions 35 and a plurality of second trench gate portions 36, and in the length direction, the first trench gate portions 35 and the second trench gate portions 36 appear alternately.

[0024] The depth t44 of the shallow groove portion 44 and the depth t45 of the deep groove portion 45 are deeper than the depth of the body region 4. That is, both the shallow groove portion 44 and the deep groove portion 45 penetrate the body region 4. Therefore, when a voltage is applied to the first trench gate electrode 30 and a channel is formed in the body region 4, electrons can pass through the channels at positions facing the first trench gate portion 35 and the channels at positions facing the second trench gate portion 36 and move to the drift region 12. That is, electrons can utilize the entire channel formed at the position facing the first trench gate electrode 30 and move to the drift region 12. The movement resistance of electrons is reduced, and the on-resistance of the semiconductor device 10 can be reduced.

[0025] FIG. 3 shows a view of observing the first trench gate electrode 30 (first trench 43) from the thickness direction. As shown in FIG. 3, all the first trench gate electrodes 30 (first trenches 43) extend in a stripe shape in the length direction, and all the first trench gate electrodes 30 (first trenches 43) include a first trench gate portion 35 (shallow trench portion 44) and a second trench gate portion 36 (deep trench portion 45). Each first trench gate electrode 30 (first trench 43) is provided at equal intervals in the width direction. Also, in the width direction, the first trench gate portions 35 (shallow trench portions 44) face each other, and the second trench gate portions 36 (deep trench portions 45) face each other.

[0026] (Method for manufacturing a semiconductor device) With reference to FIGS. 4 to 6, a method for manufacturing the semiconductor device 10 will be described. Hereinafter, the manufacturing process of the first trench 43 will be described. The first trench 43 is formed through a first resist forming step 50, a first opening forming step 51, a first etching step 52, a second resist forming step 53, a second opening forming step 54, and a second etching step 55. First, as shown in FIG. 4(a), a semiconductor substrate 2 having a drain region 14, a drift region 12, a body region 4, and a source region 6 is prepared. Then, a first resist film 40 is formed on the surface of the semiconductor substrate 2 (the surface on which the source region 6 is formed) (first resist forming step 50). Note that the drain region 14, the drift region 12, the body region 4, and the source region 6 can be formed using known methods (growth method, ion implantation method). Next, as shown in FIG. 4(b), a predetermined position of the first resist film 40 is etched to form an opening 42 (first opening forming step 51). By forming the opening 42, a part of the surface of the semiconductor substrate 2 is exposed. The opening 42 corresponds to the position where the first trench 43 is to be formed.

[0027] Thereafter, as shown in FIG. 5(c), the semiconductor substrate 2 is etched from the surface to form a shallow groove portion 44 in the semiconductor substrate 2 (first etching step 52). By forming the shallow groove portion 44, a fin portion 8 is formed on the surface of the semiconductor substrate 2. The fin portion 8 corresponds to the positions where the body region 4 and the source region 6 are formed (see also FIG. 1). Next, as shown in FIG. 5(d), a second resist film 46 is formed on the surfaces of the semiconductor substrate 2 and the first resist film 40 (second resist formation step 53).

[0028] Thereafter, as shown in FIG. 6(e), a predetermined position of the second resist film 46 is etched to form a plurality of openings 48 (second opening formation step 54). The openings 48 are formed at equal intervals in the length direction. When forming the openings 48, the second resist film 46 formed on the first resist film 40 (the second resist film 46 on the fin portion 8) is not etched (see also FIG. 5(d)). In the second opening formation step 54, a part of the second resist film 46 formed in the shallow groove portion 44 is etched. The openings 48 correspond to the positions where the deep groove portions 45 are formed (see also FIG. 2). Next, as shown in FIG. 6(f), the semiconductor substrate 2 is etched from the surface to form deep groove portions 45 in the semiconductor substrate 2 (second etching step 55). Thereby, a first trench 43 having the shallow groove portions 44 and the deep groove portions 45 is formed.

[0029] Although detailed description is omitted, thereafter, the second resist film 46 is removed, and a gate insulating film 34 and a gate electrode 32 are formed in the first trench 43. A first trench gate portion 35 is formed in the shallow groove portion 44, a second trench gate portion 36 is formed in the deep groove portion 45, and the first trench gate electrode 30 is completed (see also FIG. 2). Since other manufacturing steps of the semiconductor device 10 are known, the description thereof is omitted.

[0030] Referring to FIG. 7, the advantages of the semiconductor device 10 will be described in comparison with the conventional semiconductor device 10a. FIG. 7 shows the semiconductor substrate 2 after the completion of the second etching step 55. As described above, in the semiconductor device 10, the first trench 43 has a shallow groove portion 44 and a deep groove portion 45. In the thickness direction, the height 8a of the fin portion 8 of the portion forming the sidewall of the shallow groove portion 44 is lower than the height 8b of the fin portion 8 of the portion constituting the sidewall of the deep groove portion 45. Therefore, the strength of the fin portion 60 is stronger in the portion constituting the sidewall of the shallow groove portion 44 than in the portion constituting the sidewall of the deep groove portion 45.

[0031] On the other hand, in the semiconductor device 10a, since the trench is formed only by the deep groove portion 45 (without the shallow groove portion 44), the height of all the fin portions 8 is the height 8b. Therefore, in the semiconductor device 10a, the fin portion 8 is not strengthened and is easily damaged. When comparing the semiconductor device 10 and the semiconductor device 10a, in the semiconductor device 10, since the fin portion 60 is strengthened by the shallow groove portion 44 (since it has the fin portion 8 constituting the sidewall of the shallow groove portion 44), for example, when forming the first trench gate electrode 30 in the first trench 43, the fin portion 60 is not easily damaged. Since the fin portion 8 of the semiconductor device 10 is not easily damaged, the characteristics of the device are less likely to deteriorate compared to the semiconductor device 10a.

[0032] (Modification example of the semiconductor device 10) Referring to FIGS. 8 and 9, a modification example of the semiconductor device 10 will be described. In the semiconductor devices 110 and 210 described below, the form of the trench provided on the surface of the semiconductor substrate 2 (the form of the trench gate electrode) is different from that of the semiconductor device 10. Therefore, in the following description, the characteristics of the semiconductor devices 110 and 210 will be described using a view (a drawing corresponding to FIG. 3 of the semiconductor device 10) obtained by observing the trench (trench gate electrode) from the thickness direction. In the semiconductor devices 110 and 210, for the same configuration as that of the semiconductor device 10, the description may be omitted by assigning the same reference numeral as that of the semiconductor device 10 or a reference numeral having the same last two digits.

[0033] (Second embodiment) The semiconductor device 110 has a plurality of first trench gate electrodes 30 (first trenches 43), and each first trench gate electrode 30 (first trench 43) is provided at equal intervals in the width direction. In the semiconductor device 110, in the width direction, a second trench gate portion 36 (deep trench portion 45) faces the first trench gate portion 35 (shallow trench portion 44). Therefore, in the semiconductor device 110, in the entire length direction, either one of the side walls of the fin portion 8 is strengthened (a shallow trench portion 44 is formed in either one of the side walls of the fin portion 8).

[0034] (Third Embodiment) The semiconductor device 210 has a plurality of first trench gate electrodes 30 (first trenches 43) and a plurality of second trench gate electrodes 230 (second trenches 243). The second trench 243 is provided on the surface of the semiconductor substrate 2 and is adjacent to the fin portion 8 including the body region 4 (see also FIG. 1). The depth of the second trench 243 is deeper than the shallow trench portion 44 of the first trench 43 in the thickness direction and penetrates the body region 4. Specifically, the depth of the second trench 243 is equal to the depth of the deep trench portion 45 of the first trench 43. The second trench gate electrode 230 is disposed in the second trench 243. The second trench gate electrode 230 extends in a stripe shape in the length direction and is disposed between the first trench gate electrodes 30 so that the side surfaces face the side surfaces of the first trench gate electrodes 30. That is, in the width direction, the first trench gate electrodes 30 (first trenches 43) are disposed on both sides of each second trench gate electrode 230 (second trench 243).

[0035] In the semiconductor device 210, in the width direction, a first trench gate electrode 30 (first trench 43) is always disposed on one side of the fin portion 8. In other words, a first trench 43 having a shallow trench portion 44 is always provided on one of the side walls of the fin portion 8. Therefore, the semiconductor device 210 is also less likely to have the fin portion 8 damaged and less likely to cause a degradation in the characteristics of the device as compared with the conventional semiconductor device 10a (see FIG. 7).

[0036] In the above embodiment, the MOSFET was described. However, the technology disclosed in this specification can be applied to various semiconductor devices such as IGBTs as long as they are semiconductor devices having a trench gate electrode. Further, in the above embodiment, a semiconductor device (n-type semiconductor device) using electrons as carriers was described, but the technology disclosed in this specification can also be applied to a semiconductor device (p-type semiconductor device) using holes as carriers.

[0037] Further, in the above embodiment, an example in which the shallow groove portion 44 of the first trench 43 penetrates the body region 4 was described. However, the shallow groove portion 44 does not necessarily have to penetrate the body region 4. If the shallow groove portion 44 does not penetrate the body region 4, the groove depth of the shallow groove portion 44 becomes shallower, and the reinforcing effect of the fin portion 8 is further improved.

[0038] Also, in the above-described third embodiment, an example in which the depth of the second trench 243 is equal to the depth of the deep groove portion 45 of the first trench 43 was described. However, if the second trench 243 penetrates the body region 4, it may be shallower or deeper than the deep groove portion 45.

[0039] The configuration of the technology disclosed in this specification is listed below. (Configuration 1) A semiconductor device in which carriers are of a first conductivity type, a body region of a second conductivity type provided on the surface side of a semiconductor substrate, a first trench provided on the surface of the semiconductor substrate and adjacent to the body region, a first trench gate electrode disposed in the first trench, and having a semiconductor device in which the first trench has a shallow groove portion and a deep groove portion that is deeper than the shallow groove portion and penetrates the body region. (Configuration 2) The semiconductor device according to Configuration 1, wherein the shallow groove portion penetrates the body region. (Configuration 3) The semiconductor device according to Configuration 1 or 2, wherein the first trench has a plurality of the shallow trench portions and a plurality of the deep trench portions, and the shallow trench portions and the deep trench portions appear alternately. (Configuration 4) The semiconductor device according to any one of Configurations 1 to 3, having a plurality of the first trench gate electrodes in a horizontal direction orthogonal to the thickness direction of the semiconductor substrate. (Configuration 5) A second trench provided on the surface of the semiconductor substrate and adjacent to the body region, being deeper than the shallow trench portions as a whole and penetrating the body region, and a second trench gate electrode disposed in the second trench, and having The semiconductor device according to Configuration 4, wherein the second trench gate electrode is disposed between the first trench gate electrodes such that a side surface thereof faces a side surface of the first trench gate electrode.

[0040] As described above, the embodiments of the present invention have been described in detail, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. Further, the technical elements described in this specification or the drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Also, the technology illustrated in this specification or the drawings achieves a plurality of purposes simultaneously, and has technical utility by achieving one of those purposes itself.

Explanation of Reference Numerals

[0041] 4: Body region, 10: Semiconductor device, 30: First trench gate electrode, 43: First trench, 44: Shallow trench portion, 45: Deep trench portion, 230: Second trench gate electrode, 243: Second trench

Claims

1. A semiconductor device (10, 110, 210) in which the carrier is of a first conductivity type, a body region (4) of a second conductivity type provided on the surface side of a semiconductor substrate (2), a first trench (43) provided on the surface of the semiconductor substrate and adjacent to the body region, and a first trench gate electrode (30) disposed in the first trench, and having, wherein the first trench has a shallow groove portion (44) and a deep groove portion (45) that is deeper than the shallow groove portion and penetrates the body region, a semiconductor device.

2. The semiconductor device according to claim 1, wherein the shallow groove portion penetrates the body region.

3. The semiconductor device according to claim 1, wherein the first trench has a plurality of the shallow groove portions and a plurality of the deep groove portions, and the shallow groove portions and the deep groove portions appear alternately.

4. The semiconductor device according to any one of claims 1 to 3, wherein the semiconductor device has a plurality of the first trench gate electrodes in a horizontal direction orthogonal to the thickness direction of the semiconductor substrate.

5. A second trench (243) provided on the surface of the semiconductor substrate and adjacent to the body region, and deeper than the shallow groove portion as a whole and penetrating the body region, and a second trench gate electrode (230) disposed in the second trench, and having, The semiconductor device (210) according to claim 4, wherein the second trench gate electrode is disposed between the first trench gate electrodes such that the side surfaces face the side surfaces of the first trench gate electrodes.

Citation Information

Patent Citations

  • Semiconductor integrated circuit device and manufacturing method thereof

    JP2006128494A