Semiconductor device

Abstract

To provide a semiconductor device with less variation in characteristics.SOLUTION: A semiconductor device includes a first circuit region and a second circuit region on a substrate. The first circuit region includes a plurality of first transistors, and includes a first insulation body on a plurality of first transistors. The second circuit region includes a plurality of second transistors, and includes a second insulator on the plurality of second transistors. The second insulator includes an opening part. The first transistor and the second transistor each include an oxide semiconductor, and includes a third insulator over so as to be in contact with the top of first insulator and the top of the second insulator. The first insulator, the second insulator, and the third insulator suppress diffusion of oxygen. An arrangement density of the plurality of first transistors in the first circuit region is higher than that of the plurality of second transistors in the second circuit region.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a transistor, a semiconductor device, and an electronic device. Another aspect of the present invention relates to a method for manufacturing a semiconductor device. Another aspect of the present invention relates to a semiconductor wafer and a module.

[0002] Note that in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are one aspect of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, imaging devices, and electronic devices may be said to have semiconductor devices in some cases.

[0003] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. Another aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter.

Background Art

[0004] In recent years, the development of semiconductor devices has been advanced, and LSIs, CPUs, memories, etc. are mainly used. A CPU has a semiconductor integrated circuit (at least a transistor and a memory) separated from a semiconductor wafer, and is an aggregate of semiconductor elements formed with electrodes as connection terminals.

[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on a circuit board, for example, a printed wiring board, and are used as one of the components of various electronic devices.

[0006] In addition, a technique for constructing a transistor using a semiconductor thin film formed on a substrate having an insulating surface has attracted attention. The transistor is widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also simply referred to as display devices). As a semiconductor thin film applicable to transistors, silicon-based semiconductor materials are widely known, but oxide semiconductors are attracting attention as other materials.

[0007] In addition, a transistor using an oxide semiconductor is known to have an extremely small leakage current in the non-conducting state. For example, a low-power CPU that applies the characteristic of low leakage current of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Also, for example, a memory device that can retain stored content over a long period by applying the characteristic of low leakage current of a transistor using an oxide semiconductor is disclosed (see Patent Document 2).

[0008] In recent years, with the miniaturization and weight reduction of electronic devices, the demand for further high-density integration of integrated circuits has been increasing. In addition, an improvement in the productivity of semiconductor devices including integrated circuits is required.

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0010] One aspect of the present invention is to provide a semiconductor device with little variation in transistor characteristics. Or, one aspect of the present invention is to provide a semiconductor device with good reliability. Or, one aspect of the present invention is to provide a semiconductor device having good electrical characteristics. Or, one aspect of the present invention is to provide a semiconductor device with a large on-current. Or, one aspect of the present invention is to provide a semiconductor device capable of miniaturization or high integration. Or, one aspect of the present invention is to provide a semiconductor device with low power consumption.

[0011] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc.

Means for Solving the Problems

[0012] One aspect of the present invention has a first circuit region and a second circuit region on a substrate. The first circuit region has a plurality of first transistors and has a first insulator on the plurality of first transistors. The second circuit region has a plurality of second transistors and has a second insulator on the plurality of second transistors. The second insulator has an opening. The first transistor and the second transistor have an oxide semiconductor. A third insulator is in contact with the first insulator and the second insulator. The first insulator, the second insulator, and the third insulator suppress the diffusion of oxygen. The arrangement density of the plurality of first transistors in the first circuit region is higher than the arrangement density of the plurality of second transistors in the second circuit region.

[0013] One aspect of the present invention has a first circuit region, a second circuit region, and a third circuit region on a substrate. The first circuit region has a plurality of first transistors and has a first insulator on the plurality of first transistors. The second circuit region has a plurality of second transistors and has a second insulator on the plurality of second transistors. The second insulator has a first opening. The third circuit region has a plurality of third transistors and has a third insulator on the plurality of third transistors. The third insulator has a second opening. The first transistor, the second transistor, and the third transistor have an oxide semiconductor. There is a fourth insulator in contact with the first insulator, the second insulator, and the third insulator. The first insulator, the second insulator, the third insulator, and the fourth insulator suppress oxygen diffusion. The arrangement density of the plurality of first transistors in the first circuit region is higher than the arrangement density of the plurality of second transistors in the second circuit region and the arrangement density of the plurality of third transistors in the third circuit region. The arrangement density of the plurality of second transistors in the second circuit region is higher than the arrangement density of the plurality of third transistors in the third circuit region. The ratio of the total area of the first openings in the second circuit region is larger than the ratio of the total area of the second openings in the third circuit region.

[0014] Further, the oxide semiconductor contains any one or more selected from In, Ga, or Zn.

[0015] One aspect of the present invention is to form a first transistor in a first region on a substrate and a second transistor in a second region, form a first insulating film on the first transistor and the second transistor, form a second insulating film on the first insulating film, perform an oxygen addition treatment on the first insulating film through the second insulating film, form a third insulating film on the second insulating film, remove a part of the second insulating film and the third insulating film in the second region to form an opening exposing the first insulating film, perform a heat treatment, form a fourth insulating film on the first insulating film and the third insulating film, and is a method for manufacturing a semiconductor device in which the arrangement density of the first transistor in the first region is higher than that of the second transistor in the second region.

[0016] One aspect of the present invention is to form a first transistor in a first region on a substrate, a second transistor in a second region, and a third transistor in a third region, form a first insulating film on the first transistor, the second transistor, and the third transistor, form a second insulating film on the first insulating film, perform an oxygen addition treatment on the first insulating film through the second insulating film, form a third insulating film on the second insulating film, remove a part of the second insulating film and the third insulating film in the second region and the third region to form an opening exposing the first insulating film, perform a heat treatment, form a fourth insulating film on the first insulating film and the third insulating film, the arrangement density of the first transistor in the first region is higher than that of the second transistor in the second region, the arrangement density of the second transistor in the second region is higher than that of the third transistor in the third region, and the ratio of the total area of the openings in the second region is larger than the ratio of the total area of the openings in the third region, and is a method for manufacturing a semiconductor device.

[0017] Also, in the above, the first transistor, the second transistor, and the third transistor have an oxide semiconductor containing any one or more selected from In, Ga, or Zn.

[0018] Also, in the above, the second insulating film is a silicon oxide film, and the third insulating film is aluminum oxide.

[0019] Also, in the above, the oxygen addition treatment is performed by an ion implantation method.

[0020] Also, in the above, the heat treatment is performed in the range of 250°C or higher and 650°C or lower.

[0021] Also, in the above, the heat treatment is performed in the range of 350°C or higher and 400°C or lower.

Advantages of the Invention

[0022] According to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics can be provided. Or, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. Or, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. Or, according to one aspect of the present invention, a semiconductor device with a large on-current can be provided. Or, according to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. Or, according to one aspect of the present invention, a low-power consumption semiconductor device can be provided.

[0023] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other effects from the descriptions in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0024]

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DETAILED DESCRIPTION OF THE INVENTION

[0025] Hereinafter, embodiments will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiments can be implemented in many different modes, and the forms and details thereof can be variously changed without departing from the spirit and scope thereof. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0026] In the drawings, the size, layer thickness, or area may be exaggerated for clarity. Thus, it is not necessarily limited to that scale. The drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, etc. may unintentionally become thinner due to processes such as etching, but this may not be reflected in the drawings for ease of understanding. Also, in the drawings, the same reference numerals are commonly used for the same part or parts having similar functions among different drawings, and repeated descriptions thereof may be omitted. Also, when referring to similar functions, the hatching patterns may be the same and may not be particularly labeled.

[0027] Also, particularly in top views (also referred to as "plan views") and perspective views, etc., for ease of understanding the invention, the description of some components may be omitted. Also, the description of some hidden lines, etc. may be omitted.

[0028] Also, in this specification, etc., ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or stacking order. Therefore, for example, "first" can be appropriately replaced with "second" or "third", etc. and described. Also, the ordinal numbers described in this specification, etc. may not match the ordinal numbers used to specify an aspect of the present invention.

[0029] Also, in this specification, etc., terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0030] For example, in this specification and the like, when it is explicitly described that X and Y are connected, it shall be regarded that X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected as disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in the figure or the text, and those other than the connection relationship shown in the figure or the text shall also be regarded as disclosed in the figure or the text. Here, X and Y are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0031] Also, in this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. And it has a region (hereinafter also referred to as a channel formation region) where a channel is formed between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification and the like, the channel formation region refers to the region where current mainly flows.

[0032] Also, the functions of the source and the drain may be interchanged when transistors of different polarities are adopted or when the direction of current changes in the circuit operation. Therefore, in this specification and the like, the terms of the source and the drain may be used interchangeably in some cases.

[0033] Note that the channel length refers to, for example, in the top view of a transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in the channel formation region. Note that in one transistor, the channel length does not necessarily take the same value in all regions. That is, the channel length of one transistor may not be determined by a single value. Therefore, in this specification, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the channel formation region.

[0034] The channel width refers to, for example, in the top view of a transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the length of the channel formation region in the vertical direction with respect to the channel length direction in the channel formation region. Note that in one transistor, the channel width does not necessarily take the same value in all regions. That is, the channel width of one transistor may not be determined by a single value. Therefore, in this specification, the channel width is taken as any one value, the maximum value, the minimum value, or the average value in the channel formation region.

[0035] Note that in this specification and the like, depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter also referred to as the "effective channel width") may be different from the channel width shown in the top view of the transistor (hereinafter also referred to as the "apparent channel width"). For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width may be larger than the apparent channel width, and the influence may become non-negligible. For example, in a fine transistor where the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, the effective channel width is larger than the apparent channel width.

[0036] In such cases, it may be difficult to estimate the effective channel width by measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, when the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0037] In this specification, when simply described as "channel width", it may refer to the apparent channel width. Or, in this specification, when simply described as "channel width", it may refer to the effective channel width. Note that the channel length, channel width, effective channel width, apparent channel width, etc. can be determined by analyzing a cross-sectional TEM image or the like.

[0038] Note that the impurities in the semiconductor refer to, for example, components other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% can be said to be an impurity. When impurities are contained, for example, the density of defect levels in the semiconductor may increase, or the crystallinity may decrease. When the semiconductor is an oxide semiconductor, examples of the impurities that change the characteristics of the semiconductor include Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition metals other than the main components of the oxide semiconductor, etc., and for example, hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Note that water may also function as an impurity. Also, for example, due to the incorporation of impurities, oxygen vacancies (also referred to as V O : oxygen vacancy) may be formed in the oxide semiconductor.

[0039] Note that in this specification and the like, silicon oxynitride refers to a substance having a higher oxygen content than nitrogen in its composition. Also, silicon nitride oxide refers to a substance having a higher nitrogen content than oxygen in its composition.

[0040] In addition, in this specification and the like, the term "insulator" can be rephrased as an insulating film or an insulating layer. Also, the term "conductor" can be rephrased as a conductive film or a conductive layer. Further, the term "semiconductor" can be rephrased as a semiconductor film or a semiconductor layer.

[0041] In this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, cases of -5 degrees or more and 5 degrees or less are also included. Also, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, cases of 85 degrees or more and 95 degrees or less are also included. Also, "substantially perpendicular" means a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0042] In this specification and the like, a metal oxide is an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS), etc. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when described as an OS transistor, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

[0043] In this specification and the like, normally-off means that when no potential is applied to the gate or when the gate is given a ground potential, the drain current per 1 μm of channel width flowing through the transistor is -20 1×10 -18 A or less at room temperature, 1×10 -16 A or less at 85°C, or 1×10

[0044] (Embodiment 1) In this embodiment, an example of a semiconductor device 500 according to one aspect of the present invention and a method for manufacturing the same will be described with reference to FIGS. 1 to 26.

[0045] The semiconductor device 500 has, on the same substrate, a region constituting a plurality of circuits and an outer edge of the region constituting the circuits, that is, a peripheral region where no circuit is formed.

[0046] An example of the semiconductor device 500 is shown in FIG. 1. FIG. 1 is a top view of the semiconductor device 500. The semiconductor device 500 has a plurality of elements and has circuit regions 510, 512, and 514 that are regions constituting circuits. Further, a peripheral region 516 is disposed between the circuit region 510 and the circuit region 512, between the circuit region 512 and the circuit region 514, and between the circuit region 510 and the circuit region 514. Also, the peripheral region 516 is disposed between the circuit regions 510, 512, and 514 and the substrate edge.

[0047] FIG. 2A is a top view of the circuit region 510, FIG. 2B is a top view of the circuit region 512, and FIG. 2C is a top view of the circuit region 514. As shown in FIG. 2, each circuit region has at least a plurality of transistors 200 and a sealing portion 265.

[0048] Note that the peripheral region 516 does not necessarily have to be provided between each circuit region. For example, the sealing portions 265 of the circuit region 510 and the circuit region 512 may be provided in common to divide each circuit region.

[0049] Here, for the transistor 200, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor in the channel formation region.

[0050] A transistor using an oxide semiconductor in the channel formation region can provide a low-power semiconductor device because the leakage current is extremely small in the non-conducting state. On the other hand, in a transistor using an oxide semiconductor, its electrical characteristics vary due to impurities and oxygen deficiencies in the oxide semiconductor, and it tends to have a normally-on characteristic (a characteristic in which a channel exists even when no voltage is applied to the gate electrode and current flows through the transistor).

[0051] Therefore, it is preferable to use a high-purity intrinsic oxide semiconductor with reduced impurities and oxygen deficiencies for the oxide semiconductor used in the channel formation region of the transistor. In this specification and the like, a low impurity concentration and a low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. In order to make the oxide semiconductor high-purity intrinsic, oxygen deficiencies can be reduced by compensating the oxygen deficiencies in the oxide semiconductor with oxygen.

[0052] Specifically, by providing an insulator containing oxygen that desorbs by heating (hereinafter sometimes referred to as excess oxygen) near the oxide semiconductor and performing a heat treatment, oxygen can be supplied from the insulator to the oxide semiconductor, and the oxygen deficiencies can be reduced.

[0053] In order to provide an insulator containing excess oxygen near the oxide semiconductor, a process of adding oxygen (hereinafter also referred to as an oxygen addition process, an oxygen implantation process, or an oxygen doping process) may be performed on the corresponding insulator. As a process of adding oxygen, specifically, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like can be used. Oxygen may also be implanted by performing a plasma treatment on the corresponding insulator. As a plasma generation device, a dry etching device, a plasma CVD device, a sputtering device, or the like can be used.

[0054] In addition, the circuit region is preferably sealed with a material that suppresses the diffusion of oxygen. By sealing excess oxygen within the circuit region, when heat treatment is performed, the release of excess oxygen outside the circuit region can be suppressed, and it can be efficiently supplied to the oxide semiconductor. Further, the material that suppresses the diffusion of oxygen may suppress the diffusion of hydrogen, water, and impurities that have an adverse effect on the oxide semiconductor. Therefore, by sealing each circuit region, the diffusion of impurities from outside the substrate and other structures can be suppressed, and the reliability of the semiconductor device can be improved.

[0055] On the other hand, if an excessive amount of oxygen is supplied to the source region or the drain region, it may cause a decrease in the on-current of the transistor or a decrease in the field-effect mobility. Further, if the oxygen supplied to the source region or the drain region varies within the substrate surface, variations occur in the characteristics of the semiconductor device having the transistor.

[0056] Therefore, it is necessary to adjust the amount of excess oxygen desorbed from the insulator near the oxide semiconductor so that the oxide semiconductor is highly pure and intrinsic and does not affect the source region and the drain region.

[0057] For example, in the semiconductor device 500 shown in FIGS. 1 and 2, the density of the transistors 200 per unit area is different between the circuit region 510 and the circuit region 514. Specifically, as shown in FIG. 2, when the circuit region 510 has a higher transistor arrangement density than the circuit region 514, the amount of excess oxygen required by the circuit region 510 is larger than that of the circuit region 514.

[0058] Therefore, an oxygen addition treatment is performed on the entire surface of the substrate having the circuit region 510 and the circuit region 514. By this oxygen addition treatment, an excess oxygen region is provided in the insulator disposed near the oxide semiconductor included in the transistor 200. Note that it is preferable to implant the amount of excess oxygen required by the circuit region with the highest transistor arrangement density among the plurality of circuit regions in the oxygen addition treatment. Specifically, it is advisable to implant the amount of excess oxygen required by the circuit region 510, which has a higher transistor arrangement density than the circuit region 514.

[0059] Next, a film for suppressing oxygen diffusion is provided to cover the circuit region 510 and the circuit region 514. Here, a plurality of opening regions 400 are provided in the film for suppressing oxygen diffusion that covers the circuit region 514. Thereafter, by performing a heat treatment, oxygen is desorbed from the insulator disposed near the oxide semiconductor and supplied to the oxide semiconductor to compensate for the oxygen deficiency in the channel formation region.

[0060] In the circuit region 514, when the heat treatment is performed, a part of the excess oxygen desorbed from the insulator disposed near the oxide semiconductor rather than from the opening region 400 is released to the outside. Also, another part of the excess oxygen is supplied to the oxide semiconductor, and the oxygen deficiency in the channel formation region can be compensated. That is, in the circuit region 514, the excess oxygen added by the oxygen addition treatment is released from the opening region 400, so that the amount of excess oxygen desorbed from the insulator near the oxide semiconductor can be adjusted so as not to affect the source region and the drain region.

[0061] On the other hand, in the circuit region 510, the excess oxygen desorbed when the heat treatment is performed is supplied to the oxide semiconductor without being released to the outside, and the oxygen deficiency in the channel formation region can be compensated.

[0062] Therefore, according to the present invention, the circuit region 510 and the circuit region 514 can be provided on the same substrate without adding a mask.

[0063] Note that, according to the arrangement density of transistors, by appropriately designing the opening region 400, it is possible to provide a plurality of circuit regions on the same substrate.

[0064] For example, there may be a circuit region 512 where the arrangement density of transistors is lower than that of the circuit region 510 and higher than that of the circuit region 514. As shown in FIG. 2B, in the circuit region 512, the number of transistors 200 per unit area is less than that of the circuit region 510, but it has the opening region 400. On the other hand, in the circuit region 512, the number of transistors 200 per unit area is more than that of the circuit region 514, but it is preferable to provide a smaller area of the opening region 400. Or, the ratio of the total area of the opening regions 400 in the circuit region 512 (the integrated value of the area of one opening region 400 in top view and the number of the opening regions 400) may be made smaller than the ratio of the total area of the opening regions 400 in the circuit region 514.

[0065] That is, the larger the arrangement density of the transistors 200 arranged in each circuit region, the smaller the number of the arranged opening regions 400. Or, the larger the arrangement density of the transistors 200 arranged in each circuit region, the smaller the ratio of the total area of the openings to the area of the circuit region may be. Note that the number of the transistors 200 and the number of the opening regions 400 each circuit region has are not limited to the numbers shown in FIG. 2. The number of the arranged opening regions 400 may be appropriately adjusted according to the arrangement density of the transistors 200 in each circuit region.

[0066] Therefore, when providing a plurality of circuit regions with different transistor arrangement densities on the same substrate, after adding the excessive oxygen required for the circuit region with a high transistor arrangement density to the insulator arranged near the oxide semiconductor, a film that suppresses the diffusion of oxygen provided with the opening region is provided and heat treatment is performed, whereby an optimal amount of excessive oxygen can be supplied to each circuit region.

[0067] When there are a plurality of circuit regions with different arrangement densities of transistors, for example, the opening region 400 may arrange a number inversely proportional to the arrangement density of the transistors 200. Alternatively, it is preferable that the total area of the opening region 400 is larger as the arrangement density of the transistors 200 is smaller, and smaller as the arrangement density of the transistors 200 is larger.

[0068] FIG. 3A is an enlarged view of the region 291 surrounded by the dashed-dotted line in FIG. 2C. Further, FIG. 3B is a cross-sectional view of the portion indicated by the dashed-dotted line A1-A2 in FIG. 3A, and is also a cross-sectional view in the channel direction of the transistor 200 and a cross-sectional view of the sealing portion 265. Further, FIG. 3C is a cross-sectional view of the portion indicated by the dashed-dotted line A3-A4 in FIG. 3A, and is also a cross-sectional view of the opening region 400 and a cross-sectional view of the sealing portion 265.

[0069] As shown in FIG. 3A, the transistor 200 is arranged at a distance L1 from the end of the transistor 200 to the end of the sealing portion 265 in the A1-A2 direction, and is arranged at a distance L2 from the end of the transistor 200 to the end of the sealing portion 265 in the direction perpendicular to A1-A2. Further, the opening regions 400 are arranged at intervals of a distance L3 in the direction perpendicular to A1-A2. Here, the distance L3 is the distance between the upper portions of adjacent opening regions in the direction perpendicular to A1-A2. Further, the shape of the opening region 400 in a top view is not limited to the rectangle shown in FIG. 3A. For example, the shape of the opening region 400 in a top view includes a square, an ellipse, a circle, a rhombus, or a combination of these. Further, the distance L1 and the distance L2 are 0.10 μm or more and 2.0 μm or less, preferably 0.15 μm or more and 1.5 μm or less. Further, the distance L3 is 1.5 μm or more and 6.0 μm or less. Typically, it is 1.5 μm.

[0070] As shown in FIGS. 3B and 3C, the semiconductor device 500 includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a plurality of transistors 200 on the insulator 214, an insulator 280 on the transistors 200, an insulator 282 on the insulator 280, an insulator 283 on the insulator 282, a sealing portion 265 where a part of the upper surface of the insulator 212 is in contact with the insulator 283, and an opening region 400 where a part of the insulator 282 is opened. In the opening region 400, the insulator 280 may have a concave portion, and the depth of the concave portion of the insulator 280 is set to be not less than 1 / 4 and not more than 1 / 2 of the maximum film thickness of the insulator 280 in the semiconductor device 500.

[0071] Further, by performing a heat treatment after forming the opening region 400 in the manufacturing process of the semiconductor device 500, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside through the opening region 400. Note that the hydrogen bonded to the oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.

[0072] <Configuration Example of Semiconductor Device> Using FIGS. 4A to 4D, a configuration example of a semiconductor device having the transistor 200 and the opening region 400 will be described. FIGS. 4A to 4D are a top view and a cross-sectional view of a semiconductor device having the transistor 200 and the opening region 400. FIG. 4A is a top view of the semiconductor device. FIGS. 4B to 4D are cross-sectional views of the semiconductor device. Here, FIG. 4B is a cross-sectional view of the portion indicated by the dashed-dotted line A1 - A2 in FIG. 4A, and is also a cross-sectional view in the channel length direction of the transistor 200. FIG. 4C is a cross-sectional view of the portion indicated by the dashed-dotted line A3 - A4 in FIG. 4A, and is also a cross-sectional view in the channel width direction of the transistor 200. FIG. 4D is a cross-sectional view of the portion indicated by the dashed-dotted line A5 - A6 in FIG. 4A, and is also a cross-sectional view of the opening region 400. In the top view of FIG. 4A, some elements are omitted for clarity of the drawing.

[0073] A semiconductor device according to one aspect of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a transistor 200 on the insulator 214, an insulator 280 on the transistor 200, an insulator 282 (insulator 282a and insulator 282b) on the insulator 280, an insulator 283 on the insulator 282, an insulator 286 on the insulator 283, and an insulator 274 on the sealing portion 265. Further, the insulator 283 is in contact with a side surface of the insulator 282, a side surface of the insulator 280, a side surface of the transistor 200, a side surface of the insulator 214, and a part of the upper surface of the insulator 212. The insulator 212, the insulator 214, the insulator 280, the insulator 282, the insulator 283, the insulator 286, and the insulator 274 function as interlayer films. Further, it has conductors 240 (conductor 240a and conductor 240b) that are electrically connected to the transistor 200 and function as plugs. Note that insulators 241 (insulator 241a and insulator 241b) are provided in contact with side surfaces of the conductors 240 that function as plugs. Further, conductors 246 (conductor 246a and conductor 246b) that are electrically connected to the conductors 240 and function as wirings are provided on the insulator 286 and on the conductors 240.

[0074] An insulator 241a is provided in contact with the inner walls of the openings of the insulators 280, 282, 283, and 286. A first conductor of the conductor 240a is provided in contact with the side surface of the insulator 241a, and a second conductor of the conductor 240a is further provided on the inner side. Also, an insulator 241b is provided in contact with the inner walls of the openings of the insulators 280, 282, 283, and 286. A first conductor of the conductor 240b is provided in contact with the side surface of the insulator 241b, and a second conductor of the conductor 240b is further provided on the inner side. Here, the height of the upper surface of the conductor 240 can be made approximately the same as the height of the upper surface of the insulator 286 in the region overlapping with the conductor 246. Note that in the transistor 200, a configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are laminated is shown, but the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, ordinal numbers may be assigned in the order of formation for distinction.

[0075] [Transistor 200] As shown in FIGS. 4A to 4C, the transistor 200 includes an insulator 216 on an insulator 214, conductors 205 (conductor 205a, conductor 205b, and conductor 205c) arranged to be embedded in the insulator 214 or the insulator 216, an insulator 222 on the insulator 216 and on the conductors 205, an insulator 224 on the insulator 222, an oxide 230a on the insulator 224, an oxide 230b on the oxide 230a, oxides 243 (oxide 243a and oxide 243b) on the oxide 230b, a conductor 242a on the oxide 243a, an insulator 271a on the conductor 242a, a conductor 242b on the oxide 243b, an insulator 271b on the conductor 242b, an insulator 250a on the oxide 230b, an insulator 250b on the insulator 250a, conductors 260 (conductor 260a and conductor 260b) located on the insulator 250b and overlapping a part of the oxide 230b, and an insulator 272 arranged to cover the insulator 224, oxides 230 (oxide 230a and oxide 230b), oxides 243, conductors 242 (conductor 242a and conductor 242b), and insulators 271 (insulator 271a and insulator 271b). Here, as shown in FIGS. 4B to 4D, the insulator 272 has a region in contact with a part of the upper surface of the insulator 222. Also, the upper surface of the conductor 260 is arranged to be substantially flush with the upper surface of the insulator 250 and the upper surface of the insulator 280. Further, the insulator 282 is in contact with the upper surfaces of the conductor 260, the insulator 250, and the insulator 280, respectively.

[0076] In the following, the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230. Also, the insulator 250a and the insulator 250b may be collectively referred to as the insulator 250. Also, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271.

[0077] The insulator 280 and the insulator 272 are provided with openings reaching the oxide 230b. The insulator 250 and the conductor 260 are disposed within the openings. Also, in the channel length direction of the transistor 200, the conductor 260 and the insulator 250 are provided between the insulator 271a, the conductor 242a, and the oxide 243a and between the insulator 271b, the conductor 242b, and the oxide 243b. The insulator 250 has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.

[0078] The oxide 230 preferably has the oxide 230a disposed on the insulator 224 and the oxide 230b disposed on the oxide 230a. By having the oxide 230a under the oxide 230b, diffusion of impurities from the structure formed below the oxide 230a to the oxide 230b can be suppressed.

[0079] Note that in the transistor 200, the oxide 230 is shown as having a structure in which the oxide 230a and the oxide 230b are laminated, but the present invention is not limited to this. For example, a single layer of the oxide 230b or a laminated structure of three or more layers may be provided, or each of the oxide 230a and the oxide 230b may have a laminated structure.

[0080] The conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode. Also, the insulator 250 functions as a first gate insulator, and the insulators 222 and 224 function as second gate insulators. Further, the conductor 242a functions as one of the source or the drain, and the conductor 242b functions as the other of the source or the drain. Also, at least a part of the region of the oxide 230 that overlaps with the conductor 260 functions as a channel formation region.

[0081] Here, FIG. 5 shows an enlarged view of the vicinity of the channel formation region in FIG. 4B. As shown in FIG. 5, the oxide 230b has a region 230bc that functions as the channel formation region of the transistor 200, and regions 230ba and 230bb that are provided so as to sandwich the region 230bc and function as a source region or a drain region. At least a part of the region 230bc overlaps with the conductor 260. In other words, the region 230bc is provided in the region between the conductor 242a and the conductor 242b. The region 230ba is provided to overlap with the conductor 242a, and the region 230bb is provided to overlap with the conductor 242b.

[0082] The region 230bc that functions as the channel formation region is a high-resistance region with a low carrier concentration because it has less oxygen deficiency or a lower impurity concentration than the regions 230ba and 230bb. Also, the regions 230ba and 230bb that function as the source region or the drain region are regions with an increased carrier concentration and a lower resistance due to a large amount of oxygen deficiency or a high impurity concentration such as hydrogen, nitrogen, or a metal element. That is, the regions 230ba and 230bb are regions with a high carrier concentration and a low resistance compared to the region 230bc.

[0083] Here, the carrier concentration of the region 230bc that functions as the channel formation region is preferably 18 cm -3 or less, more preferably 17 cm -3 less, even more preferably 16 cm -3 less, even more preferably 13 cm -3 less, and even more preferably 12 cm -3 less. Note that the lower limit value of the carrier concentration of the region 230bc that functions as the channel formation region is not particularly limited, but can be, for example, -9 cm -3 or the like.

[0084] Further, a region may be formed between region 230bc and region 230ba or region 230bb, where the carrier concentration is equal to or lower than the carrier concentrations of regions 230ba and 230bb, and equal to or higher than the carrier concentration of region 230bc. That is, the region functions as a junction region between region 230bc and region 230ba or region 230bb. The hydrogen concentration in the junction region may be equal to or lower than the hydrogen concentrations of regions 230ba and 230bb, and equal to or higher than the hydrogen concentration of region 230bc. Also, the oxygen deficiency in the junction region may be equal to or less than the oxygen deficiencies of regions 230ba and 230bb, and equal to or more than the oxygen deficiency of region 230bc.

[0085] Note that in FIG. 5, an example where regions 230ba, 230bb, and 230bc are formed in oxide 230b is shown, but the present invention is not limited to this. For example, each of the above regions may be formed not only in oxide 230b but also in oxide 230a.

[0086] Also, in oxide 230, it may be difficult to clearly detect the boundaries of each region. The concentrations of metal elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region are not limited to stepwise changes from region to region, and may also change continuously within each region. That is, the concentrations of metal elements, as well as impurity elements such as hydrogen and nitrogen, may decrease in regions closer to the channel formation region.

[0087] For transistor 200, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor for oxides 230 (oxides 230a and 230b) including the channel formation region.

[0088] In addition, as the metal oxide functioning as a semiconductor, it is preferable to use one having a band gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a large band gap in this way, the off-current of the transistor can be reduced.

[0089] As the oxide 230, for example, a metal oxide such as an In-M-Zn oxide having indium, element M, and zinc (element M is one or more selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used. Further, as the oxide 230, an In-Ga oxide, an In-Zn oxide, or an indium oxide may be used.

[0090] Here, it is preferable that the atomic ratio of In to element M in the metal oxide used for the oxide 230b is larger than the atomic ratio of In to element M in the metal oxide used for the oxide 230a.

[0091] In this way, by disposing the oxide 230a under the oxide 230b, diffusion of impurities and oxygen from the structure formed below the oxide 230a to the oxide 230b can be suppressed.

[0092] In addition, since the oxide 230a and the oxide 230b have a common element (as the main component) other than oxygen, the density of defect levels at the interface between the oxide 230a and the oxide 230b can be lowered. Since the density of defect levels at the interface between the oxide 230a and the oxide 230b can be lowered, the influence on carrier conduction due to interface scattering is small, and a high on-current can be obtained.

[0093] The oxide 230b preferably has crystallinity. In particular, it is preferable to use CAAC-OS (c-axis aligned crystalline oxide semiconductor) as the oxide 230b.

[0094] CAAC-OS has a highly crystalline and dense structure and is a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V O :oxygen vacancy)). In particular, by heat-treating the metal oxide at a temperature (for example, 400°C or higher and 600°C or lower) such that the metal oxide does not polycrystallize after the formation of the metal oxide, CAAC-OS can be made to have a more highly crystalline and dense structure. In this way, by increasing the density of CAAC-OS, the diffusion of impurities or oxygen in the CAAC-OS can be further reduced.

[0095] On the other hand, since it is difficult to confirm distinct grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to grain boundaries is less likely to occur. Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable.

[0096] In a transistor using an oxide semiconductor, if impurities and oxygen vacancies are present in the region where the channel in the oxide semiconductor is formed, the electrical characteristics are likely to fluctuate and the reliability may deteriorate. Also, hydrogen near an oxygen vacancy may form a defect in which hydrogen enters the oxygen vacancy (hereinafter sometimes referred to as V O H) and generate electrons that serve as carriers. For this reason, if the region where the channel in the oxide semiconductor is formed contains oxygen vacancies, the transistor is likely to have normally-on characteristics (characteristics in which a channel exists even without applying a voltage to the gate electrode and current flows through the transistor). Therefore, in the region where the channel in the oxide semiconductor is formed, it is preferable that impurities, oxygen vacancies, and V O H are reduced as much as possible. In other words, in the region where the channel in the oxide semiconductor is formed, it is preferable that the carrier concentration is reduced and it is i-type (intrinsic) or substantially i-type.

[0097] On the other hand, by providing an insulator containing oxygen that desorbs by heating (hereinafter sometimes referred to as excess oxygen) near the oxide semiconductor and performing heat treatment, oxygen is supplied from the insulator to the oxide semiconductor, and oxygen deficiency and V O H can be reduced. However, if an excessive amount of oxygen is supplied to the source region or the drain region, it may cause a decrease in the on-current of the transistor 200 or a decrease in the field-effect mobility. Furthermore, if the oxygen supplied to the source region or the drain region varies within the substrate surface, the characteristics of the semiconductor device having the transistor will vary.

[0098] Therefore, in the oxide semiconductor, the region 230bc that functions as the channel formation region preferably has a reduced carrier concentration and is of the i-type or substantially i-type, while the regions 230ba and 230bb that function as the source region or the drain region preferably have a high carrier concentration and are of the n-type. That is, it is preferable to reduce the oxygen deficiency and V O H in the region 230bc of the oxide semiconductor and prevent an excessive amount of oxygen from being supplied to the regions 230ba and 230bb.

[0099] Therefore, in the present embodiment, while the conductor 242a and the conductor 242b are provided on the oxide 230b, microwave treatment is performed in an oxygen-containing atmosphere to reduce the oxygen deficiency and V O H in the region 230bc. Here, the microwave treatment refers to a treatment using, for example, a device having a power source for generating high-density plasma using microwaves.

[0100] By performing microwave treatment in an oxygen-containing atmosphere, oxygen gas can be plasmaized using microwaves or high-frequency waves such as RF, and the oxygen plasma can be made to act. At this time, microwaves or high-frequency waves such as RF can also be irradiated onto the region 230bc. Due to the action of plasma, microwaves, etc., the V O H in the region 230bc is broken, hydrogen H is removed from the region 230bc, and oxygen deficiency V Ocan be replenished with oxygen. That is, in region 230bc, the reaction "V O H → H + V O " occurs, and the hydrogen concentration in region 230bc can be reduced. Therefore, oxygen vacancies and V O H in region 230bc can be reduced, and the carrier concentration can be decreased.

[0101] Also, when performing microwave treatment in an oxygen-containing atmosphere, the actions of microwaves, high-frequency waves such as RF, and oxygen plasma are shielded by conductor 242a and conductor 242b and do not reach region 230ba and region 230bb. Furthermore, the action of oxygen plasma can be reduced by insulator 271a, insulator 271b, and insulator 280 provided to cover oxide 230b and conductor 242. As a result, during microwave treatment, reduction of V O H and excessive oxygen supply do not occur in region 230ba and region 230bb, so a decrease in carrier concentration can be prevented.

[0102] In particular, when performing microwave treatment in an oxygen-containing atmosphere after forming the insulating film that becomes insulator 250b, the above-described effects are significant. Also, it is preferable to perform microwave treatment in an oxygen-containing atmosphere after forming the insulating film that becomes insulator 250a, and further perform microwave treatment in an oxygen-containing atmosphere after forming the insulating film that becomes insulator 250b. By performing microwave treatment in an oxygen-containing atmosphere via insulator 250a or insulator 250b in this way, oxygen can be efficiently injected into region 230bc. Also, the oxygen injected into region 230bc exists in various forms such as oxygen atoms, oxygen molecules, and oxygen radicals (atoms, molecules, or ions having unpaired electrons). Note that the oxygen injected into region 230bc may be any one or more of the above-described forms, and oxygen radicals are particularly suitable. Also, since the film quality of insulator 250a and insulator 250b can be improved, the reliability of transistor 200 is improved.

[0103] In this way, oxygen deficiency and V O H can be selectively removed in the region 230bc of the oxide semiconductor, and the region 230bc can be made into an i-type or substantially i-type. Further, supply of excessive oxygen to the regions 230ba and 230bb that function as a source region or a drain region can be suppressed, and the n-type can be maintained. Thereby, fluctuations in the electrical characteristics of the transistor 200 can be suppressed, and variations in the electrical characteristics of the transistor 200 within the substrate surface can be suppressed.

[0104] By adopting the above configuration, a semiconductor device with little variation in transistor characteristics can be provided. In addition, a semiconductor device with good reliability can be provided. Further, a semiconductor device having good electrical characteristics can be provided.

[0105] Note that in FIG. 4 and the like, the side surface of the opening for embedding the conductor 260 or the like is substantially perpendicular to the formation surface of the oxide 230b including the groove portion of the oxide 230b, but the present embodiment is not limited to this. For example, the bottom of the opening may have a gentle curved surface and may have a U-shaped configuration. Further, for example, the side surface of the opening may be inclined with respect to the formation surface of the oxide 230b.

[0106] Also, as shown in FIG. 4C, in a cross-sectional view in the channel width direction of the transistor 200, a curved surface may be provided between the side surface and the upper surface of the oxide 230b. That is, the end of the side surface and the end of the upper surface may be curved (hereinafter also referred to as a round shape).

[0107] The radius of curvature of the curved surface is preferably greater than 0 nm and less than the film thickness of the oxide 230b in the region overlapping with the conductor 242, or less than half of the length of the region without the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and 20 nm or less, preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less. By adopting such a shape, the covering properties of the insulator 250 and the conductor 260 on the oxide 230b can be enhanced.

[0108] The oxide 230 preferably has a laminated structure of a plurality of oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to the metal element that is the main component is preferably larger than the atomic ratio of the element M to the metal element that is the main component in the metal oxide used for the oxide 230b. Also, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. Further, in the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a.

[0109] Also, the oxide 230b is preferably an oxide having crystallinity such as CAAC-OS. An oxide having crystallinity such as CAAC-OS has a dense structure with few impurities and defects (such as oxygen deficiencies) and high crystallinity. Therefore, it is possible to suppress the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode. As a result, even when heat treatment is performed, the extraction of oxygen from the oxide 230b can be reduced, so that the transistor 200 is stable against a high temperature (so-called thermal budget) in the manufacturing process.

[0110] Here, at the junction of the oxide 230a and the oxide 230b, the lower end of the conduction band changes smoothly. In other words, it can also be said that the lower end of the conduction band at the junction of the oxide 230a and the oxide 230b changes continuously or is continuously joined. To achieve this, it is preferable to lower the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.

[0111] Specifically, since the oxide 230a and the oxide 230b have a common element other than oxygen as the main component, a mixed layer with a low density of defect levels can be formed. For example, when the oxide 230b is an In-M-Zn oxide, as the oxide 230a, an In-M-Zn oxide, an M-Zn oxide, an oxide of element M, an In-Zn oxide, an indium oxide, etc. may be used.

[0112] Specifically, as the oxide 230a, a metal oxide having a composition of In:M:Zn = 1:3:4 [atomic ratio] or in the vicinity thereof, or a composition of In:M:Zn = 1:1:0.5 [atomic ratio] or in the vicinity thereof may be used. Also, as the oxide 230b, a metal oxide having a composition of In:M:Zn = 1:1:1 [atomic ratio] or in the vicinity thereof, or a composition of In:M:Zn = 4:2:3 [atomic ratio] or in the vicinity thereof, or a composition of In:M:Zn = 5:1:3 [atomic ratio] or in the vicinity thereof may be used. Note that the vicinity of the composition includes a range of ±30% of the desired atomic ratio. Also, as the element M, it is preferable to use gallium.

[0113] When forming a film of the metal oxide by sputtering, the above atomic ratio is not limited to the atomic ratio of the formed metal oxide, and may be the atomic ratio of the sputtering target used for forming the metal oxide.

[0114] By configuring the oxide 230a and the oxide 230b as described above, the density of defect levels at the interface between the oxide 230a and the oxide 230b can be lowered. Therefore, the influence on carrier conduction due to interface scattering is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics.

[0115] At least one of insulator 212, insulator 214, insulator 271, insulator 272, insulator 282, and insulator 283 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200 into the transistor 200. Therefore, at least one of insulator 212, insulator 214, insulator 271, insulator 272, insulator 282, and insulator 283 preferably uses an insulating material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms (i.e., the above impurities are difficult to permeate). Or, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., the above oxygen is difficult to permeate).

[0116] In this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability). Or, it refers to a function of capturing and fixing a corresponding substance (also referred to as gettering).

[0117] As the insulators 212, 214, 271, 272, 282, and 283, it is preferable to use insulators having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. For example, as the insulators 212 and 283, it is preferable to use silicon nitride or the like having higher hydrogen barrier properties. Further, for example, as the insulators 214, 271, 272, and 282, it is preferable to use aluminum oxide or magnesium oxide or the like having a high function of capturing and fixing hydrogen. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulators 212 and 214. Or, it is possible to suppress the diffusion of impurities such as water and hydrogen from an interlayer insulating film or the like disposed outside the insulator 283 to the transistor 200 side. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulators 212 and 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 280 or the like above the transistor 200 through the insulator 282 or the like. In this way, it is preferable to form the transistor 200 with a structure surrounded by the insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.

[0118] Here, as the insulators 212, 214, 271, 272, 282, and 283, it is preferable to use oxides having an amorphous structure. For example, AlO x (x is an arbitrary number greater than 0), or MgO yIt is preferable to use a metal oxide such as (where y is any number greater than 0). In such a metal oxide having an amorphous structure, oxygen atoms have dangling bonds and may have the property of capturing or fixing hydrogen with the dangling bonds. By using such a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen existing around the transistor 200 can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200. By using a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, a transistor 200 and a semiconductor device having good characteristics and high reliability can be fabricated.

[0119] Also, the insulator 212, the insulator 214, the insulator 271, the insulator 272, the insulator 282, and the insulator 283 preferably have an amorphous structure, but a polycrystalline structure region may be formed in part. Further, the insulator 212, the insulator 214, the insulator 271, the insulator 272, the insulator 282, and the insulator 283 may have a multilayer structure in which an amorphous structure layer and a polycrystalline structure layer are laminated. For example, a laminated structure in which a polycrystalline structure layer is formed on an amorphous structure layer may be used.

[0120] Also, the insulator 272 may have a laminated structure. For example, the insulator 272 may have a laminated structure of aluminum oxide and silicon nitride formed on the aluminum oxide. Such a laminated structure is preferable because the barrier property can be enhanced compared to a single layer of aluminum oxide or a single layer of silicon nitride.

[0121] The film formation of insulator 212, insulator 214, insulator 216, insulator 271, insulator 272, insulator 280, insulator 282, insulator 283, and insulator 286 may be performed, for example, using a sputtering method. Since the sputtering method does not require hydrogen in the film formation gas, the hydrogen concentration of insulator 212, insulator 214, insulator 216, insulator 271, insulator 272, insulator 280, insulator 282, insulator 283, and insulator 286 can be reduced. Note that the film formation method is not limited to the sputtering method, and chemical vapor deposition (CVD) method, molecular beam epitaxy (MBE) method, pulsed laser deposition (PLD) method, atomic layer deposition (ALD) method, etc. may be appropriately used.

[0122] Also, there may be cases where it is preferable to lower the resistivity of insulator 212 and insulator 283. For example, by setting the resistivity of insulator 212 and insulator 283 to approximately 1×10 13 Ωcm, in the process using plasma or the like in the semiconductor device manufacturing process, insulator 212 and insulator 283 may be able to relax the charge-up of conductor 205, conductor 242, conductor 260, or conductor 246. The resistivity of insulator 212 and insulator 283 is preferably 1×10 10 Ωcm or more and 1×10 15 Ωcm or less.

[0123] Also, insulator 216, insulator 274, insulator 280, and insulator 286 preferably have a lower dielectric constant than insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. For example, as insulator 216, insulator 274, insulator 280, and insulator 286, silicon oxide, silicon oxynitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, etc. may be appropriately used.

[0124] The conductor 205 is arranged to overlap with the oxide 230 and the conductor 260. Here, the conductor 205 is preferably provided by being embedded in an opening formed in the insulator 216.

[0125] The conductor 205 has a conductor 205a, a conductor 205b, and a conductor 205c. The conductor 205a is provided in contact with the bottom surface and the side wall of the opening. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c substantially coincides with the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. That is, the conductor 205b is configured to be wrapped by the conductor 205a and the conductor 205c.

[0126] Here, for the conductor 205a and the conductor 205c, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0127] By using a conductive material having a function of reducing the diffusion of hydrogen for the conductors 205a and 205c, impurities such as hydrogen contained in the conductor 205b can be prevented from diffusing into the oxide 230 through the insulator 224 or the like. Further, by using a conductive material having a function of suppressing the diffusion of oxygen for the conductors 205a and 205c, it is possible to suppress the oxidation of the conductor 205b and the decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like. Therefore, as the conductor 205a, the above conductive material may be a single layer or a laminate. For example, the conductor 205a may use titanium nitride.

[0128] Further, for the conductor 205b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. For example, the conductor 205b may use tungsten.

[0129] The conductor 205 may function as a second gate electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage (Vth) of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, it is possible to increase the Vth of the transistor 200 and reduce the off-current. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0V than when no negative potential is applied.

[0130] Further, the electrical resistivity of the conductor 205 is designed in consideration of the potential applied to the conductor 205, and the film thickness of the conductor 205 is set according to the electrical resistivity. Also, the film thickness of the insulator 216 is made substantially the same as that of the conductor 205. Here, it is preferable to reduce the film thicknesses of the conductor 205 and the insulator 216 within the range allowed by the design of the conductor 205. By reducing the film thickness of the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, so that the diffusion of the impurities into the oxide 230 can be reduced.

[0131] Note that, as shown in FIG. 4A, the conductor 205 is preferably provided to be larger than the size of the region that does not overlap with the conductors 242a and 242b of the oxide 230. In particular, as shown in FIG. 4C, the conductor 205 preferably extends also in the region outside the end portions in the channel width direction of the oxides 230a and 230b. That is, it is preferable that the conductor 205 and the conductor 260 overlap with each other via an insulator outside the side surfaces of the oxide 230 in the channel width direction. By having such a configuration, the channel formation region of the oxide 230 can be electrically surrounded by the electric field of the conductor 260 functioning as the first gate electrode and the electric field of the conductor 205 functioning as the second gate electrode. In this specification, the structure of the transistor in which the channel formation region is electrically surrounded by the electric fields of the first gate and the second gate is referred to as a surrounded channel (S-channel) structure.

[0132] Note that, in this specification and the like, the transistor having an S-channel structure refers to the structure of a transistor in which the channel formation region is electrically surrounded by the electric fields of one and the other of a pair of gate electrodes. Also, the S-channel structure disclosed in this specification and the like is different from the Fin type structure and the planar type structure. By adopting the S-channel structure, it is possible to enhance the resistance to the short-channel effect, in other words, to obtain a transistor in which the short-channel effect hardly occurs.

[0133] Also, as shown in FIG. 4C, the conductor 205 is extended to also function as a wiring. However, the present invention is not limited to this, and a configuration may be adopted in which a conductor that functions as a wiring is provided under the conductor 205. Also, the conductor 205 does not necessarily need to be provided one by one for each transistor. For example, a configuration may be adopted in which the conductor 205 is shared by a plurality of transistors.

[0134] In the transistor 200, the conductor 205 is shown in a configuration in which the conductor 205a, the conductor 205b, and the conductor 205c are laminated. However, the present invention is not limited to this. For example, the conductor 205 may be provided in a single-layer, two-layer, or four-layer or more laminated structure.

[0135] The insulator 222 and the insulator 224 function as gate insulators.

[0136] The insulator 222 preferably has a function of suppressing the diffusion of hydrogen (for example, at least one of a hydrogen atom, a hydrogen molecule, etc.). Also, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.

[0137] The insulator 222 may be made of an insulator containing one or both of oxides of aluminum and hafnium, which are insulating materials. As such an insulator, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the oxide 230 to the substrate side and the diffusion of impurities such as hydrogen from the peripheral portion of the transistor 200 to the oxide 230. Therefore, by providing the insulator 222, it is possible to suppress the diffusion of impurities such as hydrogen into the inside of the transistor 200 and suppress the generation of oxygen vacancies in the oxide 230. In addition, it is possible to suppress the reaction of the conductor 205 with the oxygen contained in the insulator 224 or the oxide 230.

[0138] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide may be added to the above insulator. Alternatively, these insulators may be nitrided. Further, the insulator 222 may be used by laminating silicon oxide, silicon oxynitride, or silicon nitride on these insulators.

[0139] Further, the insulator 222 may be used as a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), (Ba,Sr)TiO3 (BST), etc. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator that functions as a gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0140] For the insulator 224 in contact with the oxide 230, for example, silicon oxide, silicon oxynitride, etc. may be appropriately used.

[0141] Also, during the manufacturing process of the transistor 200, it is preferable to perform a heat treatment while the surface of the oxide 230 is exposed. The heat treatment may be performed, for example, at 100°C or higher and 600°C or lower, more preferably 350°C or higher and 550°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 230 to reduce the oxygen vacancy (V O ). Also, the heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after heat treatment in an atmosphere of nitrogen gas or an inert gas. Alternatively, after heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.

[0142] Note that by performing an oxygen addition treatment on the oxide 230, the oxygen vacancy in the oxide 230 is repaired with the supplied oxygen, in other words, the reaction of "V O +O→null" can be promoted. Further, by reacting the oxygen supplied to the hydrogen remaining in the oxide 230, the hydrogen can be removed (dehydrated) as H2O. Thereby, it is possible to suppress the recombination of the hydrogen remaining in the oxide 230 with the oxygen vacancy to form V O H.

[0143] Note that the insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used. Also, the insulator 224 may be formed in an island shape by overlapping with the oxide 230a. In this case, the insulator 272 is configured to contact the side surface of the insulator 224 and the upper surface of the insulator 222.

[0144] Oxide 243a and oxide 243b are provided on oxide 230b. Oxide 243a and oxide 243b are provided separately with conductor 260 interposed therebetween.

[0145] Oxide 243 (oxide 243a and oxide 243b) preferably has a function of suppressing oxygen permeation. By disposing an oxide 243 having a function of suppressing oxygen permeation between conductor 242 which functions as a source electrode or a drain electrode and oxide 230b, the electrical resistance between conductor 242 and oxide 230b is reduced, which is preferable. With such a configuration, the electrical characteristics of transistor 200 and the reliability of transistor 200 can be improved. Note that when the electrical resistance between conductor 242 and oxide 230b can be sufficiently reduced, a configuration without providing oxide 243 may be adopted.

[0146] As oxide 243, a metal oxide containing element M may be used. In particular, as element M, aluminum, gallium, yttrium, or tin is preferably used. The concentration of element M in oxide 243 is preferably higher than that in oxide 230b. Further, as oxide 243, gallium oxide may be used. Further, as oxide 243, a metal oxide such as an In-M-Zn oxide may be used. Specifically, in the metal oxide used for oxide 243, the atomic ratio of element M to In is preferably larger than the atomic ratio of element M to In in the metal oxide used for oxide 230b. Further, the film thickness of oxide 243 is preferably 0.5 nm or more and 5 nm or less, more preferably 1 nm or more and 3 nm or less, and still more preferably 1 nm or more and 2 nm or less. Further, oxide 243 preferably has crystallinity. When oxide 243 has crystallinity, the release of oxygen in oxide 230 can be preferably suppressed. For example, when oxide 243 has a crystal structure such as a hexagonal crystal, the release of oxygen in oxide 230 may be suppressed.

[0147] The conductor 242a is preferably provided in contact with the upper surface of the oxide 243a, and the conductor 242b is preferably provided in contact with the upper surface of the oxide 243b. The conductor 242a and the conductor 242b each function as a source electrode or a drain electrode of the transistor 200.

[0148] As the conductor 242 (conductor 242a and conductor 242b), for example, it is preferable to use a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, a nitride containing titanium and aluminum, etc. In one aspect of the present invention, a nitride containing tantalum is particularly preferable. Also, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. may be used. These materials are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen.

[0149] Note that hydrogen contained in the oxide 230b or the like may diffuse into the conductor 242a or the conductor 242b. In particular, by using a nitride containing tantalum for the conductor 242a and the conductor 242b, hydrogen contained in the oxide 230b or the like easily diffuses into the conductor 242a or the conductor 242b, and the diffused hydrogen may combine with nitrogen that the conductor 242a or the conductor 242b has. That is, hydrogen contained in the oxide 230b or the like may be absorbed by the conductor 242a or the conductor 242b.

[0150] Also, it is preferable that a curved surface is not formed between the side surface and the upper surface of the conductor 242. By making the conductor 242 such that the curved surface is not formed, the cross-sectional area of the conductor 242 in the cross-section in the channel width direction can be increased. Thereby, the conductivity of the conductor 242 can be increased, and the on-current of the transistor 200 can be increased.

[0151] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b. Also, it is preferable that the upper surface of the insulator 271a is in contact with the insulator 272, and the side surface of the insulator 271a is in contact with the insulator 250. Also, it is preferable that the upper surface of the insulator 271b is in contact with the insulator 272, and the side surface of the insulator 271b is in contact with the insulator 250. The insulator 271 preferably functions as at least a barrier insulating film against oxygen. Therefore, the insulator 271 preferably has a function of suppressing the diffusion of oxygen. For example, the insulator 271 preferably has a function of suppressing the diffusion of oxygen more than the insulator 280. As the insulator 271, for example, a nitride containing silicon such as silicon nitride may be used. Also, the insulator 271 preferably has a function of capturing impurities such as hydrogen. In that case, as the insulator 271, an insulator having an amorphous structure, such as aluminum oxide or magnesium oxide, may be used. In particular, using aluminum oxide having an amorphous structure or aluminum oxide of an amorphous structure as the insulator 271 may be preferable because hydrogen can be captured or fixed more effectively. Thereby, a transistor 200 and a semiconductor device having good characteristics and high reliability can be manufactured.

[0152] The insulator 272 is provided so as to cover the insulator 224, the oxide 230a, the oxide 230b, the oxide 243, the conductor 242, and the insulator 271. As the insulator 272, it is preferable to have a function of capturing hydrogen and fixing hydrogen. In that case, the insulator 272 preferably contains an insulator having an amorphous structure, such as aluminum oxide or magnesium oxide.

[0153] By providing the insulators 271 and 272 as described above, the conductor 242 can be wrapped with an insulator having barrier properties against oxygen. That is, oxygen contained in the insulator 224 and the insulator 280 can be prevented from diffusing into the conductor 242. Thereby, it is possible to suppress the direct oxidation of the conductor 242 by oxygen contained in the insulator 224 and the insulator 280, an increase in resistivity, and a reduction in on-current.

[0154] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the oxide 230b. As the insulator 250, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide having pores, etc. can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0155] Similar to the insulator 224, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 250 is reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0156] Note that, as shown in FIGS. 4B and 4C, when the insulator 250 has a two-layer stacked structure, the lower-layer insulator 250a is preferably formed using an insulator that easily permeates oxygen, and the upper-layer insulator 250b is preferably formed using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, it is possible to suppress the diffusion of oxygen contained in the insulator 250a to the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. In addition, it is possible to suppress the oxidation of the conductor 260 by the oxygen contained in the insulator 250a. For example, the insulator 250a may be provided using a material that can be used for the above-described insulator 250, and the insulator 250b may preferably use an insulator containing one or both of aluminum oxide and hafnium oxide. As the insulator, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. Further, the film thickness of the insulator 250b is 0.5 nm or more and 3.0 nm or less, preferably 1.0 nm or more and 1.5 nm or less.

[0157] Note that when silicon oxide, silicon oxynitride, or the like is used for the lower layer of the insulator 250, the upper layer of the insulator 250 may use an insulating material that is a high-k material having a high relative permittivity. By forming the gate insulator into a stacked structure of the insulator 250a and the insulator 250b, it is possible to obtain a stacked structure that is stable against heat and has a high relative permittivity. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it is possible to thin the equivalent oxide film thickness (EOT) of the insulator functioning as the gate insulator.

[0158] Further, a metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of oxygen from the insulator 250 to the conductor 260 is suppressed. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. In addition, it is possible to suppress the oxidation of the conductor 260 by the oxygen of the insulator 250.

[0159] Note that the above metal oxide may be configured to function as part of the first gate electrode. For example, a metal oxide that can be used as the oxide 230 can be used as the above metal oxide. In that case, by forming the conductor 260a by sputtering, the electrical resistance value of the above metal oxide can be reduced to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0160] By having the above metal oxide, it is possible to improve the on-current of the transistor 200 without weakening the influence of the electric field from the conductor 260. Also, by maintaining the distance between the conductor 260 and the oxide 230 based on the physical thickness of the insulator 250 and the above metal oxide, the leakage current between the conductor 260 and the oxide 230 can be suppressed. Further, by providing a laminated structure of the insulator 250 and the above metal oxide, the physical distance between the conductor 260 and the oxide 230 and the electric field strength applied from the conductor 260 to the oxide 230 can be easily adjusted as appropriate.

[0161] The conductor 260 functions as the first gate electrode of the transistor 200. The conductor 260 preferably has a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, the conductor 260a is preferably disposed so as to surround the bottom surface and the side surface of the conductor 260b. Also, as shown in FIGS. 4B and 4C, the upper surface of the conductor 260 substantially coincides with the upper surface of the insulator 250. Note that in FIGS. 4B and 4C, the conductor 260 is shown as a two-layer structure of the conductor 260a and the conductor 260b, but it may be a single-layer structure or a laminated structure of three or more layers.

[0162] For the conductor 260a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0163] Further, since the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 260b by the oxygen contained in the insulator 250 and the resulting decrease in conductivity. As the conductive material having the function of suppressing the diffusion of oxygen, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferably used.

[0164] Further, since the conductor 260 also functions as a wiring, it is preferable to use a conductor having high conductivity. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0165] Further, in the transistor 200, the conductor 260 is self-alignedly formed so as to fill an opening formed in the insulator 280 or the like. By forming the conductor 260 in this way, the conductor 260 can be surely arranged in the region between the conductor 242a and the conductor 242b without aligning the conductor 260.

[0166] Further, as shown in FIG. 4C, in the channel width direction of the transistor 200, when the bottom surface of the insulator 222 is used as a reference, the height of the bottom surface of the conductor 260 in the region where the conductor 260 and the oxide 230b do not overlap is preferably lower than the height of the bottom surface of the oxide 230b. By configuring the conductor 260 that functions as a gate electrode to cover the side surface and the upper surface of the channel formation region of the oxide 230b via the insulator 250 or the like, the electric field of the conductor 260 can be easily applied to the entire channel formation region of the oxide 230b. Therefore, the on-current of the transistor 200 can be increased and the frequency characteristics can be improved. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the region where the oxide 230a and the oxide 230b and the conductor 260 do not overlap when the bottom surface of the insulator 222 is used as a reference is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 nm or more and 20 nm or less.

[0167] [Opening region 400] The opening region 400 is formed by opening the insulator 282 in the manufacturing process of the semiconductor device. At this time, a concave portion may be formed in the insulator 280. By performing a heat treatment after the formation of the opening region 400, oxygen contained in the insulator 280 and hydrogen combined with the oxygen can be released to the outside through the opening region 400. Note that the hydrogen combined with oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced. Further, the insulator 283 on the insulator 282 is provided so as to be in contact with the insulator 280 within the opening region 400, and the insulator 274 is embedded on the insulator 283 in the opening region 400. The depth of the concave portion of the insulator 280 is 1 / 4 or more and 1 / 2 or less of the maximum film thickness of the insulator 280 in the semiconductor device.

[0168] The insulator 280 is provided on the insulator 272, and an opening is formed in the region where the insulator 250 and the conductor 260 are provided. Further, the upper surface of the insulator 280 may be planarized.

[0169] The insulator 280 that functions as an interlayer film preferably has a low dielectric constant. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. The insulator 280 is preferably provided using, for example, the same material as the insulator 216. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having pores are preferable because they can easily form regions containing oxygen that desorbs upon heating.

[0170] It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. For example, as the insulator 280, oxides containing silicon such as silicon oxide and silicon oxynitride may be appropriately used.

[0171] The insulator 282 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280, and preferably has a function of capturing impurities such as hydrogen. Further, the insulator 282 preferably functions as a barrier insulating film that suppresses the permeation of oxygen. As the insulator 282, an insulator having an amorphous structure, for example, an insulator such as aluminum oxide may be used. By providing the insulator 282 having a function of capturing impurities such as hydrogen in contact with the insulator 280 within the region sandwiched between the insulator 212 and the insulator 283, impurities such as hydrogen contained in the insulator 280 and the like can be captured, and the amount of hydrogen in the region can be set to a constant value. In particular, using aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 282 may be preferable because hydrogen can be captured or fixed more effectively. Thereby, a transistor 200 and a semiconductor device having good characteristics and high reliability can be manufactured.

[0172] The insulator 283 functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen into the insulator 280 from above. The insulator 283 is disposed on the insulator 282. As the insulator 283, it is preferable to use a nitride containing silicon, such as silicon nitride or silicon oxynitride. For example, silicon nitride formed by a sputtering method may be used as the insulator 283. By forming the insulator 283 by a sputtering method, a silicon nitride film with high density and difficult to form voids or the like can be formed. Further, as the insulator 283, silicon nitride formed by an ALD method may be laminated on silicon nitride formed by a sputtering method. With such a structure, even if defects, such as voids, occur in the silicon nitride formed by the sputtering method, the voids can be filled with silicon nitride formed by the ALD method with good coverage, enhancing the sealing performance, which is preferable.

[0173] The insulator 286 is provided on the insulator 283 and on the insulator 274.

[0174] It is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum for the conductor 240a and the conductor 240b. Further, the conductor 240a and the conductor 240b may have a laminated structure.

[0175] Also, when the conductor 240 has a laminated structure, it is preferable to use a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen for the conductor in contact with the insulator 286, the insulator 283, the insulator 282, the insulator 280, the insulator 272, and the insulator 271. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like. Further, the conductive material having a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or in a laminated form. Also, it is possible to suppress the mixing of impurities such as water and hydrogen contained in the upper layer than the insulator 283 into the oxide 230 through the conductor 240a and the conductor 240b.

[0176] As the insulators 241a and 241b, for example, insulators such as silicon nitride, aluminum oxide, and silicon oxynitride may be used. Since the insulators 241a and 241b are provided in contact with the insulators 286, 283, 282, 280, 272, and 271, it is possible to suppress impurities such as water and hydrogen contained in the insulator 280 from mixing into the oxide 230 through the conductors 240a and 240b. In particular, silicon nitride is suitable because of its high blocking property against hydrogen. Also, it is possible to prevent oxygen contained in the insulator 280 from being absorbed by the conductors 240a and 240b.

[0177] Also, conductors 246 (conductor 246a and conductor 246b) that function as wiring may be arranged in contact with the upper surfaces of the conductor 240a and the conductor 240b. It is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum for the conductor 246. Also, the conductor may have a laminated structure, for example, a laminate of titanium or titanium nitride and the above conductive material. Note that the conductor may be formed to be embedded in an opening provided in the insulator.

[0178] <Constituent Materials of Semiconductor Device> Hereinafter, the constituent materials that can be used in a semiconductor device will be described.

[0179] <<Substrate>> As the substrate for forming the transistor 200, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), a resin substrate, and the like. Examples of the semiconductor substrate include a semiconductor substrate made of silicon, germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there is a semiconductor substrate having an insulator region inside the aforementioned semiconductor substrate, such as a SOI (Silicon On Insulator) substrate. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate, and the like. Or, there is a substrate having a metal nitride, a substrate having a metal oxide, and the like. Furthermore, there are a substrate in which a conductor or a semiconductor is provided on an insulator substrate, a substrate in which a conductor or an insulator is provided on a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided on a conductor substrate, and the like. Or, those with elements provided on these substrates may also be used. Examples of the elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, and the like.

[0180] <<Insulator>> Examples of the insulator include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, metal nitride oxides, etc. having insulating properties.

[0181] For example, as the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator that functions as the gate insulator, it is possible to lower the voltage during transistor operation while maintaining the physical film thickness. On the other hand, by using a material with a low relative permittivity for the insulator that functions as the interlayer film, the parasitic capacitance generated between the wirings can be reduced. Therefore, the material may be selected according to the function of the insulator.

[0182] Examples of insulators with a high relative permittivity include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0183] Examples of insulators with a low relative permittivity include silicon oxide, silicon oxynitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin.

[0184] In addition, a transistor using a metal oxide can have its electrical characteristics stabilized by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. As an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a laminated structure. Specifically, as an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, silicon oxynitride, and silicon nitride can be used.

[0185] In addition, the insulator functioning as a gate insulator is preferably an insulator having a region containing oxygen that desorbs upon heating. For example, by forming a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that desorbs upon heating is in contact with the oxide 230, the oxygen deficiency of the oxide 230 can be compensated.

[0186] <<Conductor>> As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Also, a semiconductor having a high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, or a silicide such as nickel silicide may be used.

[0187] In addition, a plurality of conductive layers formed of the above materials may be laminated and used. For example, a laminated structure combining a material containing the above-described metal element and a conductive material containing oxygen may be used. Also, a laminated structure combining a material containing the above-described metal element and a conductive material containing nitrogen may be used. Also, a laminated structure combining a material containing the above-described metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be used.

[0188] In the case of using an oxide in the channel formation region of the transistor, it is preferable to use a laminated structure combining a material containing the above-described metal element and a conductive material containing oxygen as the conductor functioning as the gate electrode. In this case, it is advisable to provide the conductive material containing oxygen on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen detached from the conductive material is easily supplied to the channel formation region.

[0189] In particular, as the conductor functioning as the gate electrode, it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed. Further, a conductive material containing the above-described metal element and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Further, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon may be used. Further, indium gallium zinc oxide containing nitrogen may be used. By using such a material, it may be possible to capture hydrogen contained in the metal oxide in which the channel is formed. Or, it may be possible to capture hydrogen mixed from an external insulator or the like.

[0190] <<Metal Oxide>> As the oxide 230, it is preferable to use a metal oxide (oxide semiconductor) that functions as a semiconductor. Hereinafter, metal oxides applicable to the oxide 230 according to the present invention will be described.

[0191] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. Further, in addition to those, it is preferable that aluminum, gallium, yttrium, tin, or the like is contained. Further, one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, or the like may be contained.

[0192] Here, consider the case where the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. Note that element M is aluminum, gallium, yttrium, or tin. Other elements applicable as element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. However, there may be cases where a plurality of the aforementioned elements are combined as element M.

[0193] In addition, in this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

[0194] <Classification of Crystal Structure> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 6A. FIG. 6A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0195] As shown in FIG. 6A, the oxide semiconductor is roughly classified into "Amorphous", "Crystalline", and "Crystal". Further, "completely amorphous" is included in "Amorphous". Also, "CAAC (c-axis-aligned crystalline)", "nc (nanocrystalline)", and "CAC (cloud-aligned composite)" are included in "Crystalline". Note that the classification of "Crystalline" excludes single crystal, poly crystal, and completely amorphous (excluding single crystal and poly crystal). Also, single crystal and poly crystal are included in "Crystal".

[0196] Note that the structure within the thick frame shown in FIG. 6A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). That is, the structure can be described as being energetically unstable "Amorphous" and completely different from the "Crystal" structure.

[0197] Note that the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Diffraction) spectrum. Here, the XRD spectrum obtained from the grazing-incidence XRD (GIXD) measurement of the CAAC-IGZO film classified as "Crystalline" is shown in FIG. 6B. Note that the GIXD method is also called the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained from the GIXD measurement shown in FIG. 6B will be simply referred to as the XRD spectrum. Note that the composition of the CAAC-IGZO film shown in FIG. 6B is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the thickness of the CAAC-IGZO film shown in FIG. 6B is 500 nm.

[0198] As shown in FIG. 6B, peaks indicating clear crystallinity are detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected at around 2θ = 31°. Note that, as shown in FIG. 6B, the peak at around 2θ = 31° is asymmetric about the angle at which the peak intensity (Intensity) was detected.

[0199] In addition, the crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano beam electron diffraction pattern) observed by the nano beam electron diffraction method (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 6C. FIG. 6C is a diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in FIG. 6C is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. In the nano beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0200] As shown in FIG. 6C, in the diffraction pattern of the CAAC-IGZO film, a plurality of spots indicating c-axis orientation are observed.

[0201] [Structure of Oxide Semiconductor] Note that when focusing on the crystal structure, the oxide semiconductor may be classified differently from that in FIG. 6A. For example, the oxide semiconductor can be divided into a single crystal oxide semiconductor and other non-single crystal oxide semiconductors. Examples of the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS. In addition, the non-single crystal oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.

[0202] Here, the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0203] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axes of the plurality of crystal regions are oriented in a specific direction. Here, the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. Also, a crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region where the lattice arrangements are aligned. Further, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. Here, strain refers to a portion where the orientation of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in a region where a plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor in which the c-axis is oriented and there is no obvious orientation in the a-b plane direction.

[0204] Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. Also, when a crystal region is composed of a number of minute crystals, the size of the crystal region may be about several tens of nm.

[0205] Also, in an In-M-Zn oxide (the element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing the element M, zinc (Zn), and oxygen (hereinafter, (M,Zn) layer) are laminated. Here, indium and the element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain the element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0206] When performing structural analysis on the CAAC-OS film using, for example, an XRD apparatus, in the out-of-plane XRD measurement using θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in its vicinity. Note that the position (the value of 2θ) of the peak indicating c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.

[0207] Also, for example, in the electron diffraction pattern of the CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as the direct spot) as the center of symmetry.

[0208] When observing the crystal region from the above specific direction, the lattice arrangement within the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, in the above distortion, there may be a lattice arrangement such as a pentagon or a heptagon. Note that in CAAC-OS, even in the vicinity of the distortion, a clear grain boundary cannot be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is presumably because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal atoms.

[0209] Note that a crystal structure in which a clear grain boundary is confirmed is called a so-called polycrystal. Grain boundaries can become recombination centers, and there is a high possibility of causing a decrease in the on-current of a transistor and a decrease in the field-effect mobility due to carriers being trapped. Therefore, CAAC-OS in which a clear grain boundary is not confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of a transistor. Note that for forming CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more than In oxide.

[0210] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct crystal grain boundaries. Therefore, it can be said that CAAC-OS is less likely to have a decrease in electron mobility due to crystal grain boundaries. Also, since the crystallinity of an oxide semiconductor may decrease due to the incorporation of impurities or the generation of defects, etc., CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the oxide semiconductor having CAAC-OS are stable. For this reason, the oxide semiconductor having CAAC-OS is heat-resistant and highly reliable. Also, CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for an OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0211] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Note that since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal. Also, nc-OS has no regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor. For example, when structural analysis is performed on an nc-OS film using an XRD apparatus, no peak indicating crystallinity is detected in the out-of-plane XRD measurement using θ / 2θ scan. Also, when electron beam diffraction (also referred to as limited field electron beam diffraction) using an electron beam with a probe diameter larger than the nanocrystal (for example, 50 nm or more) is performed on an nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when electron beam diffraction (also referred to as nanobeam electron beam diffraction) using an electron beam with a probe diameter close to or smaller than the nanocrystal (for example, 1 nm or more and 30 nm or less) is performed on an nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be obtained.

[0212] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a loose or low-density region. That is, the a-like OS has lower crystallinity compared to the nc-OS and the CAAC-OS. Also, the a-like OS has a higher hydrogen concentration in the film compared to the nc-OS and the CAAC-OS.

[0213] [[Constitution of Oxide Semiconductor]] Next, the details of the above-described CAC-OS will be described. Note that the CAC-OS relates to the material constitution.

[0214] [CAC-OS] The CAC-OS is, for example, a constitution of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed, and the region having the metal element is in a state of being mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof, and is also referred to as a mosaic state or a patch state.

[0215] Furthermore, the CAC-OS is in a mosaic state by separating the material into a first region and a second region, and the first region is a configuration (hereinafter also referred to as a cloud state) distributed in the film. That is, the CAC-OS is a composite metal oxide having a configuration in which the first region and the second region are mixed.

[0216] Here, the atomic number ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in CAC-OS of In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. Also, the second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. Also, the second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0217] Specifically, the above-mentioned first region is a region mainly composed of indium oxide, indium zinc oxide, etc. Also, the above-mentioned second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the above-mentioned first region can be rephrased as a region mainly composed of In. Also, the above-mentioned second region can be rephrased as a region mainly composed of Ga.

[0218] Note that there may be cases where no clear boundary can be observed between the above-mentioned first region and the above-mentioned second region.

[0219] For example, in CAC-OS of In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the region mainly composed of In (the first region) and the region mainly composed of Ga (the second region) are unevenly distributed and have a mixed structure.

[0220] When using CAC-OS in a transistor, the conductivity caused by the first region and the insulating property caused by the second region act complementarily, enabling the function of switching (the function of turning on / off) to be imparted to the CAC-OS. That is, CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be enhanced to the maximum extent. Therefore, by using CAC-OS in a transistor, a high on-current (I on ) and a high field-effect mobility (μ), as well as a good switching operation, can be realized.

[0221] Oxide semiconductors have various structures and each has different characteristics. The oxide semiconductor according to one aspect of the present invention may have two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0222] <Transistor having an oxide semiconductor> Subsequently, the case of using the above oxide semiconductor in a transistor will be described.

[0223] By using the above oxide semiconductor in a transistor, a transistor with a high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0224] It is preferable to use an oxide semiconductor with a low carrier concentration in the channel formation region of the transistor. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, even more preferably 1×10 11 cm -3 or less, still more preferably 1×10 10 cm -3is less than 1×10 -9 cm -3 or more. When reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced and the density of defect levels may be reduced. In this specification and the like, the fact that the impurity concentration is low and the density of defect levels is low is referred to as highly pure intrinsic or substantially highly pure intrinsic. In some cases, an oxide semiconductor with a low carrier concentration may be referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor.

[0225] In addition, since an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels, the density of trap levels may also be low.

[0226] In addition, the charge trapped in the trap levels of the oxide semiconductor takes a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics.

[0227] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In addition, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0228] <Impurity> Here, the influence of each impurity in the oxide semiconductor will be described.

[0229] In the oxide semiconductor, when silicon or carbon, which is one of the Group 14 elements, is contained, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the channel formation region of the oxide semiconductor and, for example, the interface between the insulator and the channel formation region of the oxide semiconductor, and the concentration of silicon or carbon in the vicinity of the interface (the concentration obtained by secondary ion mass spectrometry (SIMS)) are 2×1018 atoms / cm 3 Hereinafter, it is preferably 2×10 17 atoms / cm 3 or less.

[0230] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0231] In addition, in the oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Or, in the oxide semiconductor, when nitrogen is contained, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is 5×10 19 atoms / cm 3 less than, preferably 5×10 19 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, still more preferably 5×10 17 atoms / cm 3 or less.

[0232] In addition, hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, thereby forming oxygen vacancies. When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons, which are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the channel formation region of the oxide semiconductor is reduced as much as possible. Specifically, in the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 20 atoms / cm 3 less than, preferably less than 5×10 19 atoms / cm 3 less than, more preferably less than 1×10 19 atoms / cm 3 less than, even more preferably less than 5×10 18 atoms / cm 3 less than, even more preferably less than 1×10 18 atoms / cm 3 less than.

[0233] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of the transistor, stable electrical characteristics can be imparted.

[0234] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-described metal oxides. As the oxide 230, a semiconductor material having a bandgap (a semiconductor material that is not a zero-gap semiconductor) may be used. For example, it is preferable to use semiconductor materials such as elemental semiconductors like silicon, compound semiconductors like gallium arsenide, and layer-like substances that function as semiconductors (also referred to as atomic layer substances, two-dimensional materials, etc.). In particular, it is suitable to use a layer-like substance that functions as a semiconductor as the semiconductor material.

[0235] Here, in this specification and the like, the layer material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via a bond weaker than covalent bonds or ionic bonds, such as van der Waals forces. The layer material has high electrical conductivity within the unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-current can be provided.

[0236] Examples of the layer material include graphene, silicene, and chalcogenides. A chalcogenide is a compound containing a chalcogen. Further, chalcogen is a general term for elements belonging to Group 16, and includes oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides.

[0237] As the oxide 230, for example, it is preferable to use a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides applicable as the oxide 230 include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), and the like.

[0238] <Method for manufacturing a semiconductor device> Next, a method for manufacturing a semiconductor device, which is an aspect of the present invention shown in FIGS. 4A to 4D, will be described with reference to FIGS. 7A to 23D.

[0239] In FIGS. 7A to 23D, A in each figure shows a top view. Also, B in each figure is a cross-sectional view corresponding to the portion indicated by the one-dot chain line A1 - A2 shown in A of each figure, and is also a cross-sectional view in the channel length direction of the transistor 200. Further, C in each figure is a cross-sectional view corresponding to the portion indicated by the one-dot chain line A3 - A4 in A of each figure, and is also a cross-sectional view in the channel width direction of the transistor 200. Also, D in each figure is a cross-sectional view of the portion indicated by the one-dot chain line A5 - A6 in A of each figure, and is also a cross-sectional view of the opening region 400. Note that in the top view of A in each figure, some elements are omitted for clarity of the figure.

[0240] Hereinafter, an insulating material for forming an insulator, a conductive material for forming a conductor, or an oxide material for forming an oxide can be formed into a film by appropriately using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc.

[0241] Note that the sputtering method includes an RF sputtering method using a high-frequency power source as a sputtering power source, a DC sputtering method using a DC power source, and a pulsed DC sputtering method in which the voltage applied to the electrode is changed pulsedly. The RF sputtering method is mainly used when forming an insulating film, and the DC sputtering method is mainly used when forming a metal conductive film. Also, the pulsed DC sputtering method is mainly used when forming a compound such as an oxide, a nitride, or a carbide by a reactive sputtering method.

[0242] Note that the CVD method can be classified into a plasma CVD (PECVD: Plasma Enhanced CVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, a photo CVD (Photo CVD) method using light, etc. Further, it can be divided into a metal CVD (MCVD: Metal CVD) method and a metal organic CVD (MOCVD: Metal Organic CVD) method depending on the raw material gas used.

[0243] The plasma CVD method can obtain high-quality films at relatively low temperatures. Also, the thermal CVD method, since it does not use plasma, is a film-forming method capable of reducing plasma damage to the object to be processed. For example, wirings, electrodes, elements (such as transistors and capacitor elements) included in semiconductor devices may be charged up by receiving charges from plasma. At this time, the wirings, electrodes, elements, etc. included in the semiconductor device may be damaged by the accumulated charges. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of the semiconductor device can be increased. Also, in the thermal CVD method, since plasma damage does not occur during film formation, a film with few defects can be obtained.

[0244] Also, as the ALD method, a thermal ALD (Thermal ALD) method that performs the reaction of the precursor and the reactant only with thermal energy, a PEALD (Plasma Enhanced ALD) method that uses a plasma-excited reactant, etc. can be used.

[0245] Also, the ALD method utilizes the self-control property which is a property of atoms and can deposit atoms one by one, so it has effects such as enabling extremely thin film formation, enabling film formation on a structure with a high aspect ratio, enabling film formation with few defects such as pinholes, enabling film formation with excellent coverage, and enabling film formation at low temperatures. In the PEALD (Plasma Enhanced ALD) method, film formation at a lower temperature may be possible and preferable by utilizing plasma. Note that some of the precursors used in the ALD method contain impurities such as carbon. Therefore, the film provided by the ALD method may contain more impurities such as carbon compared to the film provided by other film-forming methods. Note that the quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS).

[0246] The CVD method and the ALD method are film formation methods in which a film is formed by a reaction on the surface of a workpiece, unlike film formation methods in which particles emitted from a target or the like are deposited. Therefore, it is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method is suitable for coating the surface of an opening with a high aspect ratio because it has excellent step coverage and excellent thickness uniformity. However, since the ALD method has a relatively slow film formation rate, it may be preferably used in combination with other film formation methods such as the CVD method with a high film formation rate.

[0247] In the CVD method and the ALD method, the composition of the obtained film can be controlled by the flow rate ratio of the source gases. For example, in the CVD method and the ALD method, a film with an arbitrary composition can be formed depending on the flow rate ratio of the source gases. Also, for example, in the CVD method and the ALD method, a film with a continuously changing composition can be formed by changing the flow rate ratio of the source gases while forming the film. When forming a film while changing the flow rate ratio of the source gases, the time required for film formation can be shortened because it does not require the time for transfer and pressure adjustment compared to the case of forming a film using a plurality of film formation chambers. Therefore, the productivity of semiconductor devices can be increased in some cases.

[0248] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (see FIGS. 7A to 7D). The formation of the insulator 212 is preferably performed using a sputtering method. By using a sputtering method that does not require hydrogen in the film formation gas, the hydrogen concentration in the insulator 212 can be reduced. However, the formation of the insulator 212 is not limited to the sputtering method, and the CVD method, MBE method, PLD method, ALD method, etc. may be appropriately used.

[0249] In this embodiment, as the insulator 212, silicon nitride is formed by pulsed DC sputtering using a silicon target in an atmosphere containing nitrogen gas. By using the pulsed DC sputtering method, generation of particles due to arcing on the target surface can be suppressed, so that the film thickness distribution can be made more uniform. Also, by using a pulsed voltage, the rise and fall of discharge can be made steeper than with a high-frequency voltage. Thereby, power can be supplied to the electrodes more efficiently, and the sputtering rate and film quality can be improved.

[0250] By using an insulator such as silicon nitride through which impurities such as water and hydrogen hardly permeate, diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212 can be suppressed. Also, by using an insulator such as silicon nitride through which copper hardly permeates as the insulator 212, even if a conductor in the layer below the insulator 212 (not shown) uses a metal such as copper that easily diffuses, diffusion of the metal upward through the insulator 212 can be suppressed.

[0251] Next, an insulator 214 is formed on the insulator 212 (see FIGS. 7A to 7D). The formation of the insulator 214 is preferably performed using a sputtering method. By using a sputtering method that does not require hydrogen in the film-forming gas, the hydrogen concentration in the insulator 214 can be reduced. However, the formation of the insulator 214 is not limited to the sputtering method, and a CVD method, MBE method, PLD method, ALD method, etc. may be appropriately used.

[0252] In this embodiment, as the insulator 214, aluminum oxide is formed by pulsed DC sputtering using an aluminum target in an atmosphere containing oxygen gas. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved. Here, RF (Radio Frequency) power may be applied to the substrate. The amount of oxygen injected into the layer below the insulator 214 can be controlled by the magnitude of the RF power applied to the substrate. The RF power is 0 W / cm 21.86 W / cm or less. That is, by the RF power when forming the insulator 214, the amount of oxygen suitable for the characteristics of the transistor can be changed and injected. Therefore, the amount of oxygen suitable for improving the reliability of the transistor can be injected. Also, the frequency of the RF is preferably 10 MHz or more. Typically, it is 13.56 MHz. The higher the frequency of the RF, the smaller the damage to the substrate can be made. 2 It is preferable to use, as the insulator 214, a metal oxide having an amorphous structure with a high function of capturing and fixing hydrogen, such as aluminum oxide. Thereby, the hydrogen contained in the insulator 216 or the like can be captured or fixed, and the diffusion of the hydrogen into the oxide 230 can be prevented. In particular, as the insulator 214, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide of an amorphous structure because hydrogen can be more effectively captured or fixed in some cases. Thereby, a transistor 200 and a semiconductor device having good characteristics and high reliability can be manufactured.

[0253]

[0254] Next, an insulator 216 is formed on the insulator 214 (see FIGS. 7A to 7D). The formation of the insulator 216 is preferably performed using a sputtering method. By using a sputtering method that does not require hydrogen in the film-forming gas, the hydrogen concentration in the insulator 216 can be reduced. However, the formation of the insulator 216 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, etc. may be appropriately used.

[0255] In the present embodiment, as the insulator 216, silicon oxide is formed by a pulsed DC sputtering method using a silicon target in an atmosphere containing oxygen gas. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved.

[0256] ​The insulator 212, the insulator 214, and the insulator 216 are preferably formed continuously without being exposed to the atmosphere. For example, a multi-chamber film forming apparatus may be used. Thereby, the insulator 212, the insulator 214, and the insulator 216 can be formed while reducing hydrogen in the film, and furthermore, the mixing of hydrogen into the film during the intervals between the respective film forming steps can be reduced.

[0257] Next, an opening reaching the insulator 214 is formed in the insulator 216 (see FIGS. 7A to 7D). The opening includes, for example, grooves, slits, and the like. In some cases, the region where the opening is formed may be referred to as an opening portion. The opening may be formed using wet etching, but dry etching is more preferable for microfabrication. Further, it is preferable to select the insulator 214 as an etching stopper film when forming a groove by etching the insulator 216. For example, when silicon oxide or silicon oxynitride is used for the insulator 216 for forming the groove, the insulator 214 may be silicon nitride, aluminum oxide, or hafnium oxide.

[0258] As the dry etching apparatus, a capacitively coupled plasma (CCP) etching apparatus having parallel plate electrodes can be used. The capacitively coupled plasma etching apparatus having parallel plate electrodes may be configured to apply a high-frequency voltage to one of the parallel plate electrodes. Alternatively, it may be configured to apply a plurality of different high-frequency voltages to one of the parallel plate electrodes. Alternatively, it may be configured to apply high-frequency voltages of the same frequency to each of the parallel plate electrodes. Alternatively, it may be configured to apply high-frequency voltages of different frequencies to each of the parallel plate electrodes. Alternatively, a dry etching apparatus having a high-density plasma source can be used. As the dry etching apparatus having a high-density plasma source, for example, an inductively coupled plasma (ICP) etching apparatus or the like can be used.

[0259] After the formation of the opening, a conductive film 205A is formed (see FIGS. 7A to 7D). The conductive film 205A desirably contains a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. Alternatively, it can be a laminated film of a conductor having a function of suppressing oxygen permeation and tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, etc. The formation of the conductive film 205A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc.

[0260] In this embodiment, titanium nitride is formed as the conductive film 205A. By using such a metal nitride under the conductor 205b, oxidation of the conductor 205b can be suppressed by the insulator 216 or the like. Also, even if a metal such as copper that easily diffuses is used as the conductor 205b, diffusion of the metal outside the conductor 205a can be prevented.

[0261] Next, a conductive film 205B is formed (see FIGS. 7A to 7D). As the conductive film 205B, tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, etc. can be used. The formation of the conductive film can be performed using a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. In this embodiment, tungsten is formed as the conductive film 205B.

[0262] Next, by performing CMP processing, a part of the conductive film 205A and the conductive film 205B is removed to expose the insulator 216 (see FIGS. 8A to 8D). As a result, the conductors 205a and 205b remain only in the opening. Note that a part of the insulator 216 may be removed by the CMP processing.

[0263] Next, etching is performed to remove the upper part of the conductor 205b (see FIGS. 9A to 9D). As a result, the upper surface of the conductor 205b becomes lower than the upper surfaces of the conductor 205a and the insulator 216. For the etching of the conductor 205b, dry etching or wet etching may be used, but dry etching is preferred for microfabrication.

[0264] Next, a conductive film 205C is formed on the insulator 216, the conductor 205a, and the conductor 205b (see FIGS. 10A to 10D). Similar to the conductive film 205A, it is desirable that the conductive film 205C includes a conductor having a function of suppressing oxygen permeation.

[0265] In this embodiment, titanium nitride is formed as the conductive film 205C. By using such a metal nitride for the upper layer of the conductor 205b, it is possible to suppress the oxidation of the conductor 205b by the insulator 222 or the like. Further, even if a metal such as copper that easily diffuses is used as the conductor 205b, it is possible to prevent the metal from diffusing outside the conductor 205c.

[0266] Next, by performing a CMP process, a part of the conductive film 205C is removed to expose the insulator 216 (see FIGS. 11A to 11D). As a result, only in the opening, the conductor 205a, the conductor 205b, and the conductor 205c remain. Thereby, a conductor 205 having a flat upper surface can be formed. Further, the conductor 205b is configured to be surrounded by the conductor 205a and the conductor 205c. Therefore, it is possible to prevent impurities such as hydrogen from diffusing outside the conductor 205a and the conductor 205c from the conductor 205b, and to prevent oxygen from entering from outside the conductor 205a and the conductor 205c and oxidizing the conductor 205b. Note that a part of the insulator 216 may be removed by the CMP process.

[0267] Next, an insulator 222 is formed on the insulator 216 and the conductor 205 (see FIGS. 12A to 12D). As the insulator 222, an insulator containing one or both of oxides of aluminum and hafnium may be formed. Note that, as the insulator containing one or both of oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. The insulator containing one or both of oxides of aluminum and hafnium has a barrier property against oxygen, hydrogen, and water. Since the insulator 222 has a barrier property against hydrogen and water, hydrogen and water contained in the structure provided around the transistor 200 are suppressed from diffusing inside the transistor 200 through the insulator 222, and generation of oxygen vacancies in the oxide 230 can be suppressed.

[0268] The formation of the insulator 222 can be carried out using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, hafnium oxide is formed as the insulator 222 using the ALD method.

[0269] Subsequently, heat treatment is preferably performed. The heat treatment may be performed at 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when performing heat treatment in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be set to about 20%. Further, the heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen.

[0270] Also, the gas used in the above heat treatment is preferably highly purified. For example, the water content in the gas used in the above heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent, as much as possible, moisture and the like from being incorporated into the insulator 222 or the like.

[0271] In the present embodiment, as the heat treatment, after the formation of the insulator 222, the flow rate ratio of nitrogen gas to oxygen gas is set to 4 slm: 1 slm, and the treatment is performed at a temperature of 400 ° C for 1 hour. By this heat treatment, impurities such as water and hydrogen contained in the insulator 222 can be removed. Further, when an oxide containing hafnium is used as the insulator 222, a part of the insulator 222 may be crystallized by this heat treatment. Further, the heat treatment can also be performed at a timing such as after the formation of the insulator 224.

[0272] Next, the insulator 224 is formed on the insulator 222 (see FIGS. 12A to 12D). The formation of the insulator 224 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, as the insulator 224, silicon oxide is formed using a sputtering method. By using a sputtering method that does not require hydrogen in the film-forming gas, the hydrogen concentration in the insulator 224 can be reduced. Since the insulator 224 comes into contact with the oxide 230a in a later process, it is preferable that the hydrogen concentration is reduced in this way.

[0273] Next, the oxide film 230A and the oxide film 230B are sequentially formed on the insulator 224 (see FIGS. 12A to 12D). Note that it is preferable that the oxide film 230A and the oxide film 230B are formed continuously without being exposed to the atmosphere. By forming the film without opening to the atmosphere, it is possible to prevent impurities or moisture from the atmosphere from adhering to the oxide film 230A and the oxide film 230B, and it is possible to keep the vicinity of the interface between the oxide film 230A and the oxide film 230B clean.

[0274] The formation of the oxide film 230A and the oxide film 230B can be carried out using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0275] For example, when forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the proportion of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. Further, when forming the above oxide film by a sputtering method, the above In-M-Zn oxide target or the like can be used.

[0276] In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulator 224. Therefore, the proportion of oxygen contained in the sputtering gas may be 70% or more, preferably 80% or more, more preferably 100%.

[0277] Further, when forming the oxide film 230B by a sputtering method, when the proportion of oxygen contained in the sputtering gas is more than 30% and 100% or less, preferably 70% or more and 100% or less, an oxygen-excess type oxide semiconductor is formed. A transistor using an oxygen-excess type oxide semiconductor in the channel formation region can obtain relatively high reliability. However, one aspect of the present invention is not limited to this. When forming the oxide film 230B by a sputtering method, when the proportion of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less, an oxygen-deficient type oxide semiconductor is formed. A transistor using an oxygen-deficient type oxide semiconductor in the channel formation region can obtain relatively high field-effect mobility. Further, by performing film formation while heating the substrate, the crystallinity of the oxide film can be improved.

[0278] In this embodiment, as the oxide film 230A, a film is formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:4. Also, as the oxide film 230B, a film is formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 4:2:4.1. Note that each oxide film may be formed according to the characteristics required for the oxide 230a and the oxide 230b by appropriately selecting the film formation conditions and the atomic ratio.

[0279] Next, an oxide film 243A is formed on the oxide film 230B (see FIGS. 12A to 12D). The oxide film 243A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. It is preferable that the atomic ratio of Ga to In in the oxide film 243A is larger than the atomic ratio of Ga to In in the oxide film 230B. In this embodiment, as the oxide film 243A, a film is formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:4.

[0280] Note that it is preferable to form the insulator 222, the insulator 224, the oxide film 230A, the oxide film 230B, and the oxide film 243A by a sputtering method without exposing them to the atmosphere. For example, a multi-chamber type film forming apparatus may be used. Thereby, the insulator 222, the insulator 224, the oxide film 230A, the oxide film 230B, and the oxide film 243A can be formed while reducing hydrogen in the film, and furthermore, the mixing of hydrogen into the film during the intervals between the respective film forming steps can be reduced.

[0281] Next, it is preferable to perform a heat treatment. The heat treatment may be performed in a temperature range in which the oxide films 230A, 230B, and 243A do not crystallize, and may be performed at 250°C or higher and 650°C or lower, preferably 400°C or higher and 600°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when performing the heat treatment in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be set to about 20%. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after performing the heat treatment in an atmosphere of nitrogen gas or an inert gas.

[0282] Also, the gas used in the above heat treatment is preferably highly purified. For example, the water content in the gas used in the above heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent as much as possible the incorporation of moisture and the like into the oxide films 230A, 230B, and 243A.

[0283] In the present embodiment, as the heat treatment, after performing a treatment at a temperature of 400°C for 1 hour in a nitrogen atmosphere, a treatment at a temperature of 400°C for 1 hour in an oxygen atmosphere is continuously performed. By this heat treatment, impurities such as water and hydrogen in the oxide films 230A, 230B, and 243A can be removed. Further, by this heat treatment, the crystallinity of the oxide film 230B can be improved, and a denser and more dense structure can be obtained. Thereby, the diffusion of oxygen or impurities in the oxide film 230B can be reduced.

[0284] Next, a conductive film 242A is formed on the oxide film 243A (see FIGS. 12A to 12D). The formation of the conductive film 242A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, as the conductive film 242A, tantalum nitride may be formed using a sputtering method. Note that a heat treatment may be performed before the formation of the conductive film 242A. The heat treatment is performed under reduced pressure, and the conductive film 242A may be continuously formed without being exposed to the atmosphere. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the oxide film 243A and the like can be removed, and the moisture concentration and hydrogen concentration in the oxide film 230A, the oxide film 230B, and the oxide film 243A can be reduced. The temperature of the heat treatment is preferably 100°C or higher and 400°C or lower. In the present embodiment, the temperature of the heat treatment is 200°C.

[0285] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 12A to 12D). The formation of the insulating film 271A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method, or the like. It is preferable to use an insulating film having a function of suppressing oxygen permeation as the insulating film 271A. For example, as the insulating film 271A, aluminum oxide or silicon nitride may be formed by a sputtering method.

[0286] In the present embodiment, as the insulating film 271A, aluminum oxide is formed by a pulsed DC sputtering method using an aluminum target in an atmosphere containing oxygen gas. The RF power applied to the substrate is 0.62 W / cm 2 or less as follows. Preferably, it is 0 W / cm 2 or more and 0.31 W / cm 2 or less as follows. By reducing the RF power, the amount of oxygen injected into the conductive film 242A can be suppressed, and oxidation of the conductive film 242A can be prevented.

[0287] Note that it is preferable to form the conductive film 242A and the insulating film 271A by sputtering without exposing them to the atmosphere. For example, a multi-chamber film forming apparatus may be used. Thereby, the conductive film 242A and the insulating film 271A can be formed while reducing hydrogen in the film, and further, the mixing of hydrogen into the film during the intervals between the respective film forming steps can be reduced. Further, when providing a hard mask on the insulating film 271A, the film serving as the hard mask may be continuously formed without exposing it to the atmosphere.

[0288] Next, using a lithography method, the oxide film 230A, the oxide film 230B, the oxide film 243A, the conductive film 242A, and the insulating film 271A are processed into an island shape to form an oxide 230a, an oxide 230b, an oxide layer 243B, a conductive layer 242B, and an insulating layer 271B (see FIGS. 13A to 13D). Further, a dry etching method or a wet etching method can be used for the processing. The processing by the dry etching method is suitable for fine processing. Further, the oxide film 230A, the oxide film 230B, the oxide film 243A, the conductive film 242A, and the insulating layer 271B may be processed under different conditions respectively. Further, in this step, the insulator 224 is processed into an island shape while being superimposed on the oxide 230a.

[0289] In the lithography method, first, a resist is exposed through a mask. Next, the exposed area is removed or left intact using a developer to form a resist mask. Next, by performing an etching process through the resist mask, conductors, semiconductors, insulators, etc. can be processed into a desired shape. For example, a resist mask may be formed by exposing a resist using a KrF excimer laser beam, an ArF excimer laser beam, EUV (Extreme Ultraviolet) light, or the like. Also, a liquid immersion technique may be used in which a liquid (e.g., water) is filled between the substrate and the projection lens for exposure. Further, instead of the light described above, an electron beam or an ion beam may be used. Note that when an electron beam or an ion beam is used, a mask is not required. The resist mask can be removed by performing a dry etching process such as ashing, a wet etching process, a wet etching process after a dry etching process, or a dry etching process after a wet etching process.

[0290] Furthermore, a hard mask made of an insulator or a conductor may be used under the resist mask. When using a hard mask, an insulating film or a conductive film serving as a hard mask material is formed on the conductive film 242A, a resist mask is formed thereon, and a hard mask having a desired shape can be formed by etching the hard mask material. The etching of the conductive film 242A or the like may be performed after removing the resist mask, or may be performed while leaving the resist mask. In the latter case, the resist mask may disappear during etching. The hard mask may be removed by etching after etching the conductive film 242A or the like. On the other hand, when the material of the hard mask has no influence on the subsequent process or can be used in the subsequent process, it is not always necessary to remove the hard mask. In the present embodiment, the insulating layer 271B is used as a hard mask. When the insulating layer 271B is used as a hard mask, it is preferable to appropriately adjust the film thickness of the insulating layer 271B to suppress the disappearance of the insulating layer 271B during the etching of the conductive film 242A or the like.

[0291] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, as shown in FIGS. 13B and 13C, the conductive layer 242B does not have a curved surface between its side surface and upper surface. As a result, the ends where the side surfaces and upper surfaces of the conductors 242a and 242b shown in FIG. 4B meet are angular. When the ends where the side surface and upper surface of the conductor 242 meet are angular, the cross-sectional area of the conductor 242 becomes larger than when the ends have a curved surface. Thereby, since the resistance of the conductor 242 is reduced, the on-current of the transistor 200 can be increased.

[0292] Also, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B are formed so as to at least partially overlap with the conductor 205. Also, it is preferable that the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B are substantially perpendicular to the upper surface of the insulator 222. Since the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B are substantially perpendicular to the upper surface of the insulator 222, when providing a plurality of transistors 200, it is possible to reduce the area and increase the density. Or, the configuration may be such that the angle formed by the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B and the upper surface of the insulator 222 is a low angle. In that case, the angle formed by the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B and the upper surface of the insulator 222 is preferably 60 degrees or more and less than 70 degrees. By adopting such a shape, in subsequent processes, the covering property of the insulator 272 and the like can be improved, and defects such as looseness can be reduced.

[0293] In addition, the by-products generated in the etching process may be formed in layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B. In this case, the layered by-products will be formed between the insulator 224, the oxide 230a, the oxide 230b, the oxide 243, the conductor 242, and the insulator 271 and the insulator 272. If the process is advanced to fabricate the transistor 200 with the layered by-products formed, the reliability of the transistor 200 may deteriorate. Therefore, it is preferable to remove the layered by-products.

[0294] Next, an insulator 272 is formed on the insulator 222, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B (see FIGS. 14A to 14D). The formation of the insulator 272 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, as the insulator 272, aluminum oxide is formed by a pulsed DC sputtering method using an aluminum target in an atmosphere containing oxygen gas. The RF power applied to the substrate is 0.62 W / cm 2 The following is adopted. Preferably, it is 0 W / cm2 or more and 0.31 W / cm 2 The following is adopted. By reducing the RF power, the amount of oxygen injected into the insulator 224 can be suppressed. In addition, the insulator 272 is in close contact with a part of the upper surface of the insulator 222.

[0295] Note that the insulator 272 may have a laminated structure. For example, aluminum oxide may be formed by a sputtering method, and silicon nitride may be formed on the aluminum oxide by a sputtering method. By forming the insulator 272 into such a multilayer structure, the function of suppressing the diffusion of impurities such as water and hydrogen and oxygen may be improved.

[0296] In this way, the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 242B can be covered with the insulator 272 and the insulating layer 271B having a function of suppressing oxygen diffusion. Thereby, in subsequent processes, oxygen diffusion into the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 242B can be reduced.

[0297] Next, an insulating film that becomes the insulator 280 is formed on the insulator 272. The formation of the insulating film can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, as the insulating film, a silicon oxide film may be formed using a sputtering method. By forming the insulating film that becomes the insulator 280 by a sputtering method in an atmosphere containing oxygen, an insulator 280 containing excess oxygen can be formed. Further, by using a sputtering method that does not require hydrogen in the deposition gas, the hydrogen concentration in the insulator 280 can be reduced. Note that a heat treatment may be performed before the formation of the insulating film. The heat treatment is performed under reduced pressure, and the insulating film may be continuously formed without being exposed to the atmosphere. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the insulator 272 and the like can be removed, and further, the moisture concentration and the hydrogen concentration in the oxide 230a, the oxide 230b, the oxide layer 243B, and the insulator 224 can be reduced. The above-described heat treatment conditions can be used for the heat treatment.

[0298] Next, a CMP process is performed on the insulating film that becomes the insulator 280 to form an insulator 280 having a flat upper surface (see FIGS. 14A to 14D). Note that, for example, a silicon nitride film may be formed on the insulator 280 by a sputtering method, and the CMP process may be performed until the silicon nitride reaches the insulator 280.

[0299] Next, a part of the insulator 280, a part of the insulator 272, a part of the insulating layer 271B, a part of the conductive layer 242B, and a part of the oxide layer 243B are processed to form an opening reaching the oxide 230b. The opening is preferably formed so as to overlap with the conductor 205. By forming the opening, the insulator 271a, the insulator 271b, the conductor 242a, the conductor 242b, the oxide 243a, and the oxide 243b are formed (see FIGS. 15A to 15D).

[0300] When forming the above opening, the upper part of the oxide 230b may be removed. By removing a part of the oxide 230b, a groove is formed in the oxide 230b. Depending on the depth of the groove, the groove may be formed in the opening forming step or in a step different from the opening forming step.

[0301] In addition, for the processing of a part of the insulator 280, a part of the insulator 272, a part of the insulating layer 271B, a part of the conductive layer 242B, and a part of the oxide layer 243B, a dry etching method or a wet etching method can be used. Processing by the dry etching method is suitable for microfabrication. Also, the processing may be performed under different conditions respectively. For example, a part of the insulator 280 may be processed by the dry etching method, a part of the insulator 272 and a part of the insulating layer 271B may be processed by the wet etching method, and a part of the conductive layer 242B and a part of the oxide layer 243B may be processed by the dry etching method. Also, the processing of a part of the conductive layer 242B and a part of the oxide layer 243B may be performed under different conditions.

[0302] Here, there may be adhesion of impurities to the side surfaces of the oxide 230a, the upper and side surfaces of the oxide 230b, the side surfaces of the conductor 242, the side surfaces of the insulator 280, etc., and diffusion of these impurities into the interiors thereof. A step of removing such impurities may be performed. Further, a damaged region may be formed on the surface of the oxide 230b by the dry etching. Such a damaged region may be removed. Examples of the impurities include components contained in the insulator 280, the insulator 272, a part of the insulating layer 271B, and the conductive layer 242B, components contained in members used in the apparatus for forming the opening, and components contained in the gas or liquid used for etching. Examples of the impurities include hafnium, aluminum, silicon, tantalum, fluorine, chlorine, etc.

[0303] In particular, impurities such as aluminum or silicon inhibit the CAAC-OS conversion of the oxide 230b. Therefore, it is preferable that impurity elements that inhibit CAAC-OS conversion, such as aluminum or silicon, are reduced or removed. For example, the concentration of aluminum atoms in the oxide 230b and in the vicinity thereof may be 5.0 atomic% or less, preferably 2.0 atomic% or less, more preferably 1.5 atomic% or less, still more preferably 1.0 atomic% or less, and even more preferably less than 0.3 atomic%.

[0304] In some cases, a region of a metal oxide in which CAAC-OS conversion is inhibited by impurities such as aluminum or silicon and which becomes a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor) may be referred to as a non-CAAC region. In the non-CAAC region, since the density of the crystal structure is decreased, a large amount of V O H is formed, and the transistor is likely to be normally-on. Therefore, it is preferable that the non-CAAC region of the oxide 230b is reduced or removed.

[0305] In contrast, it is preferable that the oxide 230b has a layered CAAC structure. In particular, it is preferable that the oxide 230b has a CAAC structure up to the lower end of the drain. Here, in the transistor 200, the conductor 242a or the conductor 242b, and the vicinity thereof function as the drain. That is, it is preferable that the oxide 230b near the lower end of the conductor 242a (conductor 242b) has a CAAC structure. In this way, even at the drain end that significantly affects the drain breakdown voltage, the damaged region of the oxide 230b is removed, and by having a CAAC structure, fluctuations in the electrical characteristics of the transistor 200 can be further suppressed. In addition, the reliability of the transistor 200 can be improved.

[0306] In order to remove the above impurities and the like, a cleaning process is performed. As the cleaning method, there are wet cleaning using a cleaning liquid or the like, plasma treatment using plasma, cleaning by heat treatment, etc., and the above cleaning may be appropriately combined. Note that the groove portion may become deeper by the cleaning process.

[0307] As the wet cleaning, cleaning treatment may be performed using an aqueous solution obtained by diluting ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. with carbonated water or pure water, pure water, carbonated water, etc. Alternatively, ultrasonic cleaning using these aqueous solutions, pure water, or carbonated water may be performed. Alternatively, these cleanings may be appropriately combined.

[0308] Note that in this specification and the like, an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water may be referred to as diluted hydrofluoric acid, and an aqueous solution obtained by diluting commercially available ammonia water with pure water may be referred to as diluted ammonia water. In addition, the concentration, temperature, etc. of the aqueous solution may be appropriately adjusted according to the impurities to be removed, the configuration of the semiconductor device to be cleaned, etc. The ammonia concentration of the diluted ammonia water may be 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less. Also, the hydrofluoric acid concentration of the diluted hydrofluoric acid may be 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.

[0309] In addition, for ultrasonic cleaning, it is preferable to use a frequency of 200 kHz or higher, preferably 900 kHz or higher. By using such a frequency, damage to the oxide 230b or the like can be reduced.

[0310] Also, the above cleaning process may be performed multiple times, and the cleaning liquid may be changed for each cleaning process. For example, as the first cleaning process, a process using diluted hydrofluoric acid or diluted aqueous ammonia may be performed, and as the second cleaning process, a process using pure water or carbonated water may be performed.

[0311] In this embodiment, as the above cleaning process, wet cleaning is performed using diluted hydrofluoric acid, and then wet cleaning is performed using pure water or carbonated water. By performing such a cleaning process, impurities adhering to the surface or diffused inside the oxide 230a, oxide 230b, etc. can be removed. Furthermore, the crystallinity of the oxide 230b can be enhanced.

[0312] After the above etching or after the above cleaning, a heat treatment may be performed. The heat treatment may be performed at 100°C or higher and 450°C or lower, preferably 350°C or higher and 400°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 230a and the oxide 230b to reduce the oxygen vacancy V O . Also, by performing such a heat treatment, the crystallinity of the oxide 230b can be improved. The heat treatment may also be performed under reduced pressure. Or, after heat treatment in an oxygen atmosphere, heat treatment may be continuously performed in a nitrogen atmosphere without exposure to the atmosphere.

[0313] Next, an insulating film 250A which will become the insulator 250a is formed (see FIGS. 16A to 16D). Heat treatment may be performed before forming the insulating film 250A. The heat treatment is performed under reduced pressure, and the insulating film 250A may be continuously formed without being exposed to the atmosphere. Further, the heat treatment is preferably performed in an atmosphere containing oxygen. By performing such treatment, moisture and hydrogen adsorbed on the surface of the oxide 230b and the like can be removed, and further, the moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b can be reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower.

[0314] The insulating film 250A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. Further, the insulating film 250A is preferably formed by a film forming method using a gas in which hydrogen atoms are reduced or removed. Thereby, the hydrogen concentration of the insulating film 250A can be reduced. Since the insulating film 250A becomes the insulator 250 that contacts the oxide 230b in a later process, it is preferable that the hydrogen concentration is reduced in this way.

[0315] Further, the insulating film 250A is preferably formed using the ALD method. The film thickness of the insulator 250 that functions as a gate insulating film of the miniaturized transistor 200 is extremely thin (for example, about 5 nm or more and 30 nm or less), and it is necessary to make the variation small. On the other hand, the ALD method is a film forming method in which a precursor and a reactant (oxidizing agent) are alternately introduced, and the film thickness can be adjusted by the number of times this cycle is repeated, so precise film thickness adjustment is possible. Therefore, the accuracy of the gate insulating film required for the miniaturized transistor 200 can be achieved. Further, as shown in FIGS. 16B and 16C, the insulating film 250A needs to be formed with good coverage on the bottom surface and side surfaces of the opening formed by the insulator 280 or the like. Since atomic layers can be deposited one by one on the bottom surface and side surfaces of the opening, the insulating film 250A can be formed with good coverage with respect to the opening.

[0316] Also, for example, when forming the insulating film 250A using the PECVD method, the film-forming gas containing hydrogen is decomposed in the plasma, generating a large amount of hydrogen radicals. Due to the reduction reaction of the hydrogen radicals, oxygen in the oxide 230b is extracted, and when V O H is formed, the hydrogen concentration in the oxide 230b increases. However, when forming the insulating film 250A using the ALD method, the generation of hydrogen radicals can be suppressed both when introducing the precursor and when introducing the reactant. Therefore, by forming the insulating film 250A using the ALD method, it is possible to prevent the hydrogen concentration in the oxide 230b from increasing.

[0317] If the above-described removal of impurities is not performed before forming the insulating film 250A, the impurities may remain between the insulator 250a and the oxide 230a, the oxide 230b, the conductor 242, the insulator 280, etc.

[0318] Next, microwave treatment may be performed in an oxygen-containing atmosphere (see FIGS. 16A to 16D). Here, the dotted lines shown in FIGS. 16B to 16D indicate microwaves, high-frequency waves such as RF, oxygen plasma, or oxygen radicals. For the microwave treatment, it is preferable to use a microwave treatment apparatus having a power source for generating high-density plasma using microwaves. The microwave treatment apparatus may also have a power source for applying RF to the substrate side. By using high-density plasma, high-density oxygen radicals can be generated. Also, by applying RF to the substrate side, the oxygen ions generated by the high-density plasma can be efficiently introduced into the oxide 230b. Further, the above microwave treatment is preferably performed under reduced pressure, and the pressure may be 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more, and even more preferably 400 Pa or more and 700 Pa or less. Also, the oxygen flow ratio (O2 / O2+Ar) is preferably 50% or less, preferably 10% or more and 30% or less. Also, the treatment temperature may be 750° C. or less, preferably 500° C. or less, for example, about 400° C. Also, after performing the oxygen plasma treatment, heat treatment may be continuously performed without exposing to the outside air.

[0319] As shown in FIGS. 16B to 16D, by performing microwave treatment in an oxygen-containing atmosphere, oxygen gas can be plasmaized using microwaves or high-frequency waves such as RF, and the oxygen plasma can be made to act on the region between the conductors 242a and 242b of the oxide 230b. At this time, microwaves or high-frequency waves such as RF can also be irradiated onto the region 230bc. That is, microwaves, high-frequency waves such as RF, oxygen plasma, etc. can be made to act on the region 230bc shown in FIG. 5. Due to the action of plasma, microwaves, etc., the V O H is broken and hydrogen H can be removed from the region 230bc. That is, in the region 230bc, the reaction of "V O H→H+V O " occurs, and the hydrogen concentration in the region 230bc can be reduced. Therefore, the oxygen deficiency and V O H in the region 230bc can be reduced, and the carrier concentration can be decreased. Also, by supplying oxygen radicals generated by the above oxygen plasma or oxygen contained in the insulator 250 to the oxygen deficiency formed in the region 230bc, the oxygen deficiency in the region 230bc can be further reduced, and the carrier concentration can be decreased.

[0320] On the other hand, conductors 242a and 242b are provided on the regions 230ba and 230bb shown in FIG. 5. As shown in FIGS. 16B to 16D, the conductors 242a and 242b shield the action of microwaves, high-frequency waves such as RF, oxygen plasma, etc., so these actions do not reach the regions 230ba and 230bb. Thereby, by microwave treatment, reduction of V O H and supply of an excessive amount of oxygen do not occur in the regions 230ba and 230bb, so a decrease in the carrier concentration can be prevented.

[0321] In this way, oxygen deficiency and V OH can be removed to make region 230bc of type I or substantially type I. Further, the supply of excessive oxygen to regions 230ba and 230bb that function as a source region or a drain region can be suppressed, and the n-type conversion can be maintained. Thereby, the variation in the electrical characteristics of transistor 200 can be suppressed, and the variation in the electrical characteristics of transistor 200 within the substrate surface can be suppressed.

[0322] Therefore, a semiconductor device with little variation in transistor characteristics can be provided. Also, a semiconductor device with good reliability can be provided. Also, a semiconductor device with good electrical characteristics can be provided.

[0323] Next, an insulating film 250B that becomes insulator 250b is formed (see FIGS. 17A to 17D). The insulating film 250B can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 250B is preferably formed using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, the oxygen contained in insulator 250a can be suppressed from diffusing into conductor 260. That is, a decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Also, the oxidation of conductor 260 by the oxygen contained in insulator 250a can be suppressed. For example, insulating film 250A can be provided using the materials that can be used for insulator 250 described above, and insulating film 250B can be provided using the same materials as insulator 222.

[0324] Specifically, as insulating film 250B, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc., or a metal oxide that can be used as oxide 230 can be used. In particular, it is preferable to use an insulator containing one or both of the oxides of aluminum and hafnium.

[0325] In this embodiment, silicon oxynitride is formed as the insulating film 250A by CVD method, and hafnium oxide is formed as the insulating film 250B by thermal ALD method.

[0326] Microwave treatment may be performed after the formation of the insulating film 250B. The microwave treatment conditions used for the microwave treatment performed after the formation of the insulating film 250A described above may be used. Also, the microwave treatment may be performed after the formation of the insulating film 250B without performing the microwave treatment after the formation of the insulating film 250A.

[0327] Also, heat treatment may be performed while maintaining a reduced pressure state after each of the microwave treatments after the formation of the insulating film 250A and after the formation of the insulating film 250B. By performing such treatment, hydrogen in the insulating film 250A, the insulating film 250B, the oxide 230b, and the oxide 230a can be efficiently removed. Also, a part of the hydrogen may be gettered by the conductor 242 (conductor 242a and conductor 242b). Alternatively, the step of performing heat treatment while maintaining a reduced pressure state after the microwave treatment may be repeated a plurality of times. By repeatedly performing the heat treatment, hydrogen in the insulating film 250A, the oxide 230b, and the oxide 230a can be removed more efficiently. Note that the heat treatment temperature is preferably 300°C or higher and 500°C or lower.

[0328] Also, by performing microwave treatment to modify the film quality of the insulating film 250A and the insulating film 250B, diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, in a subsequent process such as the formation of a conductive film that becomes the conductor 260, or a post-treatment such as heat treatment, diffusion of hydrogen, water, impurities, etc. through the insulator 250 into the oxide 230b, the oxide 230a, etc. can be suppressed.

[0329] Next, a conductive film that becomes the conductor 260a and a conductive film that becomes the conductor 260b are formed in sequence. The formation of the conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, the conductive film that becomes the conductor 260a is formed using the ALD method, and the conductive film that becomes the conductor 260b is formed using the CVD method.

[0330] Next, by polishing the insulating film 250A, the insulating film 250B, the conductive film that becomes the conductor 260a, and the conductive film that becomes the conductor 260b by CMP processing until the insulator 280 is exposed, the insulator 250a, the insulator 250b, and the conductor 260 (the conductor 260a and the conductor 260b) are formed (see FIGS. 18A to 18D). Thereby, the insulator 250 is disposed so as to cover the opening reaching the oxide 230b and the inner walls (side walls and bottom surfaces) of the groove portions of the oxide 230b. Further, the conductor 260 is disposed so as to fill the opening and the groove portion via the insulator 250.

[0331] Next, heat treatment may be performed under the same conditions as the above heat treatment. In the present embodiment, the treatment is performed at a temperature of 400° C. for 1 hour in a nitrogen atmosphere. By this heat treatment, the moisture concentration and the hydrogen concentration in the insulator 250 and the insulator 280 can be reduced. Note that after the above heat treatment, the insulator 282 may be formed continuously without being exposed to the atmosphere.

[0332] Here, an oxygen addition treatment may be performed on the insulator 280. Specifically, as a treatment for adding oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like can be used. Further, oxygen may be injected by performing plasma treatment on the corresponding insulator. As a plasma generation device, a dry etching device, a plasma CVD device, a sputtering device, or the like can be used.

[0333] Note that the amount of oxygen added to the insulator 280 and the depth of oxygen implantation may be controlled within a range that does not affect the functions of the conductors constituting the transistor 200, such as the conductor 260 and the conductor 242.

[0334] Next, an insulator 282a is formed on the insulator 250, on the conductor 260, and on the insulator 280 (FIGS. 19A to 19D). Note that it is preferable to use a material that suppresses the diffusion of oxygen for the insulator 282a. In addition, the film thickness of the insulator 282a is set to such an extent that it suppresses the damage caused by the subsequent oxygen addition treatment and does not inhibit the oxygen implantation into the insulator 280.

[0335] The film formation of the insulator 282a can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In particular, it is preferable to perform the film formation of the insulator 282a using a sputtering method. By using a sputtering method that does not require hydrogen in the film formation gas, the hydrogen concentration in the insulator 282a can be reduced.

[0336] In the present embodiment, aluminum oxide is formed by a pulsed DC sputtering method using an aluminum target in an atmosphere containing oxygen gas as the insulator 282a. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved. In addition, the RF power applied to the substrate is 1.86 W / cm 2 shall be as follows. Preferably, it is 0 W / cm 2 or more and 0.31 W / cm 2 or less. By reducing the RF power, the amount of oxygen implanted into the insulator 280 can be suppressed. In the present embodiment, the insulator 282a is formed with the RF power applied to the substrate being 0 W / cm 2 as described above.

[0337] Subsequently, an oxygen addition treatment is performed on the insulator 280 through the insulator 282a (indicated by the arrows in FIGS. 19A to 19D). Specifically, as the treatment for adding oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like can be used. Also, oxygen may be injected by performing a plasma treatment on the corresponding insulator. As the plasma generation device, a dry etching device, a plasma CVD device, a sputtering device, or the like can be used.

[0338] Damage caused by performing the oxygen addition treatment on the insulator 280 through the insulator 282a can be suppressed. Also, since the insulator 282a suppresses the diffusion of oxygen, the oxygen injected into the insulator 280 can be efficiently injected into the insulator 280 without being released to the outside during the process.

[0339] Also, when an oxide is used for the insulator 282a, oxygen may also be added to the insulator 282a. By a treatment involving heating in a subsequent process, excess oxygen in the insulator 282a moves to the insulator 280, and the oxygen that has moved to the insulator 280 can compensate for the oxygen deficiency of the oxide semiconductor.

[0340] Next, an insulator 282b is formed on the insulator 282a (see FIGS. 20A to 20D). Note that, similar to the insulator 282a, it is preferable to use a material that suppresses the diffusion of oxygen for the insulator 282b. Also, the film thickness of the insulator 282b is preferably made thicker than the film thickness of the insulator 282a. By providing the insulator 282b on the insulator 282a damaged by the oxygen addition treatment, it is possible to suppress the excess oxygen added to the insulator 280 from being released to the outside.

[0341] The film formation of the insulator 282b can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The film formation of the insulator 282b is preferably performed using a sputtering method. By using a sputtering method that does not require hydrogen to be used as the film formation gas, the hydrogen concentration in the insulator 282b can be reduced.

[0342] In this embodiment, similar to the insulator 282a, as the insulator 282b, aluminum oxide is formed by pulsed DC sputtering using an aluminum target in an atmosphere containing oxygen gas. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved. The RF power applied to the substrate is 1.86 W / cm 2 shall be as follows. Preferably, it is 0 W / cm 2 or more and 0.31 W / cm 2 or less. By reducing the RF power, the amount of oxygen injected into the insulator 280 can be suppressed. In this embodiment, the insulator 282b is formed with the RF power applied to the substrate being 0.31 W / cm 2

[0343] Next, according to the arrangement density of the transistors in each circuit region, a part of the insulator 282a and a part of the insulator 282b are processed to form the opening region 400 (see FIG. 21D). In the opening region 400, the insulator 280 may have a recess. The processing of a part of the insulator 282a, a part of the insulator 282b, and a part of the insulator 280 may use wet etching, but dry etching is more preferable for fine processing. Also, the depth of the recess of the insulator 280 shall be 1 / 4 or more and 1 / 2 or less of the maximum film thickness of the insulator 280 in the semiconductor device.

[0344] Next, the insulator 282a, the insulator 282b, the insulator 280, the insulator 272, the insulator 222, the insulator 216, and the insulator 214 are processed until reaching the upper surface of the insulator 212 (see FIGS. 22A to 22C). This processing may use wet etching, but dry etching is more preferable for fine processing.

[0345] Next, a heat treatment is performed. The heat treatment may be performed at 250°C or higher and 650°C or lower, preferably 400°C or higher and 600°C or lower. By this heat treatment, the excess oxygen in the insulator 280 moves to the oxide 230 and is supplied to the oxygen deficiency in the oxide 230. That is, the oxygen deficiency in the oxide 230 is reduced, and the oxide 230 becomes highly pure and intrinsic.​

[0346] Also, it is preferable that the heat treatment is performed at a temperature lower than the heat treatment temperature performed after forming the oxide film 243A. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas. By performing the heat treatment, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside from the side surface of the formed insulator 280 by processing the insulator 282a, the insulator 282b, the insulator 280, the insulator 272, the insulator 222, the insulator 216, and the insulator 214. In addition, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside through the opening region 400. Note that hydrogen bonded to oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.

[0347] Note that the heat treatment may be performed after forming the opening region 400, and may be further performed after processing the insulator 280, the insulator 272, the insulator 222, the insulator 216, and the insulator 214.

[0348] Next, an insulator 283 is formed on the insulator 282b (see FIGS. 23A to 23D). The insulator 283 preferably contacts the insulator 280 in the opening region 400. The film formation of the insulator 283 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The film formation of the insulator 283 is preferably performed using a sputtering method. By using a sputtering method that does not require hydrogen to be used as a film formation gas, the hydrogen concentration in the insulator 283 can be reduced. Also, the insulator 283 may be multilayered. For example, silicon nitride may be formed by a sputtering method, and silicon nitride may be formed on the silicon nitride by an ALD method. By surrounding the transistor 200 with the insulator 283 and the insulator 212 having high barrier properties, it is possible to prevent moisture and hydrogen from entering from the outside.

[0349] Next, an insulator 274 is formed on the insulator 283 (see FIGS. 23A to 23D). The film formation of the insulator 274 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, silicon oxide is formed as the insulator 274 by a CVD method.

[0350] Next, by polishing the insulator 274 by CMP processing until the insulator 283 is exposed, the upper surface of the insulator 274 is planarized (see FIGS. 23A to 23D). By the CMP processing, a part of the upper surface of the insulator 283 may be removed. Further, by the CMP processing, the inside of the opening region 400 is filled with a part of the insulator 274 on the insulator 283.

[0351] Next, an insulator 286 is formed on the insulator 274 and on the insulator 283 (see FIGS. 23A to 23D). The film formation of the insulator 286 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, silicon oxide is formed as the insulator 286 by a sputtering method.

[0352] Next, openings reaching the conductor 242 are formed in the insulator 271, the insulator 272, the insulator 280, the insulator 282, the insulator 283, and the insulator 286 (see FIGS. 23A to 23C). The formation of the openings may be performed using a lithography method. In FIG. 23A, the shape of the opening is circular in a top view, but it is not limited thereto. For example, the opening may have a substantially circular shape such as an ellipse, a polygonal shape such as a quadrangle, or a shape in which the corners of a polygon such as a quadrangle are rounded in a top view.

[0353] Next, a dielectric film that will become the insulator 241 is formed, and the dielectric film is anisotropically etched to form the insulator 241. (Refer to FIG. 23B.). The formation of the dielectric film that will become the insulator 241 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. As the dielectric film that will become the insulator 241, it is preferable to use a dielectric film having a function of suppressing oxygen permeation. For example, it is preferable to form aluminum oxide using the ALD method. Alternatively, it is preferable to form silicon nitride using the PEALD method. Silicon nitride is preferable because it has a high blocking property against hydrogen.

[0354] Also, as the anisotropic etching of the dielectric film that will become the insulator 241, for example, a dry etching method or the like may be used. By providing the insulator 241 on the sidewall portion of the opening, permeation of oxygen from the outside can be suppressed, and oxidation of the conductor 240a and the conductor 240b to be formed next can be prevented. Further, it is possible to prevent impurities such as water and hydrogen from diffusing to the outside from the conductor 240a and the conductor 240b.

[0355] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that will become the conductor 240a and the conductor 240b preferably has a laminated structure including a conductor having a function of suppressing permeation of impurities such as water and hydrogen. For example, it can be a laminate of tantalum nitride, titanium nitride, etc., and tungsten, molybdenum, copper, etc. The formation of the conductive film that will become the conductor 240 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0356] Next, by performing CMP processing, a part of the conductive film that will become the conductor 240a and the conductor 240b is removed, and the upper surface of the insulator 274 is exposed. As a result, the conductor 240a and the conductor 240b having a flat upper surface can be formed by the remaining conductive film only in the opening (refer to FIG. 23B.). Note that a part of the upper surface of the insulator 286 may be removed by the CMP processing.

[0357] Next, a conductive film that will become the conductor 246 is formed. The formation of the conductive film that will become the conductor 246 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0358] Next, the conductive film that will become the conductor 246 is processed by a lithography method to form a conductor 246a that contacts the upper surface of the conductor 240a and a conductor 246b that contacts the upper surface of the conductor 240b. Although not shown, at this time, a part of the insulator 286 in a region where the conductor 246a and the conductor 246b do not overlap with the insulator 286 may be removed.

[0359] As described above, a semiconductor device having the transistor 200 shown in FIGS. 4A to 4D can be manufactured. As shown in FIGS. 7A to 23D, the transistor 200 can be manufactured by using the method for manufacturing a semiconductor device according to the present embodiment.

[0360] <Microwave processing apparatus> Hereinafter, a microwave processing apparatus that can be used in the method for manufacturing the semiconductor device will be described.

[0361] First, the configuration of a manufacturing apparatus with less impurity contamination during the manufacture of a semiconductor device or the like will be described with reference to FIGS. 24, 25, and 26.

[0362] FIG. 24 schematically shows a top view of a single-sheet multi-chamber manufacturing apparatus 2700. The manufacturing apparatus 2700 includes an atmospheric-side substrate supply chamber 2701 having a cassette port 2761 for accommodating a substrate and an alignment port 2762 for aligning the substrate, an atmospheric-side substrate transfer chamber 2702 for transferring the substrate from the atmospheric-side substrate supply chamber 2701, a load lock chamber 2703a for loading the substrate and switching the pressure inside the chamber from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure, an unload lock chamber 2703b for unloading the substrate and switching the pressure inside the chamber from reduced pressure to atmospheric pressure or from atmospheric pressure to reduced pressure, a transfer chamber 2704 for transferring the substrate in a vacuum, a chamber 2706a, a chamber 2706b, a chamber 2706c, and a chamber 2706d.

[0363] Further, the atmospheric-side substrate transfer chamber 2702 is connected to the load lock chamber 2703a and the unload lock chamber 2703b. The load lock chamber 2703a and the unload lock chamber 2703b are connected to the transfer chamber 2704. The transfer chamber 2704 is connected to the chamber 2706a, the chamber 2706b, the chamber 2706c, and the chamber 2706d.

[0364] Note that gate valves GV are provided at the connection parts of each chamber, and each chamber can be independently maintained in a vacuum state except for the atmospheric-side substrate supply chamber 2701 and the atmospheric-side substrate transfer chamber 2702. Further, a transfer robot 2763a is provided in the atmospheric-side substrate transfer chamber 2702, and a transfer robot 2763b is provided in the transfer chamber 2704. The substrate can be transferred within the manufacturing apparatus 2700 by the transfer robot 2763a and the transfer robot 2763b.

[0365] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less, preferably 3×10 -5 Pa or less, more preferably 1×10 -5 Pa or less. Also, the partial pressure of gas molecules (atoms) having a mass-charge ratio (m / z) of 18 in the transfer chamber 2704 and each chamber is, for example, 3×10 -5Below Pa, preferably 1×10 -5 Below Pa, more preferably 3×10 -6 Below Pa. Also, the partial pressure of gas molecules (atoms) with m / z of 28 in the transfer chamber 2704 and each chamber is, for example, 3×10 -5 Below Pa, preferably 1×10 -5 Below Pa, more preferably 3×10 -6 Below Pa. Also, the partial pressure of gas molecules (atoms) with m / z of 44 in the transfer chamber 2704 and each chamber is, for example, 3×10 -5 Below Pa, preferably 1×10 -5 Below Pa, more preferably 3×10 -6 Below Pa.

[0366] Note that the total pressure and partial pressure in the transfer chamber 2704 and each chamber can be measured using a mass spectrometer. For example, a quadrupole mass spectrometer (also referred to as Q-mass) Qulee CGM-051 manufactured by ULVAC, Inc. may be used.

[0367] Also, it is desirable that the transfer chamber 2704 and each chamber have a configuration with little external or internal leakage. For example, the leak rate of the transfer chamber 2704 and each chamber is 3×10 -6 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m 3 / s or less. Also, for example, the leak rate of gas molecules (atoms) with m / z of 18 is 1×10 -7 Pa·m 3 / s or less, preferably 3×10 -8 Pa·m 3 / s or less. Also, for example, the leak rate of gas molecules (atoms) with m / z of 28 is 1×10 -5 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m 3 / s or less. Also, for example, the leak rate of gas molecules (atoms) with m / z of 44 is 3×10 -6 Pa·m 3 / s or less, preferably 1×10 -6Pa·m 3 shall be below / s.

[0368] Note that the leak rate may be derived from the total pressure and partial pressures measured using the mass spectrometer described above. The leak rate depends on external leaks and internal leaks. An external leak is the inflow of gas from outside the vacuum system due to minute holes, poor seals, etc. An internal leak is caused by leaks from partitions such as valves within the vacuum system and outgassing from internal members. To make the leak rate below the above numerical value, it is necessary to take measures against both external and internal leaks.

[0369] For example, the opening and closing parts of the transfer chamber 2704 and each chamber may be sealed with a metal gasket. It is preferable to use a metal gasket made of a metal coated with iron fluoride, aluminum oxide, or chromium oxide. A metal gasket has higher adhesion compared to an O-ring and can reduce external leaks. Also, by using the passivation of a metal coated with iron fluoride, aluminum oxide, chromium oxide, etc., outgassing containing impurities released from the metal gasket can be suppressed, and internal leaks can be reduced.

[0370] Also, as members constituting the manufacturing apparatus 2700, use aluminum, chromium, titanium, zirconium, nickel, or vanadium that emits little outgassing containing impurities. Also, the above-mentioned metal that emits little outgassing containing impurities may be used after being coated with an alloy containing iron, chromium, nickel, etc. Alloys containing iron, chromium, nickel, etc. are rigid, heat-resistant, and suitable for processing. Here, if the surface unevenness of the member is reduced by polishing or the like to reduce the surface area, outgassing can be reduced.

[0371] Alternatively, the members of the manufacturing apparatus 2700 described above may be coated with iron fluoride, aluminum oxide, chromium oxide, etc.

[0372] The members of the manufacturing apparatus 2700 are preferably composed of only metal as much as possible. For example, even when installing a viewing window composed of quartz or the like, the surface may be thinly coated with iron fluoride, aluminum oxide, chromium oxide, etc. to suppress the released gas.

[0373] The adsorbates present in the transfer chamber 2704 and each chamber are adsorbed to the inner wall or the like and thus do not affect the pressure in the transfer chamber 2704 and each chamber, but they cause gas release when the transfer chamber 2704 and each chamber are evacuated. Therefore, although there is no correlation between the leak rate and the exhaust speed, it is important to use a pump with a high exhaust capacity to desorb the adsorbates present in the transfer chamber 2704 and each chamber as much as possible and evacuate them in advance. In addition, in order to promote the desorption of the adsorbates, the transfer chamber 2704 and each chamber may be baked. By baking, the desorption rate of the adsorbates can be increased by about 10 times. Baking may be performed at 100°C or higher and 450°C or lower. At this time, if the adsorbates are removed while introducing an inert gas into the transfer chamber 2704 and each chamber, the desorption rate of water or the like that is difficult to desorb by simply evacuating can be further increased. In addition, by heating the introduced inert gas to about the same temperature as the baking temperature, the desorption rate of the adsorbates can be further increased. Here, it is preferable to use a noble gas as the inert gas.

[0374] Alternatively, it is preferable to increase the pressure in the transfer chamber 2704 and each chamber by introducing an inert gas such as heated rare gas or oxygen, etc., and then perform a process of evacuating the transfer chamber 2704 and each chamber again after a certain period of time. By introducing the heated gas, the adsorbed substances in the transfer chamber 2704 and each chamber can be desorbed, and the impurities present in the transfer chamber 2704 and each chamber can be reduced. Note that this process is effectively repeated in the range of 2 to 30 times, preferably 5 to 15 times. Specifically, by introducing an inert gas or oxygen, etc., whose temperature is 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower, the pressure in the transfer chamber 2704 and each chamber is set to 0.1 Pa or higher and 10 kPa or lower, preferably 1 Pa or higher and 1 kPa or lower, more preferably 5 Pa or higher and 100 Pa or lower, and the period for maintaining the pressure is 1 minute or longer and 300 minutes or shorter, preferably 5 minutes or longer and 120 minutes or shorter. Then, the transfer chamber 2704 and each chamber are evacuated for a period of 5 minutes or longer and 300 minutes or shorter, preferably 10 minutes or longer and 120 minutes or shorter.

[0375] Next, the chamber 2706b and the chamber 2706c will be described with reference to the cross-sectional schematic view shown in FIG. 25.

[0376] The chamber 2706b and the chamber 2706c are chambers, for example, capable of performing microwave treatment on the object to be processed. Note that the chamber 2706b and the chamber 2706c only differ in the atmosphere during the microwave treatment. Since the other configurations are common, they will be described together below.

[0377] Chambers 2706b and 2706c have a slot antenna plate 2808, a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Also, outside Chambers 2706b and 2706c, etc., there are provided a gas supply source 2801, a valve 2802, a high-frequency generator 2803, a waveguide 2804, a mode converter 2805, a gas pipe 2806, a waveguide 2807, a matching box 2815, a high-frequency power supply 2816, a vacuum pump 2817, and a valve 2818.

[0378] The high-frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to the slot antenna plate 2808 via the waveguide 2807. The slot antenna plate 2808 is arranged in contact with the dielectric plate 2809. Also, the gas supply source 2801 is connected to the mode converter 2805 via the valve 2802. Then, gas is sent to Chambers 2706b and 2706c by the mode converter 2805, the waveguide 2807, and the gas pipe 2806 passing through the dielectric plate 2809. Also, the vacuum pump 2817 has a function of exhausting gas, etc. from Chambers 2706b and 2706c via the valve 2818 and the exhaust port 2819. Also, the high-frequency power supply 2816 is connected to the substrate holder 2812 via the matching box 2815.

[0379] The substrate holder 2812 has a function of holding the substrate 2811. For example, it has a function of electrostatically or mechanically chucking the substrate 2811. It also has a function as an electrode to which power is supplied from the high-frequency power supply 2816. It also has a heating mechanism 2813 inside and has a function of heating the substrate 2811.

[0380] As the vacuum pump 2817, for example, a dry pump, a mechanical booster pump, an ion pump, a titanium sublimation pump, a cryopump, a turbo molecular pump, or the like can be used. Further, in addition to the vacuum pump 2817, a cryotrap may be used. Using a cryopump and a cryotrap is particularly preferable because water can be efficiently exhausted.

[0381] Further, as the heating mechanism 2813, for example, a heating mechanism that heats using a resistance heating element or the like may be used. Alternatively, it may be a heating mechanism that heats by heat conduction or heat radiation from a medium such as heated gas. For example, RTA (Rapid Thermal Annealing) such as GRTA (Gas Rapid Thermal Annealing) or LRTA (Lamp Rapid Thermal Annealing) can be used. GRTA performs a heat treatment using high-temperature gas. As the gas, an inert gas is used.

[0382] Further, the gas supply source 2801 may be connected to the purification machine via a mass flow controller. As the gas, a gas having a dew point of -80°C or lower, preferably -100°C or lower is preferably used. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) may be used.

[0383] As the dielectric plate 2809, for example, silicon oxide (quartz), aluminum oxide (alumina), yttrium oxide (yttria), or the like may be used. Further, another protective layer may be formed on the surface of the dielectric plate 2809. As the protective layer, magnesium oxide, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silicon oxide, aluminum oxide, yttrium oxide, or the like may be used. Since the dielectric plate 2809 is to be exposed to a particularly high-density region of the high-density plasma 2810 described later, damage can be mitigated by providing a protective layer. As a result, an increase in particles during processing can be suppressed.

[0384] The high-frequency generator 2803 has a function of generating microwaves, for example, in the range of 0.3 GHz or more and 3.0 GHz or less, 0.7 GHz or more and 1.1 GHz or less, or 2.2 GHz or more and 2.8 GHz or less. The microwaves generated by the high-frequency generator 2803 are transmitted to the mode converter 2805 via the waveguide 2804. In the mode converter 2805, the microwaves transmitted as the TE mode are converted to the TEM mode. Then, the microwaves are transmitted to the slot antenna plate 2808 via the waveguide 2807. The slot antenna plate 2808 is provided with a plurality of slot holes, and the microwaves pass through the slot holes and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, and high-density plasma 2810 can be generated. In the high-density plasma 2810, there are ions and radicals corresponding to the gas species supplied from the gas supply source 2801. For example, oxygen radicals exist.

[0385] At this time, the substrate 2811 can be modified, such as the film on the substrate 2811, by the ions and radicals generated by the high-density plasma 2810. In some cases, it is preferable to apply a bias to the substrate 2811 side using the high-frequency power supply 2816. For the high-frequency power supply 2816, for example, an RF (Radio Frequency) power supply with a frequency such as 13.56 MHz or 27.12 MHz can be used. By applying a bias to the substrate side, the ions in the high-density plasma 2810 can efficiently reach the depth of the openings of the film on the substrate 2811.

[0386] For example, in the chamber 2706b or the chamber 2706c, oxygen can be introduced from the gas supply source 2801 to perform oxygen radical treatment using the high-density plasma 2810.

[0387] Next, the chambers 2706a and 2706d will be described with reference to the cross-sectional schematic diagram shown in FIG. 26.

[0388] Chambers 2706a and 2706d are chambers capable of irradiating an object to be processed with electromagnetic waves, for example. Note that chambers 2706a and 2706d differ only in the type of electromagnetic waves. Since there are many common parts in other configurations, they will be described together below.

[0389] Chambers 2706a and 2706d have one or more lamps 2820, a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. Further, a gas supply source 2821, a valve 2822, a vacuum pump 2828, and a valve 2829 are provided outside chambers 2706a and 2706d.

[0390] The gas supply source 2821 is connected to the gas inlet 2823 via the valve 2822. The vacuum pump 2828 is connected to the exhaust port 2830 via the valve 2829. The lamp 2820 is disposed facing the substrate holder 2825. The substrate holder 2825 has a function of holding the substrate 2824. Further, the substrate holder 2825 has a heating mechanism 2826 inside and has a function of heating the substrate 2824.

[0391] As the lamp 2820, for example, a light source having a function of emitting electromagnetic waves such as visible light or ultraviolet light may be used. For example, a light source having a function of emitting electromagnetic waves having a peak at a wavelength of 10 nm or more and 2500 nm or less, 500 nm or more and 2000 nm or less, or 40 nm or more and 340 nm or less may be used.

[0392] For example, as the lamp 2820, a light source such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp may be used.

[0393] For example, part or all of the electromagnetic waves radiated from the lamp 2820 can be absorbed by the substrate 2824, thereby modifying a film or the like on the substrate 2824. For example, generation or reduction of defects, or removal of impurities can be achieved. Note that when the substrate 2824 is heated during this process, generation or reduction of defects, or removal of impurities can be efficiently achieved.

[0394] Alternatively, for example, the electromagnetic waves radiated from the lamp 2820 may cause the substrate holder 2825 to generate heat and heat the substrate 2824. In that case, the heating mechanism 2826 may not be provided inside the substrate holder 2825.

[0395] The vacuum pump 2828 refers to the description of the vacuum pump 2817. Also, the heating mechanism 2826 refers to the description of the heating mechanism 2813. Further, the gas supply source 2821 refers to the description of the gas supply source 2801.

[0396] By using the above manufacturing apparatus, it is possible to modify a film while suppressing the mixing of impurities into the object to be processed.

[0397] <Modification Example of Semiconductor Device> Hereinafter, with reference to FIGS. 27A to 27D, an example of a semiconductor device according to one aspect of the present invention will be described.

[0398] A in each figure shows a top view of the semiconductor device. Also, B in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A1 - A2 shown in A of each figure. Further, C in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A3 - A4 in A of each figure. Also, D in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A5 - A6 in A of each figure. In the top view of A in each figure, some elements are omitted for clarity of the figure.

[0399] In the semiconductor devices shown as A to D in each figure, structures having the same functions as those of the semiconductor devices shown in <Configuration Example of Semiconductor Device> are assigned the same reference numerals. Note that also in this section, as the constituent materials of the semiconductor device, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0400] <Modification Example 1 of Semiconductor Device> The semiconductor devices shown in FIGS. 27A to 27D are modification examples of the semiconductor devices shown in FIGS. 4A to 4D. The semiconductor devices shown in FIGS. 27A to 27D are different from the semiconductor devices shown in FIGS. 4A to 4D in that they have oxides 230c and 230d.

[0401] In the semiconductor devices shown in FIGS. 27A to 27D, further, an oxide 230c on an oxide 230b and an oxide 230d on the oxide 230c are provided. The oxides 230c and 230d are provided in openings formed in the insulator 280 and the insulator 272. Further, the oxide 230c is in contact with the side surfaces of the oxide 243a, the side surfaces of the oxide 243b, the side surfaces of the conductors 242a and 242b, the side surfaces of the insulators 271a and 271b, and the side surface of the insulator 272, respectively. Also, the upper surfaces of the oxide 230c and the oxide 230d are in contact with the insulator 282.

[0402] By disposing the oxide 230d on the oxide 230c, diffusion of impurities from a structure formed above the oxide 230d to the oxide 230b or the oxide 230c can be suppressed. Also, by disposing the oxide 230d on the oxide 230c, upward diffusion of oxygen from the oxide 230b or the oxide 230c can be suppressed.

[0403] Further, in a cross-sectional view in the channel length direction of the transistor, it is preferable to provide a groove in the oxide 230b and embed the oxide 230c in the groove. At this time, the oxide 230c is arranged so as to cover the inner wall (side wall and bottom surface) of the groove. Also, the film thickness of the oxide 230c is preferably about the same as the depth of the groove. By adopting such a configuration, even if a damaged region is formed on the surface of the oxide 230b corresponding to the bottom of the opening when forming an opening for embedding the conductor 260 or the like, the damaged region can be removed. Thereby, deterioration of the electrical characteristics of the transistor 200 due to the damaged region can be suppressed.

[0404] Here, the atomic ratio of In to the element M in the metal oxide used for the oxide 230c is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a or the oxide 230d.

[0405] When the oxide 230c is used as the main path of carriers, in the oxide 230c, the atomic ratio of indium to the metal element that is the main component is preferably larger than the atomic ratio of indium to the metal element that is the main component in the oxide 230b. Also, in the oxide 230c, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the oxide 230b. By using a metal oxide with a high indium content in the channel formation region, the on-current of the transistor can be increased. Therefore, by making the atomic ratio of indium to the metal element that is the main component in the oxide 230c larger than the atomic ratio of indium to the metal element that is the main component in the oxide 230b, the oxide 230c can be used as the main path of carriers. Also, the lower end of the conduction band of the oxide 230c is preferably farther from the vacuum level than the lower ends of the conduction bands of the oxides 230a and 230b. In other words, the electron affinity of the oxide 230c is preferably larger than the electron affinities of the oxides 230a and 230b. At this time, the main path of carriers is the oxide 230c.

[0406] As the oxide 230c, specifically, a metal oxide having a composition of In:M:Zn = 4:2:3 [atomic ratio] or in the vicinity thereof, a composition of In:M:Zn = 5:1:3 [atomic ratio] or in the vicinity thereof, or a composition of In:M:Zn = 10:1:3 [atomic ratio] or in the vicinity thereof, indium oxide, etc. may be used.

[0407] Further, it is preferable to use CAAC-OS as the oxide 230c, and it is preferable that the c-axis of the crystal included in the oxide 230c is oriented in a direction substantially perpendicular to the formation surface or the upper surface of the oxide 230c. CAAC-OS has a property of easily moving oxygen in a direction perpendicular to the c-axis. Therefore, the oxygen included in the oxide 230c can be efficiently supplied to the oxide 230b.

[0408] Further, the oxide 230d preferably contains at least one of the metal elements constituting the metal oxide used for the oxide 230c, and more preferably contains all of the metal elements. For example, when using an In-M-Zn oxide, an In-Zn oxide, or indium oxide as the oxide 230c, and using an In-M-Zn oxide, an M-Zn oxide, or an oxide of the element M as the oxide 230d, the density of defect energy levels at the interface between the oxide 230c and the oxide 230d can be lowered.

[0409] Further, it is preferable that the lower end of the conduction band of the oxide 230d is closer to the vacuum level than the lower end of the conduction band of the oxide 230c. In other words, it is preferable that the electron affinity of the oxide 230d is smaller than the electron affinity of the oxide 230c. In this case, it is preferable to use a metal oxide that can be used for the oxide 230a or the oxide 230b as the oxide 230d. At this time, the main path of carriers becomes the oxide 230c.

[0410] Specifically, as the oxide 230c, a metal oxide having a composition of In:M:Zn = 4:2:3 [atomic ratio] or in the vicinity thereof, In:M:Zn = 5:1:3 [atomic ratio] or in the vicinity thereof, or In:M:Zn = 10:1:3 [atomic ratio] or in the vicinity thereof, or indium oxide may be used. Further, as the oxide 230d, a metal oxide having a composition of In:M:Zn = 1:3:4 [atomic ratio] or in the vicinity thereof, M:Zn = 2:1 [atomic ratio] or in the vicinity thereof, or M:Zn = 2:5 [atomic ratio] or in the vicinity thereof, or an oxide of element M may be used. Note that the vicinity of the composition includes a range of ±30% of the desired atomic ratio. Further, it is preferable to use gallium as the element M.

[0411] Further, the oxide 230d is preferably a metal oxide that suppresses the diffusion or permeation of oxygen more than the oxide 230c. By providing the oxide 230d between the insulator 250 and the oxide 230c, oxygen can be efficiently supplied to the oxide 230b through the oxide 230c.

[0412] Further, in the metal oxide used for the oxide 230d, by making the atomic ratio of In to the metal element that is the main component smaller than the atomic ratio of In to the metal element that is the main component in the metal oxide used for the oxide 230c, it is possible to suppress the diffusion of In toward the insulator 250 side. For example, in the oxide 230d, the atomic ratio of In to the element M may be made smaller than the atomic ratio of In to the element M in the oxide 230c. Since the insulator 250 functions as a gate insulator, if In is mixed into the insulator 250 or the like, the characteristics of the transistor deteriorate. Therefore, by providing the oxide 230d between the oxide 230c and the insulator 250, it is possible to provide a highly reliable semiconductor device.

[0413] Note that the oxide 230c may be provided for each transistor 200. That is, the oxide 230c of the transistor 200 and the oxide 230c of the transistor 200 adjacent to the transistor 200 do not have to be in contact with each other. Further, the oxide 230c of the transistor 200 and the oxide 230c of the transistor 200 adjacent to the transistor 200 may be separated. In other words, the oxide 230c may be configured not to be disposed between the transistor 200 and the transistor 200 adjacent to the transistor 200.

[0414] In a semiconductor device in which a plurality of transistors 200 are arranged in the channel width direction, by adopting the above configuration, the oxide 230c is provided independently for each transistor 200. Therefore, it is possible to suppress the generation of parasitic transistors between the transistor 200 and the transistor 200 adjacent to the transistor 200, and to suppress the generation of the leakage path. Therefore, it is possible to provide a semiconductor device having good electrical characteristics and capable of miniaturization or high integration.

[0415] <Modification Example 2 of Semiconductor Device> Hereinafter, an example of a semiconductor device according to an aspect of the present invention will be described with reference to FIG. 28.

[0416] FIG. 28A shows a top view of the semiconductor device. Further, FIG. 28B is a cross-sectional view corresponding to the portion indicated by the dashed line A3 - A4 shown in FIG. 28A. Note that a cross-sectional view corresponding to the portion indicated by the dashed line A1 - A2 in FIG. 28A can be referred to the transistor 200 shown in FIG. 4B. In the top view of FIG. 28A, some elements are omitted for clarity of the drawing.

[0417] Note that in the semiconductor device shown in FIG. 28, the same reference numerals are given to the structures having the same functions as the structures constituting the semiconductor device shown in <Configuration Example of Semiconductor Device>. Also in this item, as the constituent material of the semiconductor device, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0418] The semiconductor device shown in FIG. 28 is a modified example of the semiconductor device shown in FIG. 4. In the semiconductor device shown in FIG. 28, the transistor 200 has a configuration having n oxides 230 (oxides 230_1 to 230_n: n is a natural number), which is different from the semiconductor device of FIG. 4. Further, each of the oxides 230_1 to 230_n has a channel formation region.

[0419] In the semiconductor device shown in FIG. 28, a conductor 260 is provided via an insulator 250 on the upper surface and side surfaces of a plurality of channel formation regions. Further, the conductor 246 (conductor 246a and conductor 246b) extends in the A3 - A4 direction and is electrically connected to the oxides 230_1 to 230_n via the conductor 240.

[0420] That is, in the semiconductor device shown in FIG. 28, the transistor 200 has a plurality of channel formation regions for one gate electrode. The transistor 200 shown in FIG. 28 can obtain a large on - current by having a plurality of channel formation regions. Further, since each channel formation region has a structure covered by a gate electrode, that is, an s - channel structure, a large on - current can be obtained in each channel formation region. Alternatively, in the channel width direction of the transistor 200, when the bottom surface of the insulator 222 is used as a reference, the height of the bottom surface of the region where the conductor 260 and the oxide 230b do not overlap of the conductor 260 is lower than the height of the interface between the uppermost surface of the oxide 230b and the oxide 230c, so that a large on - current can be obtained in each channel formation region.

[0421] Note that for other configurations, the configuration of the semiconductor device shown in FIG. 4 can be referred to.

[0422] <Modified Example 3 of Semiconductor Device> Hereinafter, with reference to FIG. 29, an example of a semiconductor device according to an aspect of the present invention will be described.

[0423] FIG. 29A shows a top view of a semiconductor device. FIG. 29B is a cross-sectional view corresponding to the portion indicated by the dashed line A3 - A4 shown in FIG. 29A. Note that the cross-sectional view corresponding to the portion indicated by the dashed line A1 - A2 in FIG. 29A can be referred to the transistor 200 shown in FIG. 4B. In the top view of FIG. 29A, some elements are omitted for clarity of the figure.

[0424] Note that in the semiconductor device shown in FIG. 29, structures having the same functions as the structures constituting the semiconductor device shown in <Configuration Example of Semiconductor Device> are denoted with the same reference numerals. Also, in this section, as the constituent materials of the semiconductor device, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0425] The semiconductor device shown in FIG. 29 is a modified example of the semiconductor device shown in FIG. 28. In the semiconductor device shown in FIG. 29, the transistor 200 has n oxides 230 (oxides 230_1 to 230_n: n is a natural number). Each of the oxides 230_1 to 230_n has a channel formation region.

[0426] In the semiconductor device shown in FIG. 29, conductors 260 are provided via an insulator 250 on the upper surfaces and side surfaces of a plurality of channel formation regions. Also, the conductors 246 (conductor 246a and conductor 246b) extend in the A3 - A4 direction and are electrically connected to the oxides 230_1 to 230_n via the conductor 240.

[0427] In the semiconductor device shown in FIG. 29, in the transistor 200 having a plurality of channel formation regions, a transistor 200D having at least an oxide 230D is arranged adjacent to the oxide 230_1 arranged at the end of the transistor 200. Similarly, a transistor 200D is arranged adjacent to the oxide 230_n arranged at the end of the transistor 200.

[0428] That is, the semiconductor device shown in FIG. 29 has a configuration in which the transistor 200D is provided at one or both ends in the direction in which a plurality of channel formation regions of the transistor 200 are arranged in parallel, which is different from the semiconductor device of FIG. 28.

[0429] Here, the transistor 200D does not necessarily have to be electrically connected to any one or all of the gate wiring, the source wiring, or the drain wiring. That is, the transistor 200D may be provided in a state where it does not function as a transistor. Therefore, the transistor 200D may be described as a dummy transistor (sacrificial transistor).

[0430] Also, the shortest distance between the oxide 230_D and the oxide 230_1 and the shortest distance between the oxide 230_1 and the oxide 230_2 are preferably approximately equal. Similarly, the shortest distance between the oxide 230_D and the oxide 230_n and the shortest distance between the oxide 230_n-1 and the oxide 230_n are preferably approximately equal. When n is 1, the shortest distance between one oxide 230_D and the oxide 230_1 and the shortest distance between the other oxide 230_D and the oxide 230_1 are preferably approximately equal.

[0431] Also, the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_D may be approximately equal to or greater than the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_1. Similarly, the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_D may be approximately equal to or greater than the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_n.

[0432] When forming a plurality of oxides 230 in parallel, the oxides 230 located at the ends are likely to have variations in shape due to processing. Also, in the process of removing a part of the insulator 280 and the stacked structure on the channel formation region of the oxide 230 to provide an opening and exposing a part of the upper surface of the oxide 230, variations may occur in the area of the exposed upper surface of the oxide 230 due to factors such as the end shape of the region to be removed (also referred to as the opening) or the distance from the end of the oxide 230 to the opening.

[0433] Therefore, as shown in FIG. 29, by providing the transistor 200D, even when a shape defect occurs in the oxide 230_D of the transistor 200D or a shape defect occurs in the opening on the oxide 230_D, the shape of the oxide 230 formed in the region sandwiched by the transistors 200D becomes uniform.

[0434] Therefore, by arranging the transistor 200D adjacent to the transistor 200, when providing a plurality of transistors 200, variations in characteristics can be reduced among the plurality of transistors 200.

[0435] Also, when providing a plurality of oxides 230 at equal intervals in a certain region, the circuit design can be easily performed by changing the wiring layout.

[0436] Also, in the semiconductor device shown in FIG. 29, the transistor 200 has a plurality of channel formation regions for one gate electrode. The transistor 200 shown in FIG. 29 can obtain a large on-current by having a plurality of channel formation regions. Also, since each channel formation region has a structure covered by the gate electrode, that is, an s-channel structure, a large on-current can be obtained in each channel formation region. Or, in the channel width direction of the transistor 200, when the bottom surface of the insulator 222 is used as a reference, the height of the bottom surface of the conductor 260 in the region where the conductor 260 and the oxide 230b do not overlap is lower than the height of the interface between the uppermost surface of the oxide 230b and the oxide 230c, so a large on-current can be obtained in each channel formation region.

[0437] In addition, for other configurations, the configuration of the semiconductor device shown in FIG. 4 can be referred to.

[0438] <Modified Example 4 of Semiconductor Device> Hereinafter, with reference to FIG. 30, an example of a semiconductor device according to an aspect of the present invention will be described.

[0439] FIG. 30A shows a top view of the semiconductor device. Further, FIG. 30B is a cross-sectional view corresponding to the portion indicated by the dashed-dotted line A3-A4 shown in FIG. 30A. Note that, for the cross-sectional view corresponding to the portion indicated by the dashed-dotted line A1-A2 in FIG. 30A, the transistor 200 shown in FIG. 4B can be referred to. In the top view of FIG. 30A, some elements are omitted for clarity of the drawing.

[0440] In the semiconductor device shown in FIG. 30, the same reference numerals are assigned to the structures having the same functions as the structures constituting the semiconductor device shown in <Configuration Example of Semiconductor Device>. Note that also in this section, for the constituent materials of the semiconductor device, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0441] The semiconductor device described in this section is a modified example of the semiconductor device shown in FIG. 29. Therefore, the transistor 200 has an oxide 230 having n channel formation regions (where the n channel formation regions are channel formation regions 235_1 to 235_n; n is a natural number), which is different from the semiconductor device shown in FIG. 29. Further, a conductor 260 is provided via an insulator 250 on the upper surface and side surfaces of the plurality of channel formation regions.

[0442] In addition, the conductor 242 (conductor 242a and conductor 242b) extends in the A3-A4 direction and is electrically connected to the conductor 246 (conductor 246a and conductor 246b) via the conductor 240 (conductor 240a and conductor 240b).

[0443] Here, in FIG. 30, for simplicity of explanation, the case of n = 2 is shown. Therefore, the transistor 200 has an oxide 230 having two channel formation regions (channel formation region 235_1 and channel formation region 235_2).

[0444] In the oxide 230, the source region and the drain region are electrically connected to the conductor 242a or the conductor 242b. Therefore, for example, the conductor 242a and the conductor 246a are electrically connected via at least one conductor 240a, so that a voltage can be applied to a plurality of channel formation regions (channel formation region 235_1 to channel formation region 235_n).

[0445] That is, for the transistor 200 having n channel formation regions 235, it is not always necessary to provide n conductors 240. For a transistor having n channel formation regions 235, it is preferable to have one or more, preferably less than n.

[0446] Note that as the transistor is miniaturized, the size of the plug that electrically connects the transistor and the conductor functioning as wiring also needs to be miniaturized. Also, since the contact area between the conductor functioning as the plug and the conductor functioning as the wiring becomes smaller, the wiring resistance tends to increase.

[0447] In the semiconductor device described in this section, for the transistor 200 having n channel formation regions, since the number of plugs provided is less than n, the size of each conductor 240 functioning as a plug can be made larger than the conductor 240 described in the semiconductor device shown in FIG. 29, for example. Therefore, the power consumption can be reduced.

[0448] In addition, in the semiconductor device shown in FIG. 30, in the transistor 200, a transistor 200D having at least an oxide 230D is disposed adjacent to an oxide 230_1 disposed at an end of the transistor 200 in a plurality of channel formation regions. Similarly, a transistor 200D is disposed adjacent to an oxide 230_n disposed at an end of the transistor 200.

[0449] Therefore, in the semiconductor device shown in FIG. 30, a conductor 260 is provided via an insulator 250 on the upper surface and side surfaces of a plurality of channel formation regions. Further, the conductor 246a and the conductor 246b extend in the A3 - A4 direction and are electrically connected to the oxide 230_n.

[0450] In addition, in the semiconductor device shown in FIG. 30, in the transistor 200, a transistor 200D having at least an oxide 230D is disposed adjacent to a channel formation region 235_1 disposed at an end of the transistor 200 in a plurality of channel formation regions. Similarly, a transistor 200D is disposed adjacent to a channel formation region 235_n disposed at an end of the transistor 200.

[0451] That is, the transistor 200D is provided at one end or both ends in the direction in which a plurality of channel formation regions of the transistor 200 are arranged in parallel.

[0452] Here, the transistor 200D may not be electrically connected to any one or all of the gate wiring, source wiring, or drain wiring. That is, the transistor 200D may be provided in a non - functioning state as a transistor. Therefore, the transistor 200D may be described as a dummy transistor (sacrificial transistor).

[0453] Further, it is preferable that the shortest distance between the oxide 230_D and the oxide 230_1 is approximately equal to the shortest distance between the oxide 230_1 and the oxide 230_2. Similarly, it is preferable that the shortest distance between the oxide 230_D and the oxide 230_n is approximately equal to the shortest distance between the oxide 230_n-1 and the oxide 230_n. When n is 1, it is preferable that the shortest distance between one oxide 230_D and the oxide 230_1 is approximately equal to the shortest distance between the other oxide 230_D and the oxide 230_1.

[0454] Further, the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_D may be approximately equal to or greater than the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_1. Similarly, the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_D may be approximately equal to or greater than the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_n.

[0455] Note that the difference between the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_D and the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_1 may be greater than the difference between the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_1 and the shortest distance between the conductor 242a and the conductor 242b in the oxide 230_2.

[0456] When forming a plurality of channel formation regions 235 in parallel, the channel formation regions 235 located at the ends are likely to have variations in shape due to processing. Further, in the step of removing a part of the insulator 280 and the laminated structure on the channel formation region of the oxide 230 to provide an opening and exposing a part of the upper surface of the oxide 230, variations may occur in the area of the exposed upper surface of the oxide 230 due to the influence of the end shape of the removal region (also referred to as the opening) or the distance from the end of the oxide 230 to the opening.

[0457] Therefore, as shown in FIG. 30, by providing the transistor 200D, even when a shape defect occurs in the oxide 230_D included in the transistor 200D or when a shape defect occurs in the opening on the oxide 230_D, the shape of the oxide 230 formed in the region sandwiched by the transistors 200D becomes uniform.

[0458] Therefore, by disposing the transistor 200D adjacent to the transistor 200, when a plurality of transistors 200 are provided, variations in characteristics can be reduced among the plurality of transistors 200.

[0459] Further, in the semiconductor device shown in FIG. 30, the transistor 200 has a plurality of channel formation regions for one gate electrode. The transistor 200 shown in FIG. 30 can obtain a large on-current by having a plurality of channel formation regions. Also, since each channel formation region has a structure covered with a gate electrode, that is, an s-channel structure, a large on-current can be obtained in each channel formation region. Alternatively, in the channel width direction of the transistor 200, the height of the bottom surface of the conductor 260 in the region where the conductor 260 and the oxide 230b do not overlap, with reference to the bottom surface of the insulator 222, is lower than the height of the interface between the uppermost surface of the oxide 230b and the oxide 230c. Therefore, a large on-current can be obtained in each channel formation region.

[0460] Note that for other configurations, the configuration of the semiconductor device shown in FIG. 4 can be referred to.

[0461] <Application Example of Semiconductor Device> Hereinafter, with reference to FIGS. 31A and 31B, a transistor 200 according to one aspect of the present invention, which is different from those shown in the previous <configuration example of semiconductor device> and the previous <modified example of semiconductor device>, and an example of a semiconductor device having an opening region 400 will be described. In the semiconductor devices shown in FIGS. 31A and 31B, the same reference numerals are given to the structures having the same functions as the structures constituting the semiconductor device (see FIGS. 4A to 4D) shown in the <configuration example of semiconductor device>. In this section, as the constituent material of the transistor 200, the materials described in detail in the <configuration example of semiconductor device> and the <modified example of semiconductor device> can be used.

[0462] FIGS. 31A and 31B show a configuration in which a plurality of transistors 200_1 to 200_n are collectively encapsulated by an insulator 283 and an insulator 212. In FIGS. 31A and 31B, the transistors 200_1 to 200_n appear to be arranged in the channel length direction, but this is not restrictive. The transistors 200_1 to 200_n may be arranged in the channel width direction, may be arranged in a matrix, or may be arranged without regularity according to the design.

[0463] As shown in FIG. 31A, an opening region 400 is disposed between adjacent transistors 200. By performing a heat treatment after forming the opening region 400 in the manufacturing process of the semiconductor device, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside through the opening region 400. Note that the hydrogen bonded to the oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced. Further, a portion where the insulator 283 and the insulator 212 are in contact (hereinafter sometimes referred to as a sealing portion 265) is formed outside the plurality of transistors 200_1 to 200_n. The sealing portion 265 is formed so as to surround the plurality of transistors 200_1 to 200_n. By adopting such a structure, the plurality of transistors 200_1 to 200_n can be wrapped with the insulator 283 and the insulator 212. Therefore, a plurality of transistor groups surrounded by the sealing portion 265 are provided on the substrate.

[0464] Further, a dicing line (which may be referred to as a scribe line, a dividing line, or a cutting line) may be provided so as to overlap the sealing portion 265. Since the substrate is divided at the dicing line, the transistor group surrounded by the sealing portion 265 is taken out as one chip.

[0465] In addition, in FIG. 31A, an example in which a plurality of transistors 200_1 to 200_n are surrounded by one sealing portion 265 is shown, but the present invention is not limited to this. As shown in FIG. 31B, a configuration in which a plurality of transistors 200_1 to 200_n are surrounded by a plurality of sealing portions may be adopted. In FIG. 31B, a configuration is adopted in which a plurality of transistors 200_1 to 200_n are surrounded by a sealing portion 265a and further surrounded by an outer sealing portion 265b.

[0466] In this way, by configuring a plurality of sealing portions to surround the plurality of transistors 200_1 to 200_n, the contact area between the insulator 283 and the insulator 212 increases, so that the adhesion between the insulator 283 and the insulator 212 can be further improved. As a result, the plurality of transistors 200_1 to 200_n can be more reliably sealed.

[0467] In this case, a dicing line may be provided overlapping the sealing portion 265a or the sealing portion 265b, or a dicing line may be provided between the sealing portion 265a and the sealing portion 265b.

[0468] According to one aspect of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. Also, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. Also, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. Also, according to one aspect of the present invention, a semiconductor device with a large on-current can be provided. Also, according to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. Also, according to one aspect of the present invention, a low-power consumption semiconductor device can be provided.

[0469] As described above, the configurations, methods, etc. shown in the present embodiment can be used in appropriate combination with other configurations, methods shown in the present embodiment, or configurations, methods shown in other embodiments or examples.

[0470] (Embodiment 2) In the present embodiment, one form of the semiconductor device will be described with reference to FIGS. 32 to 37.

[0471] [Storage device 1] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in FIG. 32. In the semiconductor device according to one aspect of the present invention, the transistor 200 is provided above the transistor 300, and the capacitor element 100 is provided above the transistor 300 and the transistor 200. Note that, as the transistor 200, the transistor 200 described in the previous embodiment can be used.

[0472] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, by using this in a memory device, it is possible to hold the stored content for a long time. That is, since a refresh operation is not required or the frequency of the refresh operation is extremely low, the power consumption of the memory device can be sufficiently reduced.

[0473] In the semiconductor device shown in FIG. 32, the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Further, the wiring 1003 is electrically connected to one of the source and drain of the transistor 200, the wiring 1004 is electrically connected to the first gate of the transistor 200, and the wiring 1006 is electrically connected to the second gate of the transistor 200. Then, the gate of the transistor 300 and the other of the source and drain of the transistor 200 are electrically connected to one of the electrodes of the capacitor element 100, and the wiring 1005 is electrically connected to the other of the electrodes of the capacitor element 100.

[0474] Further, the memory device shown in FIG. 32 can be configured as a memory cell array by being arranged in a matrix.

[0475] <Transistor 300> The transistor 300 is provided on a substrate 311 and has a conductor 316 that functions as a gate, an insulator 315 that functions as a gate insulator, a semiconductor region 313 that is part of the substrate 311, and low-resistance regions 314a and 314b that function as a source region or a drain region. The transistor 300 may be either a p-channel type or an n-channel type.

[0476] Here, in the transistor 300 shown in FIG. 32, the semiconductor region 313 (a part of the substrate 311) where the channel is formed has a convex shape. Also, the side surface and the upper surface of the semiconductor region 313 are provided so as to be covered with the conductor 316 via the insulator 315. Note that the conductor 316 may use a material for adjusting the work function. Since such a transistor 300 utilizes the convex portion of the semiconductor substrate, it is also called a FIN type transistor. Note that an insulator that functions as a mask for forming the convex portion may be in contact with the upper portion of the convex portion. Also, here, the case where a part of the semiconductor substrate is processed to form a convex portion is shown, but an SOI substrate may be processed to form a semiconductor film having a convex shape.

[0477] Note that the transistor 300 shown in FIG. 32 is an example and is not limited to its structure, and an appropriate transistor may be used according to the circuit configuration and the driving method.

[0478] <Capacitor element 100> The capacitor element 100 is provided above the transistor 200. The capacitor element 100 has a conductor 110 that functions as a first electrode, a conductor 120 that functions as a second electrode, and an insulator 130 that functions as a dielectric. Here, it is preferable that the insulator 130 uses an insulator that can be used as the insulator 286 shown in the above embodiment.

[0479] Also, for example, the conductor 112 provided on the conductor 246 and the conductor 110 can be formed simultaneously. Note that the conductor 112 functions as a plug or a wiring that is electrically connected to the capacitor element 100, the transistor 200, or the transistor 300.

[0480] In FIG. 32, the conductor 112 and the conductor 110 are shown as single-layer structures, but the present invention is not limited to such a configuration, and a laminated structure of two or more layers may be used. For example, between a conductor having barrier properties and a conductor having high conductivity, a conductor having barrier properties and a conductor having high adhesion to the conductor having high conductivity may be formed.

[0481] Further, the insulator 130 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form.

[0482] For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength by having an insulator with a large dielectric breakdown strength, thereby suppressing the electrostatic breakdown of the capacitor element 100.

[0483] Note that examples of the high dielectric constant (high-k) material (material having a high relative dielectric constant) insulator include gallium oxide, hafnium oxide, zirconium oxide, an oxide having aluminum and hafnium, an oxynitride having aluminum and hafnium, an oxide having silicon and hafnium, an oxynitride having silicon and hafnium, or a nitride having silicon and hafnium.

[0484] On the other hand, examples of the material having a large dielectric breakdown strength (material having a low relative dielectric constant) include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide having pores, or resin.

[0485] <Wiring layer> A wiring layer provided with an interlayer film, wiring, plugs, etc. may be provided between the respective structures. Also, a plurality of wiring layers can be provided according to the design. Here, conductors having the function of plugs or wiring may be given the same reference numeral by grouping a plurality of structures together. Also, in this specification, etc., the wiring and the plug electrically connected to the wiring may be an integral body. That is, a part of the conductor may function as wiring, and a part of the conductor may function as a plug.

[0486] For example, on the transistor 300, as an interlayer film, insulators 320, 322, 324, and 326 are laminated in order. Also, in the insulators 320, 322, 324, and 326, a capacitor element 100, or conductors 328 and 330 electrically connected to the transistor 200, etc. are embedded. Note that the conductors 328 and 330 function as plugs or wiring.

[0487] Also, the insulator functioning as an interlayer film may function as a planarization film covering the uneven shape below it. For example, the upper surface of the insulator 322 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0488] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. 32, insulators 350, 352, and 354 are laminated in order. Also, a conductor 356 is formed in the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0489] Similarly, conductors such as the conductor 218 and the conductor (conductor 205) constituting the transistor 200 are embedded in the insulator 210, the insulator 212, the insulator 214, and the insulator 216. Note that the conductor 218 functions as a plug or wiring that is electrically connected to the capacitor element 100 or the transistor 300. Further, an insulator 150 is provided on the conductor 120 and the insulator 130.

[0490] Here, similar to the insulator 241 shown in the above embodiment, an insulator 217 is provided in contact with the side surface of the conductor 218 that functions as a plug. The insulator 217 is provided in contact with the inner wall of the opening formed in the insulator 210, the insulator 212, the insulator 214, and the insulator 216. That is, the insulator 217 is provided between the conductor 218 and the insulator 210, the insulator 212, the insulator 214, and the insulator 216. Note that since the conductor 205 can be formed in parallel with the conductor 218, the insulator 217 may be formed in contact with the side surface of the conductor 205.

[0491] As the insulator 217, for example, an insulator such as silicon nitride, aluminum oxide, or silicon oxynitride may be used. Since the insulator 217 is provided in contact with the insulator 210, the insulator 212, the insulator 214, and the insulator 222, it is possible to suppress impurities such as water or hydrogen from the insulator 210 or the insulator 216 from mixing into the oxide 230 through the conductor 218. In particular, silicon nitride is suitable because of its high blocking property against hydrogen. Further, it is possible to prevent oxygen contained in the insulator 210 or the insulator 216 from being absorbed by the conductor 218.

[0492] The insulator 217 can be formed in the same manner as the insulator 241. For example, silicon nitride may be deposited using the PEALD method, and an opening reaching the conductor 356 may be formed using anisotropic etching.

[0493] Examples of insulators that can be used as the interlayer film include insulating oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, metal nitride oxides, and the like.

[0494] For example, by using a material with a low relative permittivity for the insulator that functions as the interlayer film, the parasitic capacitance generated between the wirings can be reduced. Therefore, the material may be selected according to the function of the insulator.

[0495] For example, it is preferable that the insulator 150, the insulator 210, the insulator 352, the insulator 354, etc. have an insulator with a low relative permittivity. For example, the insulator preferably has silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or a resin. Alternatively, the insulator preferably has a laminated structure of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, or silicon oxide with pores, and a resin. Since silicon oxide and silicon oxynitride are thermally stable, a laminated structure that is thermally stable and has a low relative permittivity can be obtained by combining them with a resin. Examples of the resin include polyester, polyolefin, polyamide (such as nylon and aramid), polyimide, polycarbonate, or acrylic.

[0496] In addition, a transistor using an oxide semiconductor can have its electrical characteristics stabilized by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. Therefore, for the insulator 214, the insulator 212, the insulator 350, etc., an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used.

[0497] As an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum may be used in a single layer or in a laminate. Specifically, as an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide, silicon oxynitride or silicon nitride can be used.

[0498] As a conductor that can be used for wiring and plugs, a material containing one or more metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, etc. can be used. Also, a semiconductor having high electric conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, or a silicide such as nickel silicide may be used.

[0499] For example, as the conductor 328, the conductor 330, the conductor 356, the conductor 218, the conductor 112, etc., a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material formed of the above materials can be used in a single layer or in a laminate. It is preferable to use a high melting point material such as tungsten or molybdenum that achieves both heat resistance and conductivity, and it is preferable to use tungsten. Or, it is preferable to form with a low resistance conductive material such as aluminum or copper. By using a low resistance conductive material, the wiring resistance can be lowered.

[0500] <Wiring or plug of a layer provided with an oxide semiconductor> In addition, when an oxide semiconductor is used for the transistor 200, an insulator having an excess oxygen region may be provided in the vicinity of the oxide semiconductor. In that case, it is preferable to provide an insulator having a barrier property between the insulator having the excess oxygen region and a conductor provided on the insulator having the excess oxygen region.

[0501] For example, in FIG. 32, an insulator 241 may be provided between the insulator 224 having excess oxygen, the insulator 280, and the conductor 240. By providing the insulator 241 in contact with the insulator 222, the insulator 282, and the insulator 283, the insulator 224 and the transistor 200 can be sealed with an insulator having a barrier property.

[0502] That is, by providing the insulator 241, it is possible to suppress the absorption of excess oxygen in the insulator 224 and the insulator 280 by the conductor 240. Further, by having the insulator 241, it is possible to suppress the diffusion of hydrogen, which is an impurity, to the transistor 200 through the conductor 240.

[0503] As the insulator 241, an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen may be used. For example, it is preferable to use silicon nitride, silicon oxynitride, aluminum oxide, or hafnium oxide. In particular, silicon nitride is preferable because of its high blocking property against hydrogen. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide can also be used.

[0504] Further, as shown in the above embodiment, the transistor 200 may be configured to be sealed with the insulator 212, the insulator 214, the insulator 282, and the insulator 283. By adopting such a configuration, it is possible to reduce the mixing of hydrogen contained in the insulator 274, the insulator 150, etc. into the insulator 280, etc.

[0505] Here, although the conductor 240 penetrates the insulator 283 and the insulator 282, and the conductor 218 penetrates the insulator 214 and the insulator 212, as described above, the insulator 241 is provided in contact with the conductor 240, and the insulator 217 is provided in contact with the conductor 218. Thereby, hydrogen mixed inside the insulator 212, the insulator 214, the insulator 282, and the insulator 283 can be reduced via the conductor 240 and the conductor 218. In this way, the transistor 200 is sealed with the insulator 212, the insulator 214, the insulator 282, the insulator 283, the insulator 241, and the insulator 217, and impurities such as hydrogen contained in the insulator 274 and the like can be reduced from mixing in from the outside.

[0506] <Dicing line> Hereinafter, a dicing line (sometimes referred to as a scribe line, a dividing line, or a cutting line), which is provided when a large-area substrate is divided into semiconductor elements one by one to take out a plurality of semiconductor devices in chip form, will be described. As a dividing method, for example, first, a groove (dicing line) for dividing the semiconductor elements is formed in the substrate, and then cutting is performed at the dicing line to divide (split) into a plurality of semiconductor devices.

[0507] Here, for example, as shown in FIG. 32, it is preferable to design such that the region where the insulator 283 and the insulator 212 are in contact overlaps with the dicing line. That is, openings are provided in the insulator 282, the insulator 280, the insulator 272, the insulator 224, the insulator 222, the insulator 216, and the insulator 214 in the vicinity of the region that becomes the dicing line provided at the outer edge of the memory cell having a plurality of transistors 200.

[0508] That is, in the openings provided in insulator 282, insulator 280, insulator 272, insulator 224, insulator 222, insulator 216, and insulator 214, insulator 212 and insulator 283 are in contact with each other. For example, at this time, insulator 212 and insulator 283 may be formed using the same material and the same method. By providing insulator 212 and insulator 283 using the same material and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride.

[0509] With this structure, transistor 200 can be surrounded by insulator 212, insulator 214, insulator 282, and insulator 283. Since at least one of insulator 212, insulator 214, insulator 282, and insulator 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water, even if the substrate is divided into a plurality of chips by dividing the substrate for each circuit region in which the semiconductor element shown in this embodiment is formed, impurities such as hydrogen or water can be prevented from mixing in from the side surface direction of the divided substrate and diffusing into transistor 200.

[0510] In addition, with this structure, it is possible to prevent the excess oxygen in insulator 280 and insulator 224 from diffusing to the outside. Therefore, the excess oxygen in insulator 280 and insulator 224 is efficiently supplied to the oxide in which the channel in transistor 200 is formed. By this oxygen, the oxygen deficiency of the oxide in which the channel in transistor 200 is formed can be reduced. Thereby, the oxide in which the channel in transistor 200 is formed can be made into an oxide semiconductor having stable characteristics with a low defect level density. That is, the variation in the electrical characteristics of transistor 200 can be suppressed and the reliability can be improved.

[0511] Note that in the memory device shown in FIG. 32, the shape of the capacitance element 100 is a planar type, but the memory device shown in this embodiment is not limited to this. For example, as shown in FIG. 33, the shape of the capacitance element 100 may be a cylinder type. Note that the structure below the insulator 150 in the memory device shown in FIG. 33 is the same as that of the semiconductor device shown in FIG. 32.

[0512] The capacitive element 100 shown in FIG. 33 includes an insulator 150 on an insulator 130, an insulator 142 on the insulator 150, a conductor 115 disposed in an opening formed in the insulator 150 and the insulator 142, an insulator 145 on the conductor 115 and the insulator 142, a conductor 125 on the insulator 145, and an insulator 152 on the conductor 125 and the insulator 145. Here, at least a part of the conductor 115, the insulator 145, and the conductor 125 is disposed in the opening formed in the insulator 150 and the insulator 142.

[0513] The conductor 115 functions as a lower electrode of the capacitive element 100, the conductor 125 functions as an upper electrode of the capacitive element 100, and the insulator 145 functions as a dielectric of the capacitive element 100. The capacitive element 100 is configured such that, in the openings of the insulator 150 and the insulator 142, not only the bottom surface but also the side surfaces have the upper electrode and the lower electrode facing each other with the dielectric interposed therebetween, and the capacitance per unit area can be increased. Therefore, the deeper the depth of the opening, the greater the capacitance of the capacitive element 100 can be. By increasing the capacitance per unit area of the capacitive element 100 in this way, miniaturization or high integration of the semiconductor device can be promoted.

[0514] The insulator 152 may be an insulator that can be used for the insulator 280. Further, the insulator 142 preferably functions as an etching stopper when forming the opening of the insulator 150, and an insulator that can be used for the insulator 214 may be used.

[0515] The shape of the opening formed in the insulator 150 and the insulator 142 as viewed from above may be a quadrangle, a polygon other than a quadrangle, a shape in which the corners are curved in a polygon, or a circular shape including an ellipse. Here, in a top view, it is preferable that the area where the opening overlaps with the transistor 200 is larger. By adopting such a configuration, the occupied area of the semiconductor device having the capacitive element 100 and the transistor 200 can be reduced.

[0516] The conductor 115 is disposed in contact with the insulator 142 and the opening formed in the insulator 150. Preferably, the upper surface of the conductor 115 substantially coincides with the upper surface of the insulator 142. Also, the lower surface of the conductor 115 is in contact with the conductor 110 through the opening of the insulator 130. The conductor 115 is preferably formed by a film formation method such as the ALD method or the CVD method. For example, a conductor that can be used for the conductor 205 may be used.

[0517] The insulator 145 is disposed so as to cover the conductor 115 and the insulator 142. For example, it is preferable to form the insulator 145 by a film formation method such as the ALD method or the CVD method. The insulator 145 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, zirconium oxide, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form. For example, as the insulator 145, an insulating film laminated in the order of zirconium oxide, aluminum oxide, and zirconium oxide can be used.

[0518] Also, for the insulator 145, it is preferable to use a material having a high dielectric breakdown strength such as silicon oxynitride, or a high dielectric constant (high-k) material. Alternatively, a laminated structure of a material having a high dielectric breakdown strength and a high dielectric constant (high-k) material may be used.

[0519] Note that as insulators for high-k (high relative permittivity) materials (materials with a high relative permittivity), there are gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, nitrides containing silicon and hafnium, etc. By using such high-k materials, even if the insulator 145 is thickened, the capacitance of the capacitor element 100 can be sufficiently ensured. By thickening the insulator 145, the leakage current generated between the conductor 115 and the conductor 125 can be suppressed.

[0520] On the other hand, as materials with high dielectric strength, there are silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, resins, etc. For example, a silicon nitride (SiN x ) formed by ALD method, a silicon oxide (SiO x ) formed by PEALD method, and a silicon nitride (SiN x ) formed by ALD method can be used in this order as a laminated insulating film. Alternatively, an insulating film laminated in the order of zirconium oxide, silicon oxide formed by ALD method, and zirconium oxide can be used. By using such an insulator with high dielectric strength, the dielectric strength is improved, and the dielectric breakdown of the capacitor element 100 can be suppressed.

[0521] The conductor 125 is arranged to fill the openings formed in the insulator 142 and the insulator 150. Also, the conductor 125 is electrically connected to the wiring 1005 via the conductor 140 and the conductor 153. The conductor 125 is preferably formed by using ALD method or CVD method, etc. For example, a conductor that can be used for the conductor 205 can be used.

[0522] Further, the conductor 153 is provided on the insulator 154 and covered with the insulator 156. The conductor 153 may be a conductor that can be used for the conductor 112, and the insulator 156 may be an insulator that can be used for the insulator 152. Here, the conductor 153 is in contact with the upper surface of the conductor 140 and functions as a terminal of the capacitor element 100, the transistor 200, or the transistor 300.

[0523] [Memory device 2] An example of a semiconductor device (memory device) according to an aspect of the present invention is shown in FIGS. 34A and 34B.

[0524] <Configuration example 1 of memory device> FIG. 34A is a cross-sectional view of a semiconductor device having a memory device 290. The memory device 290 shown in FIG. 34A has a capacitor device 292 in addition to the transistor 200 shown in FIGS. 4A to 4D. FIG. 34A corresponds to a cross-sectional view in the channel length direction of the transistor 200.

[0525] The capacitor device 292 includes a conductor 242b, an insulator 271b provided on the conductor 242b, an insulator 272 provided in contact with the upper surface and side surfaces of the insulator 271b and the side surface of the conductor 242b, and a conductor 294 on the insulator 272. That is, the capacitor device 292 constitutes a MIM (Metal-Insulator-Metal) capacitor. Note that one of the pair of electrodes of the capacitor device 292, that is, the conductor 242b, can also serve as the source electrode of the transistor. In addition, the dielectric layer of the capacitor device 292 can also serve as the protective layer provided on the transistor, that is, the insulator 271 and the insulator 272. Therefore, in the manufacturing process of the capacitor device 292, a part of the manufacturing process of the transistor can be shared, so that a highly productive semiconductor device can be obtained. In addition, since one of the pair of electrodes of the capacitor device 292, that is, the conductor 242b, also serves as the source electrode of the transistor, it is possible to reduce the area where the transistor and the capacitor device are arranged.

[0526] Note that, as the conductor 294, for example, a material that can be used for the conductor 242 may be used.

[0527] <Configuration Example 2 of Memory Device> FIG. 34B is a cross-sectional view of a semiconductor device having a memory device 290, which is different from the structure shown in FIG. 34A. The memory device 290 shown in FIG. 34B has a capacitor device 292 in addition to the transistor 200 shown in FIGS. 4A to 4D. Here, a part of the capacitor device 292 shown in FIG. 34B is provided in the openings formed in the insulator 280, the insulator 272, and the insulator 271b, which is different from the capacitor device 292 shown in FIG. 34A. Note that FIG. 34B corresponds to a cross-sectional view in the channel length direction of the transistor 200.

[0528] The capacitor device 292 includes a conductor 242b, an insulator 293 provided on the conductor 242b, and a conductor 294 provided on the insulator 293. Here, the insulator 293 and the conductor 294 are disposed in the openings formed in the insulator 280, the insulator 272, and the insulator 271b. The insulator 293 is provided in contact with the bottom surface and the side walls of the opening. That is, the insulator 293 is in contact with the upper surface of the conductor 242b, the side surfaces of the insulator 271b, the side surfaces of the insulator 272, and the side surface of the insulator 280. Further, the insulator 293 is provided so as to form a concave portion along the shape of the opening. The conductor 294 is disposed in contact with the upper surface and the side surfaces of the insulator 293 so as to fill the concave portion. Note that the heights of the upper surfaces of the insulator 293 and the conductor 294 may substantially coincide with the heights of the upper surfaces of the insulator 280, the insulator 250, and the conductor 260.

[0529] Here, the conductor 242b functions as the lower electrode of the capacitive device 292, the conductor 294 functions as the upper electrode of the capacitive device 292, and the insulator 293 functions as the dielectric of the capacitive device 292. Thus, the capacitive device 292 constitutes a MIM capacitor. Note that one of the pair of electrodes of the capacitive device 292, that is, the conductor 242b, can also serve as the source electrode of the transistor. Therefore, in the manufacturing process of the capacitive device 292, a part of the manufacturing process of the transistor can be shared, enabling a highly productive semiconductor device. Also, since the insulator 293 can be provided separately from the configuration of the transistor 200, the structure and material of the insulator 293 can be appropriately selected according to the performance required for the capacitive device 292. Further, since one of the pair of electrodes of the capacitive device 292, that is, the conductor 242b, also serves as the source electrode of the transistor, it is possible to reduce the area where the transistor and the capacitive device are arranged.

[0530] The insulator 293 preferably uses a high dielectric constant (high-k) material. Examples of insulators made of high dielectric constant (high-k) materials (materials with a high relative dielectric constant) include gallium oxide, hafnium oxide, zirconium oxide, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, or nitrides having silicon and hafnium. Also, as the insulator 293, a film obtained by laminating these high dielectric constant materials may be used. For example, as the insulator 293, an insulating film laminated in the order of zirconium oxide, aluminum oxide, and zirconium oxide can be used.

[0531] Also, for the conductor 294, for example, a material that can be used for the conductor 260 may be used. Also, the conductor 294 may have a laminated structure similar to that of the conductor 260.

[0532] In addition, the insulator 293 and the conductor 294 may be formed before the formation of the insulator 282, that is, before the process shown in FIG. 20. The insulator 293 and the conductor 294 can be formed in the same manner as the formation of the insulator 250 and the conductor 260. That is, openings are formed in the insulator 280, the insulator 272, and the insulator 271b, and a stacked film to be the insulator 293 and the conductor 294 is formed so as to be embedded in the openings, and a part of the stacked film is removed using CMP processing to form the insulator 293 and the conductor 294.

[0533] <Modification Example of Memory Device> Hereinafter, with reference to FIGS. 35A, 35B, 36, and 37, an example of a semiconductor device having a transistor 200, an opening region 400, and a capacitor device 292 according to an aspect of the present invention, which is different from that shown in the previous <Configuration Example 1 of Memory Device>, will be described. In the semiconductor devices shown in FIGS. 35A, 35B, 36, and 37, the same reference numerals are given to the structures having the same functions as the structures constituting the semiconductor devices (see FIG. 34A) shown in the previous embodiments and <Configuration Example 1 of Memory Device>. In this section, as the constituent materials of the transistor 200, the opening region 400, and the capacitor device 292, the materials described in detail in the previous embodiments and <Configuration Example 1 of Memory Device> can be used. Further, in FIGS. 35A, 35B, 36, and 37, etc., the memory device shown in FIG. 34A is used as the memory device, but it is not limited thereto. For example, the memory device shown in FIG. 34B may be used.

[0534] <<Modification Example 1 of Memory Device>> Hereinafter, an example of a semiconductor device 600 having a transistor 200a, a transistor 20...

Claims

【Claim 1】 having a first circuit region and a second circuit region on a substrate, wherein the first circuit region has a plurality of first transistors, has a first insulator on the plurality of first transistors, wherein the second circuit region has a plurality of second transistors, has a second insulator on the plurality of second transistors, wherein the second insulator has an opening, wherein the first transistors and the second transistors have oxide semiconductors, has a third insulator in contact with the first insulator and the second insulator, wherein the first insulator, the second insulator, and the third insulator suppress oxygen diffusion, a semiconductor device in which the arrangement density of the plurality of first transistors in the first circuit region is higher than the arrangement density of the plurality of second transistors in the second circuit region.

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