Power semiconductor device
The semiconductor device addresses the challenge of limited terminal width in power modules by arranging modules without overlap and using an insulating medium, enhancing current capacity and reducing heat generation.
Patent Information
- Application Number
- JP2024004953
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-17
- Publication Date
- 2025-07-30
AI Technical Summary
Existing power semiconductor modules face limitations in increasing terminal width due to the need for insulation between main electrode terminals, which restricts current capacity and leads to heat generation.
The semiconductor device arranges semiconductor modules without overlap in the thickness direction, with main electrode terminals protruding from one side and using an insulating medium between them to maintain insulation while expanding terminal width.
This configuration allows for increased current capacity and reduced heat generation at the terminal portions without increasing the module's size, by shortening the space insulation distance and enhancing heat dissipation.
Smart Images

Figure 2025110920000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a power semiconductor device, and more particularly to a power semiconductor device that ensures the current capacity of a semiconductor module and suppresses heat generation at terminal portions. [Background technology]
[0002] In general, power semiconductor modules, such as IGBT (Insulated Gate Bipolar Transistor) modules, IPM (Intelligent Power Modules), and TPM (Transfer-molded Power Modules), have main electrode terminals through which large currents flow and to which high voltages are applied, and control terminals that control the on / off of switching devices.The control terminals are connected to external connectors, and the switching of the power semiconductor module is controlled by external control signals.
[0003] The P and N terminals of adjacent main electrode terminals are connected to laminated bus bars, which are then connected to a capacitor bank. The bottom of the module is placed in contact with a heat dissipation mechanism such as fins.
[0004] A large current flows through the main electrode terminals, causing temperature rise, and because high voltage is applied to the main electrode terminals, it is necessary to ensure a sufficient insulation distance between the terminals for safety reasons, making it difficult to widen the terminals.
[0005] In the power conversion device disclosed in Patent Document 1, an insulating member is placed between main electrode terminals connected to bus bars, and thereby a technology is disclosed in which the power conversion device can be miniaturized while maintaining electrical insulation between the main electrode terminals even when the main electrode terminals are arranged overlapping each other to narrow the distance between the main electrode terminals. [Prior art documents] [Patent documents]
[0006]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0007] In the power conversion device disclosed in Patent Document 1, the arrangement direction of the main electrode terminals is the same as the stacking direction of the semiconductor modules, there are limitations on the arrangement of the insulating members disposed between the main electrode terminals, and it has been difficult to increase the terminal width.
[0008] The present disclosure has been made to solve the above problems, and an object thereof is to provide a semiconductor device for power use that secures a current capacity by increasing the terminal width of the main electrode terminals of the semiconductor module and suppresses heat generation at the terminal portion.
Means for Solving the Problems
[0009] The semiconductor device for power use according to the present disclosure includes a plurality of semiconductor modules, a first bus bar and a second bus bar that are electrically connected to the first main electrode terminal and the second main electrode terminal of each of the plurality of semiconductor modules, respectively. The plurality of semiconductor modules are arranged without overlapping in a first direction that is the thickness direction, the first and second main electrode terminals protrude from one side surface of the semiconductor module, and are arranged adjacent to each other with a gap therebetween in a second direction that is the arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first and second main electrode terminals.
Effects of the Invention
[0010] According to the semiconductor device for power use according to the present disclosure, by inserting an insulating medium between the first main electrode terminal and the second main electrode terminal, it is possible to shorten the space insulation distance, and it is possible to expand the electrode width that is the length in the second direction of the first and second main electrode terminals.
Brief Description of the Drawings
[0011] [Figure 1] It is a plan view showing the configuration of the power semiconductor device of Embodiment 1 according to the present disclosure. [Figure 2] It is a perspective view showing the configuration of the connection portion between the main electrode terminal of the semiconductor module and the bus bar. [Diagram 3] It is a perspective view showing the configuration of the connection portion between the main electrode terminal of the semiconductor module and the bus bar. [Figure 4] It is a plan view showing the semiconductor module. [Diagram 5] It is a side view of the semiconductor module in the power semiconductor device of Embodiment 1 according to the present disclosure. [Figure 6] It is a plan view showing the configuration of the power semiconductor device of Embodiment 2 according to the present disclosure. [Figure 7] It is a side view of the semiconductor module in the power semiconductor device of a modified example of Embodiment 2 according to the present disclosure. [Figure 8] It is a plan view showing the configuration of the power semiconductor device of a modified example of Embodiment 2 according to the present disclosure. [Figure 9] It is a plan view of the semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. [Figure 10] It is a side view of the semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. [Figure 11] It is a side view of the semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. [Figure 12] It is a side view of the semiconductor module in the power semiconductor device of Embodiment 4 according to the present disclosure. [Figure 13] It is a side view of the semiconductor module in the power semiconductor device of a modified example of Embodiment 4 according to the present disclosure. [Figure 14] It is a side view of the semiconductor module in the power semiconductor device of Embodiment 4 according to the present disclosure.
Embodiments for Carrying Out the Invention
[0012] <Embodiment 1> FIG. 1 is a plan view for explaining the configuration of a power semiconductor device 100 according to Embodiment 1 of the present disclosure.
[0013] As shown in FIG. 1, the power semiconductor device 100 includes six semiconductor modules 1 mounted on the upper surface of a cooling member 4a on a cooling mechanism 4b such as a water cooling mechanism, and main electrode terminals 5a (first main electrode terminals) and main electrode terminals 5b (second main electrode terminals) that protrude from the side surfaces of the respective semiconductor modules 1 with a space therebetween, and bus bars 2a (first bus bar) and bus bars 2b (second bus bar) connected to the main electrode terminals 5a and 5b, respectively.
[0014] The bus bars 2a and 2b extend along the X direction, which is the arrangement direction of the six semiconductor modules 1, and a capacitor bank, which is an aggregate of a plurality of capacitors, is connected to an end (not shown) in the Y direction orthogonal to the X direction. This capacitor bank is used, for example, as a smoothing capacitor of a power conversion circuit.
[0015] Each of the semiconductor modules 1 has an output terminal 10 protruding from a side surface opposite to the side where the main electrode terminals 5a and 5b protrude, and the output terminals 10 of adjacent semiconductor modules 1 are commonly connected by a terminal plate 11. The terminal plate 11 is electrically connected to the outside of the power semiconductor device 100 via an external terminal plate (not shown).
[0016] FIG. 2 is a perspective view showing the configuration of a connection portion between the main electrode terminals 5a and 5b of the semiconductor module 1 and the bus bars 2a and 2b. The bus bar 2a and the bus bar 2b are laminated in the Z direction, which is the vertical direction, and are electrically insulated from each other by an insulator sheet 3 having an electrical resistance of about 100 MΩ called a laminate, and a space insulation distance is ensured. In the present embodiment, the bus bar 2a is a P-potential bus bar on the high-potential side, and the bus bar 2b is an N-potential bus bar on the low-potential side.
[0017] The insulating sheet 3 can use composite materials of polyethylene terephthalate (PET) films, aramid paper, etc., and can be provided not only between the bus bars 2a and 2b but also to cover the upper and lower surfaces of the bus bars 2a and 2b.
[0018] Also, as shown in FIG. 2, the bus bar 2a has a configuration in which a plurality of bus bar terminals 21a (first bus bar terminals) extend from the edge portion on the semiconductor module 1 side, and the upper surface of the main electrode terminal 5a of the semiconductor module 1 is connected to the bus bar terminal 21a.
[0019] The bus bar 2b has a configuration in which a plurality of bus bar terminals 21b (second bus bar terminals) extend from the edge portion on the semiconductor module 1 side, and the upper surface of the main electrode terminal 5b of the semiconductor module 1 is connected to the bus bar terminal 21b.
[0020] An insulating medium 6 made of a sheet-like insulating material is inserted between the main electrode terminal 5a and the main electrode terminal 5b that protrude from the side surface of the semiconductor module 1. Since the main electrode terminals 5a and 5b are connected to the bus bars 2a and 2b, respectively, the main electrode terminal 5a has a P potential and the main electrode terminal 5b has an N potential. For this reason, the main electrode terminals 5a and 5b should originally be arranged at a separation distance necessary to ensure a space insulation distance. However, in the semiconductor device 100 for power use according to the first embodiment, by inserting the insulating medium 6 between the main electrode terminal 5a and the main electrode terminal 5b, it becomes possible to shorten the space insulation distance, and it becomes possible to expand the electrode width, which is the length of the main electrode terminals 5a and 5b in the X direction.
[0021] The insulating medium 6 can use paper materials such as aramid paper and resin paper, or resin materials such as nylon films, polyester films, and polyphenylene sulfide (PPS) films, and the thickness can be about 100 μm at the thinnest. By using the sheet-like insulating medium 6, an increase in manufacturing cost can be suppressed.
[0022] The insulating medium 6 can have a thickness sufficient to ensure the breakdown voltage. The thicker it is, the higher the breakdown voltage. Therefore, at most, it can have a thickness comparable to the distance between the adjacent main electrode terminals 5a and 5b. Also, the length of the insulating medium 6 in the Y direction can be made comparable to the lengths of the main electrode terminals 5a and 5b in the Y direction.
[0023] Here, in the power semiconductor device 100, the plurality of semiconductor modules 1 are arranged without overlapping in the Z direction, which is the thickness direction. The main electrode terminals 5a and 5b are arranged adjacent to each other in the X direction, which is the arrangement direction of the plurality of semiconductor modules 1. The terminal surfaces of the main electrode terminals 5a and 5b do not overlap each other. And since the insulating medium 6 is arranged between the main electrode terminal 5a and the main electrode terminal 5b in the X direction, which is the arrangement direction of the main electrode terminals 5a and 5b, if the insulating medium 6 can ensure the breakdown voltage, by making the thickness of the insulating medium 6 as thin as possible, the terminal width, which is the length of the main electrode terminals 5a and 5b in the X direction, can be made extremely large.
[0024] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation amount at the terminal part increases, reducing heat generation.
[0025] Also, instead of increasing the thickness of the insulating medium 6, a hollow cylindrical insulating medium 60 can be used. FIG. 3 is a perspective view showing the configuration of the connection portion between the main electrode terminals 5a and 5b of the semiconductor module 1 and the bus bars 2a and 2b when the hollow cylindrical insulating medium 60 is used. By making the width of the insulating medium 60 in the X direction comparable to the distance between the adjacent main electrode terminals 5a and 5b, and making the length of the insulating medium 60 in the Y direction comparable to the lengths of the main electrode terminals 5a and 5b in the Y direction, the space between the main electrode terminals can be filled without gaps. By using the hollow cylindrical insulating medium 60, the weight can be reduced.
[0026] Note that by adhering the insulating media 6 and 60 to at least one of the main electrode terminals 5a and 5b with an adhesive, movement of the insulating media 6 and 60 due to vibration or the like can be suppressed.
[0027] FIG. 4 is a plan view of the semiconductor module 1 as seen from above. As shown in FIG. 4, each of the semiconductor modules 1 has a plurality of control terminals CT protruding from the side surfaces where the main electrode terminals 5a and 5b protrude and the side surfaces where the output terminals 10 protrude. Control signals for controlling on and off of the switching devices incorporated in the semiconductor module 1 are input to the plurality of control terminals CT, which are bent in the Z direction orthogonal to the protruding direction (Y direction) and are connected to an external connector (not shown).
[0028] <Embodiment 2> FIG. 5 is a side view of the semiconductor module 1 in the power semiconductor device 200 according to Embodiment 2 of the present disclosure as seen from the side where the main electrode terminals 5a and 5b protrude.
[0029] As shown in FIG. 5, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b in the Z direction, which is the thickness direction of the semiconductor module 1, are arranged at different positions so as to have a step, and an insulating medium 61 extending in the X direction, which is the arrangement direction of the main electrode terminals 5a and 5b, is inserted between the main electrode terminals 5a and 5b so as to span the step. By inserting the insulating medium 61, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.
[0030] Note that in FIG. 5, the main electrode terminal 5a having a high potential is located on the side closer to the bottom surface BF of the semiconductor module 1, and the main electrode terminal 5b having a low potential is arranged on the opposite side, but the vertical relationship between the main electrode terminals 5a and 5b can be reversed.
[0031] By inserting the insulating medium 61 between the main electrode terminals 5a and 5b, which are positioned at different positions with a step, it is possible to maintain the spatial insulation distance between the main electrode terminals 5a and 5b, and therefore it is possible to significantly increase the terminal width, which is the length in the X direction of the main electrode terminals 5a and 5b. For example, it is possible to increase the terminal width to the extent that the terminal surfaces of the main electrode terminals 5a and 5b overlap each other when viewed from the Z direction.
[0032] Therefore, a larger current can be passed through the semiconductor module 1, and the amount of heat dissipated at the terminals is increased, reducing heat generation, without increasing the dimensions of the semiconductor module 1. Furthermore, the insulating medium 61 is disposed so as to be sandwiched between the main electrode terminals 5a and 5b, which facilitates alignment and other operations.
[0033] Fig. 6 is a plan view illustrating a configuration of a power semiconductor device 200 according to a second embodiment of the present disclosure. In Fig. 6, the same components as those in the power semiconductor device 100 described with reference to Fig. 1 are denoted by the same reference numerals, and duplicated descriptions will be omitted.
[0034] 6, in the power semiconductor device 200, an insulating medium 61 extending in the X direction, which is the arrangement direction of the main electrode terminals 5a and 5b, is interposed between the main electrode terminals 5a and 5b of each semiconductor module 1. Note that the main electrode terminal 5a is covered with the insulating medium 61 and is therefore not visible.
[0035] The insulating medium 61 can be made of the same material as the insulating medium 6 described in the first embodiment, but it can also be made by extending the insulating sheet 3 interposed between the bus bars 2a and 2b. By extending the insulating sheet 3 to form the insulating medium 61, the step of inserting the insulating medium 61 becomes unnecessary, thereby reducing the number of manufacturing steps.
[0036] <Modification> FIG. 7 is a side view of semiconductor module 1 in power semiconductor device 201 according to a modification of the second embodiment of the present disclosure, viewed from the side from which main electrode terminals 5a and 5b protrude.
[0037] As shown in FIG. 7, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b in the Z direction, which is the thickness direction of the semiconductor module 1, are arranged at different positions so as to have a step, and the terminal position of the control terminal CT in the Z direction is arranged on the side closer to the bottom surface BF of the semiconductor module 1 and arranged so as to be in the same plane as the main electrode terminal 5a. And an insulating medium 62 extending in the X direction is inserted between the main electrode terminals 5a and 5b arranged at different positions in the Z direction and the control terminal CT. The insulating medium 62 is provided so as to cover the main electrode terminal 5a and the control terminal CT. By inserting the insulating medium 62, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.
[0038] By inserting the insulating medium 61 between the main electrode terminals 5a and 5b arranged at different positions in the Z direction, the space insulation distance between the main electrode terminals 5a and 5b can be maintained. Therefore, in terms of being able to make the terminal width, which is the length of the main electrode terminals 5a and 5b in the X direction, extremely large, it is the same as the power semiconductor device 200 of Embodiment 2.
[0039] FIG. 8 is a plan view for explaining the configuration of a power semiconductor device 201 which is a modification of Embodiment 2 according to the present disclosure. In FIG. 8, the same components as those of the power semiconductor device 100 described with reference to FIG. 1 are denoted by the same reference numerals, and redundant explanations are omitted.
[0040] As shown in FIG. 8, in the power semiconductor device 201, an insulating medium 62 extending in the X direction is inserted between the main electrode terminals 5a and 5b of each semiconductor module 1 and the control terminal CT. Note that the main electrode terminal 5a is covered with the insulating medium 62 and thus cannot be visually recognized.
[0041] As shown in Fig. 8, since the insulating medium 62 can be integrally provided so as to cover the entire terminal portion of the array of the plurality of semiconductor modules 1, the workability during assembly is improved as compared with the power semiconductor device 200 in which the insulating medium 61 is arranged for each semiconductor module 1.
[0042] Also, in the semiconductor module 1 shown in Fig. 7, as the distance in the X direction, the main electrode terminal 5b having a low potential is arranged near the control terminal CT, and the main electrode terminal 5a having a high potential is arranged at a position away from the control terminal CT. However, when the main electrode terminal 5a is arranged near the control terminal CT, by covering the control terminal CT with the insulating medium 62, the space insulation distance between the main electrode terminal 5a and the control terminal CT can be ensured, and the effect of suppressing dielectric breakdown between the main electrode terminal 5a and the control terminal CT can be obtained.
[0043] The insulating medium 62 can be made of the same material as the insulating medium 6 described in the first embodiment, but it is also possible to extend the insulating sheet 3 inserted between the bus bar 2a and the bus bar 2b to form the insulating medium 62. By extending the insulating sheet 3 to form the insulating medium 62, the step of inserting the insulating medium 62 becomes unnecessary, and the manufacturing process can be reduced.
[0044] <Embodiment 3> Fig. 9 is a plan view of the semiconductor module 1 in the power semiconductor device 300 according to Embodiment 3 of the present disclosure as viewed from above.
[0045] Figs. 10 and 11 are side views of the semiconductor module 1 in Fig. 9 as viewed from the long side surface side orthogonal to the short side surface where the main electrode terminals 5a and 5b and the output terminal 10 protrude. Fig. 10 is a side view corresponding to the cross-sectional view taken along line A-A in Fig. 9, and Fig. 11 is a side view corresponding to the cross-sectional view taken along line B-B in Fig. 9. For the sake of convenience, the internal configuration of the semiconductor module 1 is not shown.
[0046] 9 to 11, main electrode terminal 5b is covered with transfer mold resin MD that seals semiconductor module 1 except for its tip portion, and bus bar terminal 21b is connected to the tip portion. On the other hand, main electrode terminal 5a is not covered with transfer mold resin, and bus bar terminal 21a is connected to the entire portion that protrudes from the side surface of semiconductor module 1. Note that it is also possible to cover main electrode terminal 5a with transfer mold resin MD.
[0047] In this way, by covering at least one of the main electrode terminals 5a and 5b with resin, the spatial insulation distance between the main electrode terminals 5a and 5b can be further shortened, and the terminal width, which is the length of the main electrode terminals 5a and 5b in the X direction, can be increased. Also, by extending the bus bar terminal 21a close to the semiconductor module 1 and connecting it to the main electrode terminal 5a, the thickness of the terminal portion is increased, which can further increase the current capacity and further suppress temperature rise.
[0048] <Fourth Embodiment> FIG. 12 is a side view of the semiconductor module 1 in the power semiconductor device 400 according to the fourth embodiment of the present disclosure, viewed from the side from which the main electrode terminals 5a and 5b protrude.
[0049] As shown in FIG. 12, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b are the same in the Z direction, which is the thickness direction of the semiconductor module 1, and an insulating medium 63 is interposed between the terminals, the insulating medium 63 having a bent portion and extending in the X direction so as to have a step in the Z direction, which is the up-down direction.
[0050] The insulating medium 63 has a step so as to cover the upper surface of the main electrode terminal 5a and the lower surface of the main electrode terminal 5b. By inserting the insulating medium 63, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.
[0051] By inserting an insulating medium 63 having a step in the Z direction between the terminals, the space insulation distance between the main electrode terminals 5a and 5b can be maintained, so that the terminal width, which is the length of the main electrode terminals 5a and 5b in the X direction, can be increased.
[0052] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation amount at the terminal portion can be increased to reduce heat generation.
[0053] The insulating medium 63 can be made of the same material as the insulating medium 6 described in the first embodiment, but it is also possible to extend the insulator sheet 3 inserted between the bus bar 2a and the bus bar 2b to form the insulating medium 63. By extending the insulator sheet 3 to form the insulating medium 63, the step of inserting the insulating medium 63 becomes unnecessary, and the manufacturing process can be reduced.
[0054] <Modification> FIG. 13 is a side view of the semiconductor module 1 in the power semiconductor device 401 which is a modification of the fourth embodiment according to the present disclosure, as viewed from the side where the main electrode terminals 5a and 5b protrude.
[0055] As shown in FIG. 13, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b in the Z direction, which is the thickness direction of the semiconductor module 1, are the same, and an insulating medium 64 having a bent portion and extending in the X direction with a step in the Z direction, which is the vertical direction, between the terminals is inserted.
[0056] The insulating medium 64 has a step so as to cover the lower surface of the main electrode terminal 5a and the upper surface of the main electrode terminal 5b. By inserting the insulating medium 64, the bus bar terminal 21b is connected to the lower surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the upper surface of the main electrode terminal 5a.
[0057] By inserting an insulating medium 64 having a step in the Z direction between the terminals, the space insulation distance between the main electrode terminals 5a and 5b can be maintained, so that the terminal width, which is the length of the main electrode terminals 5a and 5b in the X direction, can be increased.
[0058] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the amount of heat dissipation at the terminal portion increases, reducing heat generation.
[0059] The insulating medium 64 can be made of the same material as the insulating medium 6 described in the first embodiment, but it is also possible to extend the insulator sheet 3 inserted between the bus bar 2a and the bus bar 2b to form the insulating medium 64. By extending the insulator sheet 3 to form the insulating medium 64, the step of inserting the insulating medium 64 becomes unnecessary, and the manufacturing process can be reduced.
[0060] <Embodiment 5> FIG. 14 is a side view of the semiconductor module 1 in the power semiconductor device 500 according to the fifth embodiment of the present disclosure as viewed from the side where the main electrode terminals 5a and 5b protrude.
[0061] As shown in FIG. 14, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b in the Z direction, which is the thickness direction of the semiconductor module 1, are the same, and the bus bar terminals 21a and 21b are connected so as to wrap the main electrode terminals 5a and 5b, respectively. An insulating medium 65 is disposed between the adjacent bus bar terminals 21a and 21b so as to maintain the space insulation distance between the two terminals.
[0062] By wrapping the main electrode terminals 5a and 5b with the bus bar terminals 21a and 21b, respectively, the contact area between the main electrode terminals and the bus bar terminals can be increased, the thickness of the terminal portion can be increased, and the temperature rise can be further suppressed.
[0063] On the other hand, the distance between the bus bar terminals 21a and 21b becomes shorter, but by providing the insulating medium 65, it becomes easier to ensure the space insulation distance.
[0064] Note that the bus bar terminals २१a and २१b are each formed in a cylindrical shape so that they can wrap around the main electrode terminals ५a and ५b in advance. At the time of assembly, the bus bar terminals २१a and २१b are inserted into the main electrode terminals ५a and ५b, respectively, and pressure is applied from the outside of the bus bar terminals २१a and २१b by caulking, whereby the bus bar terminals २१a and २१b can be connected to the main electrode terminals ५a and ५b, respectively.
[0065] Note that within the scope of the present disclosure, the respective embodiments can be freely combined, or each embodiment can be appropriately modified or omitted.
[0066] The present disclosure described above is collectively described as an appended note.
[0067] (Appended Note 1) A plurality of semiconductor modules; A first bus bar and a second bus bar, each electrically connected to a first main electrode terminal and a second main electrode terminal of each of the plurality of semiconductor modules; The plurality of semiconductor modules are arranged without overlapping in a first direction that is the thickness direction with respect to each other; The first and second main electrode terminals are Projecting from one side surface of the semiconductor module, and arranged adjacent to each other with a space therebetween in a second direction that is the arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first and second main electrode terminals. A semiconductor device for power use.
[0068] (Appended Note 2) The insulating medium is Inserted between the first and second main electrode terminals in the second direction of the first and second main electrode terminals. The semiconductor device for power use according to Appended Note 1.
[0069] (Appended Note 3) The insulating medium is It should be noted that the numbers in the original text seem to be in a non-standard format. I've translated them as they are while trying to maintain the overall structure. If there are specific requirements or corrections regarding these numbers, the translation can be adjusted accordingly.The power semiconductor device according to Supplementary Note 2, which is composed of a sheet-like insulating material.
[0070] (Supplementary Note 4) The insulating medium is The power semiconductor device according to Supplementary Note 2, which is composed of a hollow cylindrical insulating material.
[0071] (Supplementary Note 5) The first and second main electrode terminals are On the one side surface, they are arranged at different positions so as to have a step in the first direction of the semiconductor module. The insulating medium is The power semiconductor device according to Supplementary Note 1, which is inserted so as to extend in the second direction across the step between the first and second main electrode terminals.
[0072] (Supplementary Note 6) The semiconductor module is It has a plurality of control terminals protruding from the one side surface. The plurality of control terminals are They are respectively arranged at positions different from the first and second main electrode terminals in the second direction, and in the first direction, they are all arranged at the same position as one of the first and second main electrode terminals. The insulating medium is The power semiconductor device according to Supplementary Note 5, which extends in the second direction so as to cover the plurality of control terminals.
[0073] (Supplementary Note 7) The first and second main electrode terminals are On the one side surface, they are arranged at the same position in the first direction of the semiconductor module. The insulating medium is The power semiconductor device according to Supplementary Note 1, which has a bent portion so as to have a step in the first direction between the first main electrode terminal and the second main electrode terminal and is inserted so as to extend in the second direction.
[0074] (Supplementary Note 8) The first bus bar is provided with a first bus bar terminal connected to the first main electrode terminal, The second bus bar is provided with a second bus bar terminal connected to the second main electrode terminal, The first bus bar terminal is connected to the first main electrode terminal so as to wrap the first main electrode terminal, The second bus bar terminal is connected to the second main electrode terminal so as to wrap the second main electrode terminal, The insulating medium is inserted between the first and second main electrode terminals wrapped by the first and second bus bar terminals respectively in the second direction of the first and second main electrode terminals, the semiconductor device for power use according to Appendix 1.
[0075] (Appendix 9) The first and second bus bars are arranged to face each other with a gap therebetween in the first direction, an insulator sheet is disposed between the first bus bar and the second bus bar, The insulating medium is formed by extending a part of the insulator sheet, the semiconductor device for power use according to any one of Appendices 5 to 8.
[0076] (Appendix 10) a plurality of semiconductor modules, a first bus bar and a second bus bar, each electrically connected to the first main electrode terminal and the second main electrode terminal of each of the plurality of semiconductor modules, the plurality of semiconductor modules are arranged without overlapping in the first direction which is the thickness direction, The first bus bar is provided with a first bus bar terminal connected to the first main electrode terminal, The second bus bar is provided with a second bus bar terminal connected to the second main electrode terminal, The first and second main electrode terminals are arranged adjacent to each other with a space therebetween in a second direction which is the array direction of the plurality of semiconductor modules, the first main electrode terminal projects from one side surface of the semiconductor module, the second main electrode terminal is covered with a mold resin that constitutes the semiconductor module except for the tip portion, the first bus bar terminal is formed to have a length that is connected so as to cover the protruding portion of the first main electrode terminal, the second bus bar terminal is formed to have a length that is connected so as to cover the tip portion of the second main electrode terminal, a semiconductor device for power.
Description of Signs
[0077] 1 Semiconductor module, 2a, 2b Bus bar, 3 Insulating sheet, 5a, 5b Main electrode terminal, 6, 60 to 65 Insulating medium, CT Control terminal, MD Transfer mold resin.
Claims
1. A plurality of semiconductor modules, a first bus bar and a second bus bar, each electrically connected to a first main electrode terminal and a second main electrode terminal of each of the plurality of semiconductor modules, respectively, wherein the plurality of semiconductor modules are arranged without overlapping in a first direction which is the thickness direction with respect to each other, the first and second main electrode terminals, project from one side surface of the semiconductor module and are arranged adjacent to each other with a space therebetween in a second direction which is the arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first and second main electrode terminals, a semiconductor device for power.
2. The insulating medium, is inserted between the first and second main electrode terminals in the second direction of the first and second main electrode terminals, the semiconductor device for power according to Claim 1.
3. The insulating medium, is composed of a sheet-shaped insulating material, the semiconductor device for power according to Claim 2.
4. The insulating medium, is composed of a hollow cylindrical insulating material, the semiconductor device for power according to Claim 2.
5. The first and second main electrode terminals, are arranged at different positions from each other so as to have a step in the first direction of the semiconductor module on the one side surface, the insulating medium, is inserted so as to extend in the second direction across between the steps of the first and second main electrode terminals, the semiconductor device for power according to Claim 1.
6. The semiconductor module, has a plurality of control terminals projecting from the one side surface, the plurality of control terminals, are respectively arranged at positions different from the first and second main electrode terminals in the second direction, and in the first direction, all are arranged at the same position as one of the first and second main electrode terminals, the insulating medium, extends in the second direction so as to cover also the plurality of control terminals, the semiconductor device for power according to Claim 5.
7. The first and second main electrode terminals, are arranged at the same position in the first direction of the semiconductor module on the one side surface, the insulating medium, has a bent portion so as to have a step in the first direction between the first main electrode terminal and the second main electrode terminal and is inserted so as to extend in the second direction, the semiconductor device for power according to Claim 1.
8. The first bus bar, has a first bus bar terminal connected to the first main electrode terminal, The second bus bar is provided with a second bus bar terminal connected to the second main electrode terminal, The first bus bar terminal is connected to the first main electrode terminal so as to enclose the first main electrode terminal, The second bus bar terminal is connected to the second main electrode terminal so as to enclose the second main electrode terminal, The insulating medium is inserted between the first and second main electrode terminals wrapped by the first and second bus bar terminals respectively in the second direction of the first and second main electrode terminals. The semiconductor device for power use according to claim 1.
9. The first and second bus bars are arranged to face each other with a gap therebetween in the first direction, an insulator sheet is disposed between the first bus bar and the second bus bar, The insulating medium is formed by extending a part of the insulator sheet. The semiconductor device for power use according to any one of claims 5 to 8.
10. a plurality of semiconductor modules; a first bus bar and a second bus bar that are electrically connected to the first main electrode terminal and the second main electrode terminal of each of the plurality of semiconductor modules respectively, the plurality of semiconductor modules are arranged without overlapping in the first direction which is the thickness direction, The first bus bar is provided with a first bus bar terminal connected to the first main electrode terminal, The second bus bar is provided with a second bus bar terminal connected to the second main electrode terminal, The first and second main electrode terminals are arranged adjacent to each other with a gap therebetween in the second direction which is the arrangement direction of the plurality of semiconductor modules, the first main electrode terminal protrudes from one side surface of the semiconductor module, the second main electrode terminal is covered with a mold resin constituting the semiconductor module except for the tip portion, The first bus bar terminal is formed to a length that is connected so as to cover the protruding portion of the first main electrode terminal, The second bus bar terminal is formed to a length that is connected so as to cover the tip portion of the second main electrode terminal. The semiconductor device for power use.
Citation Information
Patent Citations
Power conversion device
JP2018067990A