Method of manufacturing semiconductor device, and semiconductor device

By employing low-temperature curing polyimides with surface modifications or protective films, the method addresses substrate warpage and chemical resistance issues, improving semiconductor device reliability through controlled curing and etching processes.

JP2025114297APending Publication Date: 2025-08-05LAPIS SEMICON CO LTD
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Patent Information

Application Number
JP2024008913
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-24
Publication Date
2025-08-05

AI Technical Summary

Technical Problem

Existing semiconductor manufacturing methods face challenges in balancing the warpage of semiconductor substrates due to high-temperature curing of insulating layers, which are chemically resistant, and the poorer chemical resistance of low-temperature curing polyimides, leading to reliability issues.

Method used

A method involving the use of low-temperature curing polyimides for insulating layers, modified to enhance chemical resistance, and a protective layer formed on the insulating layer surface to prevent swelling and dissolution during etching, while suppressing substrate warpage by curing at lower temperatures.

Benefits of technology

The method achieves both suppression of substrate warpage and improved chemical resistance, enhancing the reliability of semiconductor devices by maintaining insulating layer integrity during etching processes.

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Abstract

To provide a method of manufacturing a semiconductor device, which can enhance reliability by establishing compatibility between warpage inhibition and chemical resistance of a semiconductor substrate, and the semiconductor device.SOLUTION: A method of manufacturing a semiconductor device includes: an insulation layer lamination step of overlaying an insulation layer 16, which is made of an insulation material, on a semiconductor substrate 14; a protective layer formation step of forming a modified layer 16A, which serves as a protective layer having chemical resistance to an etchant, on a surface of the insulation layer 16; a base metal layer lamination step of overlaying a base metal layer 22 on the insulation layer; a re-wiring formation step of forming re-wiring 20 on the base metal layer; and a base metal layer removal step of removing the exposed base metal layer 22 by the etchant.SELECTED DRAWING: Figure 7
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Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a semiconductor device. [Background technology]

[0002] For example, Patent Document 1 discloses a semiconductor device and a manufacturing method thereof. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-6391 A Summary of the Invention [Problem to be solved by the invention]

[0004] In a method for manufacturing such a semiconductor device, an insulating layer, an underlying metal layer, and rewiring are formed in this order on a semiconductor substrate. As an example, high-temperature curing polyimide used in the insulating layer, which cures at high temperatures, is chemically resistant to the etching solution used to etch the underlying metal layer. However, because it must be cured at high temperatures, the semiconductor substrate may warp when heated to high temperatures, and there is room for improvement. On the other hand, low-temperature curing polyimides used in insulating layers are advantageous in terms of preventing warpage of semiconductor substrates because they are cured at low temperatures. However, they have poorer chemical resistance than high-temperature curing polyimides, making them less reliable, and there is room for improvement.

[0005] The present disclosure provides a semiconductor device manufacturing method that can suppress warpage and improve chemical resistance of a semiconductor substrate, thereby improving reliability, and a semiconductor device. [Means for solving the problem]

[0006] The method for manufacturing a semiconductor device according to the present disclosure includes an insulating layer laminating step of laminating an insulating layer made of an insulating material on a semiconductor substrate, a protective layer forming step of forming a protective layer having chemical resistance to an etching solution on the surface of the insulating layer, a base metal layer laminating step of laminating a base metal layer on the insulating layer, a rewiring forming step of forming rewiring on the base metal layer, and a base metal layer removing step of removing the exposed base metal layer using the etching solution.

[0007] In the method for manufacturing a semiconductor device according to the present disclosure, an insulating layer made of an insulating material is laminated on a semiconductor substrate in the insulating layer laminating step. In the protective layer forming step, a protective layer that is chemically resistant to an etching solution is formed on the surface of the insulating layer. In the metal underlayer lamination step, a metal underlayer is laminated on the insulating layer. In the rewiring formation step, rewiring is formed on the underlying metal layer. In the metal underlayer removal step, the exposed metal underlayer is removed with an etching solution. In the base metal layer removal process, a protective layer that is chemically resistant to the etching solution is formed on the surface of the insulating layer in the protective layer formation process, thereby preventing problems such as swelling of the insulating layer due to the etching solution or dissolution of the insulating material, in other words, damage caused by etching.

[0008] Incidentally, if an insulating material that has excellent chemical resistance and hardens at high temperatures is used for the insulating layer, there will be no problem with the insulating layer coming into contact with the etching solution, but the heat generated during hardening may cause warping of the semiconductor substrate.

[0009] In the present disclosure, a protective layer having chemical resistance to an etching solution is formed on the surface of an insulating layer, which makes it possible to use an insulating material for the insulating layer that has low chemical resistance to the etching solution and that can be cured at low temperatures. This allows the insulating layer to be obtained by curing the insulating material at low temperatures, making it possible to achieve both suppression of warpage and chemical resistance in the semiconductor substrate, thereby improving the reliability of the semiconductor device.

[0010] The semiconductor device according to the present disclosure includes a semiconductor substrate, an insulating layer made of an insulating material formed on the semiconductor substrate, a protective layer formed on the surface of the insulating layer and having higher chemical resistance to etching solutions than the insulating material, a base metal layer provided on the insulating layer via the protective layer, and rewiring formed on the base metal layer.

[0011] In the semiconductor device according to the present disclosure, a protective layer that is more chemically resistant to the etching solution than the insulating material is formed on the surface of the insulating layer, thereby preventing the etching solution from causing defects in the insulating layer when etching the underlying metal layer with the etching solution.

[0012] Furthermore, the insulating material forming the insulating layer can be one that hardens at low temperatures even if it has poor chemical resistance to, for example, an etching solution, and the insulating material can be heated at low temperatures to harden it and suppress warping of the semiconductor substrate. Therefore, according to the semiconductor device of the present disclosure, it is possible to suppress warpage of the semiconductor substrate while improving chemical resistance, thereby improving the reliability of the semiconductor device. [Brief explanation of the drawings]

[0013] [Figure 1] 3 is a cross-sectional view showing the semiconductor substrate in an insulating layer forming step in the method for manufacturing the semiconductor device according to the first embodiment. FIG. [Figure 2] 10A and 10B are cross-sectional views showing a semiconductor substrate in a modification step. [Figure 3] 1 is a cross-sectional view showing a semiconductor substrate in a base metal layer forming step. [Figure 4] 1 is a cross-sectional view showing a semiconductor substrate in a step of forming a pattern on a photosensitive resin layer. [Figure 5] 10A and 10B are cross-sectional views showing a semiconductor substrate in a rewiring formation step; [Figure 6] FIG. 10 is a cross-sectional view showing the semiconductor substrate after the photosensitive resin layer removing step. [Figure 7] 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. [Figure 8]10A and 10B are cross-sectional views illustrating a semiconductor device in a protective film forming step in a semiconductor device manufacturing method according to a second embodiment. [Figure 9] 1 is a cross-sectional view showing a semiconductor device in a pattern forming step. [Figure 10] FIG. 10 is a cross-sectional view showing the semiconductor substrate after an etching step. [Figure 11] 10A and 10B are cross-sectional views showing a semiconductor substrate in a resist removal step. [Figure 12] FIG. 4 is a cross-sectional view showing a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] [First embodiment] A first embodiment of the present disclosure will be described below with reference to the drawings. In the following description, a semiconductor device according to the present disclosure will be described as being applied to a WL-CSP (Wafer Level-Chip Size Package). The rewiring configuration is similar to that of the prior art, and therefore a detailed description thereof will be omitted. It should be noted that the drawings merely show the shape, size, and positional relationship of each component part in a schematic manner to enable understanding of this disclosure, and are not intended to limit this disclosure in any way. In the following description, specific materials, conditions, numerical conditions, etc. may be used, but this is merely one of the preferred examples, and therefore, the present disclosure is not limited to these in any way.

[0015] As shown in Figure 7, the semiconductor device 10 of this embodiment has a semiconductor substrate 14 containing Si as an example, on whose surface a pad electrode 12 is formed, an insulating layer 16 made of an insulating material formed on the semiconductor substrate 14 and having an opening 18 at the position of the pad electrode 12, and a rewiring 20 provided on the insulating layer 16 and electrically connected to the pad electrode 12 at the opening 18 via an underlying metal layer 22.

[0016] Each step of manufacturing the semiconductor device 10 of this embodiment will be described in detail below with reference to FIGS.

[0017] (1) Semiconductor substrate preparation process, insulating layer formation process First, a semiconductor substrate 14 on which a pad electrode 12 is formed is prepared in a semiconductor substrate preparation step, as shown in Fig. 1. Next, an insulating layer 16 is formed on the upper surface of the semiconductor substrate 14 in an insulating layer formation step, as shown in Fig. 2.

[0018] Here, for example, a thermosetting material that will become the insulating layer 16 is formed on the circuit surface on the side where the pad electrodes 12 are formed, and patterned by photolithography. Thereafter, a thermosetting process is performed to heat and harden the thermosetting material, thereby forming the insulating layer 16.

[0019] As an example of the thermosetting material used in this embodiment, a low-temperature curing polyimide (low-temperature curing polyimide) that cures at a low temperature is used. In this embodiment, the low temperature means, for example, 250°C or less, at which the semiconductor substrate 14 will not warp when heated, when the semiconductor substrate 14 is a Si substrate. When the semiconductor substrate 14 is made of a material other than Si, the low temperature is not limited to 250°C or less, but will be any temperature at which the semiconductor substrate 14 will not warp.

[0020] In the insulating layer forming process, the low-temperature curing polyimide is cured at a low temperature of 250°C or less, which does not cause warping of the semiconductor substrate 14, thereby suppressing warping of the semiconductor substrate 14 during heating. Note that warping is not limited to curving but also includes rippling (deformation in the out-of-plane direction).

[0021] (2) Modification process The outermost surface of the polyimide-containing insulating layer 16 is modified by plasma treatment such as O2 ashing to enhance chemical resistance. As shown in Figure 2, the modified outermost surface portion of the insulating layer 16 is designated as modified layer 16A and is indicated by dotted lines. The modified layer 16A is an example of a protective layer according to the present disclosure.

[0022] (3) Base metal layer formation process Next, as shown in FIG. 3, a base metal layer (also called a seed layer) 22 made of, for example, copper is laminated and formed on the pad electrode 12 and the surface of the insulating layer 16 by sputtering or the like.

[0023] (4) Photosensitive resin layer deposition and pattern formation process Thereafter, a photosensitive resin layer (not shown) is applied to the entire surface, and a pattern exposure and development process are performed to open the pattern in the photosensitive resin layer, thereby forming a pattern of a photosensitive resin film 24 on the upper surface of the base metal layer 22 except for above the pad electrode 12, as shown in Figure 4.

[0024] (5) Rewiring formation process Next, copper is electrodeposited by electroplating using the underlying metal layer 22 as one common electrode, and rewiring 20 is formed on the exposed underlying metal layer 22 as shown in FIG.

[0025] (6) Photosensitive resin removal process As shown in FIG. 6, the photosensitive resin film 24 is removed to expose the underlying metal layer 22.

[0026] (7) Removal of exposed underlying metal After the underlying metal layer 22 is exposed, the exposed underlying metal layer 22 is removed by etching, as shown in Fig. 7. As an etching solution for the underlying metal layer 22, for example, an alkaline etching solution can be used, but other types of etching solutions may also be used.

[0027] The insulating layer 16 formed of a low-temperature curing polyimide that cures at a low temperature may have poorer chemical resistance to chemicals such as etching solutions than an insulating layer formed of a high-temperature curing polyimide (high-temperature curing polyimide) that cures at a high temperature. Incidentally, in this embodiment, high temperature means, for example, a temperature higher than 250°C when the semiconductor substrate 14 is a Si substrate.

[0028] In the insulating layer 16 of this embodiment, the surface layer is a modified layer 16A, which is modified to have better chemical resistance than the polyimide inside. Therefore, even if the insulating layer 16 comes into contact with the etching solution that etches the base metal layer 22, problems such as swelling of the insulating layer 16 and dissolution of the polyimide (i.e., deterioration of insulating properties) are suppressed. Furthermore, since the low-temperature curing polyimide is cured at a low temperature in the insulating layer formation process, warping of the semiconductor substrate 14 during heating can be suppressed. Therefore, the reliability of the semiconductor device 10 can be maintained.

[0029] [Second embodiment] Next, a semiconductor device 10 according to a second embodiment of the present disclosure and a method for manufacturing the semiconductor device 10 will be described with reference to FIGS. In the semiconductor device 10 of this embodiment, instead of modifying the surface of the insulating layer 16, a protective film 26 that has better chemical resistance than the low-temperature curing polyimide that constitutes the insulating layer 16 is formed on the surface of the insulating layer 16. The protective film 26 contains, for example, a non-photosensitive polyimide.

[0030] The manufacturing process of the semiconductor device 10 of this embodiment is partially different from that of the first embodiment. Note that the same processes as those of the first embodiment are not shown in the drawings, and the same components as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0031] As shown in FIG. 12, in the semiconductor device 10 of this embodiment, the outermost surface portion of the insulating layer 16 is not modified, but instead a protective film 26 as an example of a protective layer of the present disclosure is formed on the outer surface of the insulating layer 16.

[0032] Each step of manufacturing the semiconductor device 10 of this embodiment will be described below with reference to FIGS.

[0033] (1) Protective film formation process In the manufacturing process of the semiconductor device 10 of this embodiment, a semiconductor substrate preparation step and an insulating layer formation step similar to those of the first embodiment are performed, followed by a protective film formation step. 8, in the protective film forming step, a material that will become the protective film 26 is coated and cured so as to cover the upper surface of the semiconductor substrate 14 on which the insulating layer 16 has been formed. As an example of the material for the protective film 26, non-photosensitive polyimide, which is a chemical-resistant material that has better chemical resistance than the low-temperature curing polyimide of the insulating layer 16, can be used.

[0034] (2) Pattern formation process Next, as shown in FIG. 9, a resist 28 is patterned on the upper surface of the protective film 26 (except for the portion where the opening 18 shown in FIG. 10 is to be formed).

[0035] (3) Etching process The protective film 26 not covered with the resist 28 is removed by etching to expose the pad electrode 12 and obtain the insulating layer 16 whose top and side surfaces are covered with the protective film 26, as shown in FIG.

[0036] (4) Resist removal process As shown in FIG. 11, the resist 28 covering the protective film 26 is removed.

[0037] Thereafter, the same processes as in the first embodiment, such as forming a metal base layer, depositing a photosensitive resin layer, forming a pattern, forming a rewiring, removing the photosensitive resin layer, and removing the exposed metal base, are carried out to obtain the semiconductor device 10 shown in FIG. 12.

[0038] In this embodiment, the outer surface of the insulating layer 16 is covered with a protective film 26 containing a non-photosensitive polyimide, which has better chemical resistance than low-temperature curing polyimide. As a result, as in the first embodiment, when etching the underlying metal layer 22, swelling of the insulating layer 16 and dissolution of the polyimide are suppressed, and the insulating properties of the insulating layer 16 can be maintained.

[0039] In the protective film 26 of this embodiment, non-photosensitive polyimide is used as a chemical-resistant material that has better chemical resistance than low-temperature curing polyimide, but insulating materials other than polyimide may also be used as long as they have better chemical resistance than low-temperature curing polyimide.

[0040] Moreover, the protective film 26 may be formed by adhering a film made of a material with excellent chemical resistance that constitutes the insulating layer 16 to the surface of the insulating layer.

[0041] [Other embodiments] The above describes one embodiment of the present disclosure, but the present disclosure is not limited to the above, and it goes without saying that various modifications can be made to the present disclosure without departing from the spirit of the present disclosure.

[0042] In the insulating layer 16, the portions that come into contact with the etching solution that etches the underlying metal layer 22 must be modified or covered with a protective film 26, but the portions that do not come into contact with the etching solution do not need to be modified or covered with a protective film 26.

[0043] 7, the surface layer of the insulating layer 16 in contact with the base metal layer 22 formed on the side surface of the rewiring 20 (the side surface on the base metal layer 22 side) does not need to be modified because it is not in contact with the etching solution. In other words, it is sufficient to modify at least the portion of the insulating layer 16 that comes into contact with the etching solution.

[0044] 12, the surface of the insulating layer 16 facing the base metal layer 22 formed on the side surface of the redistribution wiring 20 is not in contact with the etching solution, and therefore does not need to be covered with the protective film 26. In other words, the insulating layer 16 only needs to be provided with the protective film 26 at least in the area that comes into contact with the etching solution.

[0045] In the above embodiment, the insulating layer 16 and the protective film 26 contain polyimide, but the insulating layer 16 and the protective film 26 may be formed of an insulating material that does not contain polyimide.

[0046] In the above embodiment, the underlying metal layer 22 and the rewiring 20 are made of Cu, but the underlying metal layer 22 and the rewiring 20 may be made of a metal material (conductive material) other than Cu. Furthermore, the semiconductor device 10 may have a configuration other than the WL-CSP. [Explanation of symbols]

[0047] 10 Semiconductor device 14 Semiconductor substrate 16 Insulating layer 16A Modified layer (protective layer) 20 Rewiring 22 Undercoat metal layer 26 Protective film (protective layer)

Claims

1. an insulating layer laminating step of laminating an insulating layer made of an insulating material on a semiconductor substrate; a protective layer forming step of forming a protective layer having chemical resistance to an etching solution on a surface of the insulating layer; a base metal layer lamination step of laminating a base metal layer on the insulating layer; a rewiring forming step of forming rewiring on the base metal layer; a base metal layer removing step of removing the exposed base metal layer using the etching solution; having A method for manufacturing a semiconductor device.

2. The insulating material includes a low-temperature curing polyimide. The method for manufacturing a semiconductor device according to claim 1 .

3. In the protective layer forming step, the protective layer is formed by modifying the insulating material by plasma treatment.

3. The method for manufacturing a semiconductor device according to claim 1.

4. In the protective layer forming step, a film made of a chemical-resistant material having a higher chemical resistance to the etching solution than the insulating material is formed as the protective layer on the surface of the insulating material. The method for manufacturing a semiconductor device according to claim 1 .

5. a semiconductor substrate; an insulating layer made of an insulating material formed on the semiconductor substrate; a protective layer formed on a surface of the insulating layer and having higher chemical resistance to an etching solution than the insulating material; a base metal layer provided on the insulating layer via the protective layer; rewiring formed on the underlying metal layer; having Semiconductor device.

6. The insulating material is a low-temperature curing polyimide. The semiconductor device according to claim 5 .

7. The protective layer is a modified layer obtained by modifying the insulating material.

7. The semiconductor device according to claim 5.

8. the protective layer is a film formed of a chemical-resistant material having chemical resistance higher than that of the insulating material; 7. The semiconductor device according to claim 5.

9. the protective layer comprises a non-photosensitive polyimide; The semiconductor device according to claim 8 .

Citation Information

Patent Citations

  • Semiconductor device and method of manufacturing the same

    JP2018006391A