Semiconductor device and manufacturing method thereof

Abstract

To provide a semiconductor device capable of increasing reliability in connecting a semiconductor element sealed in a semiconductor package to an external circuit or the like.SOLUTION: A semiconductor device 1 includes a plurality of wiring members 3, and a semiconductor package 5 arranged on the wiring members 3, and sealing a semiconductor element 50 with a first sealing member 80. The semiconductor package 5 has a connector 30 having one end positioned on the semiconductor element 50, and jointed to an electrode of the semiconductor element 50. The other end of the connector 30 is positioned immediately above the wiring member 3.SELECTED DRAWING: Figure 1B

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] Conventionally, various methods have been considered for mounting a semiconductor package in which a semiconductor element is sealed to an external circuit, etc. For example, Patent Document 1 describes a semiconductor package in which the cross section of the bonding wire is exposed on the side. An external substrate is provided with a conductive rubber member that presses the semiconductor package from the side, and is responsible for fixing and electrically connecting (hereinafter sometimes simply referred to as "connection") the semiconductor package. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-124341 Summary of the Invention [Problem to be solved by the invention]

[0004] The semiconductor package of Patent Document 1 has a bonding wire, one end of which is bonded to a semiconductor element, with the cross section exposed on the side of the semiconductor package to serve as a terminal, which reduces the number of components between the semiconductor element and the side of the semiconductor package and is expected to improve the reliability of connections within the semiconductor package. However, there are cases where further improvement in the reliability of connections to external circuits, etc. is required. The present invention has been made to solve the above problems, and aims to provide a semiconductor device that improves the reliability of connections from a semiconductor element sealed in a semiconductor package to external circuits, etc. [Means for solving the problem]

[0005] In order to solve such problems, the semiconductor device of the present invention comprises a plurality of wiring members and a semiconductor package arranged on the wiring members and sealing a semiconductor element with a first sealing member, wherein the semiconductor package has a connector, one end of which is located on the semiconductor element and is joined to an electrode of the semiconductor element, and the other end of the connector is located directly above the wiring members. [Effects of the Invention]

[0006] According to the present invention, it is possible to provide a semiconductor device that improves the reliability of the connection from a semiconductor element sealed in a semiconductor package to an external circuit or the like. [Brief explanation of the drawings]

[0007] [Figure 1A] 1 is a perspective view illustrating an outline of a semiconductor device according to a first embodiment; [Figure 1B] 1B is a perspective view illustrating the sealing member in FIG. 1A in a see-through manner. FIG. [Figure 2A] 1 is a perspective view illustrating an outline of a semiconductor package according to a first embodiment; [Figure 2B] FIG. 2B is a perspective view seen from the bottom side in FIG. 2A. [Figure 2C] 2B is a perspective view illustrating the sealing member in FIG. 2A. FIG. [Figure 3A] 1 is a plan view illustrating an outline of a portion of a semiconductor device according to a first embodiment. [Figure 3B] FIG. 2 is a bottom view illustrating an outline of a part of the semiconductor device according to the first embodiment. [Figure 3C] 1 is a plan view illustrating an outline of a portion of a semiconductor device according to a first embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 3A. [Figure 5] 1 is a flowchart illustrating an outline of a manufacturing method according to a first embodiment. [Figure 6A] 4 is a perspective view illustrating an outline of a first metal plate and a wiring metal plate in a semiconductor package formation step in the manufacturing method according to the first embodiment. FIG. [Figure 6B] 1 is a perspective view illustrating an outline of a state in which a semiconductor element, a control IC, and a capacitor are arranged in a semiconductor package formation step in the manufacturing method according to the first embodiment. FIG. [Figure 6C] 10 is a perspective view illustrating an outline of a state in which connectors are arranged in a semiconductor package forming step in the manufacturing method according to the first embodiment. FIG. [Figure 6D] 10 is a perspective view illustrating an outline of a state in which sealing is performed with a first sealing member in a semiconductor package formation step in the manufacturing method according to the first embodiment. FIG. [Figure 7A] 3 is a perspective view illustrating an outline of a wiring member prepared in the manufacturing method of the first embodiment. FIG. [Figure 7B] 3 is a perspective view illustrating an outline of a state in which a semiconductor package is arranged in the manufacturing method of the first embodiment. FIG. [Figure 7C] 4 is a perspective view illustrating an outline of a state where sealing is performed with a second sealing member in the manufacturing method of the first embodiment. FIG. [Figure 8] FIG. 10 is a cross-sectional view illustrating an outline of a portion of a semiconductor device according to a second embodiment. [Figure 9A] FIG. 10 is a perspective view illustrating an outline of a state in which a second metal plate and a connector are arranged in a semiconductor package formation step in the manufacturing method according to the second embodiment. [Figure 9B] FIG. 10 is a perspective view illustrating an outline of a state in which sealing is performed with a first sealing member in a semiconductor package formation step in the manufacturing method according to the second embodiment. [Figure 9C] FIG. 10 is a perspective view illustrating an outline of a state where sealing is performed with a second sealing member in a manufacturing method according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] The present invention will be described with reference to the drawings. Note that the present invention is not limited to these embodiments. In addition, in the drawings, some components may be omitted, and the size, shape, and positional relationship of each component may be exaggerated.

[0009] [Semiconductor device (first embodiment)] A semiconductor device 1 according to a first embodiment will be described with reference to FIGS. 1A to 4. The semiconductor device 1 is, for example, a bridge rectifier having a function similar to that of a known bridge diode, and can be used to obtain direct current by full-wave rectifying alternating current. As illustrated in FIG. 1A, the semiconductor device 1 is sealed with a second sealing member 7 and can be connected to the outside via a total of four connection pins 9, two for AC input and two for DC output. 1B, the semiconductor device 1 includes a plurality of wiring members 3 and a semiconductor package 5. The semiconductor device 1 can include a plurality of semiconductor packages 5, and here includes four semiconductor packages 5. The semiconductor device 1 also includes a second sealing member 7. Each component of the semiconductor device 1 will be described below.

[0010] (wiring components) The wiring member 3 is a member that connects the built-in electronic components to an external circuit or the like. Here, the wiring member 3 is a lead frame, and the built-in electronic components are semiconductor packages 5. The semiconductor device 1 includes a plurality of wiring members 3 that are separated from one another. Here, the number of wiring members 3 is four. One end side of each of the plurality of wiring members 3 is formed into a predetermined shape. Furthermore, the upper surfaces of the one end sides of the plurality of wiring members 3 are on the same plane. The semiconductor package 5 is placed on these one end side wiring members 3. This makes it easy to place the semiconductor package 5 on the wiring members 3. Note that the upper surface is the surface on the upper side in FIG. 1B.

[0011] The other ends of the multiple wiring members 3 are arranged parallel to one another at predetermined intervals and form connection pins 9. Here, the wiring member 3 is bent in a stepped manner from one end to the other end toward the side where the semiconductor package 5 is placed, i.e., upward in FIG. 1B. The other end of the wiring member 3 extends linearly at a position higher than the top surface of the one end. The material of the wiring member 3 can be a metal such as gold, silver, copper, or an alloy containing these, and copper is used here. The shape of one end of the wiring member 3 and the spacing between the other ends can vary depending on the application.

[0012] (Semiconductor package) The semiconductor package 5 is an electronic component in which a semiconductor element is sealed. The semiconductor package 5 is disposed on a wiring member 3, and the semiconductor element 50 is sealed with a first sealing member 80. The semiconductor package 5 has, on one side thereof, a plurality of terminals 40 whose bonding surface is exposed from the first sealing member 80, and is disposed so as to bridge between different wiring members 3. 2A and 2B, the semiconductor package 5 here has a rectangular parallelepiped shape and has two terminals 40 on one side. The terminals 40 have a bonding surface 40A exposed from the first sealing member 80. The semiconductor package 5 is a rectifying element that can determine the high / low relationship of the voltages of the two terminals 40 and switch between a conductive state and a non-conductive state. Note that the shape of the semiconductor package 5 is not limited to a rectangular parallelepiped shape.

[0013] 2B and 2C, the semiconductor package 5 has a semiconductor element 50, a first metal plate 21, connectors 30, and terminals 40. Here, the semiconductor package 5 also has a control IC 60 and a capacitor 70. These elements and members of the semiconductor package 5 are sealed with a first sealing member 80. The control IC 60 and the capacitor 70 are disposed on the wiring metal plate 23 and connected to the semiconductor element 50. The wiring metal plate 23 is a member that has a plurality of metal pieces in a predetermined pattern and forms wiring inside the semiconductor package 5. The wiring metal plate 23 can be made of the same material as the wiring member 3. Note that in the drawings, the pattern of the wiring metal plate 23 and the wiring inside the semiconductor package 5 are partially omitted.

[0014] (Terminal) The terminal 40 is a member or a part of a member that serves as an entrance / exit on the semiconductor package 5 side for connection to an external circuit or the like. In this case, the external circuit or the like to be connected is the wiring member 3. The outer surface of the terminal 40 serves as a bonding surface 40A to be bonded to the wiring member 3, and the bonding surface 40A is exposed from the first sealing member 80.

[0015] (semiconductor element) The semiconductor element 50 is a circuit element formed on a semiconductor substrate. In this example, the semiconductor element 50 is a MOSFET that can switch between a conductive state and a non-conductive state depending on the gate voltage. The gate voltage is controlled by a control IC 60 to either a high level or a low level based on the voltage relationship between the two terminals 40. The operating power supply voltage of the control IC 60 is maintained by a capacitor 70. The semiconductor element 50 has a first electrode 51 on a first surface 50A, which is the surface on the wiring member 3 side of the semiconductor device 1, and a second electrode 52 on a second surface 50B, which is the surface opposite to the wiring member 3. The semiconductor element 50 performs switching between the first electrode 51 and the second electrode 52. The first surface 50A is the surface facing the surface of the semiconductor package 5 having the terminals 40, and the second surface 50B is the surface opposite to the first surface 50A.

[0016] (First metal plate) The first metal plate 21 is a member that becomes the terminal 40 of the semiconductor package 5. The semiconductor package 5 has the first metal plate 21, which is bonded to face the first electrode 51 of the semiconductor element 50, as one of the terminals 40. As illustrated in FIG. 3A , the first metal plate 21 has a rectangular shape that is slightly larger than the semiconductor element 50 in a plan view and is a flat plate with a constant thickness. One surface of the first metal plate 21 is bonded to face the first electrode 51 of the semiconductor element 50, and the other surface is exposed from the first sealing member 80 as a bonding surface 40A of the terminal 40 and is bonded to face the wiring member 3. The first metal plate 21 is located directly above the wiring member 3. The first electrode 51 of the semiconductor element 50 is located directly above the wiring member 3 via the first metal plate 21. 4, the first metal plate 21 is bonded to each of the first electrode 51 and the wiring member 3 via a bonding member 90. The bonding member 90 is, for example, solder. The first metal plate 21 can be made of the same material as the wiring member 3.

[0017] (connector) The connector 30 is a member that relays the connection between the semiconductor element 50 and other members. As illustrated in Figures 3A and 3B, one end of the connector 30 is located on the semiconductor element 50. The connector 30 is joined to an electrode of the semiconductor element 50, and the other end is located directly above the wiring member 3. As illustrated in FIGS. 2C and 4, the connector 30 is a clip 31 having one end 31A positioned on the semiconductor element 50 and bonded to the second electrode 52. The clip 31 has a shape similar to a bent plate-like member. The clip 31 extends in a direction away from the semiconductor element 50 at the height of a second surface 50B, which is the upper surface of the semiconductor element 50 in FIG. 4, and is bent downward in a stepped manner. The lower surface of the other end 31B of the clip 31 is at the same height as the lower surface of the first metal plate 21. This allows the lower surfaces of the first metal plate 21 and the other end 31B of the clip 31 to face parallel to the upper surfaces of different wiring members 3 that are on the same plane. Note that the second sealing member 7 is omitted from FIGS. 3A to 3C and 4.

[0018] In the semiconductor package 5, the other end 31B of the clip 31 bonded to the second electrode 52 serves as another one of the terminals 40. The outer surface of the semiconductor package 5 at the other end 31B of the clip 31, i.e., the lower surface, is a bonding surface 40A exposed from the first sealing member 80 and is bonded to face the wiring member 3. The clip 31 can be in surface contact with the wiring member 3 to widen the bonding surface. This reduces the resistance value, increases the allowable current, and improves the reliability of the connection. 4, the clip 31 is joined to each of the second electrode 52 and the wiring member 3 via a joining member 90. The clip 31 can be made of the same material as the wiring member 3.

[0019] (First sealing member) The first sealing member 80 is a member that integrally seals elements and the like that constitute the semiconductor package 5. The first sealing member 80 forms the outer surface of the semiconductor package 5, with the bonding surfaces 40A of the terminals 40 exposed. The first sealing member 80 is filled inside the semiconductor package 5 to provide a solid seal, thereby fixing the relative positions of the semiconductor element 50, control IC 60, capacitor 70, first metal plate 21, wiring metal plate 23, and clip 31. The material of the first sealing member 80 can be, for example, a thermosetting epoxy resin.

[0020] The surface of the semiconductor package 5 having two terminals 40 faces the wiring member 3, and the bonding surfaces 40A of the terminals 40 are bonded to the upper surface of the wiring member 3. As illustrated in Fig. 4, both ends of the semiconductor package 5 are bonded to two different wiring members 3, respectively. In this way, the semiconductor package 5 is located above the wiring members 3 and is arranged so as to bridge the wiring members 3 that are spaced apart from each other.

[0021] (Second sealing member) The semiconductor device 1 may further include a second sealing member 7. The second sealing member 7 is a member that seals the wiring member 3 and the semiconductor package 5 together. Here, the second sealing member 7 seals one end side of the wiring member 3 and the semiconductor package 5. The other end sides of the wiring members 3 are exposed from the second sealing member 7 and are arranged at a predetermined interval. The second sealing member 7 is filled so as to contact the first sealing member 80 of the semiconductor package 5 and the wiring member 3, thereby providing a solid seal. This makes it possible to fix the relative positional relationship between the semiconductor package 5 and the wiring member 3. The second sealing member 7 can be made of the same material as the first sealing member 80.

[0022] The first sealing member 80 does not seal the wiring member 3. The first sealing member 80 and the wiring member 3 may be in contact with each other or may be spaced apart from each other. The first sealing member 80 and the second sealing member 7 are in contact with each other and have a boundary surface at the position of the outer surface of the semiconductor package 5. In addition, the arrangement to bridge different wiring members 3 may be such that the wiring members 3 to which the semiconductor packages 5 are bonded are adjacent to each other, as exemplified in Fig. 3B, or such that another wiring member 3 is present between the bonded wiring members 3, as exemplified in Fig. 3C. In either case, the bonding surface 40A is included in the wiring member 3 in plan view.

[0023] In the semiconductor device 1 having the above configuration, the semiconductor package 5 has a connector 30, one end of which is located on the semiconductor element 50 and is joined to an electrode of the semiconductor element 50, and the other end of the connector 30 is located directly above the wiring member 3, thereby reducing the number of components and the number of joints from the semiconductor element 50 to the position directly above the wiring member 3. Furthermore, the cross-sectional area from the position directly above the wiring member 3 to the wiring member 3 can be increased for connection with the wiring member 3, thereby improving the reliability of connection from the semiconductor element to an external circuit or the like. The semiconductor device 1 has a semiconductor package 5 having a plurality of terminals 40 on one side that expose the bonding surface 40A from the first sealing member 80, and is arranged to bridge between different wiring members 3, thereby improving the freedom of arrangement (layout) of elements and members inside the semiconductor device.

[0024] The semiconductor device 1 includes a semiconductor package 5 in which the semiconductor element 50 and the connector 30 are sealed with a first sealing member 80, thereby fixing the relative positional relationship between the semiconductor element 50 and the connector 30 and improving the reliability of the connection. The semiconductor device 1 has a clip 31 as a connector 30, one end of which is located on the semiconductor element 50 and is joined to an electrode of the semiconductor element 50, and the other end of which is a terminal of the semiconductor package 5, thereby reducing the number of components and the number of joints from the semiconductor element 50 to the wiring member 3 and further improving reliability.

[0025] In the past, a member such as clip 31 was provided outside the semiconductor package, with one end of the clip attached to a terminal on the top surface of the semiconductor package and the other end attached to a wiring member at the same height as the bottom surface of the semiconductor package. In this case, the clip became large, making the semiconductor device larger and imposing significant limitations on layout. In semiconductor device 1, by including clip 31 in semiconductor package 5, layout freedom is improved and the semiconductor device can be made smaller.

[0026] Furthermore, the semiconductor package is formed to a height that allows it to encapsulate other elements that are thicker than the semiconductor element 50, such as the capacitor 70. Therefore, when providing a terminal on the top surface of the semiconductor package, a separate member is required to connect the terminal to the second electrode 52 of the semiconductor element 50. In the semiconductor device 1, the semiconductor package 5 has the clip 31, which eliminates the need for a terminal on the top surface of the semiconductor package, thereby enabling reduction in members and miniaturization. In the semiconductor device 1, the semiconductor package 5 has multiple terminals on one side that expose the bonding surface from the first sealing member 80, and is arranged to bridge between different wiring members 3, so that the semiconductor package 5 can be bonded to the wiring member 3 below itself, thereby reducing the layout area.

[0027] [Method for manufacturing semiconductor device (first embodiment)] Next, a method S1 for manufacturing a semiconductor device according to the first embodiment will be described with reference to Figures 5 to 7C. As illustrated in Figure 5, the method S1 for manufacturing a semiconductor device includes a wiring member preparation step S10, a semiconductor package formation step S21, and an arrangement step S30, and further includes a sealing step S40. Each component of the method S1 for manufacturing a semiconductor device will be described below. The wiring member preparing step S10 and the semiconductor package forming step S21 can be performed in parallel and independently, and may be performed before the placement step S30. The semiconductor package forming step S21 and the wiring member preparing step S10 will be described below in that order.

[0028] (Semiconductor package formation process) The semiconductor package forming process S21 is a process of sealing the semiconductor element 50 with a first sealing member 80 to form a semiconductor package 5 to be placed on the wiring member 3. In the semiconductor package forming process S21, the semiconductor element 50 having a first electrode 51 and a second electrode 52 on opposite surfaces is sealed with the first sealing member 80 to form a semiconductor package 5 having a plurality of terminals 40 on one side, with bonding surfaces 40A exposed from the first sealing member 80. The semiconductor package 5 has a first metal plate 21 bonded to the first electrode 51 and a connector 30 having one end located on the semiconductor element 50 and bonded to the second electrode 52, and the other ends of the first metal plate 21 and the connector 30 are terminals 40. In this case, the connector 30 is a clip 31. The semiconductor package forming step S21 includes a metal plate preparing step, an element arranging step, and an element sealing step.

[0029] The metal plate preparation step is a step of preparing a first metal plate 21 and a wiring metal plate 23. FIG. 6A illustrates an example of the first metal plate 21 and wiring metal plate 23 included in one semiconductor package 5. This will be described as a set of metal plates. The wiring metal plate 23 is made up of multiple metal pieces that are separated from each other. In the metal plate preparation step, the first metal plate 21 and the wiring metal plate 23 are prepared in a state in which the relative positional relationship of the set of metal plates is fixed. For example, the metal plate preparation step may involve extending a portion of each metal piece of the first metal plate 21 and the wiring metal plate 23 to form an extended portion, and then interconnecting the extended portions to prepare an integrated metal plate connected body. The metal plate connected body may connect multiple sets of metal plates. Then, after the element encapsulation step, a package singulation step may be provided in which the extended portions exposed from the first encapsulation member 80 are cut to individualize the semiconductor packages 5.

[0030] The element placement step is a step of placing the semiconductor element 50, the control IC 60, and the capacitor 70 on the prepared first metal plate 21 and wiring metal plate 23, and further placing the clip 31. As illustrated in FIG. 6B , the semiconductor element 50 is placed on the first metal plate 21 with the first surface 50A having the first electrode 51 facing the first metal plate 21. Before placing the semiconductor element 50, a bonding material paste is applied to the first metal plate 21. The bonding material paste is, for example, cream solder. The bonding material paste is also applied to the wiring metal plate 23, and the control IC 60 and capacitor 70 are then placed on the wiring metal plate 23.

[0031] Next, a pasty bonding material is applied to second electrode 52 on second surface 50B of semiconductor element 50, which is the upper surface in Fig. 6B. Then, as illustrated in Fig. 6C, clip 31 is placed so that one end 31A is positioned on second surface 50B and faces second electrode 52. Next, the pasty joining material is melted by a reflow method to join the first metal plate 21 and the clip 31 to the semiconductor element 50, and to join the wiring metal plate 23 to the control IC 60 and the capacitor 70.

[0032] The element sealing process is a process of sealing the first metal plate 21, wiring metal plate 23, semiconductor element 50, control IC 60, capacitor 70, and clip 31 with a first sealing member 80. In the element sealing process, the first sealing member 80 before hardening is melted to cover the first metal plate 21 and other components joined in the element placement process, and then molded in a rectangular parallelepiped mold or the like and hardened. Note that the extended portions of the metal plate connection are sealed while being exposed. The lower surface of the first metal plate 21 and the lower surface of the other end 31B of the clip 31 are surfaces to be bonded to terminals of the semiconductor package 5, and are exposed from the first sealing member 80. The lower surface is the lower surface in FIG. 6C.

[0033] In the metal plate connected body, an extended portion is exposed from the hardened first sealing member 80, and a package singulation step is performed in which this extended portion is cut off. Then, as illustrated in FIG. 6D, a semiconductor package 5 having a rectangular parallelepiped outer shape is obtained, and the semiconductor package formation step S21 is completed. The semiconductor package 5 has two electrodes on its underside, with the electrode bonding surfaces exposed.

[0034] (Wiring material preparation process) The wiring member preparation step S10 is a step of fixing and preparing a plurality of wiring members 3. FIG. 7A illustrates a plurality of wiring members 3 included in the semiconductor device 1. Here, the plurality of wiring members 3 are four lead frames that are separated from one another. This will be described as one set of wiring members 3. The wiring member preparation step S10 prepares the wiring members 3 in a state in which the relative positional relationship of the set of wiring members 3 is fixed. For example, the other end side 3B of the wiring member 3 can be extended to form an extended portion, and the extended portions can be connected to each other to prepare an integrated wiring member linked body. The wiring member linked body may be formed by connecting multiple sets of wiring members 3. When preparing the wiring member linked body, the arrangement step S30 is performed on the wiring member linked body, and after the sealing step S40, a singulation step is provided in which the wiring member linked body is cut at positions that will become the ends of the wiring members 3 to separate the semiconductor devices 1. Note that there may be other connected portions in addition to the other end side 3B of the extending wiring members 3, and these portions can also be cut in the singulation step.

[0035] (Placement process) The placement step S30 is a step of placing the semiconductor package 5 on the wiring member 3. In the placement step S30, the semiconductor package 5 is placed on one end side 3A of the wiring member 3 so that the surface having the terminals of the semiconductor package 5 faces the wiring member 3 and bridges between different wiring members 3. 7B, four semiconductor packages 5 are placed on the upper surface of the wiring member 3 with the surfaces having terminals facing the wiring member 3. Before placing the semiconductor packages 5, a bonding material paste is applied to the upper surface of the wiring member 3. Then, the bonding material paste is melted by a reflow method to bond the wiring member 3 and the semiconductor packages 5.

[0036] (Sealing process) The sealing step S40 is a step of sealing one end side 3A of the wiring member 3 and the semiconductor package 5 with a second sealing member 7. In the sealing step S40, the second sealing member 7 before hardening is melted to cover one end side 3A of the wiring member 3 and the semiconductor package 5 joined in the placement step S30, and then molded in a mold or the like of a predetermined shape and hardened. The other end 3B of the wiring member 3 is exposed from the hardened second sealing member 7. When a wiring member connected body is prepared, the other end 3B is extended and connected. In this case, a singulation process is performed in which the other end 3B is cut to a predetermined length. If there are other connected portions, they are also cut. Note that FIG. 7C illustrates the semiconductor device 1 after singulation.

[0037] The manufacturing method S1 for a semiconductor device having the above configuration forms a semiconductor package 5 having a plurality of terminals on one side, and positions the semiconductor package 5 so that the side having the terminals faces the wiring member 3 and bridges between different wiring members 3, thereby enabling smooth bonding of the semiconductor package 5 to lead frames spaced apart by a reflow method. Even when the semiconductor package 5 has two terminals 40, smooth bonding to the spaced apart wiring member 3 can be achieved, improving the reliability of the connection. Furthermore, by using the clip 31, one end of which is positioned on the semiconductor element 50 and the other end of which is joined facing the second electrode 52, as a terminal, the number of components and the number of times of joining can be reduced to form the terminal, thereby improving the reliability of the connection.

[0038] As mentioned above, conventionally, a member such as the clip 31 has sometimes been provided outside the semiconductor package. In this case, there has been a problem in that misalignment is likely to occur when the wiring member, the semiconductor package, and one end of the clip are stacked in this order and joined by a reflow method. In the semiconductor device manufacturing method S1, by providing the clip 31 in the semiconductor package 5, the relative positional relationship between the semiconductor element 50 and the clip 31 is fixed, preventing misalignment and improving the reliability of the connection.

[0039] [Semiconductor device (second embodiment)] Next, a semiconductor device 2 according to a second embodiment will be described with reference to Figures 8 to 9C. The semiconductor device 2 differs from the semiconductor device 1 of the first embodiment in that it includes a semiconductor package 6 instead of the semiconductor package 5, but is otherwise the same. Therefore, the semiconductor package 6 will be described. As shown in Fig. 8, the connectors 30 of the semiconductor package 6 are not clips but bonding wires 32. The semiconductor package 6 also has a second metal plate 22 as another one of the terminals 40. The other points are the same as those of the semiconductor package 5. Note that the second sealing member 7 is not shown in Fig. 8.

[0040] (Bonding wire) The bonding wire 32 is a connector 30 in the semiconductor package 6. One end 32A of the bonding wire 32 is located on the semiconductor element 50 and is bonded to the second electrode 52. The other end 32B of the bonding wire 32 is bonded to the second metal plate 22. The other end 32B is located directly above the wiring member 3. The bonding wire 32 may be any known bonding wire used for connections in the semiconductor industry.

[0041] (Second metal plate) The second metal plate 22 is a member that becomes the terminal 40 of the semiconductor package 6. Here, the second metal plate 22 is rectangular in plan view and is a flat plate with a constant thickness. A bonding wire 32 is bonded to one surface of the second metal plate 22, which is the top surface in FIG. 8. The other surface is the outer surface of the semiconductor package 6, is exposed from the first sealing member 80 as a bonding surface 40A of the terminal 40, and is bonded to face the wiring member 3. The second metal plate 22 is located directly above the wiring member 3. The other end 32B of the bonding wire 32 is located directly above the wiring member 3 via the second metal plate 22. The lower surface of the second metal plate 22 is at the same height as the lower surface of the first metal plate 21. This allows the lower surfaces of the first metal plate 21 and the second metal plate 22 to face parallel to the upper surfaces of different wiring members 3 that are on the same plane.

[0042] The shape, thickness, and placement position of second metal plate 22 can be adjusted to match the shape and placement of wiring member 3. Furthermore, by adjusting the shape and position of second metal plate 22 so that semiconductor package 6 is small, and adjusting the shape, etc. of wiring member 3 to match semiconductor package 6, it is possible to reduce the size of semiconductor device 2. The second metal plate 22 is joined to the wiring member 3 via a joining member 90. The second metal plate can be made of the same material as the wiring member 3.

[0043] In the semiconductor device 2, the semiconductor package 6 has the second metal plate 22 as another one of the terminals, and the bonding wire 32 has one end located on the semiconductor element 50 and joined to an electrode of the semiconductor element 50, and the other end joined to the second metal plate as the connector 30, thereby improving reliability as in the first embodiment while increasing the degree of freedom in the arrangement of the terminals and enabling flexible response to the shape and arrangement of the wiring member 3. Furthermore, it becomes possible to further miniaturize the semiconductor package 6, and by adjusting the shape and arrangement of the wiring member 3, the size of the semiconductor device can be reduced. Furthermore, by using the second metal plate 22 as the terminal 40 in the semiconductor package 6, even when the connector 30 is a bonding wire 32, it is possible to bond the second metal plate 22 to the wiring member 3 over a wide area, thereby improving the reliability of the connection with the wiring member 3. Inside, the bonding wire 32 and the second metal plate 22 are fixed and protected by the first sealing member 80. This allows the semiconductor device 2 to improve the reliability of the connection while increasing the degree of freedom in arranging the terminals of the semiconductor package.

[0044] [Method for manufacturing semiconductor device (second embodiment)] Next, a semiconductor device manufacturing method S2 according to the second embodiment will be described with reference to Figures 5 and 9A to 9C. The semiconductor device manufacturing method S2 differs from the semiconductor device manufacturing method S1 of the first embodiment in that it includes a semiconductor package forming step S22 instead of the semiconductor package forming step S21, but is otherwise the same. Therefore, the semiconductor package forming step S22 will be described. As in the first embodiment, the wiring member preparing step S10 and the semiconductor package forming step S22 can be performed independently in parallel, and may be performed before the placement step S30. As in the first embodiment, the semiconductor package formation process S22 seals a semiconductor element 50 having a first electrode 51 and a second electrode 52 on opposite sides with a first sealing member 80 to form a semiconductor package 6 having a plurality of terminals 40 on one side, with bonding surfaces 40A exposed from the first sealing member 80.

[0045] The semiconductor package 6 to be formed has a first metal plate 21 bonded to face the first electrode 51, a connector 30 having one end located on the semiconductor element 50 and bonded to the second electrode 52, and a second metal plate 22 to which the other end of the connector 30 is bonded, and the first metal plate 21 and the second metal plate 22 are defined as terminals 40. In this case, the connector 30 is a bonding wire 32. The semiconductor package forming process S22 of the second embodiment includes a metal plate preparation process, an element placement process, an element encapsulation process, and may also include a package singulation process, similar to the first embodiment. Of these, the metal plate preparation process, the element placement process, and the element encapsulation process are different from those of the first embodiment, but the rest are common.

[0046] 9A, in the metal plate preparation step of the second embodiment, a second metal plate 22 is prepared in addition to a first metal plate 21 and a wiring metal plate 23. Here, the second metal plate 22 is disposed at the position of the other end of the clip in the semiconductor package 5 of the first embodiment. The second metal plate 22 may be disposed at a position different from the other end of the clip. The second metal plate 22 can also be partially extended to form an extended portion, and the extended portion can be connected to the first metal plate 21 and the wiring metal plate 23 to form a metal plate assembly. The first metal plate 21 and the wiring metal plate 23 are prepared in the same manner as in the first embodiment.

[0047] 9B, the element placement process of the second embodiment is the same as that of the first embodiment except that bonding wires 32 are placed instead of clips. One end of the bonding wires 32 is bonded to the second electrodes 52 of the semiconductor element 50. The other end is bonded to the upper surface of the second metal plate 22. As in the first embodiment, the first metal plate 21 and the semiconductor element 50 are bonded by a reflow method, and the wiring metal plate 23 is bonded to the control IC 60 and the capacitor 70. In the element sealing step of the second embodiment, the lower surface of the second metal plate 22 is exposed from the first sealing member 80, instead of the lower surface of the other end of the clip. The other points are the same as in the first embodiment.

[0048] Then, as illustrated in Figure 9C, the formed semiconductor package 6 is placed on the wiring member 3, and one end side of the wiring member 3 and the semiconductor package 6 are sealed with a second sealing member 7 to form the semiconductor device 2 of the second embodiment.

[0049] In the semiconductor device manufacturing method S2, the position of the second metal plate 22 can be changed in the semiconductor package forming step S22, and therefore it is possible to easily accommodate changes in the shape and arrangement of the wiring member 3.

[0050] The semiconductor device is not limited to a bridge rectifier, and the semiconductor package does not have to be a rectifying element. The semiconductor device may have only one semiconductor package instead of multiple ones. The semiconductor package may have three or more terminals and may have both clips and bonding wires. The wiring member may be provided on an insulating substrate. In this case, the second sealing member can be omitted. Instead of sealing with the second sealing member, one end of the wiring member and the semiconductor package may be sealed in a hollow space using an insulating substrate and a cap-shaped member or the like. [Explanation of symbols]

[0051] 1. Semiconductor device (first embodiment) 2. Semiconductor Device (Second Embodiment) 3 Wiring materials 5 Semiconductor package (first embodiment) 6 Semiconductor package (second embodiment) 7 Second sealing member 9 connecting pins 21 First metal plate 22 Second metal plate 23 Wiring metal plate 30 Connectors 31 clips 32 Bonding Wire 40 terminals 50 Semiconductor elements 51 First electrode 52 Second electrode 60 Control IC 70 Capacitor 80 First sealing member 90 Joint materials

Claims

1. A plurality of wiring members; a semiconductor package disposed on the wiring member and sealing a semiconductor element with a first sealing member, the semiconductor package has a connector, one end of which is located on the semiconductor element and is joined to an electrode of the semiconductor element; The other end of the connector is located directly above the wiring member.

2. The semiconductor device according to claim 1 , wherein the semiconductor package has a plurality of terminals on one side thereof, the terminals having bonding surfaces exposed from the first sealing member, and the terminals are arranged so as to bridge between the different wiring members.

3. the semiconductor element has a first electrode on a surface facing the wiring member, The semiconductor device according to claim 2 , wherein the semiconductor package has a first metal plate joined to face the first electrode as one of the terminals.

4. the semiconductor element has a second electrode on a surface opposite to the wiring member, 4. The semiconductor device according to claim 3, wherein the other end of the connector joined to the second electrode is another one of the terminals of the semiconductor package.

5. the semiconductor element has a second electrode on a surface opposite to the wiring member, the semiconductor package has a second metal plate as another one of the terminals; The semiconductor device according to claim 3 , wherein the other end of the connector is joined to the second metal plate.

6. a second sealing member that seals one end of the wiring member and the semiconductor package; the semiconductor package is disposed on one end side of the wiring member, The semiconductor device according to claim 1 , wherein the other ends of the wiring members are exposed from the second sealing member and are arranged at predetermined intervals.

7. The semiconductor device according to claim 6 , comprising a plurality of the semiconductor packages.

8. a wiring member preparation step of fixing and preparing a plurality of wiring members; a semiconductor package forming step of sealing a semiconductor element having a first electrode and a second electrode on opposite surfaces with a first sealing member to form a semiconductor package having a plurality of terminals on one surface thereof, the bonding surface of which is exposed from the first sealing member; and a placement step of placing the semiconductor package on one end side of the wiring member so that the surface having the terminals faces the wiring member and bridges between different wiring members, A method for manufacturing a semiconductor device, wherein the semiconductor package has a first metal plate joined facing the first electrode and a connector whose one end is positioned on the semiconductor element and joined facing the second electrode, and the other ends of the first metal plate and the connector serve as the terminals.

9. a wiring member preparation step of fixing and preparing a plurality of wiring members; a semiconductor package forming step of sealing a semiconductor element having a first electrode and a second electrode on opposite surfaces with a first sealing member to form a semiconductor package having a plurality of terminals on one surface thereof, the bonding surface of which is exposed from the first sealing member; and a placement step of placing the semiconductor package on one end side of the wiring member so that the surface having the terminals faces the wiring member and bridges between different wiring members, The semiconductor package has a first metal plate joined facing the first electrode, a connector having one end located on the semiconductor element and joined to the second electrode, and a second metal plate to which the other end of the connector is joined, and the first metal plate and the second metal plate are used as terminals.

10. 10. The method for manufacturing a semiconductor device according to claim 8, further comprising a sealing step of sealing one end side of the wiring member and the semiconductor package with a second sealing member.

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