Light emitting component, semiconductor substrate, and measuring apparatus

Abstract

To suppress light oscillation by switching to another resonance wavelength different from an oscillation wavelength, as compared with a case where a semiconductor layer adjusted so that the other resonance wavelength is included in a dip of a reflectance spectrum is not provided.SOLUTION: A light emitting component comprises: a substrate; an active layer that is provided on the substrate and emits light; and a resonance structure that resonates light from the active layer. The resonance structure includes: a light emitting element having one resonance wavelength serving as an oscillation wavelength and another resonance wavelength different from the one oscillation wavelength; and a semiconductor layer provided on the light emitting element. A reflectance spectrum of light radiated from the semiconductor layer side has a dip whose wavelength varies depending on the thickness of the semiconductor layer, and the other resonance wavelength is included in the dip.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to a light-emitting component, a semiconductor substrate, and a measuring device. [Background technology]

[0002] As a conventional technique, Patent Document 1 discloses a surface-emitting semiconductor laser in which a lower DBR (Distributed Bragg Reflector), a cavity extension region, an active region, and an upper DBR are stacked on a substrate. This surface-emitting semiconductor laser has multiple resonance wavelengths due to the inclusion of the cavity extension region. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-142252 Summary of the Invention [Problem to be solved by the invention]

[0004] In a light emitting device having a resonant structure with a plurality of resonant wavelengths, light may be oscillated by switching to a resonant wavelength different from the oscillation wavelength. The present invention aims to suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where a semiconductor layer adjusted so that the valley of the reflectance spectrum includes another resonant wavelength. [Means for solving the problem]

[0005] The invention described in claim 1 is a light-emitting component including a substrate, an active layer provided on the substrate and emitting light, and a resonant structure that resonates light from the active layer, the resonant structure comprising a light-emitting element having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength, and a semiconductor layer provided on the light-emitting element, wherein the reflectance spectrum of light irradiated from the semiconductor layer side has a valley portion whose wavelength changes depending on the thickness of the semiconductor layer, and the other resonant wavelength is included in the valley portion. The invention described in claim 2 is a light-emitting component described in claim 1, wherein the semiconductor layer includes a thyristor that, when turned on, causes light to be emitted from the active layer of the light-emitting element or increases the amount of light emitted from the active layer. The invention described in claim 3 is the light-emitting component described in claim 2, wherein the semiconductor layer includes an intermediate layer provided between the light-emitting element and the thyristor and made of a semiconductor that transmits light emitted from the active layer, and the thickness of the intermediate layer is adjusted so that the other resonant wavelength is included in the valley of the reflectance spectrum. The invention described in claim 4 is a light-emitting component described in any one of claims 1 to 3, wherein the reflectance spectrum has two valleys located on the higher and lower wavelength sides of the oscillation wavelength, and the light-emitting element has two other resonant wavelengths higher and lower than the oscillation wavelength, and each of the other resonant wavelengths is included in the respective valleys of the reflectance spectrum. The invention described in claim 5 is a semiconductor substrate comprising: a substrate; a laminate provided on the substrate and processed into a light-emitting element; and a semiconductor layer provided on the laminate, wherein the laminate includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength, the reflectance spectrum of light irradiated from the semiconductor layer side having a valley portion whose wavelength changes depending on the thickness of the semiconductor layer, and the other resonant wavelength being included in the valley portion. The invention described in claim 6 is a measuring device comprising: a light-emitting device that emits light; and an acquisition unit that receives reflected light from an object irradiated with the light emitted from the light-emitting device and acquires information about the object, wherein the light-emitting device includes a substrate, an active layer provided on the substrate that emits light, and a resonant structure that resonates the light from the active layer, wherein the resonant structure has one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength, a plurality of thyristors provided on each of the light-emitting elements and that, when turned on, cause light to be emitted from the active layer of the light-emitting element or increase the amount of light emitted from the active layer, and a drive unit that individually drives the plurality of thyristors to switch them to the on state, wherein the reflectance spectrum of the light irradiated from the thyristor side has a valley whose wavelength changes depending on the thickness of the thyristor, and the other resonant wavelength is included in the valley. [Effects of the Invention]

[0006] According to the inventions described in claims 1, 5, and 6, it is possible to suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where a semiconductor layer adjusted so that another resonant wavelength is included in the valley of the reflectance spectrum is not included. According to the second aspect of the present invention, by adjusting the thickness of the thyristor, it is possible to make the valley in the reflectance spectrum include other resonance wavelengths of the light-emitting element. According to the invention described in claim 3, by adjusting the thickness of the intermediate layer, it is possible to make the valley in the reflectance spectrum include other resonant wavelengths of the light-emitting element, without changing the layer structure or thickness of the thyristor. According to the invention described in claim 4, it is possible to more effectively prevent light from being switched to another resonant wavelength and oscillating compared to when the other resonant wavelength is not included in the respective valleys located on the higher wavelength side and lower wavelength side of the oscillation wavelength. [Brief explanation of the drawings]

[0007] [Figure 1]1 is a diagram showing an example of a schematic configuration of a measurement device to which an embodiment of the present invention is applied. [Figure 2] 1 is a diagram illustrating an example of the configuration of a light emitting device to which an embodiment of the present invention is applied, and corresponds to an equivalent circuit diagram of the light emitting device 1. FIG. [Figure 3] 1(a) and 1(b) are an example of a planar layout diagram and a cross-sectional view of a light-emitting chip to which the present embodiment is applied. [Figure 4] 1 is an enlarged cross-sectional view of an island in which a VCSEL and a setting thyristor are stacked in a light-emitting chip to which the present embodiment is applied. [Figure 5] 10 is a timing chart illustrating an example of the operation of the light-emitting device and the light-emitting chip. [Figure 6] 1(a) and 1(b) are diagrams showing an example of a stacked structure of a VCSEL. [Figure 7] 6(a) and 6(b) are diagrams showing an example of the reflectance spectrum of a VCSEL having the stacked structure shown in FIGS. 6(a) and 6(b). [Figure 8] 5 is a diagram showing an example of a reflectance spectrum of the light-emitting chip having the stacked structure shown in FIG. 4. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. [Embodiment 1] (Measuring device 1000) FIG. 1 is a diagram showing an example of a schematic configuration of a measurement device 1000 to which an embodiment of the present invention is applied. The measuring device 1000 is an apparatus that measures the three-dimensional shape of an object based on the so-called ToF (Time of Flight) method, which uses the time of flight of light, and is an example of a measuring device that performs measurements related to an object. As shown in the figure, the measuring device 1000 includes a light emitting device 1 that emits light for measurement, a three-dimensional sensor 20 that receives light reflected by the object, and a system control unit 30 that controls the measuring device 1000 as a system.

[0009] The light emitting device 1 emits light for measurement toward an object. More specifically, the light emitting device 1 includes a light emitting chip 10 including a vertical cavity surface emitting laser (VCSEL) (described later with reference to FIG. 2 ), which is an example of a light emitting element, and a light emission control unit 110 that controls the light emission of the light emitting chip 10. The light emitting device 1 will be described in detail later with reference to FIGS.

[0010] The three-dimensional sensor 20 acquires reflected light, which is light that is reflected and returned from an object. Then, using the ToF method, it outputs distance information, which is information relating to the distance to the object, based on the time from when the light is emitted to when the reflected light is received. The three-dimensional sensor 20 is an example of a light receiving unit that receives light that is reflected and returned from an object.

[0011] System control unit 30 controls light-emitting device 1 and three-dimensional sensor 20, and controls measuring device 1000 as a whole as a system. System control unit 30 also includes a shape identification unit 30A that identifies the three-dimensional shape of an object based on distance information output from three-dimensional sensor 20. System control unit 30 is, for example, a computer including a CPU, ROM, RAM, etc., and ROM includes non-volatile rewritable memory such as flash memory. A program stored in ROM is loaded into RAM, and the CPU executes the program, thereby configuring shape identification unit 30A.

[0012] In measuring device 1000 to which this embodiment is applied, the time (time of flight of light) from when light emitting device 1 emits light to when the light is reflected by the object and received by three-dimensional sensor 20 is measured, and distance information is output based on this time. Then, based on the distance information output from three-dimensional sensor 20, shape specifying unit 30A specifies the three-dimensional shape of the object. In this manner, measurement of the three-dimensional shape based on the ToF method is performed in the measuring device 1000. Note that the shape specifying unit 30A is an example of an acquiring unit that acquires information about the object.

[0013] (Light-emitting device 1) 2 is a diagram illustrating a configuration example of a light emitting device 1 to which an embodiment of the present invention is applied, and corresponds to an equivalent circuit diagram of the light emitting device 1. As described with reference to FIG. 1, the light emitting device 1 includes a light emitting chip 10 and a light emission control unit 110.

[0014] (Light emission control unit 110) The light-emission control unit 110 includes a transfer signal generating unit 120, a lighting signal generating unit 140, a reference potential supplying unit 160, and a power supply potential supplying unit 170, and controls the light emission of the light-emitting chip . The transfer signal generating unit 120 generates transfer signals φ1 and φ2 that sequentially transfer an ON state to a plurality of transfer thyristors T (described later). The light-up signal generating unit 140 generates a light-up signal φI that supplies a current that lights up a plurality of VCSELs (described later). The reference potential supplying unit 160 supplies a reference potential Vsub. The power supply potential supplying unit 170 supplies a power supply potential Vga.

[0015] (Light emitting chip 10) The light-emitting chip 10 is an example of a light-emitting component, and includes a light-emitting unit 11, a driving unit 12, and a transfer unit 13. The light-emitting chip 10 also includes a φ1 terminal, a φ2 terminal, a Vga terminal, a φI terminal, and a Vsub terminal as terminals for receiving signal inputs. The light-emitting unit 11 includes a vertical-cavity surface-emitting laser (VCSEL). Hereinafter, the vertical-cavity surface-emitting laser (VCSEL) will be simply referred to as "VCSEL." In the example shown in FIG. 2, the light-emitting unit 11 includes 128 lasers, VCSEL1 to VCSEL4, ..., VCSEL127, VCSEL128. Hereinafter, when there is no need to distinguish between VCSEL1 to VCSEL128, they will be referred to as VCSEL. The light-emitting chip 10 or the light-emitting device 1 causes the VCSEL to emit light to an object.

[0016] The drive unit 12 includes 128 setting thyristors S1 to S4, ..., S127, S128 corresponding to the VCSEL1 to VCSEL4, ..., VCSEL127, VCSEL128 of the light-emitting unit 11. Hereinafter, when there is no need to distinguish between the setting thyristors S1 to S128, they will be referred to as setting thyristors S. The anode of the VCSEL with the same number is connected to the cathode of the setting thyristor S, so that the VCSEL and setting thyristor S with the same number are connected in series. As will be described in detail later using FIG. 3(b), the setting thyristor S is stacked on the VCSEL formed on the substrate 80. The setting thyristor S is an example of a thyristor that, when turned on, causes the VCSEL to emit light or increase the amount of light emitted. Note that "on the VCSEL" or "above the VCSEL" does not only refer to a state in which there is direct contact with the VCSEL, but also includes a state in which there is a position above the VCSEL without direct contact. The same applies to similar expressions such as "on the substrate" or "above the substrate." Similarly, expressions such as "below the VCSEL" also include a state in which there is a position below the VCSEL without direct contact.

[0017] The transfer unit 13 includes 128 transfer thyristors T1 to T4, ..., T127, T128 (referred to as transfer thyristors T when not distinguished), and 128 lower diodes UD1 to UD4, ..., UD127, UD128 (referred to as lower diodes UD when not distinguished). Hereinafter, when the transfer thyristors T1 to T128 are not distinguished, they are referred to as transfer thyristors T. Furthermore, when the lower diodes UD1 to UD128 are not distinguished, they are referred to as lower diodes UD. For the transfer thyristors T1 to T128 and the lower diodes UD1 to UD128, the transfer thyristor T and the lower diode UD of the same number are connected in series. Details will be described later using FIG. 3(b), but the transfer thyristor T is stacked on the lower diode UD formed on the substrate 80.

[0018] Furthermore, the transfer unit 13 pairs the transfer thyristors T1 to T128 in numerical order, and provides coupling diodes D1 to D4, ..., D126, D127 between each pair. For example, the transfer thyristors T1 and T2 are paired, and a coupling diode D1 is provided between this pair. Hereinafter, when there is no need to distinguish between the coupling diodes D1 to D127, they will be referred to as coupling diode D.

[0019] The transfer unit 13 also includes one start diode SD. The transfer unit 13 also includes power supply line resistors Rg1 to Rg4, ..., Rg127, Rg128, and current limiting resistors R1 and R2 provided to prevent excessive current from flowing through a first transfer signal line 72 to which a first transfer signal φ1 (described later) is supplied and a second transfer signal line 73 to which a second transfer signal φ2 (described later) is supplied. Hereinafter, when there is no need to distinguish between the power supply line resistors Rg1 to Rg128, they will be referred to as power supply line resistors Rg.

[0020] The VCSEL1 to VCSEL128 of the light emitting unit 11, the setting thyristors S1 to S128 of the driving unit 12, the transfer thyristors T1 to T128 of the transfer unit 13, the lower diodes UD1 to UD128, the coupling diodes D1 to D127, and the power line resistors Rg1 to Rg128 are arranged in numerical order from the left side of Figure 2, which is one side of the light emitting chip 10, to the right side of Figure 2, which is the other side of the light emitting chip 10.

[0021] 2, there are 128 VCSELs in the light-emitting unit 11, 128 setting thyristors S in the driving unit 12, 128 transfer thyristors T in the transfer unit 13, 128 lower diodes UD, and 128 power line resistors Rg. The number of coupling diodes D is 127, which is one less than the number of transfer thyristors T. The numbers of VCSELs, setting thyristors S, transfer thyristors T, 127 lower diodes UD, 128 power line resistors Rg, and 128 coupling diodes D are not limited to the above and may be any predetermined number. The number of transfer thyristors T may also be greater than the number of VCSELs.

[0022] The above-mentioned VCSEL, lower diode UD, coupling diode D, and start diode SD are two-terminal semiconductor elements with an anode terminal (anode) and a cathode terminal (cathode). Also, the thyristors (setting thyristor S, transfer thyristor T) are three-terminal semiconductor elements with an anode terminal (anode), a gate terminal (gate), and a cathode terminal (cathode). Note that in the following, terminals may be abbreviated and written in parentheses.

[0023] In the light-emitting chip 10, the VCSEL, setting thyristor S, lower diode UD, transfer thyristor T, coupling diode D, power line resistance Rg, and start diode SD are configured as a so-called integrated circuit using a semiconductor laminate epitaxially grown on a common semiconductor substrate 80. Here, the semiconductor laminate is configured using, for example, a III-V compound semiconductor such as GaAs, AlGaAs, or AlAs. Hereinafter, the surface of the substrate 80 on which the VCSEL and the like are formed, that is, the surface on which the semiconductor laminate is formed, may be referred to as the "front surface," and the opposite surface as the "back surface."

[0024] Next, the electrical connections of the elements in the light-emitting chip 10 will be described. The anodes of the VCSEL and the lower diode UD are connected to the substrate 80, forming a so-called common anode configuration. A reference potential Vsub is supplied to these anodes via a back electrode 91 (see FIG. 3(b)), which is a Vsub terminal provided on the back surface of the substrate 80. The cathodes of the VCSELs are connected to the anodes of the setting thyristors S. The cathodes of the lower diodes UD are connected to the anodes of the transfer thyristors T. This connection is an example of a configuration when a p-type substrate 80 is used. When an n-type substrate is used, the polarity is reversed, and when an intrinsic (i) type substrate with no impurities added is used, a terminal for supplying a reference potential Vsub is provided on the surface of the substrate.

[0025] Along the arrangement of the transfer thyristors T, the cathodes of the odd-numbered transfer thyristors T1, T3, T5, ..., T125, and T127 are connected to a first transfer signal line 72. The first transfer signal line 72 is connected to a φ1 terminal via a current-limiting resistor R1. A first transfer signal φ1 is supplied to this φ1 terminal from the transfer signal generating unit 120 of the light-emission control unit 110. Further, along the arrangement of the transfer thyristors T, the cathodes of the even-numbered transfer thyristors T2, T4, T6, ... T126, T128 are connected to a second transfer signal line 73. The second transfer signal line 73 is connected to a φ2 terminal via a current limiting resistor R2. A second transfer signal φ2 is supplied to this φ2 terminal from the transfer signal generating unit 120 of the light-emission control unit 110.

[0026] The cathodes of the setting thyristors S are connected to a light-up signal line 75. The light-up signal line 75 is connected to a φI terminal. In the light-emitting chip 10, a light-up signal φI is supplied to the φI terminal from the light-up signal generating unit 140 of the light-emission control unit 110 via a current-limiting resistor RI provided outside the light-emitting chip 10. The light-up signal φI supplies a current for lighting the VCSEL.

[0027] The gates Gt1 to Gt128 (written as gate Gt when not distinguished) of the transfer thyristors T1 to T128 are connected one-to-one to the gates Gs1 to Gs128 (written as gate Gs when not distinguished) of the setting thyristors S1 to S128 with the same numbers. Therefore, the gates Gt1 to Gt128 and the gates Gs1 to Gs128 with the same numbers are electrically at the same potential. Therefore, for example, the gate is written as gate Gt1 (gate Gs1) to indicate that the potential is the same. In the following, when the gates Gt1 to Gt128 are not distinguished, they will be written as gate Gt, and when the gates Gs1 to Gs128 are not distinguished, they will be written as gate Gs.

[0028] Coupling diodes D1 to D127 are connected between pairs of gates Gt of the transfer thyristors T1 to T128, each pair being numbered sequentially. That is, the coupling diodes D1 to D127 are directly connected so that they are sandwiched between the gates Gt1 to Gt128, respectively. The coupling diode D1 is connected so that current flows from the gate Gt1 to the gate Gt2. The same applies to the other coupling diodes D2 to D127.

[0029] The gates Gt (gates Gs) of the transfer thyristors T are connected to a power supply line 71 via power supply line resistors Rg provided corresponding to the respective transfer thyristors T. The power supply line 71 is connected to a Vga terminal. A power supply potential Vga is supplied to the Vga terminal from the power supply potential supply unit 170 of the light-emission control unit 110. The gate Gt1 of the transfer thyristor T is connected to the cathode of the start diode SD. On the other hand, the anode of the start diode SD is connected to the second transfer signal line 73.

[0030] 3(a) and 3(b) are an example of a planar layout diagram and a cross-sectional view of a light-emitting chip 10 to which this embodiment is applied. FIG. 3(a) is a planar layout diagram of the light-emitting chip 10, and FIG. 3(b) is a cross-sectional view taken along line IIIB-IIIB in FIG. 3(a). The right side in FIG. 3(a) is the +x direction, the upper side is the +y direction, and the upper side in FIG. 3(b) is the +y direction. Note that a protective layer 90, which will be described later, is omitted in FIG. 3(a).

[0031] 3(a) shows a portion centered around VCSEL1 to VCSEL4, setting thyristors S1 to S4, transfer thyristors T1 to T4, and lower diodes UD1 to UD4. For convenience, an example is shown in which the VCSELs are arranged in a row (x direction in FIG. 3(a)), but the arrangement of the VCSELs is not limited thereto, and they may be arranged two-dimensionally across the x and y directions, for example. Also, a back electrode 91, which is a Vsub terminal provided on the back surface of the substrate 80, is shown drawn out to the outside of the substrate 80.

[0032] In Figure 3(b), which is a cross-sectional view taken along line IIIB-IIIB in Figure 3(a), the setting thyristor S1 / VCSEL1, transfer thyristor T1 / lower diode UD1, coupling diode D1, and power line resistance Rg1 are shown from the bottom (-y direction) in the figure. The setting thyristor S1 and VCSEL1 are stacked. Similarly, the transfer thyristor T1 and lower diode UD1 are stacked.

[0033] First, the cross-sectional structure of the light-emitting chip 10 will be described with reference to FIG. The light emitting chip 10 has a p-type anode layer 81, a light emitting layer 82, and an n-type cathode layer 83, which are formed in this order on a p-type substrate 80 and which constitute a VCSEL and a lower diode UD. As will be described in detail later, in the light emitting chip 10, the p-type anode layer 81 and the n-type cathode layer 83 are formed of a distributed Bragg reflector (DBR) (hereinafter referred to as a DBR layer) in which multiple semiconductor layers having refractive index differences are stacked. Therefore, hereinafter, the p-type anode layer 81 will be referred to as a p-anode (DBR) layer 81, and the n-type cathode layer 83 will be referred to as an n-cathode (DBR) layer 83. In addition, the light emitting chip 10 of this embodiment is provided with a cavity extending layer 92 between the p anode (DBR) layer 81 and the light emitting layer 82.

[0034] Furthermore, on the n-cathode (DBR) layer 83, a tunnel junction (tunnel diode) layer 84 (tunnel junction layer 84) is provided. Furthermore, an intermediate layer 93 is provided on the tunnel junction layer 84 . Furthermore, on the intermediate layer 93, a p-type anode layer 85 (p-anode layer 85), an n-type gate layer 86 (n-gate layer 86), a p-type gate layer 87 (p-gate layer 87), and an n-type cathode layer 88 (n-cathode layer 88) which constitute the setting thyristor S, the transfer thyristor T, the coupling diode D, and the power supply line resistance Rg are provided in this order. In the following, the notation in parentheses will be used. The same applies to other cases.

[0035] 3(b), the light-emitting chip 10 has a protective layer 90 made of an insulating material that covers the surface and side surfaces of each island. Furthermore, a light emission opening 90A is provided on the surface of the protective layer 90 opposite the substrate 80 from the VCSEL, for emitting light emitted by the VCSEL. In other words, in the example of FIG. 3(b), a portion of the n-cathode layer 88 of the setting thyristor S is not covered by the protective layer 90.

[0036] Elements such as the VCSEL, lower diode UD, setting thyristor S, transfer thyristor T, and coupling diode D are composed of multiple islands 301, 302, and 303, which are separated by removing a portion of each of the above layers by etching. Note that an island is sometimes referred to as a mesa, and the etching that forms the islands (mesas) is sometimes referred to as mesa etching. In the light-emitting chip 10, these islands 301, 302, 303 are connected to wiring such as the power supply line 71, the first transfer signal line 72, the second transfer signal line 73, and the light-up signal line 75 via through-holes (indicated by circles in FIG. 3(a)) provided in the protective layer 90. In the following description, the protective layer 90 and the through-holes will not be described.

[0037] As shown in FIG. 3(b), a back surface electrode 91 that serves as a Vsub terminal is provided on the back surface of the substrate 80.

[0038] Here, the notation of the p-anode (DBR) layer 81 and the n-cathode (DBR) layer 83 corresponds to their functions when configuring the VCSEL and the lower diode UD. That is, the p-anode (DBR) layer 81 functions as an anode, and the n-cathode (DBR) layer 83 functions as a cathode. Also, the notation of the p-anode layer 85, the n-gate layer 86, the p-gate layer 87, and the n-cathode layer 88 corresponds to their functions when configuring the setting thyristor S and the transfer thyristor T. That is, the p-anode layer 85 functions as an anode, the n-gate layer 86 and the p-gate layer 87 function as gates, and the n-cathode layer 88 functions as a cathode. In addition, when the above layers constitute a coupling diode D and a power supply line resistance Rg, they have different functions as will be described later.

[0039] The multiple islands included in the light-emitting chip 10 include those that do not include some of the layers among the p-anode (DBR) layer 81, the light-emitting layer 82, the cavity extension layer 92, the n-cathode (DBR) layer 83, the intermediate layer 93, the tunnel junction layer 84, the p-anode layer 85, the n-gate layer 86, the p-gate layer 87, and the n-cathode layer 88. For example, the island 301 does not include part of the n-cathode layer 88.

[0040] Next, an example of a planar layout of the light-emitting chip 10 will be described. As shown in Figure 3(a), an island 301 is provided with a VCSEL1 and a setting thyristor S1. An island 302 is provided with a lower diode UD1, a transfer thyristor T1, and a coupling diode D1. An island 303 is provided with a power line resistor Rg1. An island 304 is provided with a start diode SD. An island 305 is provided with a current limiting resistor R1, and an island 306 is provided with a current limiting resistor R2.

[0041] The light-emitting chip 10 has a plurality of islands formed in parallel, each of which is similar to the islands 301, 302, and 303. These islands are provided with VCSEL2 to VCSEL128, setting thyristors S2 to S128, lower diodes UD2 to UD128, transfer thyristors T2 to T128, coupling diodes D2 to D127, and the like, similar to the islands 301, 302, and 303.

[0042] Here, the islands 301 to 306 will be described in detail with reference to FIGS. 3(b), the VCSEL1 provided on the island 301 is composed of a p-anode (DBR) layer 81, a light-emitting layer 82, and an n-cathode (DBR) layer 83. The setting thyristor S is composed of a p-anode layer 85, an n-gate layer 86, a p-gate layer 87, and an n-cathode layer 88, which are stacked via a tunnel junction layer 84 stacked on the n-cathode (DBR) layer 83 of the VCSEL1.

[0043] In the island 301, an n-type ohmic electrode 321 (n-ohmic electrode 321) provided on the n-cathode layer 88 (region 311) serves as a cathode electrode. Furthermore, a p-type ohmic electrode 331 (p-ohmic electrode 331) provided on the p-gate layer 87 exposed by removing the n-cathode layer 88 serves as an electrode of the gate Gs1 (sometimes referred to as a gate terminal Gs1). The n-ohmic electrode 321 is provided so as not to block the light emitted from the VCSEL 1, and may have, for example, a light emission opening (not referenced) similar to that of the protective layer 90. In the example of Fig. 3(b), the light emission opening 90A of the protective layer 90 and the light emission opening of the setting thyristor S are provided in a corresponding position, and a part of the n-cathode layer 88 is not covered by the protective layer 90 and the n-ohmic electrode 321 and is exposed.

[0044] Here, the p anode (DBR) layer 81 of the VCSEL may include a current confinement layer that confines current. The current confinement layer is formed by oxidizing a portion of the semiconductor layer that constitutes the p anode (DBR) layer exposed by mesa etching from the periphery, thereby forming a current blocking portion through which current does not easily flow. The central portion of the semiconductor layer that constitutes the p anode (DBR) layer, which is not oxidized, becomes a current passing portion through which current can easily flow relative to the current blocking portion. Note that the current blocking portion does not need to completely block the current as long as it can concentrate the current in the current passing portion, and it is sufficient that the current is more difficult to flow than the current passing portion. Providing such a current blocking section reduces power consumption and improves light extraction efficiency, which refers to the amount of light that can be extracted per unit of power.

[0045] The lower diode UD1 provided in the island 302 is composed of a p-anode (DBR) layer 81, a light-emitting layer 82, and an n-cathode (DBR) layer 83, similar to a VCSEL. The transfer thyristor T1 is composed of a p-anode layer 85, an n-gate layer 86, a p-gate layer 87, and an n-cathode layer 88, which are stacked via a tunnel junction layer 84 stacked on the n-cathode (DBR) layer 83 of the lower diode UD1, similar to the setting thyristor S1. An n-ohmic electrode 323 provided on a region 313 of the n-cathode layer 88 serves as a cathode terminal. Furthermore, a p-ohmic electrode 332 provided on the p-gate layer 87 exposed by removing the n-cathode layer 88 serves as a terminal of the gate Gt1. Similarly, the coupling diode D1 provided in the island 302 is composed of a p-gate layer 87 and an n-cathode layer 88. An n-ohmic electrode 324 provided on a region 314 of the n-cathode layer 88 serves as the cathode terminal. Furthermore, a p-ohmic electrode 332 provided on the p-gate layer 87 exposed by removing the n-cathode layer 88 serves as the anode terminal. In this case, the anode terminal of the coupling diode D is the same as the gate Gt1.

[0046] The power supply line resistance Rg1 provided in the island 303 is composed of the p-gate layer 87. That is, the power supply line resistance Rg1 is provided with the p-gate layer 87 between the p-ohmic electrode 333 and the p-ohmic electrode 334 provided on the p-gate layer 87 exposed by removing the n-cathode layer 88 as a resistor.

[0047] The start diode SD provided in the island 304 is composed of a p-gate layer 87 and an n-cathode layer 88. That is, the start diode SD has an n-ohmic electrode 325 provided on a region 315 of the n-cathode layer 88 as its cathode terminal. Furthermore, the start diode SD has a p-ohmic electrode 335 provided on the p-gate layer 87 exposed by removing the n-cathode layer 88 as its anode terminal. The current limiting resistor R1 provided in island 305 and the current limiting resistor R2 provided in island 306 are provided in the same manner as the power line resistor Rg1 provided in island 303, and each uses the p-gate layer 87 between two p-ohmic electrodes (unnumbered) as a resistor.

[0048] Next, the connection relationships between the elements will be explained with reference to FIG. The light-on signal line 75 has a trunk 75a and multiple branch portions 75b. The trunk 75a is provided so as to extend in the column direction of the setting thyristors S / VCSEL. The branch portions 75b branch off from the trunk 75a and are connected to the n-ohmic electrode 321, which is the cathode terminal of the setting thyristor S1 provided on the island 301. The same is true for the cathode terminals of the other setting thyristors S. The light-on signal line 75 is connected to a φI terminal provided on the setting thyristor S1 / VCSEL1 side.

[0049] The first transfer signal line 72 is connected to an n ohmic electrode 323, which is the cathode terminal of the transfer thyristor T1 provided in the island 302. The first transfer signal line 72 is connected to the cathode terminals of other odd-numbered transfer thyristors T provided in islands similar to the island 302. The first transfer signal line 72 is connected to the φ1 terminal via a current limiting resistor R1 provided in the island 305. The second transfer signal line 73 is connected to the n ohmic electrode (no symbol) that is the cathode terminal of the even-numbered transfer thyristor T. The second transfer signal line 73 is connected to the φ2 terminal via a current limiting resistor R2 provided in the island 306.

[0050] The power supply line 71 is connected to a p-ohmic electrode 334, which is one terminal of a power supply line resistor Rg1 provided on the island 303. One terminal of another power supply line resistor Rg is also connected to the power supply line 71. The power supply line 71 is connected to the Vga terminal.

[0051] The p-ohmic electrode 331 (gate terminal Gs1) of the setting thyristor S1 provided on the island 301 is connected to the p-ohmic electrode 332 (gate terminal Gt1) of the island 302 by a connection wire . The p-ohmic electrode 332 (gate terminal Gt1) is connected to the p-ohmic electrode 333 (the other terminal of the power supply line resistance Rg1) of the island 303 by a connection wire 77. Furthermore, an n-ohmic electrode 324 (cathode terminal of the coupling diode D1) provided on the island 302 is connected by a connection wire 79 to a p-type ohmic electrode (no reference numeral) which is the gate terminal Gt2 of the adjacent transfer thyristor T2. Although the explanation is omitted here, the same applies to other VCSELs, setting thyristors S, transfer thyristors T, coupling diodes D, etc.

[0052] The p-ohmic electrode 332 (gate terminal Gt1) of the island 302 is connected to an n-ohmic electrode 325 (cathode terminal of the start diode SD) provided on the island 304 by a connection wiring 78. The p-ohmic electrode 335 (anode terminal of the start diode SD) is connected to a second transfer signal line 73. The above connections and configuration are for when a p-type substrate 80 is used; when an n-type substrate is used, the polarity is reversed. When an i-type substrate is used, a terminal for supplying a reference potential Vsub is provided on the surface of the substrate. The connections and configuration are the same whether a p-type substrate or an n-type substrate is used.

[0053] (Laminated structure L1) 4 is an enlarged cross-sectional view of an island 301 in which a VCSEL and a setting thyristor S are stacked in a light-emitting chip 10 to which this embodiment is applied, and corresponds to a view of the cross section of the island in which the VCSEL and the setting thyristor S are stacked, viewed from the -y direction. Since the p-ohmic electrode 331 cannot be seen in this state, the p-ohmic electrode 331 portion is shown as viewed from the -x direction in FIG. 3(a). Note that the protective layer 90 is omitted.

[0054] As described above, in the island 301 of the light-emitting chip 10, the setting thyristor S is stacked on the VCSEL via the intermediate layer 93 and the tunnel junction layer 84. In other words, a stacked structure L1 is formed on the substrate 80, the stacked structure L1 including the semiconductor stacked body Lv constituting the VCSEL, the intermediate layer 93, the tunnel junction layer 84, and the semiconductor stacked body Ls constituting the setting thyristor S. Here, in the light-emitting chip 10, the stacked structure L1 is an example of a semiconductor substrate including a substrate 80, a semiconductor stacked body Lv which is an example of a stacked body to be processed into a VCSEL, an intermediate layer 93 which is an example of a semiconductor layer provided on the semiconductor stacked body Lv, and a semiconductor stacked body Ls.

[0055] (VCSEL / Semiconductor laminate Lv) As shown in FIG. 4, the VCSEL is composed of a semiconductor laminate Lv in which a p-anode (DBR) layer 81, a light-emitting layer 82, a cavity extension layer 92, and an n-cathode (DBR) layer 83 are epitaxially grown in this order on a p-type substrate 80. In this embodiment, the substrate 80 is described as a p-type GaAs substrate. However, the substrate 80 may be an n-type GaAs substrate or an intrinsic (i) GaAs substrate without added impurities. The substrate 80 may also be a semiconductor substrate made of InP, GaN, InAs, or other III-V or II-VI group materials, or sapphire, Si, or Ge. When the substrate 80 is changed, a material that approximately matches the lattice constant of the substrate 80 is used as the monolithic layer on the substrate 80. This approximately matching to the lattice constant of the substrate 80 includes a strained structure, a strain-relieved layer, and metamorphic growth. For example, InAs, InAsSb, GaInAsSb, etc. are used on an InAs substrate; InP, InGaAsP, etc. are used on an InP substrate; GaN, AlGaN, InGaN, etc. are used on a GaN substrate or sapphire substrate; and Si, SiGe, GaP, etc. are used on a Si substrate. However, if the semiconductor material after crystal growth is to be bonded to another support substrate, the semiconductor material does not need to be approximately lattice-matched to the support substrate.

[0056] The p anode (DBR) layer 81 is formed by stacking multiple semiconductor layers with different refractive indices. More specifically, the p anode (DBR) layer 81 is formed by alternately stacking high-refractive index layers with a relatively high refractive index and low-refractive index layers with a relatively low refractive index. Note that the high-refractive index layer has a "relatively high refractive index" meaning that it has a higher refractive index than the low-refractive index layer. Similarly, the low-refractive index layer has a "relatively low refractive index" meaning that it has a lower refractive index than the high-refractive index layer. Furthermore, like the p anode (DBR) layer 81, the n cathode (DBR) layer 83 is formed by alternately stacking high-refractive index layers with a relatively high refractive index and low-refractive index layers with a relatively low refractive index. The p-anode (DBR) layer 81 and the n-cathode (DBR) layer 83 are, for example, Al 0.2 Ga 0.8 A high refractive index layer with a low Al content of As and Al 0.9 Ga 0.1 It is composed of a combination of As and a low refractive index layer with a high Al composition. The p-anode (DBR) layer 81 and the n-cathode (DBR) layer 83 are configured to reflect light emitted from the VCSEL. As described above, the p-anode (DBR) layer 81 may include a current confinement layer that confines current.

[0057] The thicknesses of the high refractive index layers and the low refractive index layers of the p anode (DBR) layer 81 and the n cathode (DBR) layer 83 are determined by setting the oscillation wavelength of the VCSEL to λ and the refractive index of each layer to n. r For example, λ / 4n r It can be said that: The p anode (DBR) layer 81 and the n cathode (DBR) layer 83 have a reflectivity of 99% or more for light with an oscillation wavelength λ. The reflectivity of the p anode (DBR) layer 81 for light with an oscillation wavelength λ can be, for example, 99.9%. The reflectivity of the n cathode (DBR) layer 83 for light with an oscillation wavelength λ can be, for example, 99.5%.

[0058] The light-emitting layer 82 has a quantum well structure in which well layers and barrier layers are alternately stacked. The light-emitting layer 82 may be an intrinsic (i) type layer (i layer) to which no impurities are added. The light-emitting layer 82 may also have a structure other than a quantum well structure, such as a quantum wire or a quantum dot. The well layers of the light-emitting layer 82 are made of, for example, GaAs, AlGaAs, InGaAs, GaAsP, AlGaInP, GaInAsP, GaInP, etc. The barrier layers of the light-emitting layer 82 are made of, for example, AlGaAs, GaAs, GaInP, GaInAsP, etc.

[0059] The cavity extension layer 92 is a layer for increasing the cavity length of the VCSEL to suppress oscillation in higher-order transverse modes by the VCSEL. By having the cavity extension layer 92, the VCSEL increases the difference in optical loss between oscillation in the single transverse mode and oscillation in the higher-order transverse mode, making it possible to suppress oscillation in the higher-order transverse mode. The cavity extension layer 92 is a semiconductor layer whose refractive index is between the refractive index of the high-refractive-index layer and the refractive index of the low-refractive-index layer of the p-anode (DBR) layer 81 and the n-cathode (DBR) layer 83. The cavity extension layer 92 is made of, for example, AlGaAs, GaAs, AlAs, or the like. The cavity extension layer 92 may be a layer doped with impurities, or an intrinsic (i) type layer without doping with impurities. However, since n-type semiconductors typically have lower resistivity than p-type semiconductors, the cavity extension layer 92 being an n-type semiconductor can reduce the driving voltage of the VCSEL compared to a p-type semiconductor. On the other hand, from the viewpoint of suppressing light absorption by impurities, the cavity extension layer 92 is preferably an intrinsic (i) type layer without doping with impurities.

[0060] The thickness of the cavity extension layer 92 is an integer multiple of λ / 2, where λ is the oscillation wavelength of the VCSEL. In a VCSEL, the longer the cavity length, in other words, the thicker the cavity extension layer 92, the greater the difference in optical loss between oscillation in a single transverse mode and oscillation in a higher-order transverse mode, and oscillation in a higher-order transverse mode is suppressed. From the viewpoint of making it difficult for oscillation in a higher-order transverse mode of the VCSEL to occur, the thickness of the cavity extension layer 92 is preferably 3λ or more, and more preferably 10λ or more. The thickness of the cavity extension layer 92 can be, for example, 16λ.

[0061] In a VCSEL, two DBR layers (a p-anode (DBR) layer 81 and an n-cathode (DBR) layer 83) sandwiching the light-emitting layer 82 and a resonator extension layer 92 cause light from the light-emitting layer 82 to resonate at a resonant wavelength λv, thereby achieving laser oscillation. In addition, in a VCSEL, the p-anode (DBR) layer 81, the n-cathode (DBR) layer 83, and the resonator extension layer 92 function as a resonator. Light oscillated from the VCSEL then passes through the setting thyristor S and is emitted from the light emission port 90A (see FIG. 3).

[0062] The tunnel junction layer 84 is an n-type layer doped with a high concentration of n-type impurities (dopants). ++ layer and p-type impurity-doped p++ The tunnel junction layer 84 is a junction between the n-cathode (DBR) layer 83 of the VCSEL and the setting thyristor S, and current flows due to the tunnel effect even when reverse bias is applied. The tunnel junction layer 84 prevents the n-cathode (DBR) layer 83 of the VCSEL and the setting thyristor S from becoming reverse biased and making it difficult for current to flow. Current flows due to the tunnel effect even when reverse bias is applied. n of the tunnel junction layer 84 ++ layer and p ++ The layer has an impurity concentration of, for example, 1×10 20 / cm 3 and the impurity concentration of a normal junction is 10 17 / cm 3 ~10 18 / cm 3 High concentration compared to n ++ Layer and p ++ Combination with layers (hereinafter referred to as n ++ layer / p ++ ) is expressed as a layer, for example, n ++ GaInP / p ++ GaAs, n ++ GaInP / p ++ AlGaAs, n ++ GaAs / p ++ GaAs, n ++ AlGaAs / p ++ AlGaAs, n ++ InGaAs / p ++ InGaAs, n ++ GaInAsP / p ++ GaInAsP, n ++ GaAsSb / p ++ The tunnel junction layer 84 is made of GaAsSb. ++ layer and p ++ The layer combinations may be altered from one another.

[0063] The intermediate layer 93 is a layer for adjusting the reflectance of the light-emitting chip 10 in order to prevent the VCSEL from oscillating at resonance wavelengths λs1 and λs2 that are different from the predetermined resonance wavelength λc. In addition, the reflectance of the light-emitting chip 10 varies depending on the thickness of the intermediate layer 93. In the light-emitting chip 10 of this embodiment, the reflectance of the light-emitting chip 10 is adjusted by adjusting the thickness of the intermediate layer 93. The effect of the intermediate layer 93 will be described in detail later.

[0064] The intermediate layer 93 is not limited as long as it maintains the electrical connection between the VCSEL and the setting thyristor S and transmits light with a resonant wavelength λc, which is the oscillation wavelength of the VCSEL. For example, GaInP, GaAs, AlGaAs, etc. may be used for the intermediate layer 93. Materials that can maintain the electrical connection include, for example, GaInP, GaAs, AlGaAs, etc. 17 / cm 3 ~10 20 / cm 3 However, as mentioned above, n-type semiconductors have a lower resistivity than p-type semiconductors, so by forming intermediate layer 93 from an n-type semiconductor, the drive voltage of the VCSEL can be made lower than when it is formed from a p-type semiconductor. The intermediate layer 93 may be provided either above or below the tunnel junction layer 84 as long as it is between the semiconductor laminate Lv and the semiconductor laminate Ls.

[0065] (Setting thyristor S / semiconductor laminate Ls) The setting thyristor S is composed of a semiconductor laminate Ls formed by epitaxially growing a p-anode layer 85, an n-gate layer 86, a p-gate layer 87, and an n-cathode layer 88 in this order on a tunnel junction layer 84. That is, the setting thyristor S has a four-layer pnpn structure. In the above, the ohmic electrode 331 is provided on the p-gate layer 87 to serve as the gate Gs of the setting thyristor S, but the n-ohmic electrode may be provided on the n-gate layer 86 to serve as the gate Gs of the setting thyristor S.

[0066] Next, the basic operations of the transfer thyristor T and the setting thyristor S will be described with reference to Fig. 2 to Fig. 4. In the following, when there is no need to distinguish between the transfer thyristor T and the setting thyristor S, they may be referred to as thyristors. As described above, a thyristor is a semiconductor element having three terminals: an anode terminal (anode), a cathode terminal (cathode), and a gate terminal (gate), and has a pnpn structure formed by laminating p-type semiconductor layers, namely, p-anode layer 85, p-gate layer 87, n-type semiconductor layers, n-gate layer 86, and n-cathode layer 88, on substrate 80. Here, the forward potential (diffusion potential) Vd of the pn junction formed by the p-type semiconductor layer and the n-type semiconductor layer is assumed to be 1.5 V, for example. Also, as an example, the reference potential Vsub supplied to the rear electrode 91, which is the Vsub terminal, will be described as a high-level potential (hereinafter referred to as "H"), 0V, and the power supply potential Vga supplied to the Vga terminal will be described as a low-level potential (hereinafter referred to as "L"), -5V. Therefore, these may be written as "H" (0V) or "L" (-5V).

[0067] First, we will explain the operation of a thyristor alone. Here, we will assume that the anode of the thyristor is at 0V. A thyristor in the off state, where no current flows between the anode and cathode, transitions to the on state (turns on) when a potential lower than the threshold voltage (a negative potential with a large absolute value) is applied to the cathode. Here, the threshold voltage of a thyristor is the value obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the gate potential. When the thyristor is turned on, the gate of the thyristor becomes a potential close to the potential of the anode terminal. In this case, the anode is 0V, so the gate becomes 0V. Also, the cathode of the thyristor in the on state becomes a potential close to the potential obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potential of the anode. In this case, since the anode is 0V, the cathode of the thyristor in the on state becomes a potential close to -1.5V (a negative potential with an absolute value greater than 1.5V). The potential of the cathode is set in relation to the power supply that supplies current to the thyristor in the on state.

[0068] A thyristor in the ON state transitions to the OFF state (turns off) when the cathode reaches a potential (a negative potential with a small absolute value, 0V, or a positive potential) higher than the potential required to maintain the ON state (a potential close to -1.5V as mentioned above). On the other hand, if a potential lower than the potential required to maintain the on state (a negative potential with a large absolute value) is continuously applied to the cathode of a thyristor in the on state and a current sufficient to maintain the on state (maintenance current) is supplied, the thyristor will maintain the on state.

[0069] Next, the operation of the VCSEL and the setting thyristor S stacked together will be described. The setting thyristor S is stacked with the VCSEL and connected in series. Therefore, the potential of the light-up signal φI is divided between the VCSEL and the setting thyristor S. Here, the voltage applied to the VCSEL as a result of the voltage division is assumed to be −1.7 V. Then, when the setting thyristor S is in the off state, −3.3 V is applied to the setting thyristor S.

[0070] As described above, when the threshold voltage of the setting thyristor S in the OFF state is greater in absolute value than −3.3 V, the potential applied to the cathode of the setting thyristor S is lower than the threshold voltage, and the setting thyristor S turns on. This causes current to flow through the series-connected VCSEL and setting thyristor S, causing the VCSEL to emit light. On the other hand, when the threshold voltage of the setting thyristor S is smaller in absolute value than −3.3 V, the setting thyristor S does not turn on and remains in the OFF state. When the setting thyristor S turns on, the absolute value of the voltage applied to the series-connected VCSEL and setting thyristor S decreases due to the current-limiting resistor RI. However, if the voltage applied to the setting thyristor S is a voltage that maintains the setting thyristor S in the on state, the setting thyristor S will maintain the on state. This allows the VCSEL to continue emitting light.

[0071] (Operation of light emitting device 1) Next, the operation of the light emitting device 1 will be described with reference to FIGS. Fig. 5 is a timing chart illustrating an example of the operation of the light emitting device 1 and the light emitting chip 10. Fig. 5 is a timing chart of a portion that controls the lighting / non-lighting of five VCSELs, VCSEL1 to VCSEL5, of the light emitting chip 10. In Fig. 5, VCSEL1, VCSEL2, and VCSEL3 are lit, and VCSEL4 is not lit.

[0072] 5, time passes in alphabetical order from time a to time k. At this time, VCSEL1 is controlled to be lit or not lit (referred to as "lighting control") in period T(1), VCSEL2 in period T(2), VCSEL3 in period T(3), and VCSEL4 in period T(4). Note that periods T(1), T(2), T(3), ... are all of the same length, and when there is no need to distinguish between them, they are referred to as period T. In the following, "H" (0V) and "L" (-5V) may be abbreviated as "H" and "L".

[0073] The first transfer signal φ1 transmitted to the φ1 terminal and the second transfer signal φ2 transmitted to the φ2 terminal are signals having two potentials, "H" and "L." The waveforms of the first transfer signal φ1 and the second transfer signal φ2 are repeated every two consecutive periods T (for example, periods T(1) and T(2)).

[0074] The first transfer signal φ1 transitions from “H” to “L” at time b, which is the start of the period T(1), and transitions from “L” to “H” at time f. Then, at time i, which is the end of the period T(2), it transitions from “H” to “L.” The second transfer signal φ2 is “H” (0 V) at time b, which is the start time of the period T(1), and transitions from “H” to “L” at time e. Then, it transitions from “L” to “H” at time i, which is the end time of the period T(2). Comparing the first transfer signal φ1 and the second transfer signal φ2, the second transfer signal φ2 corresponds to the first transfer signal φ1 shifted back by a period T on the time axis. Meanwhile, the waveform of the second transfer signal φ2 shown by the dashed line in period T(1) and the waveform in period T(2) are repeated from period T(3) onwards. The waveform of the second transfer signal φ2 in period T(1) is different from that in period T(3) and later because period T(1) is the period during which the light emitting device 1 starts operating.

[0075] As will be described later, a set of transfer signals, the first transfer signal φ1 and the second transfer signal φ2, propagates the on state of the transfer thyristors T in numerical order, thereby designating the VCSEL with the same number as the on-state transfer thyristor T as the target for lighting or non-lighting (lighting control).

[0076] Next, the light-up signal φI supplied to the φI terminal will be described. The light-up signal φI is a signal that has two potentials, "H" and "L". Here, we will explain the light-up signal φI during the period T(1) of light-up control for the VCSEL 1. The light-up signal φI is "H" at the start time b of the period T(1), and transitions from "H" to "L" at time c. It then transitions from "L" to "H" at time d, and remains at "H" at time e.

[0077] (1) Time a At time a, the reference potential supply unit 160 of the light-emitting control unit 110 of the light-emitting device 1 sets the reference potential Vsub to "H." The power supply potential supply unit 170 of the light-emitting control unit 110 sets the power supply potential Vga to "L." The transfer signal generation unit 120 of the light-emitting control unit 110 sets the first transfer signal φ1 and the second transfer signal φ2 to "H." As a result, the φ1 terminal and the φ2 terminal of the light-emitting chip 10 become "H." The potential of the first transfer signal line 72 connected to the φ1 terminal via the current-limiting resistor R1 also becomes "H," and the second transfer signal line 73 connected to the φ2 terminal via the current-limiting resistor R2 also becomes "H." Then, the lighting signal generating unit 140 of the light-emitting control unit 110 sets the lighting signal φI to “H.” As a result, the φI terminal of the light-emitting chip 10 becomes “H” via the current limiting resistor RI, and the lighting signal line 75 connected to the φI terminal also becomes “H.”

[0078] The anode (p anode layer 85) of the setting thyristor S is connected to the cathode (n cathode (DBR) layer 83) of the VCSEL via the tunnel junction layer 84, and the anode (p anode (DBR) layer 81) of the VCSEL is connected to the Vsub terminal set to "H". The anode (p anode layer 85) of the transfer thyristor T is connected to the cathode (n cathode (DBR) layer 83) of the lower diode UD via the tunnel junction layer 84, and the anode (p anode (DBR) layer 81) of the lower diode UD is connected to the Vsub terminal set to “H”.

[0079] The cathodes of the odd-numbered transfer thyristors T1, T3, and T5 are connected to the first transfer signal line 72 and are set to "H." The cathodes of the even-numbered transfer thyristors T2, T4, and T6 are connected to the second transfer signal line 73 and are set to "H." Therefore, the anode and cathode of the transfer thyristor T are both "H," and the transfer thyristor T is in the off state. In addition, the anode and cathode of the lower diode UD are both "H," and the lower diode UD is also in the off state.

[0080] The cathode terminal of the setting thyristor S is connected to the "H" (0V) light-up signal line 75. Therefore, the anode and cathode of the setting thyristor S are both "H" and in the off state. The anode and cathode of the VCSEL are also both "H" and in the off state.

[0081] As described above, the gate Gt1 is connected to the cathode of the start diode SD. The gate Gt1 is connected to the power supply line 71 at a power supply potential Vga ("L") via a power supply line resistor Rg1. The anode terminal of the start diode SD is connected to the second transfer signal line 73 and to the "H" φ2 terminal via a current limiting resistor R2. Therefore, the start diode SD is forward biased, and the cathode (gate Gt1) of the start diode SD becomes -1.5V, which is the potential of the anode of the start diode SD ("H") minus the forward potential Vd (1.5V) of the pn junction. Furthermore, when the gate Gt1 becomes -1.5V, the coupling diode D1 becomes forward biased because its anode (gate Gt1) is -1.5V and its cathode is connected to the power supply line 71 ("L") via the power supply line resistor Rg2. Therefore, the potential of gate Gt2 becomes -3V, which is the potential of gate Gt1 (-1.5V) minus the forward potential Vd (1.5V) of the pn junction. Furthermore, the coupling diode D2 is forward biased because its anode (gate Gt1) is -3V and its cathode is connected to the power supply line 71 ("L") via the power supply line resistor Rg2. Therefore, the potential of gate Gt3 becomes -4.5V, which is the potential of gate Gt2 (-3V) minus the forward potential Vd (1.5V) of the pn junction. However, the gates Gt numbered 4 and above are not affected by the anode of the start diode SD being "H," and the potential of these gates Gt becomes "L," which is the potential of the power supply line 71.

[0082] Note that, since the gate Gt is the gate Gs, the potential of the gate Gs is the same as the potential of the gate Gt. Therefore, the threshold voltages of the transfer thyristor T and the setting thyristor S are the potentials of the gates Gt and Gs minus the forward potential Vd (1.5 V) of the pn junction. That is, the threshold voltages of the transfer thyristor T1 and the setting thyristor S1 are −3 V, the threshold voltages of the transfer thyristor T2 and the setting thyristor S2 are −4.5 V, the threshold voltages of the transfer thyristor T3 and the setting thyristor S3 are −6 V, and the threshold voltages of the transfer thyristors T and the setting thyristors S whose numbers are 4 or more are −6.5 V.

[0083] (2) Time b 5, the first transfer signal φ1 transitions from “H” to “L,” causing the light emitting device 1 to start operating. When the first transfer signal φ1 transitions from "H" to "L," the potential of the first transfer signal line 72 transitions from "H" to "L" via the φ1 terminal and the current-limiting resistor R1. Then, the voltage applied to the transfer thyristor T1 is −3.3 V, and the transfer thyristor T1, whose threshold voltage is −3 V, turns on. At this time, a current flows through the lower diode UD1, causing the transfer thyristor T1 to transition from an OFF state to an ON state. When the transfer thyristor T1 turns on, the potential of the first transfer signal line 72 becomes a potential close to −3.2 V (a negative potential with an absolute value greater than 3.2 V) obtained by subtracting the forward potential Vd (1.5 V) of the pn junction from the potential of the anode of the transfer thyristor T1 (−1.7 V, which is the potential applied to the lower diode UD1). The threshold voltage of the transfer thyristor T3 is −6 V, and the threshold voltage of the transfer thyristor T5 is −6.5 V. The voltage applied to the transfer thyristors T3 and T5 is −1.5 V, which is obtained by adding the voltage of 1.7 V applied to the VCSEL to −3.2 V, and therefore the transfer thyristors T3 and T5 do not turn on. On the other hand, the even-numbered transfer thyristors T cannot be turned on because the second transfer signal φ2 is “H” and the second transfer signal line 73 is “H”.

[0084] When the transfer thyristor T1 is turned on, the potential of the gates Gt1 / Gs1 becomes "H," which is the potential of the anode of the transfer thyristor T1. Then, the potential of the gate Gt2 (gate Gs2) becomes -1.5V, the potential of the gate Gt3 (gate Gs3) becomes -3V, the potential of the gate Gt4 (gate Gs4) becomes -4.5V, and the potential of the gates Gt (gate Gl) numbered 5 or greater becomes "L." As a result, the threshold voltage of the setting thyristor S1 becomes −1.5V, the threshold voltage of the transfer thyristor T2 and setting thyristor S2 becomes −3V, the threshold voltage of the transfer thyristor T3 and setting thyristor S3 becomes −4.5V, the threshold voltage of the transfer thyristor T4 and setting thyristor S4 becomes −6V, and the threshold voltage of the transfer thyristors T5, T6, and setting thyristors S5, S6 becomes −6.5V. However, because the first transfer signal line 72 is at −1.5 V due to the transfer thyristor T1 in the ON state, the odd-numbered transfer thyristors T in the OFF state do not turn on. Because the second transfer signal line 73 is “H,” the even-numbered transfer thyristors T do not turn on. In addition, because the light-on signal line 75 is “H,” none of the VCSELs light up.

[0085] Immediately after time b (here, this refers to the time when a steady state is reached after a change in the thyristors, etc. occurs due to a change in the signal potential at time b), the transfer thyristor T1 and the lower diode UD1 are in the ON state, and the other transfer thyristors T, the lower diode UD, the setting thyristor S, and the VCSEL are in the OFF state.

[0086] (3) Time c At time c, the light-up signal φI transitions from “H” to “L”. When the light-up signal φI transitions from "H" to "L," the light-up signal line 75 transitions from "H" to "L" via the current-limiting resistor RI and the φI terminal. Then, -3.3V, which is the sum of the voltage applied to the VCSEL (1.7V), is applied to the setting thyristor S1, and the setting thyristor S1, which has a threshold voltage of -1.5V, turns on and lights up the VCSEL. This causes the potential of the light-up signal line 75 to approach -3.2V. Note that the threshold voltage of the setting thyristor S2 is -3V, but the voltage applied to the setting thyristor S2 is -1.5V, which is the sum of the voltage applied to the VCSEL (1.7V) and -3.2V, so the setting thyristor S2 does not turn on. Immediately after time c, the transfer thyristor T1, the lower diode UD1, and the setting thyristor S1 are in the ON state, and the VCSEL1 is lit.

[0087] (4) Time d At time d, the light-up signal φI transitions from “L” to “H”. When the light-up signal φI transitions from "L" to "H," the potential of the light-up signal line 75 transitions from -3.2 V to "H" via the current limiting resistor RI and the φI terminal. Then, the cathode of the setting thyristor S1 and the anode of VCSEL1 both become "H," turning off the setting thyristor S1 and turning off VCSEL1. The light-up period of VCSEL1 is the period during which the light-up signal φI is "L," from time c when the light-up signal φI transitions from "H" to "L" to time d when the light-up signal φI transitions from "L" to "H." Immediately after time d, the transfer thyristor T1 is in the ON state.

[0088] (5) Time e At time e, the second transfer signal φ2 transitions from “H” to “L.” At this point, the period T(1) during which the VCSEL1 is controlled to be lit ends, and the period T(2) during which the VCSEL2 is controlled to be lit begins. When the second transfer signal φ2 transitions from "H" to "L," the potential of the second transfer signal line 73 transitions from "H" to "L" via the φ2 terminal. As described above, the transfer thyristor T2 turns on because its threshold voltage is −3 V. At this time, a current also flows through the lower diode UD2, transitioning it from an off state to an on state. As a result, the potential of gate terminal Gt2 (gate terminal Gs2) becomes "H" (0V), the potential of gate Gt3 (gate Gs3) becomes -1.5V, the potential of gate Gt4 (gate Gs4) becomes -3V, the potential of gate Gt5 (gate Gs5) becomes -4.5V, and the potential of gate Gt6 (gate Gs6) becomes -5V. Immediately after time e, the transfer thyristors T1 and T2 and the lower diodes UD1 and UD2 are in the ON state.

[0089] (6) Time f At time f, the first transfer signal φ1 transitions from “L” to “H”. When the first transfer signal φ1 transitions from "L" to "H," the potential of the first transfer signal line 72 transitions from "L" to "H" via the φ1 terminal. Then, the anode and cathode of the transfer thyristor T1, which is in the ON state, both become "H," turning it off. At this time, the anode and cathode of the lower diode UD1 also both become "H," transitioning it from the ON state to the OFF state. Then, the potential of the gate Gt1 (gate Gs1) changes toward the power supply potential Vga ("L") of the power supply line 71 via the power supply line resistance Rg1. As a result, the coupling diode D1 is in a state in which a potential is applied in a direction in which no current flows (reverse bias). Therefore, the influence of the gate Gt2 (gate Gs2) being "H" no longer extends to the gate Gt1 (gate Gs1). In other words, the threshold voltage of the transfer thyristor T having the gate Gt connected by the reverse-biased coupling diode D becomes -6.5 V, and the transfer thyristor T will not turn on even if the first transfer signal φ1 or the second transfer signal φ2 becomes "L". Immediately after time f, the transfer thyristor T2 and the lower diode UD2 are in the ON state.

[0090] (7) Other At time g, when the light-up signal φI transitions from “H” to “L”, the setting thyristor S2 turns on, and the VCSEL2 lights up (emits light), similar to the VCSEL1 and setting thyristor S1 at time c. Then, at time h, when the light-up signal φI transitions from “L” to “H”, the setting thyristor S2 turns off, similar to the VCSEL1 and setting thyristor S1 at time d, and the VCSEL2 goes out. Furthermore, at time i, when the first transfer signal φ1 transitions from “H” to “L”, the transfer thyristor T3, whose threshold voltage is 3 V, is turned on, similar to the transfer thyristor T1 at time b or the transfer thyristor T2 at time e. At time i, the period T(2) during which the lighting of VCSEL2 is controlled ends, and the period T(3) during which the lighting of VCSEL3 is controlled begins. What follows is a repetition of what has been explained so far.

[0091] When the VCSEL is not turned on but is to remain off, the light-on signal φI can be kept at “H” as shown in the light-on signal φI from time j to time k in the period T(4) during which the VCSEL4 is controlled to be turned on in Fig. 5. By doing so, even if the threshold voltage of the setting thyristor S4 is −1.5 V, the setting thyristor S4 will not be turned on and the VCSEL will remain off.

[0092] As described above, the gate terminals Gt of the transfer thyristors T are connected to each other by the coupling diode D. Therefore, when the potential of the gate Gt changes, the potential of the gate Gs connected to the gate Gt whose potential has changed via the forward-biased coupling diode D also changes. This changes the threshold voltage of the transfer thyristor T having the gate whose potential has changed. If the threshold voltage is higher than −3.3 V (a negative value with a small absolute value), the transfer thyristor T turns on at the timing when the first transfer signal φ1 or the second transfer signal φ2 transitions from “H” to “L.” The setting thyristor S, whose gate Gs is connected to the gate Gt of the transfer thyristor T in the ON state, has a threshold voltage of −1.5 V, so when the lighting signal φI transitions from “H” to “L”, it turns on, and the VCSEL connected in series to the setting thyristor S lights up.

[0093] That is, when the transfer thyristor T is turned on, it designates the VCSEL that is the target of lighting control, and the lighting signal φI of “L” turns on the setting thyristor S connected in series to the VCSEL that is the target of lighting control, and lights up the VCSEL. That is, in the light-emitting chip 10, the on state of the transfer thyristor T is transferred, and the VCSELs are sequentially lit up. The lighting signal φI at "H" maintains the setting thyristor S in the off state and also maintains the VCSEL in the non-lighting state. That is, the lighting signal φI sets the lighting / non-lighting state of the VCSEL.

[0094] The voltages used in the explanation are merely examples, and should be changed depending on the emission wavelength and light intensity of the VCSEL. In that case, the potential ("L") of the light-up signal φI should be adjusted.

[0095] In this way, the light emitting device 1 has a plurality of elements (transfer thyristors T1 to T128, setting thyristors S1 to S128, VCSEL1 to VCSEL128, etc.), and among the plurality of elements, the elements that are turned on are shifted one after another. As a result, in the light emitting device 1, the plurality of setting thyristors S are individually turned on by lighting control by the light emission control unit 110. Then, when each setting thyristor S is turned on, the VCSEL corresponding to that setting thyristor S individually emits light. Furthermore, in the measuring device 1000, the system control unit 30 controls the output of a signal in the light emission control unit 110, thereby emitting light for measurement.

[0096] (VCSEL resonance wavelength) Next, the resonant wavelength of the VCSEL of this embodiment will be described. As described above, the VCSEL oscillates as laser light by resonating light from the light-emitting layer 82 at a resonance wavelength λv using the p-anode (DBR) layer 81, the n-cathode (DBR) layer 83, and the cavity extension layer 92. In addition, the resonance wavelength λv is the oscillation wavelength λ of the VCSEL. Here, unlike a VCSEL that does not have the cavity extension layer 92, a VCSEL that has the cavity extension layer 92 may have a resonant wavelength other than the resonant wavelength λv in addition to the resonant wavelength λv.

[0097] 6(a) and 6(b) are diagrams showing an example of a stacked structure of a VCSEL. Fig. 6(a) shows the stacked structure of a VCSEL without a cavity extension layer 92, and Fig. 6(b) shows the stacked structure of a VCSEL of this embodiment that has a cavity extension layer 92. The stacked structure of the VCSEL shown in Fig. 6(b) corresponds to the semiconductor stack Lv in the light-emitting chip 10 shown in Fig. 4. Figures 7(a) and 7(b) are diagrams showing examples of the reflectance spectrum of a VCSEL having the stacked structure shown in Figures 6(a) and 6(b). Figure 7(a) shows the reflectance spectrum of a VCSEL having the stacked structure shown in Figure 6(a), and Figure 7(b) shows the reflectance spectrum of a VCSEL having the stacked structure shown in Figure 6(b). 7(a) and 7(b), the horizontal axis represents wavelength and the vertical axis represents reflectance. The reflectance spectrum of a VCSEL can be measured using, for example, a known reflectance measurement device. Specifically, the reflectance spectrum can be measured by irradiating the layered structure of FIGS. 6(a) and 6(b) with light from the side where the n-cathode (DBR) layer 83 is formed, which is the side opposite to the substrate 80, and measuring the light reflected back.

[0098] As shown in Figure 7(a), a single resonant wavelength λc is observed in the reflectance spectrum of a VCSEL that does not have a cavity extension layer 92. As shown in Figure 7(a), the resonant wavelength λc of the VCSEL is observed as a valley where the reflectance drops. In the reflectance spectrum, this valley has a width, but the wavelength at the bottom of the valley, where the drop in reflectance is greatest, is identified as the resonant wavelength λc of the VCSEL. The same is true for the resonant wavelengths λs1 and λs2 (described later) of a VCSEL that has a cavity extension layer 92.

[0099] 7(b), multiple resonant wavelengths including the resonant wavelength λc are observed in the reflectance spectrum of the VCSEL of this embodiment having the resonator extension layer 92. In the example of FIG. 7(b), the resonant wavelength λc, a resonant wavelength λs1 that is shorter than the resonant wavelength λc, and a resonant wavelength λs2 that is longer than the resonant wavelength λc are observed in the reflectance spectrum. For this reason, in a VCSEL having a cavity extension layer 92, light may be oscillated by switching to a resonance wavelength λs1 or λs2 that is different from the desired resonance wavelength λc.

[0100] As described above, in a VCSEL having the cavity extension layer 92, the thicker the cavity extension layer 92, the more the oscillation in the higher-order transverse mode is suppressed. On the other hand, in a VCSEL having a resonator extension layer 92, the thicker the resonator extension layer 92, the narrower the intervals between the resonant wavelengths λc, λs1, and λs2. More specifically, in a VCSEL having a resonator extension layer 92, the thicker the resonator extension layer 92, the narrower the interval D1 between the resonant wavelengths λc and λs1 and the interval D2 between the resonant wavelengths λc and λs2. In a VCSEL having a resonator extension layer 92, the narrower the intervals D1 and D2, the easier it is for light to be oscillated by switching to the resonant wavelengths λs1 and λs2, which are different from the resonant wavelength λc.

[0101] In contrast, in the light-emitting chip 10 of this embodiment, the intermediate layer 93 and the semiconductor laminate Ls constituting the thyristor S act to suppress oscillation at the resonance wavelengths λs1 and λs2 different from the resonance wavelength λc. Fig. 8 is a diagram showing an example of the reflectance spectrum of the light-emitting chip 10 having the stacked structure shown in Fig. 4. In Fig. 8, the horizontal axis represents wavelength and the vertical axis represents reflectance. The reflectance spectrum of Fig. 8 can be measured, as in Figs. 7(a) and 7(b), by irradiating light from the side opposite to the substrate 80, where the n-cathode layer 88 is formed, and measuring the light reflected back.

[0102] 8, in the reflectance spectrum of the light-emitting chip 10 in which the intermediate layer 93 and the semiconductor laminate Ls constituting the thyristor S are stacked on the VCSEL, resonant wavelengths λt1 and λt2 are observed in addition to resonant wavelengths λc, λs1, and λs2. In this example, in the reflectance spectrum of the light-emitting chip 10, a resonant wavelength λt1 that is shorter than the resonant wavelength λc and a resonant wavelength λt2 that is longer than the resonant wavelength λc are observed. As shown in Fig. 8, the resonant wavelengths λt1 and λt2 of the light-emitting chip 10 are observed as valleys V1 and V2, respectively, where the reflectance drops. In the reflectance spectrum of the light-emitting chip 10, the valleys V1 and V2 have widths P1 and P2, respectively, and the wavelengths at the bottoms of the valleys V1 and V2, where the reflectance drops the most, are identified as the resonant wavelengths λt1 and λt2, respectively. In this example, in the reflectance spectrum of the light-emitting chip 10, the width P1 of the valley V1 means the width of the wavelength where the reflectance is 90% or less. The same applies to the width P2 of the valley V2.

[0103] The resonant wavelengths λt1 and λt2 result from the fact that the light-emitting chip 10 has the intermediate layer 93 and the semiconductor laminate Ls that constitutes the thyristor S. The resonant wavelengths λt1 and λt2, which are the bottoms of the valleys V1 and V2, and the widths P1 and P2 of the valleys V1 and V2 vary depending on the thicknesses of the intermediate layer 93 and the semiconductor laminate Ls. In the light-emitting chip 10 of this embodiment, the thicknesses of the intermediate layer 93 and the p-anode layer 85, n-gate layer 86, p-gate layer 87, and n-cathode layer 88 constituting the semiconductor laminate Ls are adjusted so that the resonant wavelengths λs1 and λs2 of the VCSEL are included in the valleys V1 and V2 in the reflectance spectrum. More specifically, the thicknesses of the intermediate layer 93 and each layer of the semiconductor laminate Ls are adjusted so that the resonant wavelength λs1 of the VCSEL is included in the valley V1 and the resonant wavelength λs2 of the VCSEL is included in the valley V2. The intermediate layer 93 and the p-anode layer 85, n-gate layer 86, p-gate layer 87, and n-cathode layer 88 constituting the semiconductor laminate Ls are examples of semiconductor layers. This makes it possible to suppress oscillations at the resonant wavelengths λs1 and λs2, which are different from the resonant wavelength λc of the VCSEL, in the light emitting chip 10.

[0104] In the reflectance spectrum, the resonant wavelength λs1 of the VCSEL being included in the valley V1 does not necessarily mean that the resonant wavelength λs1 of the VCSEL and the resonant wavelength Vt1 at the bottom of the valley V1 are the same. It is sufficient that the resonant wavelength Vt1 is included at least within the range of the width P1 of the valley V1. The same holds true for the relationship between the resonant wavelength λs2 of the VCSEL and the valley V2.

[0105] Here, in the light-emitting chip 10, the p-anode (DBR) layer 81, which faces each other across the light-emitting layer 82, and the stacked structure consisting of the resonator extension layer 92, the n-cathode (DBR) layer 83, the intermediate layer 93, the tunnel junction layer 84, and the semiconductor stack Ls form a resonator. In the light-emitting chip 10, in order for these layers to function as a resonator and oscillate light from the light-emitting layer 82, the reflectance of the p-anode (DBR) layer 81 and the reflectance of the stacked structure consisting of the resonator extension layer 92, the n-cathode (DBR) layer 83, the intermediate layer 93, the tunnel junction layer 84, and the semiconductor stack Ls must be high at the oscillation wavelength λ. Generally, in order for these layers to function as a resonator, the reflectance at the oscillation wavelength λ must be 99% or higher.

[0106] In the light-emitting chip 10 of this embodiment, the thicknesses of the intermediate layer 93 and each layer of the semiconductor laminate Ls are adjusted so that the resonant wavelengths λs1 and λs2 of the VCSEL are included in the valleys V1 and V2 in the reflectance spectrum. As a result, the reflectance of the laminate structure consisting of the resonator extension layer 92, the n-cathode (DBR) layer 83, the intermediate layer 93, the tunnel junction layer 84, and the semiconductor laminate Ls at the resonant wavelengths λs1 and λs2 of the VCSEL becomes lower than the reflectance required for oscillation at the resonant wavelengths λs1 and λs2. In this example, the reflectance spectrum is adjusted so that the resonant wavelengths λs1 and λs2 of the VCSEL are included within widths P1 and P2 of valleys V1 and V2 where the reflectance is 90% or less. The reflectance of the layered structure consisting of the cavity extension layer 92, n-cathode (DBR) layer 83, intermediate layer 93, tunnel junction layer 84, and semiconductor layered body Ls is 90% or less at the resonant wavelengths λs1 and λs2 of the VCSEL.

[0107] With this configuration, in the light-emitting chip 10 of this embodiment, the p-anode (DBR) layer 81, the resonator extension layer 92, the n-cathode (DBR) layer 83, the intermediate layer 93, the tunnel junction layer 84, and the stacked structure made up of the semiconductor stack Ls, which are opposed to each other across the light-emitting layer 82, do not function as a resonator at the resonant wavelengths λs1 and λs2. As a result, in the light-emitting chip 10, oscillation at the resonant wavelengths λs1 and λs2 of the VCSEL can be suppressed.

[0108] As described above, in the reflectance spectrum of the light-emitting chip 10, the resonant wavelengths λt1 and λt2 of the valleys V1 and V2 are different from the resonant wavelength λc of the VCSEL. Additionally, in the reflectance spectrum, the resonant wavelength λc of the VCSEL is not included in the valleys V1 and V2. Therefore, the light-emitting chip 10 ensures the reflectance required for oscillation at the resonant wavelength λc, and oscillation at the resonant wavelength λc is not excluded.

[0109] In the reflectance spectrum of the light-emitting chip 10, the layer whose thickness is adjusted so that the resonant wavelengths λs1 and λs2 are included in the valleys V1 and V2 may be any of the above-mentioned intermediate layer 93, the p anode layer 85, the n gate layer 86, the p gate layer 87, and the n cathode layer 88 that constitute the semiconductor laminate Ls. Furthermore, the light-emitting chip 10 does not need to have the intermediate layer 93 if the p anode layer 85, n gate layer 86, p gate layer 87, and n cathode layer 88 that constitute the semiconductor laminate Ls can be adjusted so that the resonant wavelengths λs1 and λs2 are included in the valleys V1 and V2 in the reflectance spectrum.

[0110] Furthermore, the semiconductor layers that are adjusted so that the resonant wavelengths λs1 and λs2 are included in the valleys V1 and V2 in the reflectance spectrum of the light-emitting chip 10 are not limited to the intermediate layer 93 and the p-anode layer 85, n-gate layer 86, p-gate layer 87, and n-cathode layer 88 that constitute the semiconductor laminate Ls. Any semiconductor layer that is stacked on the VCSEL and that generates the valleys V1 and V2 in which the resonant wavelengths λt1 and λt2 change depending on the thickness in the reflectance spectrum of the light-emitting chip 10 may be a single semiconductor layer or a multilayer film in which multiple semiconductor layers are stacked.

[0111] <Modifications, etc.> In the above-described embodiment, the tunnel junction layer 84 is provided between the semiconductor stack Lv and the semiconductor stack Ls. The tunnel junction layer 84 is not an essential component, and for example, instead of the tunnel junction layer 84, a layer of a III-V group compound having metallic conductivity may be provided. Furthermore, the layered structure of the semiconductor substrate or the like to which this embodiment is applied is not limited to the above, and other layers may be added or some layers may be removed within a range that is not inconsistent.

[0112] In the above-described embodiment, the protective layer 90 is provided with a light exit aperture 90A, and light from the VCSEL is emitted through this light exit aperture 90A. Depending on the composition of the semiconductor layers that make up the tunnel junction layer 84 and the setting thyristor S, part of the light from the VCSEL may be reflected or absorbed by the tunnel junction layer 84 and the setting thyristor S, reducing the light extraction efficiency. Therefore, in the above-described embodiment, the semiconductor layers constituting the setting thyristor S, the tunnel junction layer 84, and the intermediate layer 93 below the light emitting aperture 90A may be removed by etching to expose the VCSEL.

[0113] The measuring device 1000 can be used to measure the three-dimensional shape of an object, measure the distance to the object, and recognize the object from the identified three-dimensional shape. For example, the measuring device 1000 is installed in a portable information processing device and used to recognize the face of a user attempting to access the device. That is, the measuring device 1000 acquires the three-dimensional shape of the face of the accessing user, identifies whether or not the access is permitted, and permits use of the device (information processing device) only if the user is recognized as authorized for access. The measuring device 1000 can also be used in cases where the three-dimensional shape of an object is continuously measured, such as with augmented reality (AR) technology. Furthermore, the application range of the light emitting device 1 is not limited to a measuring device, but it can be used as a light source for a variety of purposes.

[0114] Although the embodiments of the present invention have been described above, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is clear from the claims that combinations of the above embodiments and various modifications or improvements to the above embodiments are also included in the technical scope of the present invention.

[0115] <Additional Notes> (((1))) A substrate; a light emitting device provided on the substrate, the light emitting device including an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength; a semiconductor layer provided on the light-emitting element, The reflectance spectrum of the light irradiated from the semiconductor layer side has a valley in which the wavelength changes depending on the thickness of the semiconductor layer, and the other resonance wavelength is included in the valley. Light-emitting parts. (((2))) The light-emitting component described in (((1))) includes a thyristor that, when turned on, causes light to be emitted from the active layer of the light-emitting element or increases the amount of light emitted from the active layer. (((3))) the semiconductor layer includes an intermediate layer provided between the light emitting element and the thyristor and made of a semiconductor that transmits light emitted from the active layer; The thickness of the intermediate layer is adjusted so that the other resonance wavelength is included in the valley of the reflectance spectrum. The light-emitting component according to (((2))). (((4))) the light-emitting element includes a first semiconductor layer having a first conductivity type, the active layer provided on the first semiconductor layer, a second semiconductor layer having a second conductivity type provided on the active layer, and a resonance layer provided between the first semiconductor layer and the active layer or between the active layer and the second semiconductor layer; The thickness of the resonant layer is at least three times the oscillation wavelength. A light emitting component according to any one of (((1))) to (((3))). (((5))) the reflectance spectrum has two valleys located on a higher wavelength side and a lower wavelength side than the oscillation wavelength, The light-emitting element has two other resonant wavelengths, one higher and one lower than the oscillation wavelength, and each of the other resonant wavelengths is included in a respective valley of the reflectance spectrum. A light emitting component according to any one of (((1))) to (((4))). (((6))) The light emitting component according to any one of (((1))) to (((5))), wherein the reflectance spectrum has a reflectance of 90% or less at the other resonant wavelengths of the valleys. (((7))) A substrate; a laminate provided on the substrate and processed into a light-emitting element; a semiconductor layer provided on the stacked body, the laminate includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength that is different from the one resonant wavelength; The reflectance spectrum of the light irradiated from the semiconductor layer side has a valley in which the wavelength changes depending on the thickness of the semiconductor layer, and the other resonance wavelength is included in the valley. Semiconductor substrate. (((8))) A substrate; a plurality of light-emitting elements provided on the substrate, each of which includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength; a plurality of thyristors provided on the respective light emitting elements, the thyristors turning on to emit light from the active layer of the light emitting element or to increase the amount of light emitted from the active layer; a driving unit that drives the plurality of thyristors individually to transition them to an ON state, The reflectance spectrum of the light irradiated from the thyristor side has a valley where the wavelength changes depending on the thickness of the thyristor, and the other resonant wavelength is included in the valley. Light-emitting device. (((9))) a light emitting device that emits light; an acquisition unit that receives reflected light from an object irradiated with light emitted from the light emitting device and acquires information about the object; Equipped with The light emitting device comprises: A substrate; a plurality of light-emitting elements provided on the substrate, each of which includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength; a plurality of thyristors provided on the respective light emitting elements, the thyristors turning on to emit light from the active layer of the light emitting element or to increase the amount of light emitted from the active layer; a driving unit that drives the plurality of thyristors individually to transition them to an ON state, The reflectance spectrum of the light irradiated from the thyristor side has a valley where the wavelength changes depending on the thickness of the thyristor, and the other resonant wavelength is included in the valley. Measuring equipment.

[0116] The light-emitting component described in (((1))) can suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where the light-emitting component does not include a semiconductor layer adjusted so that the valley of the reflectance spectrum includes another resonant wavelength. According to the light emitting component described in (((2))), by adjusting the thickness of the thyristor, it is possible to make the valley in the reflectance spectrum include other resonant wavelengths of the light emitting element. According to the light-emitting component described in (((3))), it is possible to include other resonant wavelengths of the light-emitting element in the valley of the reflectance spectrum by adjusting the thickness of the intermediate layer, without changing the layer structure or thickness of the thyristor. According to the light emitting component described in (((4))), oscillation in a higher-order transverse mode is less likely to occur than when the thickness of the resonant layer is less than three times the oscillation wavelength. According to the light-emitting component described in (((5))), it is possible to more effectively prevent light from being oscillated by switching to another resonant wavelength, compared to when the other resonant wavelength is not included in the respective valleys located on the higher and lower wavelength sides of the oscillation wavelength. According to the light-emitting component described in (((6))), it is possible to more effectively prevent light from being oscillated by switching to another resonant wavelength, compared to when the reflectance at another resonant wavelength in the valley of the reflectance spectrum exceeds 90%. The semiconductor substrate described in (((7))) can suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where the semiconductor substrate does not include a semiconductor layer adjusted so that the valley of the reflectance spectrum includes another resonant wavelength. According to the light emitting device described in (((8))), it is possible to suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where the light emitting device does not include a semiconductor layer adjusted so that the valley of the reflectance spectrum includes another resonant wavelength. The measuring device described in (((9))) can suppress light oscillation by switching to a resonant wavelength different from the oscillation wavelength, compared to a case where the measuring device does not include a semiconductor layer adjusted so that the valley of the reflectance spectrum includes another resonant wavelength. [Explanation of symbols]

[0117] 1...light emitting device, 10...light emitting chip, 80...substrate, 85...p anode layer, 86...n gate layer, 87...p gate layer, 88...n cathode layer, 92...cavity extension layer, 93...intermediate layer, 1000...measuring device, Lv, Ls...semiconductor laminate, S...setting thyristor, VCSEL...vertical cavity surface emitting laser

Claims

1. A substrate; a light emitting device provided on the substrate, the light emitting device including an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength; a semiconductor layer provided on the light-emitting element, The reflectance spectrum of the light irradiated from the semiconductor layer side has a valley in which the wavelength changes depending on the thickness of the semiconductor layer, and the other resonance wavelength is included in the valley. Light-emitting parts.

2. 2. The light emitting component according to claim 1, wherein the semiconductor layer includes a thyristor that, when turned on, causes the active layer of the light emitting element to emit light or increases the amount of light emitted from the active layer.

3. the semiconductor layer includes an intermediate layer provided between the light emitting element and the thyristor and made of a semiconductor that transmits light emitted from the active layer; The thickness of the intermediate layer is adjusted so that the other resonance wavelength is included in the valley of the reflectance spectrum. The light emitting component according to claim 2 .

4. the reflectance spectrum has two valleys located on a higher wavelength side and a lower wavelength side than the oscillation wavelength, The light-emitting element has two other resonant wavelengths that are higher and lower than the oscillation wavelength, and each of the other resonant wavelengths is included in a respective valley of the reflectance spectrum. The light emitting component according to any one of claims 1 to 3.

5. A substrate; a laminate provided on the substrate and processed into a light-emitting element; a semiconductor layer provided on the stacked body, the laminate includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength that is different from the one resonant wavelength; The reflectance spectrum of the light irradiated from the semiconductor layer side has a valley in which the wavelength changes depending on the thickness of the semiconductor layer, and the other resonance wavelength is included in the valley. Semiconductor substrate.

6. a light emitting device that emits light; an acquisition unit that receives reflected light from an object irradiated with light emitted from the light emitting device and acquires information about the object; Equipped with The light emitting device comprises: A substrate; a plurality of light-emitting elements provided on the substrate, each of which includes an active layer that emits light and a resonant structure that resonates light from the active layer, the resonant structure having one resonant wavelength that is an oscillation wavelength and another resonant wavelength different from the one resonant wavelength; a plurality of thyristors provided on the respective light emitting elements, the thyristors turning on to emit light from the active layer of the light emitting element or to increase the amount of light emitted from the active layer; a driving unit that drives the plurality of thyristors individually to transition them to an ON state, The reflectance spectrum of the light irradiated from the thyristor side has a valley in which the wavelength changes depending on the thickness of the thyristor, and the other resonant wavelength is included in the valley. Measuring device.

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