Semiconductor device, method for manufacturing semiconductor device, and mounting board

The semiconductor device design with bump electrodes, wall portions, and buffer material layers addresses misalignment challenges, enhancing yield and adhesive strength in semiconductor chip mounting.

JP2025114445APending Publication Date: 2025-08-05KK TOKAI RIKA DENKI SEISAKUSHO
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Patent Information

Application Number
JP2024118570
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-24
Filing Date
2024-07-24
Publication Date
2025-08-05

AI Technical Summary

Technical Problem

Existing semiconductor chip mounting technologies struggle to correct misalignment during the mounting process, limiting yield improvement in semiconductor devices.

Method used

A semiconductor device configuration featuring a wiring substrate with bump electrodes, a surrounding wall portion, and a buffer material layer that extends to the side surface of the semiconductor chip, allowing for self-alignment and enhanced adhesive strength.

Benefits of technology

The solution enhances the yield of semiconductor chip mounting by improving positional precision and adhesive strength, reducing defects and misalignment issues.

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Abstract

To further improve yield when a semiconductor chip is mounted on a wiring board.SOLUTION: A semiconductor device includes: a wiring board; a semiconductor chip provided on a main surface of the wiring board via a bump electrode; a wall part protruding from the main surface and provided so as to surround the entire periphery of the semiconductor chip; and a buffer material layer filled between the semiconductor chip and the wall part and extending up to a side surface of the semiconductor chip.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a semiconductor device, a method for manufacturing a semiconductor device, and a mounting substrate. [Background technology]

[0002] In recent years, in order to improve the yield of semiconductor devices, studies have been conducted on suppressing misalignment of semiconductor chips when they are mounted on a wiring substrate. For example, in a micro LED display device in which multiple LED (Light Emitting Diode) chips are arranged on a wiring substrate as pixels, studies have been conducted on suppressing misalignment of LED chips when they are mounted in order to prevent poor connections between the electrodes of the LED chips and the electrodes of the wiring substrate.

[0003] Such misalignment of the semiconductor chip is thought to occur when a relative sliding or rotational misalignment occurs between the semiconductor chip and the wiring board when the semiconductor chip is mounted on the wiring board.

[0004] The following Patent Document 1 discloses that an electronic component having an electrode portion with a recessed portion on its surface is mounted on a wiring board having protruding bump electrodes so that the recessed portion of the electrode portion and the bump electrode are joined face-to-face. The technology disclosed in Patent Document 1 makes it possible to suppress sliding or rotational misalignment between the electronic component and the wiring board by fitting the electrode portion with a recessed portion provided on the electronic component and the protruding bump electrode provided on the wiring board. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent Publication No. 2021-19037 Summary of the Invention [Problem to be solved by the invention]

[0006] However, with the technology disclosed in Patent Document 1, if the pressing position itself is misaligned when mounting a semiconductor chip on a wiring board, it is difficult to correct the misalignment. Therefore, the technology disclosed in Patent Document 1 has only a limited effect on improving the yield when mounting semiconductor devices.

[0007] Therefore, the present invention has been made in consideration of the above problems, and an object of the present invention is to provide a new and improved semiconductor device, a method for manufacturing a semiconductor device, and a mounting substrate that can further improve the yield when mounting semiconductor chips on a wiring substrate. [Means for solving the problem]

[0008] In order to solve the above problem, according to one aspect of the present invention, a semiconductor device is provided, comprising: a wiring substrate; a semiconductor chip provided on a main surface of the wiring substrate via a bump electrode; a wall portion protruding from the main surface and provided so as to surround the entire periphery of the semiconductor chip; and a buffer material layer filled between the semiconductor chip and the wall portion and extending to a side surface of the semiconductor chip.

[0009] In addition, in order to solve the above problem, according to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, including the steps of: preparing a wiring substrate having, on its main surface, a bump electrode and a wall portion surrounding the entire periphery of the area in which the bump electrode is provided; filling the area surrounded by the wall portion with adhesive to form a buffer layer; pushing the semiconductor chip into the buffer layer so that the chip electrode provided on the underside of the semiconductor chip faces the bump electrode; and extending the buffer layer pushed out by pushing the semiconductor chip onto the side of the semiconductor chip.

[0010] In order to solve the above-mentioned problems, according to another aspect of the present invention, there is provided a mounting substrate comprising: a wiring board; a bump electrode provided on a main surface of the wiring board; a wall portion protruding from the main surface and provided so as to surround the entire periphery of an area in which the bump electrode is provided; and a buffer material layer filling the area surrounded by the wall portion and having an opening provided on the outer periphery of the area. [Effects of the Invention]

[0011] As described above, according to the present invention, it is possible to further improve the yield when mounting semiconductor chips on wiring boards. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a vertical cross-sectional view showing a configuration example of a semiconductor device according to an embodiment of the present invention; [Figure 2A] FIG. 2 is a vertical cross-sectional view showing a step of manufacturing the semiconductor device according to the embodiment. [Figure 2B] FIG. 2 is a vertical cross-sectional view showing a step of manufacturing the semiconductor device according to the embodiment. [Figure 2C] FIG. 2 is a vertical cross-sectional view showing a step of manufacturing the semiconductor device according to the embodiment. [Figure 2D] FIG. 2 is a vertical cross-sectional view showing a step of manufacturing the semiconductor device according to the embodiment. [Figure 3A] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a first modified example. [Figure 3B] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a first modified example. [Figure 3C] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a first modified example. [Figure 4A] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a second modification. [Figure 4B] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a second modification. [Figure 5] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a third modified example. [Figure 6] FIG. 10 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device according to a fourth modified example. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant explanations will be omitted.

[0014] <1. Configuration example> First, a configuration example of a semiconductor device according to one embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a vertical cross-sectional view showing a configuration example of a semiconductor device 1 according to this embodiment.

[0015] 1, the semiconductor device 1 includes, for example, a wiring substrate 100, a semiconductor chip 110, a wall portion 120, a buffer material layer 130, and a bump electrode 140. The semiconductor device 1 may be a micro LED display device.

[0016] The wiring substrate 100 is a substrate provided with wiring (not shown) that electrically connects to each of the semiconductor chips 110 to be mounted. The wiring substrate 100 may be, for example, a glass substrate, a glass epoxy substrate, an epoxy substrate, a polyimide substrate, or a (meth)acrylic substrate, or may be a flexible substrate made of polyester, polyethersulfone, or the like. The wiring substrate 100 may be, for example, a pixel array substrate of a micro LED display device.

[0017] The bump electrodes 140 are provided in a convex shape on the main surface of the wiring substrate 100, and are electrodes that electrically connect the wiring (not shown) on the main surface of the wiring substrate 100 to the semiconductor chip 110. A bump electrode 140 is provided for each semiconductor chip 110 that is mounted on the wiring substrate 100. The bump electrodes 140 may have a convex shape such as a truncated cone shape, a column shape, a hemisphere shape, or a flattened sphere shape.

[0018] 1, the bump electrode 140 may be a resin core electrode in which the surface of a resin core 141 made of organic resin is covered with a metal film 142. However, the structure of the bump electrode 140 is not limited to the above. The bump electrode 140 may be made of a single metal or multiple metals, and may be, for example, a metal electrode formed by plating or vapor deposition, a solder paste, or a solder ball.

[0019] An adhesive layer using a metal such as titanium, copper, molybdenum, palladium, or nickel as a base metal may be provided between the resin core 141 and the metal film 142. The adhesive layer can physically bond the resin core 141 and the metal film 142 together.

[0020] The semiconductor chip 110 is an electronic component made of a semiconductor. The semiconductor chip 110 is mounted on the main surface of the wiring substrate 100 via bump electrodes 140. The semiconductor chip 110 may be made of silicon, a single element, or a compound semiconductor such as gallium nitride, gallium arsenide, or silicon carbide. The semiconductor chip 110 may also be formed by stacking layers made of the above semiconductors on a non-semiconductor substrate such as a sapphire substrate, a glass substrate, or a quartz substrate. The semiconductor chip 110 may be an integrated circuit (IC) chip having a computing function or an LED chip having a light-emitting function. For example, the semiconductor chip 110 may be an LED chip that functions as a pixel of a micro LED display device or a control IC chip of the micro LED display device.

[0021] Chip electrodes 111 are provided on the surface of the semiconductor chip 110 facing the main surface of the wiring substrate 100 (i.e., the bottom surface). The chip electrodes 111 are electrodes that electrically connect the semiconductor chip 110 to the wiring of the wiring substrate 100. The chip electrodes 111 are electrically connected to the bump electrodes 140, thereby electrically connecting the semiconductor chip 110 to the wiring of the wiring substrate 100. The chip electrodes 111 may be made of a metal such as gold, silver, copper, or aluminum.

[0022] The wall portion 120 is provided to protrude from the main surface of the wiring substrate 100 so as to surround the entire periphery of the semiconductor chip 110. The wall portion 120 is provided to hold the buffer material layer 130, which physically bonds the semiconductor chip 110 and the wiring substrate 100, around the periphery of the semiconductor chip 110. The wall portion 120 may be made of, for example, a patterned organic resin.

[0023] The wall portion 120 may be provided at a height higher than the height of the bump electrode 140 electrically connected to the chip electrode 111. In this way, the wall portion 120 can hold the buffer material layer 130 up to the height of the side surface of the semiconductor chip 110. Furthermore, the wall portion 120 may be provided at a height lower than the height of the top surface of the semiconductor chip 110 mounted on the wiring substrate 100 to avoid interference with other components.

[0024] The buffer material layer 130 is formed by filling a buffer material into the area surrounded by the wall portion 120. Specifically, the buffer material layer 130 may be formed of an adhesive buffer material and may physically bond the semiconductor chip 110 and the wiring substrate 100 together. For example, the buffer material layer 130 may physically bond the semiconductor chip 110 and the wiring substrate 100 together by filling the space surrounded by the semiconductor chip 110, the wiring substrate 100, and the wall portion 120. Furthermore, if the buffer material layer 130 extends to the side surfaces of the semiconductor chip 110, the buffer material layer 130 can bond the semiconductor chip 110 and the wiring substrate 100 together over a wider area, thereby further increasing the adhesive strength between the semiconductor chip 110 and the wiring substrate 100.

[0025] The buffer layer 130 may be configured to include, for example, a thermosetting adhesive as a buffer material. In such a case, the buffer layer 130 can be irreversibly cured by heat, thereby more firmly bonding the semiconductor chip 110 and the wiring substrate 100. For example, the buffer layer 130 may be configured to include a phenol-based adhesive, an epoxy-based adhesive, or an acrylic-based adhesive.

[0026] The buffer material constituting the buffer material layer 130 does not have to have adhesive properties. For example, the buffer material constituting the buffer material layer 130 may be a fluid substance such as solder flux. In such a case, the semiconductor device 1 may, as one example, bond the semiconductor chip 110 to the wiring substrate 100 by bonding the chip electrodes 111 to the bump electrodes 140. As another example, the semiconductor device 1 may bond the semiconductor chip 110 to the wiring substrate 100 by bonding metal to metal between the chip electrodes 111 and the above-mentioned adhesive layer instead of the bump electrodes 140.

[0027] According to the above configuration, the semiconductor device 1 can further increase the adhesive strength between the semiconductor chip 110 and the wiring substrate 100, thereby further increasing the yield when mounting the semiconductor chip 110. In particular, the semiconductor device 1 can bond the underside and side surfaces of the semiconductor chip 110 facing in different directions with the buffer layer 130, so it can exert a strong adhesive strength against external forces from various directions.

[0028] <2. Manufacturing method> Next, a method for manufacturing the semiconductor device 1 according to this embodiment will be described with reference to Figures 2A to 2D. Figures 2A to 2D are vertical cross-sectional views showing the steps for manufacturing the semiconductor device 1 according to this embodiment.

[0029] 2A, first, a wiring substrate 100 is prepared, which has, on its main surface, a bump electrode 140, a wall portion 120, and a buffer material layer 130. Specifically, first, an organic resin layer formed on the main surface of the wiring substrate 100 is patterned using photolithography to form a resin core 141 that becomes the core of the bump electrode 140, and a wall portion 120 that surrounds the entire periphery of the area including the resin core 141.

[0030] The wall portion 120 may be provided so as to be symmetrical with respect to the center line of the semiconductor chip 110 mounted on the bump electrode 140. Specifically, the wall portion 120 may be provided at a position where the distance between the semiconductor chip 110 mounted on the bump electrode 140 and the wall portion 120 is the same on both opposing sides. This is because, when the semiconductor chip 110 is mounted in a subsequent stage, the buffer material layer 130 pushed out by the semiconductor chip 110 applies a force to the semiconductor chip 110 so as to equalize the distance between the wall portion 120 on both sides and the semiconductor chip 110. In this way, the wall portion 120 can self-align the position of the semiconductor chip 110 to a position where the distance from the wall portion 120 on both sides is the same.

[0031] The bump electrode 140, which is made up of the resin core 141 and the metal film 142, can be more stably connected to the chip electrode 111 by being crushed by the chip electrode 111 when the semiconductor chip 110 is mounted in the subsequent stage. In such a case, the resin core 141 may be formed at the same time as the wall portion 120 when the organic resin layer is patterned, and thus may be provided at approximately the same height as the wall portion 120.

[0032] Next, a metal film 142 is formed on the surface of the resin core 141 to form the bump electrode 140. Furthermore, a thermosetting adhesive is filled into the area surrounded by the wall portion 120 to form the buffer layer 130. The buffer layer 130 may be provided at a height approximately the same as that of the wall portion 120, for example, so that the buffer layer 130 extruded when the semiconductor chip 110 is mounted in the subsequent stage rises up along the side surface of the semiconductor chip 110.

[0033] 2B, the semiconductor chip 110 is aligned with the wiring substrate 100. Specifically, the semiconductor chip 110 is aligned with the wiring substrate 100 so that the chip electrodes 111 of the semiconductor chip 110 and the bump electrodes 140 of the wiring substrate 100 face each other.

[0034] 2C, the semiconductor chip 110 is pressed into the buffer material layer 130. At this time, the wall portion 120 can further function as a stopper that prevents the pressed-in semiconductor chip 110 from shifting sideways.

[0035] As a result, the resin core 141 of the bump electrode 140 is crushed by the chip electrode 111, and the metal film 142 is electrically connected to the chip electrode 111. In addition, the buffer material layer 130 is extruded by the semiconductor chip 110, and the extruded buffer material layer 130 rises along the side surface of the semiconductor chip 110.

[0036] The extruded buffer material layer 130 applies pressure to the semiconductor chip 110 according to the distance between the wall portion 120 and the semiconductor chip 110. Specifically, the buffer material layer 130 is extruded through a narrower space as the distance between the wall portion 120 and the semiconductor chip 110 decreases. Therefore, the buffer material layer 130 is extruded with a higher pressure as the distance between the wall portion 120 and the semiconductor chip 110 decreases, and the extruded pressure is applied to the semiconductor chip 110. Therefore, as the pressure from the buffer material layer 130 acts on both sides of the semiconductor chip 110, a force corresponding to the pressure difference from both sides is applied to the semiconductor chip 110. In other words, a force is applied to the semiconductor chip 110 so that the distance between the wall portion 120 and the semiconductor chip 110 is equal on both sides. As a result, the semiconductor chip 110 is self-aligned to a position where the distance from the wall portion 120 on both sides is equal.

[0037] For example, in FIG. 2C , the semiconductor chip 110 is mounted offset to the left of the center line between the wall portions 120 on both sides when viewed from the front of the figure. Therefore, the extruded buffer layer 130 applies a higher pressure to the semiconductor chip 110 from the left side than from the right side. As a result, the semiconductor chip 110 moves to the right side due to the applied pressure until the pressure on the left and right sides is balanced. This causes the semiconductor chip 110 to self-align to a position where it is equidistant from the wall portions 120 on both sides.

[0038] 2D, after the semiconductor chip 110 is sufficiently pressed into the wiring substrate 100, the buffer material layer 130 is heated and hardened, thereby bonding the semiconductor chip 110 to the wiring substrate 100. In this way, the semiconductor chip 110 is mounted on the wiring substrate 100, and the semiconductor device 1 is formed.

[0039] According to the above manufacturing method, the semiconductor device 1 can mount the semiconductor chip 110 on the wiring substrate 100 by self-alignment based on the position of the wall portion 120. Since the wall portion 120 is patterned with high precision by photolithography, the semiconductor device 1 can mount the semiconductor chip 110 on the wiring substrate 100 with higher positional precision.

[0040] <3. Modifications> (3.1. First Modification) Next, a first modified example of this embodiment will be described with reference to Figures 3A to 3C. Figures 3A to 3C are vertical cross-sectional views showing the steps of manufacturing the semiconductor device 1 according to the first modified example.

[0041] In the first modification, an opening 130H is formed in the buffer material layer 130. In this case, the pushing resistance of the semiconductor chip 110 into the buffer material layer 130 changes before and after the buffer material layer 130, which has flowed due to the pushing of the semiconductor chip 110, fills the opening 130H. In the first modification, this change in the pushing resistance of the semiconductor chip 110 can be used to determine the end point of the pushing of the semiconductor chip 110.

[0042] The semiconductor chip 110 may be, for example, a control IC chip having a relatively large area of 100 μm square. When the semiconductor chip 110 having a relatively large area is mounted on the wiring substrate 100, the buffer material layer 130 near the center of the semiconductor chip 110 is less likely to flow, making it difficult for the semiconductor chip 110 to be pressed into the buffer material layer 130. Therefore, in the first modification, by forming an opening 130H through which the buffer material layer 130 can easily flow, the semiconductor chip 110 can be more easily pressed into the buffer material layer 130. Furthermore, after the buffer material layer 130 flows into the opening 130H and fills the opening 130H, the resistance when pressing the semiconductor chip 110 into the buffer material layer 130 becomes higher. Therefore, in the first modification, the end point of pressing the semiconductor chip 110 into the buffer material layer 130 can be determined by using the change in the pressing resistance of the semiconductor chip 110 into the buffer material layer 130.

[0043] As shown in FIG. 3A, a wiring substrate 100 is prepared, which has bump electrodes 140, wall portions 120, and a buffer material layer 130 provided on its main surface.

[0044] An opening 130H is further formed in the buffer material layer 130 provided on the wiring substrate 100 by patterning using photolithography. The opening 130H may be provided in a position of the buffer material layer 130 corresponding to the outer edge of the semiconductor chip 110. In such a case, the opening 130H can easily extend to an area that is not pressed into the semiconductor chip 110, and therefore, it is possible to easily form an escape route for the air in the opening 130H to escape when the buffer material layer 130 flows.

[0045] 3B, the semiconductor chip 110 is pressed into the buffer layer 130. As a result, the resin core 141 of the bump electrode 140 is crushed by the chip electrode 111, and the metal film 142 is electrically connected to the chip electrode 111. The buffer layer 130 pressed into the semiconductor chip 110 flows into the opening 130H. At this time, the pressed buffer layer 130 flows in the in-plane direction of the wiring substrate 100, so the pressing resistance of the semiconductor chip 110 into the buffer layer 130 is relatively low.

[0046] 3C , when the semiconductor chip 110 is further pressed into the buffer material layer 130, the pressed buffer material layer 130 fills the opening 130H, then rises from between the wall portion 120 and the semiconductor chip 110, and rises along the side surface of the semiconductor chip 110. At this time, the pressed buffer material layer 130 flows from the space between the wall portion 120 and the semiconductor chip 110 toward the top of the wiring substrate 100, so that the pressing resistance of the semiconductor chip 110 against the buffer material layer 130 becomes higher. Therefore, by detecting the change in the pressing resistance of the semiconductor chip 110 against the buffer material layer 130, the end point of pressing the semiconductor chip 110 into the buffer material layer 130 can be determined.

[0047] Furthermore, a bonding surface 131 where different layers are bonded together is formed at the location where the opening 130H is filled with the buffer material layer 130. Specifically, the bonding surface 131 is a surface where the buffer material layers 130 on both sides of the opening 130H are bonded together when filling the opening 130H. The bonded buffer material layers 130 do not mix with each other, and are therefore observed as a bonding surface where different layers are bonded together.

[0048] As described above, in the first modification, by providing the opening 130H in the buffer material layer 130, the change in resistance when the semiconductor chip 110 is pressed into the buffer material layer 130 can be used as a stopper against the pressing. Therefore, according to the first modification, it is possible to prevent the semiconductor chip 110 from being pressed excessively into the buffer material layer 130, thereby suppressing the occurrence of defects. Therefore, the semiconductor device 1 according to the first modification can improve the yield.

[0049] (3.2. Second Modification) A second modification of this embodiment will be described with reference to Figures 4A and 4B, which are vertical cross-sectional views showing steps in manufacturing a semiconductor device 1 according to the second modification.

[0050] In the second modified example, a flat jig 200 is used to press the semiconductor chip 110. In this case, the buffer material layer 130 that flows when the semiconductor chip 110 is pressed flows from between the wall portion 120 and the semiconductor chip 110 to between the wall portion 120 and the jig 200. In the second modified example, a change in the pressing resistance of the semiconductor chip 110 due to the space into which the buffer material layer 130 has flowed can be used to determine the end point of pressing the semiconductor chip 110.

[0051] The semiconductor chip 110 may be, for example, an LED chip with a relatively small area of 10 μm square. When a semiconductor chip 110 with a relatively small area is mounted on the wiring substrate 100, a pressing jig 200 larger than the semiconductor chip 110 is used to press the semiconductor chip 110 more uniformly. Therefore, in the second modification, the buffer material layer 130 pushed out by the semiconductor chip 110 flows into the space between the wall 120 and the semiconductor chip 110 and the space between the wall 120 and the jig 200. At this time, the space between the wall 120 and the jig 200 is narrower than the space between the wall 120 and the semiconductor chip 110, so the resistance when pressing the semiconductor chip 110 into the buffer material layer 130 is higher. Therefore, in the second modification, the end point of pressing the semiconductor chip 110 into the buffer material layer 130 can be determined by using the change in the pressing resistance of the semiconductor chip 110 against the buffer material layer 130.

[0052] 4A, a wiring substrate 100 is prepared, the main surface of which is provided with bump electrodes 140, wall portions 120, and a buffer layer 130. The semiconductor chip 110 may be attached to, for example, a rigid jig 200 and pressed into the buffer layer 130 together with the jig 200. The jig 200 may be, for example, a sapphire substrate having a flat plate shape that is larger than the semiconductor chip 110.

[0053] 4B, the semiconductor chip 110 is pressed into the buffer layer 130. As a result, the resin core 141 of the bump electrode 140 is crushed by the chip electrode 111, and the metal film 142 is electrically connected to the chip electrode 111. The buffer layer 130 is also pushed out by the semiconductor chip 110, and the pushed-out buffer layer 130 rises up along the side surface of the semiconductor chip 110. At this time, the flowing buffer layer 130 flows into the space between the wall portion 120 and the semiconductor chip 110, which is relatively wide apart, so that the pressing resistance of the semiconductor chip 110 into the buffer layer 130 is relatively low.

[0054] When the semiconductor chip 110 is pressed further into the buffer material layer 130, the pressed buffer material layer 130 flows from the side surface of the semiconductor chip 110 into the space between the wall portion 120 and the jig 200. At this time, the flowed buffer material layer 130 flows into the space between the wall portion 120 and the jig 200, which is narrower than the space between the wall portion 120 and the semiconductor chip 110, and therefore the resistance to pressing the semiconductor chip 110 into the buffer material layer 130 becomes higher. Therefore, by detecting the change in the resistance to pressing the semiconductor chip 110 into the buffer material layer 130, the end point of pressing the semiconductor chip 110 into the buffer material layer 130 can be determined.

[0055] After the mounting of the semiconductor chip 110 on the wiring substrate 100 is completed, the jig 200 is removed from the semiconductor chip 110. At this time, the upper surface of the semiconductor chip 110 and the upper surface of the buffer material layer 130 that has flowed up to the top of the wall portion 120 are in contact with the lower surface of the jig 200 and therefore are flush with each other.

[0056] As described above, in the second modified example, by using the jig 200 when pressing the semiconductor chip 110 into the buffer material layer 130, the change in resistance when pressing the semiconductor chip 110 into the buffer material layer 130 can be used as a stopper against the pressing. Therefore, according to the second modified example, it is possible to prevent the semiconductor chip 110 from being pressed excessively into the buffer material layer 130, thereby suppressing the occurrence of defects. Therefore, the semiconductor device 1 according to the second modified example can improve the yield.

[0057] (3.3. Third Modification) A third modified example of this embodiment will be described with reference to Fig. 5. Fig. 5 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device 2 according to the third modified example. Specifically, Fig. 5 shows a step of pressing the semiconductor chip 110 into the buffer material layer 130 using a jig 200 in order to mount the semiconductor chip 110 on the wiring substrate 100.

[0058] 5, in the semiconductor device 2 according to the third modification, in addition to the bump electrodes 140 and the wall portions 120, at least one stopper 121 is further provided on the main surface of the wiring substrate 100. When the semiconductor chip 110 is pressed into the buffer material layer 130, the stopper 121 is sandwiched between the semiconductor chip 110 and the wiring substrate 100 without being crushed. In other words, the stopper 121 can stop the semiconductor chip 110 from being pressed into the buffer material layer 130.

[0059] The stoppers 121 may be provided on the main surface of the wiring substrate 100 at a distance from the bump electrodes 140 and the wall portions 120 so as not to hinder the flow of the buffer material layer 130. For example, the stoppers 121 may be provided at a position corresponding to the outer periphery or the center of the semiconductor chip 110. Since the number of bump electrodes 140 and the like to be arranged on the outer periphery or the center of the semiconductor chip 110 is small and there is ample space, the stoppers 121 can be suitably arranged at a distance from the bump electrodes 140 and the wall portions 120. Furthermore, in order to evenly receive the pressing pressure from the semiconductor chip 110 on the main surface of the wiring substrate 100, it is preferable that at least three or more stoppers 121 are provided on the main surface of the wiring substrate 100 in N-fold symmetry (N is a natural number greater than or equal to 3) or line symmetry.

[0060] The stopper 121 may be made of a resin material or a metal material that is harder than the bump electrode 140. For example, if the bump electrode 140 is a resin core electrode in which the surface of a resin core 141 is covered with a metal film 142, the stopper 121 may be made of a resin material or a metal material that is harder than the resin core 141. In this way, when the semiconductor chip 110 is pressed into the buffer material layer 130, the stopper 121 can stop the pressing by coming into contact with the semiconductor chip 110 without being crushed. Note that, in order to make the manufacturing process easier, the stopper 121 may be made of a resin material or a metal material that can be patterned by photolithography and etching.

[0061] In the third modified example, the depth to which the semiconductor chip 110 is pressed into the buffer material layer 130 is controlled by the height of the stopper 121. Therefore, it is preferable that the height of the stopper 121 is such that the bump electrodes 140 are appropriately crushed by the semiconductor chip 110 and the chip electrodes 111 of the semiconductor chip 110 and the bump electrodes 140 are appropriately connected to each other.

[0062] The semiconductor chip 110 may be a control IC chip having a relatively large area of, for example, 100 μm square. It is more difficult to control the amount of pressing of a large-area control IC chip into the buffer material layer 130 and ensure uniformity of the pressing than it is for a small-area LED chip. Therefore, it is preferable that the semiconductor device 2 uses a stopper 121 provided on the main surface of the wiring substrate 100 to control the pressing of the control IC chip into the buffer material layer 130.

[0063] As described above, in the semiconductor device 2 according to the third modification, the stopper 121 is provided on the main surface of the wiring substrate 100, and the depth to which the semiconductor chip 110 is pressed into the buffer material layer 130 is controlled by the height of the stopper 121. Therefore, in the third modification, the pressing of the semiconductor chip 110 into the buffer material layer 130 is controlled with higher precision, which further improves the reliability of the connection between the chip electrodes 111 and the bump electrodes 140. Furthermore, because it is easier to control the pressing depth of the semiconductor chip 110 into the buffer material layer 130, it is possible to simplify the manufacturing equipment and reduce costs.

[0064] (3.4. Fourth Modification) A fourth modified example of this embodiment will be described with reference to Fig. 6. Fig. 6 is a vertical cross-sectional view showing a step of manufacturing a semiconductor device 3 according to the fourth modified example. Specifically, Fig. 6 shows a step of pressing the semiconductor chip 110 into the buffer material layer 130 using a jig 200 in order to mount the semiconductor chip 110 on the wiring substrate 100.

[0065] 6, in the semiconductor device 3 according to the fourth modification, when the semiconductor chip 110 is pressed into the buffer material layer 130, the jig 200 that presses the semiconductor chip 110 comes into contact with a wall 120A provided on the main surface of the wiring substrate 100. That is, the wall 120A can stop the semiconductor chip 110 from being pressed into the buffer material layer 130 by contacting the jig 200.

[0066] The jig 200 that presses the semiconductor chip 110 may be a flat member having an area larger than that of the semiconductor chip 110. In this case, when pressing the semiconductor chip 110 into the buffer material layer 130, the jig 200 can abut against the wall portion 120A in an area extending from the semiconductor chip 110. The jig 200 may also abut against both of the wall portions 120A that face each other across the bump electrode 140. In such a case, the jig 200 can more uniformly control the pressing depth of the semiconductor chip 110 within the surface of the semiconductor chip 110.

[0067] The wall portion 120A may be made of a resin material or a metal material that is harder than the bump electrode 140. For example, if the bump electrode 140 is a resin core electrode in which the surface of a resin core 141 is covered with a metal film 142, the wall portion 120A may be made of a resin material or a metal material that is harder than the resin core 141. In this way, when the semiconductor chip 110 is pressed into the buffer material layer 130, the wall portion 120A comes into contact with the jig 200 without being crushed, thereby stopping the pressing of the semiconductor chip 110. Note that, in order to make the manufacturing process easier, the wall portion 120A may be made of a resin material or a metal material that can be patterned by photolithography and etching.

[0068] In the fourth modification, the depth to which the semiconductor chip 110 is pressed into the buffer material layer 130 is controlled by the height of the wall portion 120A. Therefore, it is preferable that the height of the wall portion 120A is such that the semiconductor chip 110 properly crushes the bump electrodes 140 and the chip electrodes 111 of the semiconductor chip 110 and the bump electrodes 140 are properly connected to each other.

[0069] The semiconductor chip 110 may be, for example, an LED chip with a relatively small area of 10 μm square. The small-area LED chip requires a smaller area of the jig 200 used for pressing, compared to a control IC chip with a large area. Therefore, the jig 200 can be easily configured with an area that can abut against the wall portion 120A.

[0070] In the fourth modification, the jig 200 that presses the semiconductor chip 110 abuts against the wall 120A, so that the surface including the apex of the wall 120A and the upper surface of the semiconductor chip 110 opposite to the surface facing the wiring substrate 100 are flush with each other. In addition, if the buffer layer 130 pressed by the semiconductor chip 110 extends further from the side surface of the semiconductor chip 110 to the jig 200, the surface including the apex of the wall 120A, the upper surface of the semiconductor chip 110, and the upper surface of the buffer layer 130 are flush with each other.

[0071] As described above, in the semiconductor device 3 according to the fourth modification, the jig 200 used to press the semiconductor chip 110 abuts against the wall portion 120A provided on the main surface of the wiring substrate 100. This allows the depth to which the semiconductor chip 110 is pressed into the buffer material layer 130 to be controlled by the height of the wall portion 120A. Therefore, in the fourth modification, the pressing of the semiconductor chip 110 into the buffer material layer 130 is controlled with higher precision, thereby further improving the reliability of the connection between the chip electrodes 111 and the bump electrodes 140. Furthermore, since it is easier to control the pressing depth of the semiconductor chip 110 into the buffer material layer 130, it is possible to simplify the manufacturing equipment and reduce costs.

[0072] Although the preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings, the present invention is not limited to these examples. It is clear that a person skilled in the art to which the present invention pertains can conceive of various modifications and alterations within the scope of the technical ideas set forth in the claims, and it is understood that these also naturally fall within the technical scope of the present invention. [Explanation of symbols]

[0073] 1, 2, 3... semiconductor device, 100... wiring board, 110... semiconductor chip, 120, 120A... wall portion, 121... stopper, 130... buffer material layer, 130H... opening, 140... bump electrode, 141... resin core, 142... metal film, 200... jig

Claims

1. A wiring board; a semiconductor chip provided on a main surface of the wiring substrate via bump electrodes; a wall portion protruding from the main surface and provided so as to surround the entire periphery of the semiconductor chip; a buffer layer filled between the semiconductor chip and the wall portion and extending to a side surface of the semiconductor chip; A semiconductor device comprising:

2. 2. The semiconductor device according to claim 1, wherein said bump electrodes are electrically connected to chip electrodes provided on the underside of said semiconductor chip.

3. 2. The semiconductor device according to claim 1, wherein said bump electrode is a resin-core electrode having an organic resin core and a surface covered with a metal film.

4. The semiconductor device according to claim 1 , wherein the buffer layer includes a thermosetting adhesive.

5. The semiconductor device according to claim 1 , wherein the height of said wall portion is lower than the height of the upper surface of said semiconductor chip.

6. 6. The semiconductor device according to claim 5, wherein said buffer layer below said semiconductor chip has a bonding surface formed by bonding different layers together.

7. 6. The semiconductor device according to claim 1, wherein an upper surface of said buffer layer is flush with an upper surface of said semiconductor chip.

8. The semiconductor device according to claim 1 , wherein the semiconductor chip is an LED chip.

9. 2. The semiconductor device according to claim 1, further comprising at least one stopper provided between said wiring substrate and said semiconductor chip.

10. 10. The semiconductor device according to claim 9, wherein the stopper is provided at a center or an outer periphery of the semiconductor chip, spaced apart from the bump electrode and the wall portion.

11. preparing a wiring substrate having, on its main surface, bump electrodes and a wall portion surrounding the entire periphery of an area in which the bump electrodes are provided; filling the area surrounded by the wall portion with adhesive to form a buffer layer; pressing the semiconductor chip into the buffer layer so that chip electrodes provided on the underside of the semiconductor chip face the bump electrodes; the buffer layer extruded by the pressing of the semiconductor chip extends to a side surface of the semiconductor chip; A method for manufacturing a semiconductor device, comprising:

12. The method for manufacturing a semiconductor device according to claim 11 , wherein the semiconductor chip is pressed into the buffer layer by pressing an upper surface of the semiconductor chip with a flat jig that is larger than the semiconductor chip.

13. The method for manufacturing a semiconductor device according to claim 12 , wherein the pushing of the semiconductor chip by the jig is stopped when the jig abuts against the wall portion.

14. The method for manufacturing a semiconductor device according to claim 13 , wherein when the jig stops pressing the semiconductor chip, the buffer material layer further extends from the side surface of the semiconductor chip to the jig.

15. the bump electrode is a resin-core electrode having an organic resin core and a surface covered with a metal film; 15. The method for manufacturing a semiconductor device according to claim 11, wherein the bump electrodes are crushed by the chip electrodes when the semiconductor chip is pressed in.

16. forming an opening in the formed buffer layer; 15. The method for manufacturing a semiconductor device according to claim 11, wherein the buffer layer flows in an in-plane direction of the wiring substrate so as to fill the opening by pressing the semiconductor chip into the buffer layer.

17. A wiring board; a bump electrode provided on a main surface of the wiring substrate; a wall portion protruding from the main surface and provided so as to surround the entire periphery of an area where the bump electrode is provided; a buffer layer that fills the area surrounded by the wall portion and has an opening on the periphery of the area; A mounting board comprising:

Citation Information

Patent Citations

  • Electronic component mounting structure, electronic component mounting method, and LED display panel

    JP2021019037A