Display device

Abstract

To provide a metal oxide film including crystalline portions, a metal oxide film with high stability of physical properties, a metal oxide film with improved electrical properties, a metal oxide film capable of increasing the field-effect mobility, and a semiconductor device with high reliability by applying the metal oxide film.SOLUTION: In a semiconductor device, a metal oxide film 108 and a metal film 308 contain indium, M (M is Al, Ga, Y, or Sn), and zinc. In X-ray diffraction in a direction perpendicular to the film surface, there are regions where diffraction intensity peaks due to a crystal structure are observed. In a transmission electron microscope image of a cross section perpendicular to the film surface, a plurality of crystalline portions are observed. A percentage of a region other than the crystalline portions is 20% or more and 60% or less.SELECTED DRAWING: Figure 53

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a metal oxide film and a manufacturing method thereof. The present invention relates to a semiconductor device using an oxide film.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. The term "device" refers to devices in general, and a transistor, a semiconductor circuit, and the like are examples of semiconductor devices. devices, storage devices, imaging devices, electro-optical devices, power generation devices (thin-film solar cells, organic thin-film solar cells) etc.), and electronic devices may include semiconductor devices. [Background technology]

[0003] Oxide semiconductors have been attracting attention as semiconductor materials that can be used in transistors. In Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, The composition of the oxide semiconductor layer serving as a channel contains indium and gallium, and By increasing the composition of SiO2 to that of gallium, the field effect mobility (simply called mobility, or A semiconductor device with enhanced μFE (sometimes referred to as μFE) is disclosed.

[0004] In addition, Non-Patent Document 1 states that an oxide semiconductor containing indium, gallium, and zinc is , In 1-x Ga 1+x O3(ZnO) m (x is a number that satisfies -1≦x≦1, and m is a natural number) Furthermore, Non-Patent Document 1 discloses that the compound has a homologous phase represented by the formula: The solid solution range of the homologous phase is disclosed. For example, when m = 1, the solid solution region of the homologous phase is from -0.33 to 0.0 8, and the solid solution region of the homologous phase when m = 2 is in the range of x from -0.68 to 0.32. The range is. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-7399 [Non-patent literature]

[0006] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one embodiment of the present invention is to provide a metal oxide film including a crystal part. An object of the present invention is to provide a metal oxide film having highly stable physical properties. Another object of the present invention is to provide a metal oxide film having improved field-effect mobility. Another object of the present invention is to provide a metal oxide film that can enhance the electrical conductivity of the metal oxide film. Another object of the present invention is to provide a highly reliable semiconductor device using a metal oxide film. One of the objectives is to provide a body device.

[0008] Another aspect of the present invention provides a metal oxide film that can be formed at low temperatures and has highly stable physical properties. Another object is to provide a semiconductor device that can be formed at low temperature and is highly reliable. One of our goals is to provide

[0009] Alternatively, one aspect of the present invention provides a flexible device to which a metal oxide film is applied. This is one of the challenges.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter can be extracted from the description, drawings, claims, etc. [Means for solving the problem]

[0011] One aspect of the present invention is a method for manufacturing a semiconductor device using indium, M (where M is Al, Ga, Y, or Sn), and zinc. In addition, X-ray diffraction in the direction perpendicular to the film surface shows that the crystal structure The diffraction intensity peaks due to the film surface are observed in the region. In the electron microscope image, multiple crystalline areas are observed. The ratio of the area other than the crystalline areas is 2. Between 0% and 60%, or between 25% and 100%.

[0012] In addition, the ratio of the crystal portions whose c-axes are oriented in the film thickness direction to the crystal portions whose c-axes are oriented in other directions is 1 / 2. It is preferable that the proportion of the crystalline portion is higher than that of the crystalline portion facing the crystalline portion.

[0013] In addition, the first image, which is a fast Fourier transform of the cross-sectional TEM image, shows periodicity. In the second image, which is inverse Fourier transformed after applying mask processing to leave the area, the remaining part of the original image is The percentage of the area after subtracting the remaining image is 20% or more but less than 60%, or 25% or more but less than 100% It is preferred to have an area that is less than 1000 .mu.m.

[0014] In addition, the thickness was reduced to 10 nm or more and 50 nm or less, and the probe diameter was set to 50 nm or more. In electron diffraction in the direction perpendicular to the cross section, a ring-shaped diffraction pattern and a ring-shaped a first electron beam diffraction pattern having two first spots at positions overlapping the diffraction pattern; In electron diffraction, the ion was observed and the probe diameter was set to 0.3 nm or more and 5 nm or less. a second electron beam having a first spot and a plurality of second spots distributed in a circumferential direction; It is preferable to have an area where a diffraction pattern can be observed.

[0015] The two first spots are observed symmetrically with respect to the center, and the most The angle between the first line passing through the high-brightness point and the center and the normal direction of the film surface is 0 degrees or more and 1 It is preferable to have an area that is 0 degrees or less.

[0016] In the first electron diffraction pattern, a second line perpendicular to the first line and a ring The intensity of the ring-shaped diffraction pattern at the intersection with the first spot It is preferable to have an area smaller than the brightness of

[0017] The intensity of the first spot is determined by the intersection of the second straight line and the ring-shaped diffraction pattern. The brightness of the ring-shaped diffraction pattern is greater than 1 and less than 9 times. It is preferable to do so.

[0018] One aspect of the present invention is a method for manufacturing a semiconductor device using a metal oxide semiconductor (metal oxide semiconductor) containing indium, M (where M is Al, Ga, Y, or Sn), and zinc. In addition, X-ray diffraction in the direction perpendicular to the film surface shows that the crystalline structure Furthermore, there is a region in which a peak in the diffraction intensity due to the above phenomenon is observed. The specimen was sliced to the thickness shown below, and the probe diameter was set to 50 nm or more. In diffraction, a ring-shaped diffraction pattern and two overlapping patterns are and a first electron diffraction pattern having a first spot of In the electron beam diffraction with a size of 0.3 nm to 5 nm, the first spot and the circumferentially separated and a region in which a second electron diffraction pattern having a plurality of second spots distributed thereon is observed. Has.

[0019] The first spot has a shape that spreads in the circumferential direction, and the circumference of the first spot The angle between the two lines passing through the two ends of the direction and the center of the electron diffraction pattern is , preferably within 45 degrees.

[0020] Another embodiment of the present invention is a semiconductor device including a semiconductor layer, a gate insulating layer, and a gate. The semiconductor layer includes the metal oxide film. [Effects of the Invention]

[0021] According to one embodiment of the present invention, a metal oxide film including a crystalline portion can be provided. It is possible to provide a metal oxide film with high quality. Alternatively, it is possible to provide a novel metal oxide film. This makes it possible to provide a highly reliable semiconductor device using a metal oxide film.

[0022] According to another aspect of the present invention, a metal oxide that can be formed at low temperatures and has highly stable physical properties is provided. Alternatively, a highly reliable semiconductor device can be provided that can be formed at low temperatures.

[0023] Alternatively, according to one aspect of the present invention, a metal oxide film is applied to provide a flexible device. Can be provided. [Brief explanation of the drawings]

[0024] [Figure 1] XRD measurement results of metal oxide films. [Figure 2] Cross-sectional observation image of a metal oxide film. [Figure 3] Electron diffraction pattern of a metal oxide film. [Figure 4] Electron diffraction pattern of a metal oxide film. [Figure 5] Electron diffraction pattern of a metal oxide film. [Figure 6] Electron diffraction pattern of a metal oxide film. [Figure 7] Electron diffraction pattern and brightness profile of a metal oxide film. [Figure 8] Relative brightness estimated from the electron diffraction pattern of a metal oxide film. [Figure 9] Electron diffraction pattern of a metal oxide film. [Figure 10] Measurement results of fluctuations in the orientation of the crystalline parts of a metal oxide film. [Figure 11] Cross-sectional observation image of a metal oxide film and a cross-sectional observation image after image analysis. [Figure 12] Electrical characteristics of a transistor. [Figure 13] TDS measurement results of metal oxide film. [Figure 14] SIMS measurement results of metal oxide film. [Figure 15] Model used to calculate the transfer of excess oxygen. [Figure 16] Model used to calculate the transfer of excess oxygen. [Figure 17] Model used to calculate the transfer of excess oxygen. [Figure 18] Model used to calculate the transfer of excess oxygen. [Figure 19] Calculation results explaining the ease of movement of excess oxygen. [Figure 20] Model used to calculate the movement of oxygen vacancies. [Figure 21]Model used to calculate the movement of oxygen vacancies. [Figure 22] Calculation results explaining the ease of oxygen vacancy migration. [Figure 23] ESR measurement results of metal oxide films. [Figure 24] CPM measurement results of metal oxide film. [Figure 25] FIG. [Figure 26] FIG. [Figure 27] FIG. 1 is a diagram showing the density of interface states. [Figure 28] FIG. [Figure 29] Calculation results of defect levels in transistors and their electrical characteristics. [Figure 30] Electrical characteristics of a transistor. [Figure 31] 10A and 10B are diagrams illustrating the range of atomic ratios of oxide semiconductor films. [Figure 32] A diagram explaining the InMZnO4 crystal. [Figure 33] 1A and 1B are diagrams illustrating energy bands of a transistor in which an oxide semiconductor film is used for a channel region. [Figure 34] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 35] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 36] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 37] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 38] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 39] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 40] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 41] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 42] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 43] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 44]1 is a cross-sectional view illustrating a semiconductor device. [Figure 45] FIG. 1 is a diagram illustrating a band structure. [Figure 46] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 47] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 48] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 49] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 50] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 51] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 52] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 53] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 54] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 55] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 56] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 57] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 58] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 59] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 60] 1A to 1C are cross-sectional views illustrating a method for forming an EL layer. [Figure 61] FIG. 1 is a conceptual diagram illustrating a droplet ejection device. [Figure 62] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 63] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 64] 1A and 1B are a top view and a cross-sectional view of a semiconductor device; [Figure 65] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 66] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 67] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 68] 1A and 1B are graphs and circuit diagrams illustrating one embodiment of the present invention. [Figure 69] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 70] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 71] 1A to 1C are a block diagram, a circuit diagram, and waveform diagrams illustrating one embodiment of the present invention. [Figure 72] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 73] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 74] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 75] FIG. 2 is a diagram illustrating a display module. [Figure 76] 1A to 1C illustrate electronic devices. [Figure 77] 1A to 1C illustrate electronic devices. [Figure 78] FIG. 1 is a perspective view illustrating a display device. DETAILED DESCRIPTION OF THE INVENTION

[0025] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention is based on the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0026] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0027] In each figure described in this specification, the size, layer thickness, or area of each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0028] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0029] A transistor is a type of semiconductor device that controls the amplification of current and voltage, and conduction or non-conduction. In this specification, the transistor can be , IGFET(Insulated Gate Field Effect Trans istor) and thin film transistor (TFT) ) is included.

[0030] Also, the functions of "source" and "drain" can be changed by using transistors with different polarities. Or, when the direction of the current changes during circuit operation, the positions may be swapped. Therefore, in this specification, the terms "source" and "drain" may be used interchangeably. It shall be possible.

[0031] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the active layer of a transistor, the metal Oxides are sometimes called oxide semiconductors. In other words, the transistor can be a transistor including a metal oxide or an oxide semiconductor.

[0032] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides (metal ox). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0033] In the present specification and the like, CAAC (c-axis aligned crystal) l), and CAC (cloud aligned composite) CAAC represents an example of a crystal structure, and CAC represents a function or a material configuration. Represents an example.

[0034] In this specification and the like, CAC-OS or CAC-metal oxide means Some materials have the function of a conductor, and some materials have the function of a dielectric (or insulator). However, the material as a whole functions as a semiconductor. When ethanolic oxide is used in the active layer of a transistor, the conductor acts as a carrier. The dielectric has the function of not letting the electrons (or holes) that become carriers flow. The function as a conductor and the function as a dielectric are complementarily acted on each other. By doing so, the switching function (On / Off function) can be It can be attached to CAC-metal oxide. By separating the functions of each metal oxide, both functions can be maximized. can be increased to the maximum.

[0035] In this specification and the like, CAC-OS or CAC-metal oxide means The conductive region has the function of the conductor described above and the dielectric region. The conductive region has the above-mentioned dielectric function. The regions may be separated at the nanoparticle level. The conductive regions may be unevenly distributed in the material. They may be observed connected in a dot-like pattern.

[0036] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a matrix composite.

[0037] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and The dielectric regions are each 0.5 nm to 10 nm thick, preferably 0.5 nm to 3 nm thick. They may be dispersed in the material at sizes of less than 1 m.

[0038] (Embodiment 1) One aspect of the present invention is a metal oxide film containing two types of crystal parts. The direction of the film thickness (also called the crystal part) is perpendicular to the film surface, the film surface, or the film surface. The other part of the crystal part (also called the second crystal part) has an orientation in the direction of the crystal. is a crystalline portion that does not have a specific orientation but is oriented in various directions. The oxide film contains a mixture of these two types of crystal parts.

[0039] For ease of explanation, the crystal portion having a specific orientation is referred to as the first crystal portion. The crystal part without orientation is explained separately from the second crystal part, but these are crystals with no orientation or crystal orientation. Therefore, in some cases, it is difficult to distinguish between the metal oxide particles of one embodiment of the present invention. The metal oxide film can be expressed without distinguishing between them. The oxide film has a plurality of crystal parts, among which crystal parts having orientation in the direction perpendicular to the surface of the film. In other words, it can be said that the film has more crystalline portions oriented in the same direction than crystalline portions oriented in other directions.

[0040] In the first crystal portion, a specific crystal plane has an orientation in the thickness direction of the film. Regarding the metal oxide film including the first crystal portion, When X-ray diffraction (XRD) measurements are performed, a specific diffraction angle A diffraction peak originating from the first crystal portion is observed at (2θ). The strength increases as the proportion of the first crystal portion contained in the film increases, and the crystallinity of the film It can also be an indicator to estimate the following.

[0041] The metal oxide film according to one embodiment of the present invention is characterized by a cross section in the thickness direction thereof, which is observed by a transmission electron microscope. In the observed image, multiple crystalline parts are observed. Among these multiple crystalline parts, The first crystal portion, whose crystal plane is oriented in the thickness direction of the film, is more numerous than the crystal portions oriented in other directions. It is often observed.

[0042] In addition, in the metal oxide film, the region excluding the crystalline portion observed by a transmission electron microscope is 20% or more and less than 100%, preferably 20% or more and 80% or less, more preferably 20% or more It is preferable that the c-axis is 60% or less. The area other than the first crystal portion oriented in the thickness direction is 20% or more and 60% or less, preferably 30% or less. It is preferable that the content of the metal oxide film is 0% or more and 50% or less. The presence of regions other than the crystalline region can improve the oxygen permeability of the metal oxide film. Therefore, when a process of supplying oxygen to a metal oxide film is performed, the effect of reducing oxygen vacancies is enhanced. Therefore, such a metal oxide film can be used in semiconductor devices such as transistors. By applying this to a semiconductor device, a highly reliable semiconductor device can be realized.

[0043] In addition, a metal oxide in which a first crystalline portion having orientation and a second crystalline portion not having orientation are mixed is also available. The transistor using the oxide film has an extremely high proportion of the first crystal part with orientation. (e.g., 75% or more than 80%) compared to transistors using metal oxide films This increases the field effect mobility, especially under low gate voltage conditions. It has the advantage that the driving voltage can be reduced and high frequency driving is easy. Such metal oxide films have anisotropic current flow compared to metal oxide films with extremely high crystallinity. Therefore, when applied to a semiconductor device, the variation in electrical characteristics can be reduced. can.

[0044] Furthermore, the metal oxide film of one embodiment of the present invention has a high diffractometry in electron beam diffraction measurement in a direction perpendicular to the cross section of the film. When the measurement was performed, the electron diffraction pattern due to the first crystal part and the electron diffraction pattern due to the second crystal part were A diffraction pattern that is a mixture of sagittal and axial diffraction patterns is obtained.

[0045] The electron diffraction pattern due to the first crystal part shows clear spots due to the crystallinity. The spots also have an orientation in the thickness direction of the film.

[0046] On the other hand, the second crystalline portion is composed of crystals present in the film that are randomly oriented in all directions. Therefore, the diameter of the electron beam used in electron diffraction (probe diameter), that is, the diameter of the object to be observed, Depending on the area of the area, different images are observed as follows:

[0047] The diameter of the electron beam (probe diameter) is sufficiently large (for example, 25 nm or more, Electron diffraction (SAED: Selected Area Electron Diffraction) In the area electron diffraction (AREA) image, a ring-shaped pattern The ring-shaped pattern also has a distribution of brightness in the radial direction. Selected area electron diffraction is a type of electron diffraction in which the irradiation area is narrowed down to a microscopic area. A parallel electron beam is irradiated onto the target.

[0048] On the other hand, under the condition that the diameter of the electron beam (probe diameter) is sufficiently small (for example, 0.3 nm or more), and 10 nmΦ or less or 5 nm or less) electron diffraction (nanobeam electron diffraction, NBED: In nanobeam electron diffraction (NBE) imaging, The ring-shaped pattern seen in the limited-field electron diffraction pattern is located in the circumferential direction (θ direction) In other words, a number of spots distributed in the selected area electron diffraction pattern are observed. The ring-shaped pattern seen in the image is formed by a cluster of the spots. It can be confirmed that nanobeam electron diffraction is a type of convergent beam electron diffraction among electron beam diffraction methods. It is a device that focuses an electron beam and irradiates it onto a sample.

[0049] The metal oxide film according to one embodiment of the present invention has a first structure in a selected area electron diffraction pattern of a cross section. The first spot originating from the first crystal part and the ring-shaped pattern originating from the second crystal part are mixed. The cross-sectional nanobeam electron diffraction pattern of the metal oxide film was also confirmed. In the image, a first spot originating from the first crystal part and a circumferential spot originating from the second crystal part are A diffraction pattern containing a number of secondary spots scattered along the direction is observed.

[0050] In addition, in the selected area electron diffraction pattern of the metal oxide film, a first spot and a ring In the nanobeam electron diffraction pattern, The first spot and the second spot are positioned to overlap in the radial direction.

[0051] The first spot originating from the first crystal part originates from a crystal plane perpendicular to the c-axis of the crystal. When the crystal structure has two-fold symmetry in the direction perpendicular to the c-axis, the first Two spots are observed symmetrically about the center of the electron diffraction pattern. In addition to this first spot, there are other spots originating from crystal planes perpendicular to the c-axis. Diffraction spots originating from crystal planes other than those perpendicular to the c-axis may also be observed. .

[0052] Furthermore, when the ring and the first spot overlap in the radial direction, the multiple spots that make up the ring The second spots are located on the crystal planes perpendicular to the c-axis of the crystallographically aligned portions of the crystal. It can be understood that these are diffraction spots originating from the diffraction

[0053] In addition, in the selected area electron diffraction pattern of the metal oxide film, two rings with different diameters are observed. A pattern similar to the rings in the figure (first ring, second ring from the inside) may be observed. At this time, the first spot originating from the first crystal part is located on the inner ring (the first ring). The first ring is located at the position where it overlaps with the second ring. Other spots may also be observed.

[0054] Here, when the proportion of the first crystalline portion having orientation in the metal oxide film is high, The electron diffraction pattern obtained is dominated by a more anisotropic pattern. In the limited-field electron diffraction pattern, the brightness of the first spot originating from the first crystal portion is As a result, the brightness of the first ring and the second ring becomes relatively low. A different spot (third spot) originating from the first crystal part was observed at the position overlapping with the second ring located at the center of the crystal. In this case, the third spot and the second ring are observed in the radial direction. Since they overlap in the direction, it can be inferred that they originate from diffraction from the same crystal plane.

[0055] Here, a second spot due to the second crystal portion in the nanobeam electron diffraction pattern The brightness (diffraction intensity) of the first spot is smaller than the brightness of the first spot caused by the first crystal portion. The difference in brightness increases as the proportion of the first crystal portion in the metal oxide film increases. It can also be used as an index to estimate the crystallinity of the metal oxide film. The brightness of the light source is between 1 and 10 times, preferably between 1 and 9 times. times or less, more preferably more than 1 time and less than 8 times, and even more preferably 1.5 times or more and 6 times It is preferable that the ratio is less than 1 / 2, and more preferably 2 times or more and less than 4 times.

[0056] The metal oxide film of one embodiment of the present invention is a film containing indium, M (M is Al, Ga, Y, or S). n), and zinc-containing oxide films. Such oxide films have a layered structure along the c-axis. Such oxide films have the characteristic of having a crystal structure that is semiconductor-like. It has the following characteristics.

[0057] The metal oxide film of one embodiment of the present invention is applicable to a semiconductor in which a channel of a transistor is formed. It is possible.

[0058] A metal oxide film in which a first crystalline portion having orientation and a second crystalline portion not having orientation are mixed. The transistor to which this is applied is a metal oxide that is composed only of a second crystal part that does not have orientation. Compared to transistors using thin films, the stability of electrical characteristics can be improved and the channel length can be shortened. It has the advantage that it is easy to make it thinner.

[0059] Hereinafter, one embodiment of the present invention will be described with reference to a more specific example.

[0060] [Metal oxides] The metal oxide film of one embodiment of the present invention is a film containing indium (In) and M (M is Al, Ga, Y, In particular, M is preferably gallium (Ga). It's nice.

[0061] When the metal oxide film contains In, for example, the carrier mobility (electron mobility) increases. In addition, when the metal oxide film contains Ga, for example, the energy gap (Eg) of the metal oxide film Ga is an element with high bond energy with oxygen, The energy is higher than In. Also, when the metal oxide film has Zn, crystallization of the metal oxide film is likely to occur.

[0062] In addition, as the metal oxide film of one aspect of the present invention, it is preferable to have a crystal structure showing a single phase, particularly a homologous phase. For example, the metal oxide film is made into a composition of In M 1+x M 1-x O3(ZnO ) y (x is a number satisfying 0 < x < 0.5, and y represents the vicinity of 1.) By increasing the content rate of In rather than M, the carrier mobility (electron mobility) of the metal oxide film can be increased.

[0063] In particular, the metal oxide film of one aspect of the present invention is In 1+x M 1-x O3(ZnO) y (x is a number satisfying 0 < x < 0.5, and y represents the vicinity of 1.) Among them, it is preferably made into a composition in the vicinity of In:M:Zn = 1. 33:0.67:1 (approximately In:M:Zn = 4:2:3). The metal oxide film having such a composition can have both high carrier mobility and high film stability.

[0064] In addition, the composition of the metal oxide film is not limited to this, and any composition that can have a layered crystal structure may be used.

[0065] In addition, in this specification and the like, the vicinity means a range within plus or minus 1, more preferably within plus or minus 0.5, with respect to the atomic ratio of a certain metal atom. For example, if the composition of the oxide semiconductor film is In:Ga:Zn = 4:2:3, when In is 4, Ga is 1 or more and 3 or less (1 ≤ Ga ≤ 3), and Zn is 2 or more and 4 or less (2 ≤ Zn ≤ 4). ​Preferably, Ga is 1.5 or more and 2.5 or less (1.5≦Ga≦2.5) and Zn is 2. It is sufficient if the Zn content is between 2 and 4 (2≦Zn≦4).

[0066] [Formation of metal oxide film] Below, we prepared three samples with metal oxide films formed under different conditions. The manufacturing methods of Samples 1 to 4 will be described.

[0067] [Sample 1] Sample 1 is a glass substrate having a thickness of about 100 nm and containing indium, gallium, and zinc. The metal oxide film of sample 1 was formed by heating the substrate to 130°C. The substrate was heated and sputtered with argon gas at a flow rate of 180 sccm and oxygen gas at a flow rate of 20 sccm. The pressure was set to 0.6 Pa and the indium and gallium were introduced into the chamber of the ring device. A metal oxide target having In:Ga:Zn=4:2:4.1 [atomic ratio] ]) was formed by applying 2.5 kW of AC power to the above gas flow rate ratio. The ratio of the oxygen flow rate to the gas flow rate is sometimes referred to as the oxygen flow rate ratio. The oxygen flow rate ratio in the preparation conditions for Sample 1 was 10%.

[0068] [Sample 2] Sample 2 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. For the metal oxide film of sample 2, the substrate was heated to 170°C, and the conditions other than the substrate temperature were the same as for sample 1. The oxygen flow rate ratio in the manufacturing conditions for Sample 2 was 10%.

[0069] [Sample 3] Sample 3 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The metal oxide film of Sample 3 was prepared by heating the substrate to 170°C and argon gas at a flow rate of 140 sccm. and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device, and the substrate The conditions for forming Sample 3 were the same as those for Sample 1, except for the temperature and gas flow rate. The flow rate ratio is 30%.

[0070] [Sample 4] Sample 4 is a sample in which a metal oxide film with a thickness of approximately 100 nm is formed on a glass substrate. The metal oxide film of Sample 4 was prepared by argon gas with a flow rate of 20 sccm and 10 sccm without heating the substrate. Oxygen gas of 1000 sccm was introduced into the chamber of the sputtering device, and the pressure was set to 0.4 Pa. A metal oxide target containing indium, gallium, and zinc (In:Ga: It was formed by applying 0.2 kW of AC power to a ZnO film (atomic ratio: 1:1:1). The oxygen flow rate ratio in the preparation conditions for Sample 4 was 33%.

[0071] [X-ray diffraction measurement] 1(A), (B), and (C) show the results of XRD measurements of Samples 1 to 3. Here, we will use the powder method (also known as the θ-2θ method), which is a type of out-of-plane method. The θ-2θ method was used to measure the incident angle of the X-rays and the This is a method of measuring X-ray diffraction intensity by setting the angle of the detector facing the sample to the same angle as the incident angle. The X-rays were incident from an angle of approximately 0.40° from the film surface, and the angle of the detector was changed to obtain the X-rays. GIXRD (Grazi) is a type of out-of-plane method for measuring X-ray diffraction intensity. ng-Incidence XRD) method (thin film method or Seemann-Bohlin method) In each diagram of FIG. 1, the horizontal axis represents the angle 2θ, and the vertical axis represents the diffraction intensity. Degrees are shown in arbitrary units.

[0072] As shown in each figure in Figure 1, all samples have a diffraction intensity peak around 2θ=31°. The peak intensity was highest in sample 3, followed by sample 2 and then sample 1.

[0073] The diffraction angle at which the diffraction intensity peaked (around 2θ = 31°) was the same as that of single-crystal InGaZnO4 This corresponds to the diffraction angle of the (009) plane in the structural model. Therefore, in all samples, the c-axis is oriented in the direction of the film thickness (hereinafter referred to as the orientation It can be seen that the crystal part having the above structure, or the first crystal part, is included. From the comparison of the intensities, the proportion of oriented crystals is highest in sample 3, followed by sample 2 and then sample 1. It is clear that

[0074] From this result, it can be seen that the higher the substrate temperature during film formation and the larger the oxygen flow rate ratio, the better the orientation. It was confirmed that the proportion of crystalline portions having the above structure tended to increase.

[0075] [Cross-section observation] 2(A) to 2(C) are transmission electron microscope (TE) images of Samples 1 to 3, respectively. M: Transmission Electron Microscopy image.

[0076] In Samples 2 and 3, crystalline portions in which atoms are arranged in layers in the film thickness direction are observed. The ratio of the regions oriented in the film thickness direction appears to be higher in Sample 3 than in Sample 2. On the other hand, in sample 1, although there are regions where atoms are periodically arranged, they are not oriented in the film thickness direction. The proportion of the crystalline portion is not as high as in Sample 2 and Sample 3.

[0077] [Electron Diffraction] Next, the results of electron diffraction measurements on Samples 1 to 4 will be described. Electron diffraction measurement is the measurement of the electron diffraction pattern when an electron beam is incident perpendicularly on the cross section of a sample. The electron beam diameter was varied from 1 nm to 100 nm. The thickness of the sample was approximately 50 nm.

[0078] The electron diffraction patterns for each sample are shown below. For clarity, the image data has been adjusted for contrast to make the diffraction pattern clear. In the brightness analysis of the diffraction pattern shown below, the contrast shown in the figure The image data used is not adjusted, but unadjusted image data.

[0079] Here, the thickness of the sample used for electron diffraction will be explained. The thicker the sample, the more the electron diffraction pattern will show the depth of the beam. Therefore, by reducing the diameter of the electron beam (probe diameter), Furthermore, by thinning the sample, information on more localized areas can be obtained. However, if the sample is too thin, for example, less than 5 nm thick, only information on the finest regions can be obtained. Therefore, if extremely fine crystals exist in that region, the electron diffraction patterns obtained will be The turns may have a pattern similar to that of a single crystal. If this is not practical, the thickness of the sample is, for example, 10 nm or more and 100 nm or less, typically 10 It is preferable that the thickness is between 100 nm and 50 nm.

[0080] [Sample 1] Figures 3(A) and (B) show the electron diffraction patterns of sample 1. These are electron diffraction patterns when the beam diameter is 100 nm and 1 nm, respectively. In (B), the brightest spot in the center is due to the incident electron beam. , the center of the electron diffraction pattern (also called the direct spot).

[0081] In Figure 3(A), two ring-shaped diffraction patterns with different radii can be seen. The rings with the smaller diameter are called the first ring and the second ring. In comparison, it can be seen that the first ring is brighter. At the position, two spots (first spots) are identified, as indicated by arrows.

[0082] The radial distance from the center of the first ring and the two first spots is The radial distance from the center of the diffraction spot of the (009) plane in the structure model of aZnO4 This is almost the same as the distance.

[0083] The ring-shaped diffraction pattern indicates that the metal oxide film contains electrons of various orientations. The crystal portion oriented in the direction of the crystal grains (hereinafter also referred to as the crystal portion not having orientation or the second crystal portion) It can be confirmed that there is

[0084] The two first spots are arranged symmetrically with respect to the center point of the electron diffraction pattern, Since the brightness is similar, the crystal part originating from this first spot has two-fold symmetry. As mentioned above, the two first spots are located on the crystal plane perpendicular to the c-axis. Since the diffraction spots are due to the The direction of the line (straight line) corresponds to the direction of the c-axis of the crystal part. In Figure 3(A), the vertical direction corresponds to the film thickness direction. Therefore, there are crystal parts in the metal oxide film whose c-axis is oriented in the film thickness direction. It can be seen that...

[0085] Next, in Figure 3(B), the first ring is divided into two rings in a circular pattern at the position of the first ring seen in Figure 3(A). Multiple spots (second spots) can be seen. In addition, two first spots can also be confirmed.

[0086] As shown in Figure 3(B), when the diameter of the incident electron beam is made extremely small, Since multiple second spots distributed in the same area are observed, the metal oxide film is extremely small and It can be seen that multiple crystal parts with plane orientations in various directions are mixed together. The first ring seen in Figure 3(A) is now clearly visible as a fine crystal by widening the observation area. It can be seen that this is the result of multiple diffraction spots from the same area being connected together and averaging the brightness. .

[0087] As described above, the metal oxide film of Sample 1 is composed of crystalline parts with orientation and crystalline parts without orientation. It can be seen that the film is a mixture of crystalline and oriented crystal parts. Since the brightness of the first spot is higher than that of the second spot, it is possible to determine whether the crystalline part exists in the film. It can be seen that the proportion of oriented crystal parts is high.

[0088] [Samples 2 and 3] Figures 4(A) and (B) show the electron diffraction patterns of sample 2, and Figures 4(C) and (D) show the electron diffraction patterns of sample 3. The electron diffraction patterns are shown in Fig. 4(A) and (C) respectively. m, and Fig. 4(B) and (D) show the beam diameter as 1 nm. .

[0089] As shown in FIGS. 4(A) and (C), the alignment was clearer in Samples 2 and 3 than in Sample 1. Two primary spots originating from the crystalline part with orientation can be confirmed. The ratio of oriented crystals is increasing in the order of sample 3, sample 2, and sample 1. It is suggested that the highest values are in this order.

[0090] As shown in Figures 4(A) and 4(C), in Samples 2 and 3, the area overlapping the second ring At this position, two spots (third spots) darker than the first spot are observed. As shown in Figure 3(A), in sample 1, this third spot is indistinguishable from the second ring. The two third spots are rotated 90 degrees relative to the first spots. This third spot is located at the center of the crystal. It's a pot.

[0091] In addition, in FIG. 4(C), the area surrounded by the dashed line is rotated 30 degrees with respect to the first spot. High brightness areas were also observed at the positions where the image was rotated 60 degrees. As shown above, Sample 3 has such a high degree of orientation that diffraction spots other than the first spot are clearly observed. It can be seen that the proportion of crystalline portions having such a structure is high, that is, the film has high crystallinity.

[0092] As shown in Figure 4(B) and (D), under the condition that the beam diameter is extremely small, the first phosphorus It can be seen that a second spot was observed at the position where the previous spot was observed. In sample 3, a third spot was also observed that was not seen in sample 1.

[0093] [Sample 4] Figure 5 shows the electron diffraction pattern measured for sample 4 with a beam diameter of 100 nm. Indicates the

[0094] In sample 4, the first ring was observed, but the first ring observed in samples 1 to 3 was not observed. This suggests that in sample 4, multiple spots originating from the first ring were observed. The crystal has a crystal part, and the proportion of the oriented crystal part is different from the proportion of the oriented crystal part. This suggests that the proportion of these parts is equivalent to that of the rest.

[0095] [Brightness of spots in electron diffraction patterns] As mentioned above, the difference between the brightness of the first ring and the brightness of the first spot has orientation. This is important information in estimating the proportion of crystalline parts present.

[0096] Figure 6(A) shows an enlarged view of Figure 4(C). Here, an ideal single crystal of In In the electron diffraction pattern of GaZnO4, there is a ring at the position overlapping with the first ring in the radial direction. The first spot was positioned at angles of 30 degrees, 90 degrees, and 12 degrees from the center of the electron diffraction pattern. At the positions rotated by 0 degrees (areas surrounded by dashed lines in Figure 6(A)), no diffraction spots were observed. In other words, the brightness that appears in this region is due to the , electrons diffracted from crystalline parts other than the oriented crystalline parts, or electrons diffracted from crystalline parts other than the crystalline parts in the film It is thought that the electrons are scattered from the region or the substrate. For turbulent electrons, it is thought that they will be observed with equal intensity at positions with equal radius. Therefore, for example, the brightness of the first spot and the difference between this and 90 The difference in brightness at the position rotated by 10 degrees is an important parameter for determining the proportion of oriented crystals. It becomes a meter.

[0097] Here, the difference between the brightness of the first spot and the brightness at a position rotated by a predetermined angle from the first spot is By normalizing the intensity of the direct spot that appears at the center of the electron diffraction pattern, This also allows for relative comparison between samples. .

[0098] FIG. 7(A1) shows the electron diffraction pattern of sample 1 (the same as FIG. 3(A)). In FIG. 7(A2), the A-A' and A-A' lines passing through the first spot and the direct spot are shown. The normalized brightness profile for the radial position along each of the lines B-B' perpendicular to this As shown in Figure 7(A2), there are two peaks on either side of the direct spot peak. The two peak intensities are clearly different between A-A' and B-B'. is being seen.

[0099] Figure 7(B1) and Figure 7(B2) show the electron diffraction pattern and standard deviation of sample 2, respectively. 7(C1) and 7(C2) are the profiles of the luminance of the sample 3. The electron diffraction pattern and normalized brightness profile of sample 2 are shown in Fig. 1. The difference between the peak brightness of the first spot and the peak brightness at a position rotated 90 degrees from it is large. It can also be seen that the difference is greater in sample 3 than in sample 2.

[0100] In addition, in the B-B' direction in Sample 2 and Sample 3, the position corresponding to the second ring is A peak that was not observed in Sample 1 was confirmed. Therefore, Samples 2 and 3 It is clearly confirmed that the crystallinity is higher than that of Sample 1.

[0101] Figure 7(D1) and Figure 7(D2) show the electron diffraction pattern and standard deviation of sample 4, respectively. In sample 4, the profiles are almost identical in the two directions. In other words, Sample 4 contains almost no crystalline parts with orientation, It can be seen that the crystal contains multiple crystal parts with crystal planes facing in various directions.

[0102] In addition, when the beam diameter is small, the first ring appears in the electron diffraction pattern. Since it appears as a collection of discrete bright spots, when comparing the local brightness at a certain position, In some cases, the brightness of the ring 1 cannot be accurately determined. In such cases, the brightness is shown by the dashed line in Figure 6(B). As shown, for a rectangular region with a specific width and the long side aligned with the radial direction, Using the brightness value averaged across the width of the rectangle (the short side direction of the rectangle in Figure 6(B)), The brightness at a predetermined position may be calculated from the profile of brightness in the radial direction.

[0103] In addition, when calculating the radial brightness profile, the Subtracting the brightness component that corresponds to the background allows for more accurate comparison. Here, the brightness component due to inelastic scattering is extremely broad in the radial direction. To obtain a suitable profile, the background brightness may be calculated by linear approximation. For example, draw a straight line along both sides of the target peak, and then measure the area on the lower brightness side of the line. The area where the signal is present can be subtracted as background.

[0104] Here, the first spot is extracted from the data after background subtraction using the method described above. The brightness at the first spot and the brightness at a position rotated 90 degrees from the position of the first spot were calculated. The brightness of the first spot was divided by the brightness at a position rotated 90 degrees from the first spot. The value was calculated as relative luminance R.

[0105] The electric field measured for each of Samples 1 to 4 was measured under the condition that the beam diameter was 100 nm. Figure 8 shows the relative luminance R estimated from the sagittal diffraction pattern.

[0106] In sample 4, no difference in luminance was observed between the two positions, and the relative luminance R was 1. The relative luminance increases in the order of Sample 1, Sample 2, and Sample 3.

[0107] For example, when a metal oxide film is used as a semiconductor layer in which a transistor channel is formed, The relative luminance R is greater than 1 and less than 10 times, preferably greater than 1 and less than 9 times, More preferably, it is greater than 1 and not greater than 8 times, more preferably, it is greater than 1.2 and not greater than 8 times, and even more preferably, it is greater than 1.2 and not greater than 8 times. Preferably, it is 1.5 times or more and 6 times or less, more preferably, it is 2 times or more and 6 times or less, and even more preferably It is preferable to use a metal oxide film in which the thickness is in the range of 2 times or more and 4 times or less. By using a metal oxide film as the semiconductor layer, high stability of electrical characteristics and a low gate voltage region are achieved. This allows for a high field-effect mobility at low temperatures.

[0108] [Orientational Fluctuations] Among the crystalline parts contained in the metal oxide film, the crystalline parts with orientation are those in which each orientation is completely The orientation direction is not consistent, but there is a fluctuation in the orientation direction. This article explains the process.

[0109] The fluctuation of the orientation direction can be evaluated as follows. The electron diffraction patterns of the sample were measured at multiple locations, and the electron diffraction patterns were calculated for each image. The slope of the line passing through the center of the beam and the first spot and the film thickness direction of the metal oxide film are measured. By doing so, it is possible to estimate the variation in the orientation direction of the crystal parts present in each region.

[0110] Here, the electron beam diameter is set to 1 nm, and the electron beam is irradiated in a direction parallel to the film surface. The electron diffraction pattern was acquired as a moving image while scanning. The scan was approximately 250 nm. The distance was covered in 100 seconds.

[0111] Figure 9 shows the electron diffraction patterns of some of the captured moving images for samples 1, 2, and 3. Figure 9 shows nine electron diffraction patterns, with the intervals between each. The interval is about 10 seconds.

[0112] In FIG. 9, the straight line passing through the first spot and the center of the electron beam diffraction pattern is shown by a dashed line. As shown in Figure 9, the orientation of the crystals varies depending on the region being observed. It is confirmed.

[0113] Figure 10 shows the distribution of orientation directions estimated from the electron diffraction patterns shown in Figure 9. The horizontal axis is the distance from the starting point of the image capture, and the vertical axis is the distance measured at each position. The angle of the orientation direction at each position is calculated with the average value of the orientation direction being 0 degrees. Here, the clockwise direction is shown as positive. As shown in Figure 10, the orientation of each sample was There was almost no difference in the magnitude of the variation in the orientation, and the range was within 10 degrees for all samples. I'm waiting.

[0114] The orientation direction of the crystal part in the metal oxide film was measured under the condition that the electron beam diameter was increased. It can also be estimated by the circumferential spread of the spot in the electron diffraction pattern. By increasing the electron beam diameter and widening the measurement range, it is possible to measure the amount of electrons present in the measurement range. The electron diffraction pattern obtained is an average of the information on the crystalline parts of the spot. The greater the variation in the orientation of the crystals, the wider the spread of the direction. The distribution in the circumferential direction reflects the proportion of crystals oriented in a specific direction. .

[0115] For example, as shown in FIG. 6(A), the first spot is not a perfect point (or circle). The spot has a shape that is close to an ellipse, spreading in the circumferential direction. The angle between the two lines connecting each of the two ends and the center point of the electron diffraction pattern is represents the variation in the orientation direction of the crystal part. If the edge of the first spot is unclear, For example, the position of 1σ or 2σ is set as the brightest point of the first spot. In addition, when the difference in brightness between the first ring and the first spot is small, , is estimated based on the brightness distribution obtained by subtracting the brightness of the first ring from the brightness of the first spot. In this method, depending on the measurement conditions of the electron beam diffraction pattern, the higher the brightness, the better. When the spot spreads too much, the actual orientation variation is estimated to be larger than the actual orientation variation. There is.

[0116] For example, the central angle between both ends of the first spot centered on the center of the electron diffraction pattern is 0 0 to 45 degrees, preferably 0 to 40 degrees, more preferably 0 to 35 degrees The higher the orientation, the better the metal oxide film The stability of the electrical characteristics is improved.

[0117] [Ratio of crystalline parts] The proportion of crystalline parts in a metal oxide film can be estimated by analyzing cross-sectional observation images. Cut.

[0118] The image analysis method is explained. Image processing is performed on TEM images taken at high resolution. and two-dimensional Fast Fourier Transform (FFT) ) to obtain an FFT image. The periodic range is left in the obtained FFT image, Then, the masked FFT image is processed by the 2D inverse function. Inverse Fast Fourier Transform (IFFT) ) to obtain an FFT filtered image.

[0119] This allows us to obtain a real space image in which only the crystal part is extracted. The proportion of crystalline parts can be estimated from the area ratio of the The area of the crystal is calculated by subtracting the remaining area from the area of the original image (also called the area of the original image). The proportion of the other parts can be estimated.

[0120] Figure 11(A) and (B) show cross-sectional TEM images of sample 3 and sample 1, respectively, before image processing. 11(C) and (D) show the images obtained after image processing. In the latter image, the white areas in the metal oxide film correspond to the areas containing crystals. Respond.

[0121] From FIG. 11(C), the ratio of the area excluding the area including the crystalline portion in sample 3 is approximately 21.0%. In addition, the estimated area of the crystalline part with orientation in sample 1 was The proportion of the area excluding the area containing the tumor was approximately 39.8%.

[0122] The ratio of the portion excluding the crystalline portion in the metal oxide film estimated in this way is 5% or more and 20% or less. %, the metal oxide film is a film with extremely high crystallinity, and the stability of the electrical properties is high. In addition, the ratio of the portion excluding the crystalline portion in the metal oxide film is preferably 20% or more. less than 0.00%, preferably 20% or more and 90% or less, more preferably 20% or more and 80% or less, More preferably, it is 20% or more and 60% or less, and even more preferably, it is 30% or more and 50% or less. In this case, the metal oxide film has an appropriate ratio of oriented crystalline parts and non-oriented crystalline parts. This allows for both stable electrical characteristics and high mobility.

[0123] Here, the part excluding the crystal part that can be clearly confirmed by cross-sectional observation image or image analysis etc. This is called the Lateral Growth Buffer Region (LGBR). In addition, in cross-sectional observation images using a transmission electron microscope (TEM), L GBR has dense and sparse areas, and the sparse areas grow laterally, separating the dense areas from each other. In particular, the LGBR has irregular surface orientation and extremely fine This is a region where multiple thin crystal parts of different sizes are mixed. The existence of these crystal parts is due to the beam Electron diffraction with a large diameter (probe diameter) (for example, 25 nm or more, or 50 nm or more) No spots are observed in the pattern, and the beam diameter (probe diameter) is extremely small. (For example, 0.3 nm or more and 10 nmΦ or less, or 5 nm or less) in the electron diffraction pattern This can be understood from the fact that the crystals are only observed as spots after a certain time has passed, and the crystals are extremely fine. do.

[0124] For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration correction function can be used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. It can be observed that

[0125] [Transistor Electrical Characteristics 1] In the following, transistors were fabricated using the metal oxides of Samples 1 and 3. The results of measuring the electrical characteristics will be described below.

[0126] The structure of the transistor is shown in FIG. 36 , which is an example of the structure of Embodiment 2. Two types of samples, Sample A1 and Sample A2, were fabricated, each having different semiconductor layer formation conditions.

[0127] [Transistor Fabrication] First, a titanium film having a thickness of 10 nm and a copper film having a thickness of 100 nm were sputtered on a glass substrate. The conductive film was then processed by photolithography. Ta.

[0128] Next, four insulating layers were formed on the substrate and the conductive film. The insulating film was formed in a vacuum using a phase-enhanced chemical vapor deposition (PECVD) system. 50nm thick silicon nitride film, 300nm thick silicon nitride film, 50nm thick silicon nitride film A silicon nitride film with a thickness of 50 nm and a silicon oxynitride film with a thickness of 50 nm were used.

[0129] Next, an oxide semiconductor film is formed over the insulating film and processed into an island shape. The oxide semiconductor film 108 was formed by depositing an oxide semiconductor film having a thickness of 40 nm. A film was formed.

[0130] In Sample A1, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 1. That is, the substrate temperature is set to 130°C, and the flow rate of argon gas is 180 sccm. 20 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 10%. The thickness was approximately 40 nm.

[0131] In Sample A2, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 3. That is, the substrate temperature is set to 170°C, and the flow rate of argon gas is 140 sccm. 60 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 30%. The thickness was approximately 40 nm.

[0132] Next, an insulating film was formed over the insulating film and the oxide semiconductor layer. A 0 nm silicon oxynitride film was formed using a PECVD apparatus.

[0133] Next, a heat treatment was carried out. The heat treatment was carried out in a mixed gas atmosphere of nitrogen and oxygen for 3 hours. The heat treatment was carried out at 50°C for 1 hour.

[0134] Next, openings were formed in desired areas of the insulating film. The etching method was used.

[0135] Next, a 100 nm thick oxide semiconductor film is formed on the insulating film so as to cover the opening. The conductive film was formed by processing the oxide semiconductor film into an island shape. Then, the insulating film in contact with the lower side of the conductive film was processed to form an insulating film.

[0136] As the conductive film, an oxide semiconductor film having a thickness of 100 nm was formed. The oxide semiconductor film was formed under the conditions of: The plate temperature was set to 170°C, and oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering equipment. The pressure was 0.6 Pa, and a gold alloy containing indium, gallium, and zinc was introduced into the bar. Metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) with 2.5 kW The second oxide semiconductor layer was formed to a thickness of 10 nm by applying an AC power of 100 Ω / s. The conditions for forming the conductive film were a substrate temperature of 170°C and an argon gas flow rate of 180 sccm. The gas and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc was used. A 2.5 kW AC power was applied to the In:Ga:Zn=4:2:4.1 [atomic ratio]. By this, the film thickness was formed to be 90 nm.

[0137] Next, plasma treatment was performed on the oxide semiconductor film, the insulating film, and the conductive film. For the PECVD treatment, a substrate temperature was set at 220°C, and argon gas and nitrogen were used. The reaction was carried out under a mixed gas atmosphere.

[0138] Next, an insulating film was formed over the oxide semiconductor film, the insulating film, and the conductive film. A 100 nm thick silicon nitride film and a 300 nm thick silicon oxynitride film were deposited by PECVD. The film was formed by lamination using a device.

[0139] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. did.

[0140] Next, a conductive film is formed so as to fill the opening, and the conductive film is processed into an island shape. A conductive film having a thickness of 100 μm was formed on the surface of the semiconductor substrate to become the source electrode and the drain electrode. A titanium film with a thickness of 100 nm and a copper film with a thickness of 100 nm were deposited using a sputtering device. Formed.

[0141] Next, an insulating film was formed on the insulating film and the conductive film. An acrylic photosensitive resin was used.

[0142] In this manner, two types of transistors were fabricated.

[0143] [Transistor Electrical Characteristics] Next, the Id-Vg characteristics of the transistors of Sample A1 and Sample A2 fabricated as described above were measured. .

[0144] The Id-Vg characteristics of the transistor were measured under the following conditions: The voltage applied to the conductive film (hereinafter also referred to as gate voltage (Vg)) and the second gate The voltage (also called Vbg) applied to the conductive film acting as an electrode is set to -15V to +20 V in 0.25 V steps. The voltage applied to the drain electrode (hereinafter referred to as the source voltage (Vs)) is set to 0V (comm). The voltage applied to the conductive film that functions as a drain voltage (Vd) is set to 0. The voltages were set to 1V and 20V.

[0145] 12(A) and (B) show the Id-Vg characteristics of Sample A1 and Sample A2, respectively. In FIG. 12, the first vertical axis represents Id (A), and the second vertical axis represents field-effect mobility (μFE( cm 2 / Vs)) and the horizontal axis represents Vg (V). The Id-Vg characteristics of the five transistors are shown overlapping each other.

[0146] As shown in Figures 12(A) and (B), both Sample A1 and Sample A2 exhibited good electrical properties. It was also confirmed that the field-effect mobility of sample A1 was higher than that of sample A2. This tendency was especially evident in the low Vg range (for example, Vg below 10 V). It is noticeable.

[0147] That is, the crystal grains having a mixture of oriented crystal parts and non-oriented crystal parts, which is one embodiment of the present invention, A transistor using a metal oxide film as the semiconductor layer where the channel is formed has a high field efficiency. In particular, it was confirmed that the device exhibited high field effect mobility under low gate voltage conditions. It was confirmed that the mobility and drain current were high.

[0148] [Evaluation of oxygen permeability] Next, the results of evaluation of the oxygen permeability of the metal oxide film will be described.

[0149] Here, the following three samples (sample Ref, sample B1, and sample B2) were prepared. Sample B1 is a sample containing the metal oxide film of Sample 1, and Sample B2 is a sample containing the metal oxide film of Sample 1. The sample contains a metal oxide film of 3.

[0150] [Sample Ref] The sample Ref is a silicon oxynitride film formed on a glass substrate, which releases oxygen when heated. This is a sample.

[0151] First, a silicon oxynitride film was formed on a glass substrate. A mixed gas of SiH4 with a flow rate of 160 sccm and N2O with a flow rate of 4000 sccm was used. The plasma CVD method was performed under the conditions of pressure 200 Pa, power 1500 W, and substrate temperature 220°C. The thickness of the silicon oxynitride film was approximately 400 nm.

[0152] Subsequently, heat treatment was carried out at 350° C. for 1 hour in a nitrogen atmosphere.

[0153] Next, a silicon-containing indium tin oxide film (ITSO film) was deposited by sputtering. The thickness of the ITSO film is approximately 5 nm.

[0154] Subsequently, oxygen was added to the silicon oxynitride film under the following conditions: Using an ashing device, the substrate temperature was set to 100°C and oxygen gas was churned at a flow rate of 300 sccm. The pressure was set to 25.06 Pa, and a bias was applied to the substrate side. The ashing was performed by supplying 4750 W of RF power between the parallel plate electrodes installed in the ashing device. Ta.

[0155] Then, the indium tin oxide film was removed by wet etching, and the specimen Ref was obtained. did.

[0156] [Sample B1] For sample B1, a silicon oxynitride film was first formed in the same manner as for sample Ref, and then heat-treated. After the indium tin oxide film was formed, the film was removed.

[0157] Next, a 5 nm thick IG film was formed on the silicon oxynitride film by the same method as in Sample 1. A ZO film was formed and used as sample B1.

[0158] [Sample B2] For sample B2, a silicon oxynitride film was first formed in the same manner as for sample Ref, and then heat-treated. After the indium tin oxide film was formed, the film was removed.

[0159] Next, a 5 nm thick IG film was formed on the silicon oxynitride film by the same method as in Sample 3. A ZO film was formed and used as sample B2.

[0160] [TDS measurement] The three prepared samples were analyzed by thermal desorption spectroscopy (TDS). Oxygen molecules (mass-to-charge ratio (M / z)) were analyzed by osmotic spectroscopy. 32) and the release amounts were compared.

[0161] 13(A), (B), and (C) show the results for sample Ref, sample B1, and sample B2, respectively. The measurement results are shown in the figures, where the vertical axis represents the detected intensity and the horizontal axis represents the substrate temperature.

[0162] As shown in FIG. 13(A), the oxygen content of sample Ref increased from about 100°C to about 350°C. It was confirmed that the electrons were released. In addition, the sample Ref had a peak around 250°C. .

[0163] As shown in FIG. 13(B), in sample B1, oxygen begins to be released at about 150°C, and A peak was observed around 50°C, and it was confirmed that oxygen continued to be released even at higher temperatures. In other words, the metal oxide film used in sample B1 can be said to be a film that is easily permeable to oxygen. do.

[0164] On the other hand, as shown in FIG. 13(C), sample B2 has an oxygen peak at about 200°C. Although a release profile of 100mg / kg was observed, the amount of release was extremely low compared to sample B1. It was confirmed that:

[0165] From the above results, it is clear that oriented and non-oriented crystal parts are mixed, and that oriented crystal parts are A metal oxide film with a low proportion of crystalline parts that are oxygen-permeable is a film that is oxygen-permeable. It was confirmed that the membrane was easy to diffuse.

[0166] [Evaluation of oxygen diffusion] The following describes the results of evaluating the ease of oxygen diffusion into metal oxide films.

[0167] Here, the following two samples (sample C1 and sample C2) were prepared.

[0168] [Sample C1] First, a metal oxide film with a thickness of about 50 nm was formed on a glass substrate using the same method as for Sample 1. A film was formed.

[0169] Next, a silicon oxynitride film with a thickness of about 30 nm and a silicon nitride film with a thickness of about 100 nm were deposited on the metal oxide film. A silicon oxynitride film with a thickness of about 20 nm was formed by plasma CVD. The film was formed by laminating the layers.

[0170] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0171] Subsequently, a 5 nm thick indium tin oxide film was formed by sputtering.

[0172] Subsequently, oxygen was added to the silicon oxynitride film under the following conditions: Using an ashing device, the substrate temperature was set to 40°C and oxygen gas ( 16 O ) and oxygen gas ( 18 O) was introduced into the chamber, and the pressure was increased to 15 The parallel flat plate was installed in the ashing device so that a bias was applied to the substrate side. RF power of 4500 W was supplied between the electrodes of the plate for 600 seconds. 1 8 The reason for using oxygen (O) is that the silicon oxynitride film 16 O) at the principal component level This is because the oxygen added by the oxygen addition process can be accurately measured. do.

[0173] Subsequently, a silicon nitride film having a thickness of approximately 100 nm was formed by plasma CVD.

[0174] Thereafter, heat treatment was carried out in a nitrogen atmosphere at 450° C. for 1 hour to obtain sample C1.

[0175] [Sample C2] Sample C2 is a sample in which the film formation conditions of the metal oxide film of Sample C1 are different. A metal oxide film having a thickness of about 50 nm was formed by the same method as in Sample 3 above.

[0176] [SIMS analysis] Samples C1 and C2 were analyzed by SIMS (Secondary Ion Mass Spectroscopy). Spectrometry analysis18 The concentration of O was measured. The results are shown in Figure 14. Here, the glass substrate (written as glass) and the metal oxide film (written as IGZO) The analysis results of the area including the silicon oxynitride film (denoted as SiON) are shown. The results shown here are from the substrate side (SSDP (Substrate Side Department) These are the results of a SIMS (Scanning Imaging Spectroscopy) analysis.

[0177] In both specimens C1 and C2, the silicon oxynitride film 18 O is diffused, and the metal Even in oxide films 18 It was confirmed that O was diffused. Comparing sample C1 and sample C2 Sample C2 reaches a deeper position. 18 It can be seen that O is diffused. Sample C1 In the case of the ion implantation, it diffuses to a depth of about 25 nm.

[0178] From the above results, it is clear that oriented and non-oriented crystal parts are mixed, and that oriented crystal parts are A metal oxide film with a low proportion of crystalline parts that are oxygen-permeable is a film that is oxygen-permeable. It was confirmed that the membrane was easy to diffuse.

[0179] [Concept of supplying oxygen to oxide semiconductor films] Next, based on the model diagrams and calculation results shown in FIGS. 15 to 22, oxygen in the metal oxide film The concept for providing this is explained below.

[0180] Here, as an example of a metal oxide film, we will consider the excess oxygen (stoichiometric ratio) in an IGZO film. This explains the ease of movement of oxygen vacancies (more oxygen than can be filled).

[0181] In this embodiment, the atomic ratio of In:Ga:Zn is 3:1:2. The structure of a model in which one In-O plane of a ZO film has one excess oxygen or oxygen vacancy is optimized. The NEB (Nudged Elastic Band) method was used to create the minimum elastic band. The energies for each intermediate structure along the energy pathway were calculated.

[0182] In addition, the calculation was performed using the calculation program software "Op The parameters used in the calculation were the pseudo-atomic localized basis functions. The basis functions used were the polarized basis set STO (Slater Type Orb It is classified as a functional. GGA / PBE (Generalized-Gr adient-Approximation / Perdew-Burke-Ernzer hof) was used. The cutoff energy was set to 200 Ry. The k-points were set to 5x5x3.

[0183] In addition, in the calculation of the ease of movement of excess oxygen, the atoms present in the calculation model The number of oxygen vacancies was set to 85, and the ease of movement of oxygen vacancies was calculated using the The number of atoms was set to 83.

[0184] The ease of movement of excess oxygen or oxygen vacancy depends on the amount of excess oxygen or oxygen vacancy. is the energy barrier height E that oxygen vacancies must overcome to move to each site. b, that is, the height of the energy barrier that is overcome during migration. If the energy barrier height Eb is high, it is difficult to move, and if the energy barrier height Eb is low, it is easy to move.

[0185] (Transfer of excess oxygen) First, the movement of excess oxygen will be explained. A model in which one excess oxygen exists on one In-O surface of an IGZO film is shown in Figs. Shown in 8.

[0186] (1) First transition of excess oxygen FIG. 15(A) is a model diagram of an IGZO film, and FIG. 15(B) is a diagram of the IGZO film shown in FIG. 15(A). FIG. 15(C) is a model diagram of an enlarged view of the area a1, and FIG. 15(C) is a model diagram of the area a1. 15(B) to 15(C) are model diagrams showing the transition of excess oxygen. ) is the first transition of excess oxygen. is the transition from the InO2 layer to the (Ga,Zn)O layer.

[0187] (2) Second transition of excess oxygen FIG. 16(A) is a model diagram of an IGZO film, and FIG. 16(B) is a diagram of the IGZO film shown in FIG. 16(A). FIG. 16(C) is a model diagram of an enlarged view of the area a2, and FIG. 16(C) is a model diagram of the area a2. 16(B) to 16(C) are model diagrams showing the transition of excess oxygen. ) is the second transition of excess oxygen. is the transition from the first (Ga,Zn)O layer to the second (Ga,Zn)O layer.

[0188] (3) The third transition of excess oxygen FIG. 17(A) is a model diagram of an IGZO film, and FIG. 17(B) is a diagram of the IGZO film shown in FIG. 17(A). FIG. 17(C) is a model diagram of an enlarged view of the area a3, and FIG. 17(C) is a model diagram of the area a3. 17(B) to 17(C) are model diagrams showing the transition of excess oxygen. ) is the third transition of excess oxygen. This is a transition that diffuses along the In layer.

[0189] (4) Fourth transition of excess oxygen FIG. 18(A) is a model diagram of an IGZO film, and FIG. 18(B) is a diagram of the IGZO film shown in FIG. 18(A). FIG. 18(C) is a model diagram of an enlarged view of the area a4, and FIG. 18(C) is a model diagram of the area a4. 18(B) to 18(C) are model diagrams showing the transition of excess oxygen. ) is the fourth transition of excess oxygen. This is a transition in which the atoms diffuse across the In layer.

[0190] Note that "1" in FIGS. 15(B)(C), 17(B)(C), and 18(B)(C) The oxygen atom indicated as follows is called the first oxygen atom. Figures 15(B)(C), 17(B) (C), and the oxygen atom marked "2" in Figure 18(B)(C) is the second oxygen atom. "3" in Figures 16(B)(C), 17(B)(C), and 18(B)(C) The oxygen atom marked with "4" in Figure 16(B)(C) is called the third oxygen atom. The oxygen atom shown is called the fourth oxygen atom.

[0191] The calculation results of the ease of movement of excess oxygen are shown in Figure 19. The horizontal axis represents the path length of the excess oxygen transfer, and the vertical axis represents the transition modes of the The energy required for movement is calculated based on the energy in the state shown in Figure 18(B). .

[0192] As shown in FIG. 19, the maximum value of the energy barrier height Eb of the first transition of excess oxygen ( Eb max ) is 0.62 eV, the energy barrier height of the second transition of excess oxygen Maximum value of Eb (Eb max ) is 0.29 eV, the energy of the third transition of excess oxygen -Maximum value of barrier height Eb (Eb max ) is 0.53 eV, and the fourth The maximum height of the energy barrier Eb of the transition (Eb max ) is 2.38 eV. Therefore, the first to third transitions of excess oxygen have higher energy than the fourth transition of excess oxygen. Maximum height of the gear barrier Eb (Eb max ) is low. Therefore, the first transition of excess oxygen The energy required for the third transition is less than the energy required for the fourth transition of excess oxygen. The first to third transitions of excess oxygen occur more frequently than the fourth transition of excess oxygen. It can be said that this is easy to do.

[0193] That is, the first oxygen shown in the models of FIG. 15(B), FIG. 17(B), and FIG. 18(B) As shown in Figure 18(B)(C), the atom is in the direction of pushing out the third oxygen atom, rather than the direction of pushing out the third oxygen atom. As shown in (B)(C) and (B)(C) of FIG. 17, the second oxygen atom moves in the pushing direction. Easy to move.

[0194] The third oxygen atom shown in the model of FIG. 16(B) is the first oxygen atom, as shown in FIG. 16(C). Therefore, the oxygen atom tends to move in the direction of pushing out the indium atom. It can be said that the indium atoms move more easily along the layer than over the layer. In addition, oxygen atoms move from the InO2 layer (G (Ga,Zn)O layer and from the first (Ga,Zn)O layer to the second (Ga,Zn)O layer It can be said that it is easy to do.

[0195] [Movement of oxygen vacancies] Next, the movement of oxygen vacancies will be explained. A model in which one oxygen vacancy exists on one In-O surface of an IGZO film is shown in Figs. 20 and 2 Shown in 1.

[0196] (5) First transition of oxygen vacancy FIG. 20(A) is a model diagram of an IGZO film, and FIG. 20(B) is a diagram of the IGZO film shown in FIG. 20(A). FIG. 20(C) is a model diagram of an enlarged view of the area a5, and FIG. 20(C) is a model diagram of the area a5. 20(B) to 20(C) are model diagrams showing the transition of oxygen vacancies. ) is the first transition of oxygen vacancies. This is a transition that diffuses along the In layer.

[0197] (6) Second transition of oxygen vacancy FIG. 21(A) is a model diagram of an IGZO film, and FIG. 21(B) is a diagram of the IGZO film shown in FIG. 21(A). FIG. 21(C) is a model diagram of an enlarged view of the area a6, and FIG. 21(C) is a model diagram of the area a6. 21(B) to 21(C) are model diagrams showing the transition of oxygen vacancies. ) is the second transition of oxygen vacancies. This is a transition in which the atoms diffuse across the In layer.

[0198] The dotted circles in Figures 20(B)(C) and 21(B)(C) represent oxygen vacancies. There are.

[0199] The calculation results of the ease of movement of oxygen vacancies are shown in FIG. 22. The horizontal axis represents the path length of the oxygen vacancy migration, and the vertical axis represents the path length of the oxygen vacancy migration. The energy required for movement is calculated based on the energy in the state shown in (B) of Figure 21. .

[0200] As shown in FIG. 22, the maximum value of the energy barrier height Eb of the first transition of oxygen vacancies ( Eb max ) is 1.81 eV, which is the energy barrier height of the second transition of oxygen vacancies. Maximum value of Eb (Eb max ) is 4.10 eV. In the first transition of oxygen vacancy, oxygen The maximum value of the energy barrier height Eb above the second transition of the defect (Eb max ) is low. Therefore, the energy required for the first transition of oxygen vacancies is much larger than that required for the second transition of oxygen vacancies. That is, the first transition of oxygen vacancies is smaller than the second transition of oxygen vacancies. It can be said that this is more likely to occur than migration.

[0201] Therefore, similar to the migration of excess oxygen described above, oxygen vacancies also move the layer of indium atoms. It can be said that it is easier for atoms to move along the layer of indium atoms than to move over it.

[0202] [Temperature dependence of transition] Next, to compare the likelihood of the six transition forms mentioned above from another perspective, we The temperature dependence of the transition is explained below.

[0203] The temperature dependence of these transitions is compared based on the frequency of transitions per unit time. The migration frequency Z (times / second) at a certain temperature is the number of oxygen atoms in a chemically stable position. Using the frequency Zo (times / second), it can be expressed by the following formula.

[0204]

number

[0205] In addition, in formula (1), Eb maxis the energy barrier height Eb is the maximum value of , k is the Boltzmann constant, T is the absolute temperature, and Zo is the atomic vibration at the stable position. The typical Debye frequency is Zo=1.0×10 13 (times / sec), so in this embodiment, Zo=1.0×10 13 Calculate (times / second) Used for.

[0206] Z when T=300K (27℃) is as follows: (1) First transition of excess oxygen: Z=3.9×10 at T=300K 2 (times / second) (2) Second transition of excess oxygen: Z=1.2×10 at T=300K 8 (times / second) (3) The third transition of excess oxygen: Z=1.2×10 at T=300K 4 (times / second) (4) The fourth transition of excess oxygen: Z = 1.0 × 10 at T = 300 K. -27 (times / second) (5) First transition of oxygen vacancy: Z=4.3×10 at T=300K -18 (times / second) (6) Second transition of oxygen vacancy: Z=1.4×10 at T=300K -56 (times / second)

[0207] Furthermore, Z when T=723K (450°C) is as follows: (1) First transition of excess oxygen: Z=4.8×10 at T=723K 8 (times / second) (2) The second transition of excess oxygen: Z = 9.2 × 10 at T = 723 K. 10 (times / second) (3) The third transition of excess oxygen: Z = 2.0 × 10 at T = 723 K. 9 (times / second) (4) The fourth transition of excess oxygen: Z=2.5×10 at T=723K. -4 (times / second) (5) First transition of oxygen vacancy: Z=2.5 (times / sec) at T=723K (6) Second transition of oxygen vacancy: Z=2.5×10 at T=723K -16 (times / second)

[0208] As mentioned above, excess oxygen is effective in reducing the indium monoxide content at both T=300K and T=723K. It can be said that it is easier for atoms to move along the indium atom layer than to move over the indium atom layer. In addition, oxygen vacancies were observed in the indium atoms at both T = 300 K and T = 723 K. It can be said that the electrons move more easily along the indium atom layer than over the indium atom layer.

[0209] Also, at T = 300 K, the excess oxygen moves along the layer of indium atoms, InO2 The migration of excess oxygen from the first (Ga,Zn)O layer to the second (Ga,Zn)O layer The migration of excess oxygen to the (Ga,Zn)O layer is likely, but other transition forms are unlikely. At T = 723 K, not only the excess oxygen moves, but also the indium atoms move along the layer. The movement of oxygen vacancies is also likely to occur, but the movement of excess oxygen and oxygen vacancies is also likely to occur. It is difficult to move across layers of atoms.

[0210] In the above explanation, the excess oxygen or oxygen deficiency does not cross the layer of indium atoms. However, other metals than indium contained in the oxide semiconductor film may be used. The same is true for

[0211] As described above, the excess oxygen and oxygen vacancies also migrate through the indium atom layer. In other words, excess oxygen and oxygen vacancies have difficulty moving in the c-axis direction.

[0212] [Ease of oxygen diffusion in metal oxide films and methods for reducing impurities in films] The above results indicate that the higher the proportion (density) of oriented crystals, the greater the amount of oxygen in the thickness direction. This indicates that oxygen is less likely to diffuse in the thickness direction, and the lower the density, the more easily oxygen diffuses in the thickness direction. The ease of oxygen diffusion in this metal oxide film can be considered as follows. can.

[0213] That is, oriented crystal parts and extremely fine crystal parts without orientation are mixed. In metal oxide films, the non-crystalline portion (LGBR) that can be clearly observed in cross-sectional observation images is Therefore, the orientation of the film is important. Oxygen is easily supplied to the crystalline portions through the LGBR, so the amount of oxygen vacancies in the film It is believed that this can reduce

[0214] For example, an oxide film that easily releases oxygen is provided in contact with a metal oxide film, and then a heat treatment is performed. As a result, the oxygen released from the oxide film is transported in the thickness direction of the metal oxide film by the LGBR. Then, oxygen is supplied laterally to the oriented crystal part via the LGBR. This allows the metal oxide film to be supplied to the oriented crystalline portion and other regions. As a result, oxygen is sufficiently distributed throughout the film, and oxygen vacancies in the film can be effectively reduced.

[0215] Here, if there are hydrogen atoms in the metal oxide film that are not bonded to metal atoms, It is thought that oxygen atoms bond to form OH and are fixed. By forming the film at low temperature, hydrogen atoms are trapped in the oxygen vacancies (Vo) in the metal oxide film. state (called VoH) by a certain amount (for example, 1 × 10 17 cm-3 By forming OH In addition, VoH generates carriers, which inhibits the generation of This results in a state in which a certain amount of carriers are present in the metal oxide with an increased carrier concentration. In addition, oxygen vacancies are also formed during film formation, but these oxygen vacancies This can be reduced by introducing oxygen through the LGBR as described above. By such a method, a metal oxide having a relatively high carrier concentration and a sufficiently reduced oxygen vacancy can be obtained. A nitride film can be formed.

[0216] In addition, the area other than the crystalline portion having orientation is made up of extremely fine crystals that do not have orientation during film formation. Since the metal oxide film is made up of crystalline regions, no clear crystal grain boundaries can be seen. The crystal part is located between a plurality of crystal parts having orientation. By growing laterally due to heat, the crystals bond with adjacent crystalline parts that have the same orientation. The minute crystals also function as regions for generating carriers. Metal oxide films with this property can significantly improve the field-effect mobility of transistors. It is thought that this can be improved.

[0217] In addition, after forming a metal oxide film and forming an oxide insulating film such as a silicon oxide film on it, In addition, it is preferable to perform plasma treatment in an oxygen atmosphere. Besides supplying oxygen, the hydrogen concentration can be reduced. For example, during plasma processing At the same time, fluorine remaining in the chamber may also be doped into the metal oxide film. Fluorine exists as negatively charged fluorine atoms and positively charged hydrogen atoms. The HF reacts with the metal oxide during the plasma treatment by bonding with the fluorine atom through Coulomb force to generate HF. As a result, the hydrogen concentration in the metal oxide film can be reduced. In addition, during plasma treatment, oxygen atoms and hydrogen are bonded together and released outside the film as H2O. In some cases, this may be the case.

[0218] Also, a structure in which a silicon oxide film (or a silicon oxynitride film) is laminated on a metal oxide film Halogen elements such as fluorine in the silicon oxide film bond with hydrogen in the film, Since it can exist as HF, which is essentially neutral, it does not affect the electrical properties of metal oxide films. Although Si-F bonds may occur, they are also electrically neutral. It is believed that HF in the film does not affect the diffusion of oxygen.

[0219] Due to the above-mentioned mechanism, oxygen vacancies in the metal oxide film are reduced and the metal in the film is It is believed that the reliability can be improved by reducing hydrogen atoms that are not bonded to metal atoms. In addition, when the carrier concentration of the metal oxide film is above a certain level, the electrical properties are improved. It is thought that this is the case.

[0220] [ESR evaluation] Below, we will discuss the electron spin resonance (ESR) method. We will explain the results of investigating defect levels in metal oxide films using CE.

[0221] The defect levels of metal oxide films can be evaluated by ESR. This is an analytical method in which a magnetic field is generated in the space in which the sample is placed and microwaves are irradiated onto the sample. (H0) and / or the microwave frequency (v) are changed to measure the absorption of microwaves by the sample. The frequency (v) and magnetic flux density (H0) when the magnet is absorbed are calculated using the formula g = hv / μ B g value using H0 The parameters obtained are as follows: h is Planck's constant, and μ B is the Bohr magneton , both of which are constants.

[0222] In the signal measured by ESR, the g value is around 1.93 (1.89 or more, 1. The spin density corresponding to the signal of oxygen vacancies (V O ) corresponding to the abundance do.

[0223] The following two samples (samples D1 and D2) were prepared and evaluated. This was carried out three times in total in the process after the metal oxide film was formed.

[0224] [Sample Preparation] First, a metal oxide film was formed on a quartz substrate. Sample D1 was prepared in the same manner as Sample 1. A metal oxide film with a thickness of approximately 40 nm was formed by the same method as for sample 2. A metal oxide film with a thickness of about 40 nm was formed by this method.

[0225] At this stage, the first ESR measurement was carried out.

[0226] Next, a silicon oxynitride film with a thickness of about 30 nm and a silicon nitride film with a thickness of about 100 nm were deposited on the metal oxide film. A silicon oxynitride film with a thickness of about 20 nm was formed by plasma CVD. The film was formed by laminating the layers.

[0227] At this stage, a second ESR measurement was performed.

[0228] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0229] Next, an oxide semiconductor film having a thickness of 100 nm was formed. The first oxide semiconductor film was formed under the following conditions: substrate temperature At 170°C, oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced. The target (In:Ga:Zn=4:2:4.1 [atomic ratio]) was subjected to an AC current of 2.5 kW. By applying a force, the film thickness was increased to 10 nm. The film formation conditions were a substrate temperature of 170°C, argon gas at a flow rate of 180 sccm, Oxygen gas at a flow rate of 20 sccm was introduced into the chamber of the sputtering device, and the pressure was set to 0 0.6 Pa, and a metal oxide target (In :Ga:Zn=4:2:4.1 [atomic ratio]) and apply 2.5 kW of AC power. The film was formed to a thickness of 90 nm.

[0230] Subsequently, a silicon nitride film having a thickness of approximately 100 nm was formed by plasma CVD.

[0231] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 250° C. for 1 hour.

[0232] Next, the silicon nitride film and the two oxide semiconductor films directly below it are wet etched. More removed.

[0233] At this stage, a third ESR measurement was performed.

[0234] [ESR measurement results] Figure 23 shows the spin density results for signals that appear at g values around 1.9. For the sample, the results of the first, second, and third measurements are shown from left to right.

[0235] For all samples, the first measurement was taken immediately after the metal oxide film was formed. The spin density was below the lower limit of measurement. The spin density increased in the measurement of the oxidized silicon nitride film. It is presumed that the damage to the oxide film increases the oxygen vacancies in the metal oxide film. On the other hand, the spin density was again reduced below the detection limit by the formation of the oxide semiconductor film and the heat treatment. This indicates that the oxide semiconductor film is formed and then heated to a metal This suggests that oxygen vacancies in the oxide are reduced.

[0236] In addition, when comparing sample D1 and sample D2, the spin density immediately after the deposition of the silicon oxynitride film It was confirmed that sample D1 had a higher tendency than sample D2. However, even in sample D1, The oxygen vacancies can be sufficiently reduced by the subsequent formation of an oxide semiconductor film and heat treatment. You can see that.

[0237] [CPM rating] In the following, we will use the constant photocurrent measurement method (CPM). The defect levels in the metal oxide films were evaluated using the CVD method.

[0238] CPM measurement is performed when a voltage is applied between two electrodes on the sample and the photocurrent value becomes constant. The amount of light irradiated onto the sample surface between the terminals is adjusted so that the absorption coefficient is derived from the amount of light irradiated. In CPM measurement, if there is a defect in the sample, the defect The absorption coefficient increases at the energy (converted from wavelength) corresponding to the level present. By multiplying the increase in the absorption coefficient by a constant, the deep defect level density (hereinafter referred to as dDOS) of the sample is calculated. (also denoted as ) can be derived.

[0239] The absorption coefficient curve obtained by CPM measurement shows that the urbach effect is due to the band tail. By removing the absorption coefficient component called the defect level, the absorption coefficient due to the defect level can be calculated from the following equation: where α(E) represents the absorption coefficient at each energy level, and α u represents the absorption coefficient due to the Urbach tail.

[0240]

number

[0241] [Sample Preparation] The following two samples (sample E1 and sample E2) were prepared and evaluated.

[0242] First, a metal oxide film was formed on a glass substrate. Sample E1 was prepared in the same manner as Sample 1. A metal oxide film with a thickness of approximately 100 nm was formed by the method described above. By this method, a metal oxide film having a thickness of about 100 nm was formed.

[0243] Next, a silicon oxynitride film with a thickness of about 30 nm and a silicon nitride film with a thickness of about 100 nm were deposited on the metal oxide film. A silicon oxynitride film with a thickness of about 20 nm was formed by plasma CVD. The film was formed by laminating the layers.

[0244] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0245] Next, an oxide semiconductor film having a thickness of 100 nm was formed. The first oxide semiconductor film was formed under the following conditions: substrate temperature At 170°C, oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced. The target (In:Ga:Zn=4:2:4.1 [atomic ratio]) was subjected to an AC current of 2.5 kW. By applying a force, the film thickness was increased to 10 nm. The film formation conditions were a substrate temperature of 170°C, argon gas at a flow rate of 180 sccm, Oxygen gas at a flow rate of 20 sccm was introduced into the chamber of the sputtering device, and the pressure was set to 0 0.6 Pa, and a metal oxide target (In :Ga:Zn=4:2:4.1 [atomic ratio]) and apply 2.5 kW of AC power. The film was formed to a thickness of 90 nm.

[0246] Thereafter, the substrate was heat-treated at 350° C. for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0247] Then, the oxide semiconductor film was removed by wet etching.

[0248] Subsequently, a silicon oxynitride film was formed. The silicon oxynitride film was formed using a gas having a flow rate of 1000 MPa. A mixture of SiH4 at 160 sccm and N2O at a flow rate of 4000 sccm was used at a pressure of 2 The film was formed by plasma CVD under the conditions of 0.0 Pa, power 1500 W, and substrate temperature 220°C. The thickness of the silicon oxynitride film was approximately 400 nm.

[0249] Subsequently, an opening was formed in the silicon oxynitride film by photolithography.

[0250] Next, a Ti film with a thickness of approximately 50 nm and an Al film with a thickness of approximately 400 nm were deposited by sputtering. Then, a laminated film of a Ti film having a thickness of about 100 nm was formed. The substrate was processed by a lithography method to form electrodes.

[0251] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 250° C. for 1 hour.

[0252] Through the above steps, samples E1 and E2 were obtained.

[0253] [CPM evaluation results] Figures 24(A) and 24(B) show the results of CPM measurements on samples E1 and E2, respectively. The horizontal axis represents the light energy, and the vertical axis represents the absorption coefficient. The curves of the absorption coefficients of each sample are shown. The dotted lines indicate the tangent lines, and the thin lines indicate the optically measured absorption coefficients. Shows.

[0254] The value of the Urbach tail of sample E1 estimated from Fig. 24(A) is 68.63 meV. The absorption coefficient is the one obtained by subtracting the absorption coefficient due to the Urbach tail from the absorption coefficient curve, i.e., The value of the absorption coefficient due to defects is 1.36×10 -3 cm -1 On the other hand, Figure 24 The value of the Urbach tail of sample E2 estimated from (B) is 68.70 meV. The value of the absorption coefficient due to the defect is 1.21×10 -3 cm -1 It was.

[0255] From the above results, it is clear that there is a clear defect level in the metal oxide film of sample 1 and the metal oxide film of sample 2. It was found that no difference was observed.

[0256] [Evaluation of defect levels using transistor characteristics] The defect levels of metal oxides affect the electrical properties of transistors that use metal oxide films as semiconductor layers. In the following, we evaluate the density of the interface states of the transistor and In addition to the density of the interface states, the number of electrons trapped in the interface states, N trap When considering A method for predicting the subthreshold leakage current will be described.

[0257] Number of electrons trapped in the interface state N trap is, for example, the drain current of a transistor -Measurement of gate voltage (Id-Vg) and drain current-gate voltage (Id-Vg) characteristics The evaluation can be performed by comparing with the calculated value.

[0258] Figure 25 shows the calculated results for the source voltage Vs = 0V and the drain voltage Vd = 0.1V. The ideal Id-Vg characteristics obtained by the test and the actually measured Id-Vg characteristics of the transistor are compared. Among the measurement results of the transistor, the 1 × 1 0 -13 Only values above A are plotted.

[0259] Compared to the ideal Id-Vg characteristics calculated by calculation, the actual Id-Vg characteristics are The change in drain current Id with respect to g becomes gradual. This is because the energy at the bottom of the conduction band ( This is thought to be due to electrons being trapped in shallow interface states located near the interface. Here, the Fermi distribution function is used to estimate the trapping in shallow interface states (per unit area) , number of electrons per unit energy) N trap By taking into account Density N it can be estimated.

[0260] First, the electrons trapped in the interface trap states were measured using the schematic Id-Vg characteristics shown in Figure 26. Number of electrons N trap The dashed line indicates the trap density obtained by calculation. The dashed line shows the ideal Id-Vg characteristics without any level. The change in gate voltage Vg when changing from Id2 to Id3 is ΔV id The solid line indicates the actual The solid line shows the Id-Vg characteristics measured when the drain current changes from Id1 to Id2. The change in gate voltage Vg when ex When the drain current is Id1 and Id2, The potential at the interface of interest is φ it1 , φ it2 The change amount is Δφ it and do.

[0261] In Figure 26, the actual measurement has a smaller slope than the calculation, so ΔV ex is always ΔV id than At this time, ΔV ex and ΔV id The difference in the electron transports electrons to the shallow interface states. Therefore, the change in charge due to the trapped electrons is Quantity ΔQ trap can be expressed by the following equation (1).

[0262]

number

[0263] C tg is the combined capacitance of the insulator and semiconductor per area. Also, ΔQ trap is a tiger Number of electrons (per unit area, per unit energy) N trap Using equation (2), It can also be expressed as, where q is the elementary charge.

[0264]

number

[0265] Equation (3) can be obtained by solving equations (1) and (2) simultaneously.

[0266]

number

[0267] Next, Δφ in Eq. (3) it By taking the limit of zero for , we obtain equation (4). Cut.

[0268]

number

[0269] That is, using the ideal Id-Vg characteristics, the measured Id-Vg characteristics, and Equation (4), Number of trapped electrons in N trap It is possible to estimate the drain current The relationship between the potential at the interface and the You can ask for this.

[0270] Also, the number of electrons per unit area and unit energy, N trap and the density of interface states N it teeth The relationship is as shown in equation (5).

[0271]

number

[0272] where f(E) is the Fermi distribution function. N obtained from Eq. (4) trap to the formula ( 5) By fitting, N it is determined. it Devices that have been configured Transfer characteristics including Id<0.1pA can be obtained by calculation using a simulator. .

[0273] Next, equation (4) is applied to the measured Id-Vg characteristics shown in Figure 25, and N trap was extracted The results are shown by circles in Figure 27. Here, the vertical axis of Figure 27 is the ferroelectric constant from the minimum conduction band Ec of the semiconductor. The maximum value is the lumi energy Ef. Looking at the dashed line, it is located just below Ec. (5) N it Assuming the tail distribution of Equation (6), the dashed line in Figure 27 shows a very Well N trap can be fitted, and the peak value N t a =1.67×10 13 cm -2 / eV, characteristic width W ta =0.105 eV was obtained.

[0274]

number

[0275] Next, the obtained fitting curve of the interface state was calculated using a device simulator. The Id-Vg characteristics were calculated by feedback and are shown in Figure 28. (A) shows the calculated I when the drain voltage Vd is 0.1 V and 1.8 V. d-Vg characteristics and transistors when drain voltage Vd is 0.1V and 1.8V 28(B) shows the Id-Vg characteristics of the drain of FIG. 1 is a graph showing the logarithm of the on-state current Id.

[0276] The calculated curve and the plot of the measured values are almost identical. Therefore, it is possible to use the method for calculating the density of shallow defect states. It can be seen that the above method is quite valid.

[0277] [Sample Preparation] The following four samples (samples F1 to F4) were prepared and metal oxide films were formed using the method described above. The defect level density in the silicon dioxide was evaluated.

[0278] The fabrication process for each sample was the same as that for Sample A above, except for the deposition conditions for the metal oxide film (oxide semiconductor film). The preparation method of 1 can be used.

[0279] In Sample F1, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 1. That is, the substrate temperature is set to 130°C, and the flow rate of argon gas is 180 sccm. 20 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 10%. The thickness was approximately 40 nm.

[0280] In sample F2, the metal oxide film used as the oxide semiconductor film was grown at a substrate temperature of 130°C. Argon gas with a flow rate of 140 sccm and oxygen gas with a flow rate of 60 sccm were sputtered. The mixture was introduced into the chamber of the heating device, the pressure was set to 0.6 Pa, and indium, gallium, and A metal oxide target containing zinc (In:Ga:Zn=4:2:4.1 [atomic ratio] The oxygen flow rate was 10%. The thickness was set to approximately 40 nm.

[0281] In Sample F3, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 2. That is, the substrate temperature is set to 170°C, and the flow rate of argon gas is 180 sccm. 20 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 10%. The thickness was approximately 40 nm.

[0282] In Sample F4, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 3. That is, the substrate temperature is set to 170°C, and the flow rate of argon gas is 140 sccm. 60 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 30%. The thickness was approximately 40 nm.

[0283] The fabricated transistor had a channel length of approximately 6 μm and a channel width of approximately 50 μm.

[0284] [Defect level density] FIG. 29(A) shows the electrical characteristics of samples F1 to F4 measured based on the above-mentioned method. The defect level density is calculated by comparing the actual value with the ideal calculated value.

[0285] Compared with samples F2 to F4, the defect level density in sample F1 is reduced to about half. It was confirmed that this was the case.

[0286] From the above results, it can be seen that the metal oxide film formed under the conditions of low temperature and low oxygen flow rate can prevent oxygen The improved transparency increases the amount of oxygen that diffuses during the transistor manufacturing process, Defects such as oxygen vacancies in the metal oxide film and at the interface between the metal oxide film and the insulating film are reduced. It is inferred that:

[0287] [Transistor Electrical Characteristics 2] Below, we fabricated transistors that can pass large currents and compared their on-state currents. did.

[0288] The structure of the transistor is shown in FIG. 36 , which is an example of the structure of Embodiment 2. The four samples G1, G2, G3, and G4 were formed under different conditions for forming the semiconductor layer. Several types of samples were prepared.

[0289] [Transistor Fabrication] The transistor of sample G1 was fabricated in the same manner as sample F1. G2 is the same as sample F2, sample G3 is the same as sample F3, and sample G4 is the same as sample F4. It was prepared by the method.

[0290] The fabricated transistor has a channel length of 2 μm and a channel width of 20 μm. μm.

[0291] [Transistor on-state current] Figure 29(B) shows the on-state current of the transistor in each sample. The drain current was measured when Vg was set to 10V and the drain voltage Vd was set to 5V.

[0292] As shown in FIG. 29(B), the on-state current of sample G1 is significantly higher than that of the other samples. was confirmed.

[0293] From the above results, it can be seen that the metal oxide film formed under the conditions of low temperature and low oxygen flow rate can prevent oxygen The improved transparency increases the amount of oxygen that diffuses during the transistor manufacturing process, Defects such as oxygen vacancies in the metal oxide film and at the interface between the metal oxide film and the insulating film are reduced. This leverage effect reduces the defect level density, resulting in a significant increase in the on-state current of the transistor. It was confirmed that the temperature rose sharply.

[0294] In this way, a transistor with improved on-state current can charge and discharge capacitance at high speed. It can be suitably used for switches, such as demultiplexer circuits. It can be used for.

[0295] A demultiplexer circuit is a circuit that splits one input signal into two or more signals and outputs them. A demultiplexer circuit using such transistors is connected to the signal lines of a display device. By placing it between the driver circuit and the signal line, when the signal line driver circuit is implemented in IC form, It is possible to reduce the number of terminals, enabling faster operation and realizing a display device with a narrow frame. It can be realized.

[0296] [Transistor Electrical Characteristics 3] Below, we fabricated miniaturized transistors and compared their electrical properties.

[0297] The structure of the transistor is shown in FIG. 36 , which is an example of the structure of Embodiment 2. Three types of samples, sample H1, sample H2, and sample H3, were prepared using different semiconductor layer formation conditions. The material was prepared.

[0298] [Transistor Fabrication] The manufacturing process of samples H1, H2, and H3 was carried out under the same conditions except for the deposition conditions of the metal oxide film (oxide semiconductor film). The other steps can be performed using the same method for producing sample A1.

[0299] In Sample H1, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 1. That is, the substrate temperature is set to 130°C, and the flow rate of argon gas is 180 sccm. 20 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 10%. The thickness was approximately 40 nm.

[0300] In Sample H2, the metal oxide film used for the oxide semiconductor film was grown under the same conditions as in Sample 3. That is, the substrate temperature is set to 170°C, and the flow rate of argon gas is 140 sccm. 60 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate was 30%. The thickness was approximately 40 nm.

[0301] In Sample H3, the metal oxide film used for the oxide semiconductor film was grown at a substrate temperature of 170° C. Argon gas with a flow rate of 100 sccm and oxygen gas with a flow rate of 100 sccm were used for sputtering. The pressure was set to 0.6 Pa and the indium and gallium were introduced into the chamber of the ring device. A metal oxide target having In:Ga:Zn=1:1:1.2 [atomic ratio] The oxygen flow rate was 50%. The thickness was set to about 40 nm.

[0302] For each sample, two transistors with different sizes were fabricated. One had a channel length L The other is a transistor with a channel length L of 3 μm. m, and the channel width W is 3 μm.

[0303] [Transistor Electrical Characteristics] The Id-Vg characteristics of the transistor were measured under the following conditions: A voltage applied to the conductive film (hereinafter also referred to as a gate voltage (Vg)) and a second gate electrode The voltage applied to the conductive film (also called Vbg) is set to between -15V and +20V. The voltage was applied in steps of 0.25 V. The voltage applied to the conductive film functioning as the source electrode was The voltage (hereinafter referred to as source voltage (Vs)) is set to 0V (comm), and the drain electrode is set to The voltage applied to the functioning conductive film (hereinafter referred to as drain voltage (Vd)) was set to 0.1 V and and 10V.

[0304] In Figure 30(A), (B), and (C), the channel lengths L of samples H1, H2, and H3 are 2 The Id-Vg characteristics of a transistor with a channel width W of 3 μm are shown in FIG. , (E) and (F) show the channel length L of samples H1, H2 and H3, respectively, with 3 μm and 1 μm. The Id-Vg characteristics of a transistor with a width W of 3 μm are shown. The number of measurements was 2 for sample H1 and 1 for sample H. 2 and sample H3 are 3 respectively.

[0305] As shown in Figure 30, in all samples, the channel length was a very small transistor of 2 μm. Even if there is a problem, it was confirmed that good transistor characteristics were obtained.

[0306] Focusing on the field-effect mobility, it was found that it improved in the order of sample H3, sample H2, and sample H1. When comparing transistors with a channel length L of 2 μm, the field-effect mobility The maximum values differed by approximately two times between sample H1 and sample H2, and by approximately six times between sample H1 and sample H3. .

[0307] In addition, when we look at the profile of the field-effect mobility, the gate voltage is low (for example, 5 V or less). It can be seen that the rise in the lower region is extremely steep for sample H1. .

[0308] From the above results, it is considered that increasing the proportion of indium in the composition of the metal oxide film increases the electrical conductivity. The field effect mobility is improved, and by forming the film at low temperature and low oxygen flow rate, a significant improvement is achieved. For example, the field effect mobility shown in FIG. Movement is 30cm 2 The value of / Vs or more is obtained by using low-temperature polysilicon for the semiconductor layer. The value is comparable to that of a p-channel transistor, and the transistor is made using an oxide semiconductor. This is an extremely high value that has never been seen before in a transistor.

[0309] [Metal oxide film formation method] A method for forming a metal oxide film according to one embodiment of the present invention will be described below.

[0310] The metal oxide film of one embodiment of the present invention can be formed by heating a substrate in an oxygen-containing atmosphere. The film can be formed by sputtering.

[0311] The substrate temperature during film formation is 80°C or higher and 150°C or lower, preferably 100°C or higher and 150°C or lower. Typically, the temperature is preferably 130° C. By increasing the temperature of the substrate, the orientation This allows for the formation of more crystalline portions having the desired properties.

[0312] The oxygen flow rate (oxygen partial pressure) during film formation is set to 1% or more and less than 33%, preferably 5% or more. more preferably 5% to 20% and even more preferably 5% to 15% It is preferable to set the oxygen flow rate to 10%. This allows the film to contain more crystal parts that do not have such a structure.

[0313] Therefore, by setting the substrate temperature during film formation and the oxygen flow rate during film formation within the above ranges, the orientation It is possible to obtain a metal oxide film in which crystalline parts having orientation and crystalline parts not having orientation are mixed. In addition, by optimizing the substrate temperature and oxygen flow rate within the above ranges, it is possible to obtain an oriented film. It is possible to control the ratio of crystalline portions having orientation to crystalline portions not having orientation.

[0314] The oxide targets that can be used for forming metal oxide films include In-Ga-Z The present invention is not limited to n-based oxides, but also includes, for example, In-M-Zn-based oxides (where M is Al, Ga, Y, or can be applied.

[0315] In addition, a sputtering target containing a polycrystalline oxide having a plurality of crystal grains is used, When a metal oxide film containing a crystalline portion is formed, a silicon dioxide film containing no polycrystalline oxide is formed. Compared to when a sputtering target is used, it is easier to obtain a crystalline metal oxide film. water.

[0316] The following is a consideration of the mechanism of metal oxide film formation. The target for annealing has a plurality of crystal grains, and the crystal grains have a layered structure. When the crystal grains have an interface that is easy to cleave, the sputtering target is By colliding with the crystal grains, the crystal grains are cleaved, and flat or pellet-shaped sputtering particles are formed. The obtained plate-like or pellet-like sputtered particles may be deposited on a substrate. It is believed that a metal oxide film containing nanocrystals is formed by depositing the metal oxide on the substrate. Heating promotes bonding or rearrangement of the nanocrystals on the substrate surface. It is believed that this makes it easier to form a metal oxide film containing oriented crystal parts. .

[0317] Although the sputtering method has been described here, The sputtering method is preferred because it is easy to control the crystallinity. In addition to the laser deposition method, other methods such as pulsed laser deposition (PLD) and plasma enhanced chemical vapor deposition (PECV) are also available. D) method, thermal CVD (Chemical Vapor Deposition) method, ALD Atomic Layer Deposition (ALD) method, vacuum deposition method, etc. may also be used. An example of a thermal CVD method is MOCVD (Metal Organic Chemical Vapor Deposition). Al Vapor Deposition (ALD) method is one example.

[0318] [Composition and structure of metal oxide films] The metal oxide film of one embodiment of the present invention can be applied to a semiconductor device such as a transistor. In the following, we will focus on metal oxide films having semiconductor properties (hereinafter referred to as oxide semiconductor films). We will explain about this.

[0319] [About the composition] First, the composition of the oxide semiconductor film will be described.

[0320] As described above, the oxide semiconductor film is made of indium (In) and M (M is Al, Ga, It has Y (Y), Sn (Sn), and Zn (zinc).

[0321] The element M is aluminum, gallium, yttrium, or tin. In addition to the above, other elements that can be applied to the Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium tantalum, tungsten, magnesium, etc. may also be used. A combination of two or more of the above elements may also be used.

[0322] Next, elements of indium, the element M, and zinc contained in the oxide semiconductor film of one embodiment of the present invention will be described. A preferred range of the electron number ratio will be explained with reference to Figures 31(A), (B), and (C). 31(A), (B), and (C) do not show the atomic ratio of oxygen. The atomic ratios of indium, element M, and zinc in the semiconductor film are expressed as [In ], [M], and [Zn].

[0323] In Figures 31(A), (B), and (C), the dashed lines indicate the relationship between [In]:[M]:[Zn]=(1 +α):(1-α):1 atomic ratio (-1≦α≦1), [In]:[M]: The line where the atomic ratio of [Zn] = (1 + α): (1 - α): 2, [In]: [M]: [ The line where the atomic ratio is [In]:[M]:[Z Zn]=(1+α):(1-α):3 n] = (1 + α): (1 - α): 4, and the line where the atomic ratio is [In]: [M]: [ This represents the line where the atomic ratio of Zn is (1+α):(1-α):5.

[0324] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β, the line where [In ]:[M]:[Zn]=1:3:β, the atomic ratio is [In]:[M]:[Zn ]=1:4:β, and the atomic ratio of [In]:[M]:[Zn]=2:1:β. The line where the atomic ratio is [In]:[M]:[Zn]=5:1:β Represents in.

[0325] In addition, as shown in Figure 31 (A) (B) (C), An oxide semiconductor having an atomic ratio of 100 to 1500 is likely to have a spinel-type crystal structure.

[0326] 31A and 31B show the oxide semiconductor film of one embodiment of the present invention containing indium, An example of a preferred range of the atomic ratio of element M and zinc is shown.

[0327] As an example, FIG. 32 shows InMZn where [In]:[M]:[Zn]=1:1:1. Figure 32 shows the crystal structure of InMZ when observed from a direction parallel to the b axis. The crystal structure of nO4 is shown in FIG. 32. The metal element in the (Zn) layer represents element M or zinc. The ratio of lead is equal. The element M and zinc are interchangeable and the arrangement is random. do.

[0328] InMZnO4 has a layered crystal structure (also called a layered structure), as shown in Figure 32. The layer containing element M, zinc, and oxygen (hereinafter referred to as the In layer) is 1. The (M,Zn) layer containing oxygen becomes 2.

[0329] In addition, indium and element M can be substituted for each other. Therefore, the element of the (M, Zn) layer The element M can be replaced with indium, and the layer can be expressed as (In,M,Zn). In this case, In It has a layered structure with one layer and two (In, M, Zn) layers.

[0330] In the oxide with the atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1:1. The layer structure is composed of three (M,Zn) layers. When the oxide crystallizes, the ratio of the (M, Zn) layer to the In layer increases. increases.

[0331] However, in the oxide, the number of layers of (M, Zn) per In layer is non-integer. In this case, there are multiple types of layered structures in which the number of (M, Zn) layers is an integer for one In layer. For example, when [In]:[M]:[Zn]=1:1:1.5, the In layer A layered structure with 1 (M,Zn) layer and 2 (M,Zn) layers, and a layered structure with 3 (M,Zn) layers. In some cases, a layered structure may be formed in which

[0332] For example, when an oxide semiconductor film is formed using a sputtering apparatus, the number of atoms of the target In particular, depending on the substrate temperature during film formation, the target In some cases, the [Zn] of the film may be smaller than the [Zn] of the base.

[0333] In addition, multiple phases may coexist in the oxide semiconductor film (for example, two-phase coexistence or three-phase coexistence). For example, the atomic ratio [In]:[M]:[Zn] = 0:2:1 is close to the atomic ratio. In [In], two phases, a spinel-type crystal structure and a layered crystal structure, tend to coexist. At atomic ratios close to the atomic ratio of [M]:[Zn]=1:0:0, Two phases, a byte-type crystal structure and a layered crystal structure, tend to coexist. When these phases coexist, grain boundaries (also called grain boundaries) are formed between the different crystal structures. ) may be formed.

[0334] On the other hand, when the contents of indium and zinc in the oxide semiconductor film are low, the carrier mobility Therefore, the atomic ratio [In]:[M]:[Zn]=0:1:0 and its In the atomic ratio having a value close to 0.5 (for example, region C shown in FIG. 31(C)), the insulating property becomes high.

[0335] Therefore, the oxide semiconductor of one embodiment of the present invention has high carrier mobility and few grain boundaries. It is preferable that the atomic ratio be that shown in region A in FIG. 31(A), which is likely to form a layered structure with a good atomic ratio. It's nice.

[0336] In addition, in the region B shown in FIG. 31(B), [In]:[M]:[Zn]=4:2:3 to 4 .1 and its neighboring values. Nearby values include, for example, the atomic ratio [In]:[M] Zn]=5:3:4. is an excellent oxide semiconductor film having particularly high crystallinity and high carrier mobility.

[0337] Note that the condition for forming the oxide semiconductor film into a layered structure is uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the atomic ratio. Even if the ratio is the same, a layered structure may or may not be formed depending on the formation conditions. Therefore, the illustrated region is a region showing the atomic ratio in which the oxide semiconductor film has a layered structure. The boundaries between areas A and C are not strict.

[0338] [Structure in which an oxide semiconductor film is used in a transistor] Next, a structure in which an oxide semiconductor film is used for a transistor will be described.

[0339] Note that by using an oxide semiconductor film for a transistor, for example, polycrystalline silicon can be used as a Compared to transistors using a silicon-based gate electrode, it reduces carrier scattering at grain boundaries. Therefore, a transistor with high field effect mobility can be realized. A highly reliable transistor can be realized.

[0340] The oxide semiconductor film of one embodiment of the present invention includes crystalline parts having orientation and crystalline parts not having orientation. The oxide semiconductor film having such crystallinity is a film in which the oxide semiconductor film has a mixed structure. This makes it possible to realize a transistor that combines high field-effect mobility with high reliability.

[0341] [Carrier density of oxide semiconductors] The carrier density of an oxide semiconductor film will be described below.

[0342] The factors that affect the carrier density of an oxide semiconductor film include oxygen in the oxide semiconductor film and Examples of the causes include vacancies (Vo) and impurities in the oxide semiconductor film.

[0343] When the number of oxygen vacancies in the oxide semiconductor film increases, hydrogen bonds to the oxygen vacancies (this state is called Vo When the oxide semiconductor film is heated to a temperature higher than that of the oxide semiconductor film, the density of defect states increases. When the amount of impurities increases, the density of defect states increases due to the impurities. By controlling the defect state density of the oxide semiconductor film, the carrier density of the oxide semiconductor film can be controlled. do.

[0344] Here, a transistor using an oxide semiconductor film for a channel region will be considered.

[0345] Suppression of a negative shift in the threshold voltage of a transistor or suppression of the off-current of a transistor In order to reduce the carrier density of the oxide semiconductor film, it is preferable to reduce the carrier density of the oxide semiconductor film. When the carrier density of the oxide semiconductor film is reduced, impurities in the oxide semiconductor film It is sufficient to lower the impurity concentration and reduce the defect level density. The low density of defect states is called high purity intrinsic or substantially high purity intrinsic. The carrier density of the conductive oxide semiconductor film is 8×10 15 cm -3 Less than 1 x10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 -9 cm -3 That's all there is to it.

[0346] On the other hand, improving the on-state current of a transistor or improving the field-effect mobility of a transistor In this case, it is preferable to increase the carrier density of the oxide semiconductor film. In order to increase the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film is The density of defect states in the oxide semiconductor film may be increased slightly. Alternatively, it is preferable to make the band gap of the oxide semiconductor film smaller. In the range where the on / off ratio of the Id-Vg characteristics is obtained, the impurity concentration is slightly high, or An oxide semiconductor film having a high or slightly high density of defect states can be considered to be substantially intrinsic. The electron affinity is large, and the band gap is accordingly small, resulting in thermal excitation. The oxide semiconductor film in which the density of trapped electrons (carriers) is increased can be considered to be substantially intrinsic. In addition, when an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor is The voltage becomes lower.

[0347] The oxide semiconductor film with the increased carrier density described above is slightly n-type. Therefore, an oxide semiconductor film with an increased carrier density is called a "slightly-n" film. That's fine.

[0348] The carrier density of a substantially intrinsic oxide semiconductor film is 1×10 5 cm -3 More than 1×10 1 8 cm -3 Less than 1 x 10 is preferable. 7 cm -3 More than 1×10 17 cm -3 The following is preferred: 1×10 9 cm -3 5x10 or more 16 cm -3 Even better: 1 x 10 10 cm -3 More than 1×10 16 cm -3 Even better: 1 x 10 11 cm -3 Below Top 1×10 15 cm -3 The following is even more preferred:

[0349] Furthermore, by using the above-described substantially intrinsic oxide semiconductor film, the reliability of the transistor can be improved. Here, referring to FIG. 33, when an oxide semiconductor film is used for a channel region, The reason why the reliability of a transistor is improved will be described. 1 is a diagram illustrating an energy band in a transistor used in a channel region.

[0350] In FIG. 33, GE denotes a gate electrode, GI denotes a gate insulating film, and OS denotes an oxide semiconductor film. and SD represent the source electrode or the drain electrode, respectively. a gate electrode, a gate insulating film, an oxide semiconductor film, and a source electrode or is an example of the energy band of the drain electrode.

[0351] In FIG. 33, a silicon oxide film is used as the gate insulating film, and an oxide semiconductor The film is made of In-Ga-Zn oxide. The transition level (εf) of the defect is located at a distance of about 3.1 eV from the bottom of the conduction band of the gate insulating film. The oxide semiconductor film and silicon oxide film are formed when the gate voltage (Vg) is 30V. The Fermi level (Ef) of the silicon oxide film at the interface with the gate insulating film is below the conduction band of the The ferrite is formed at a position approximately 3.6 eV away from the edge of the silicon oxide film. The electron level varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the semiconductor film and the silicon oxide film The white circles in Figure 33 represent electrons (carriers), and X in Figure 33 represents silicon oxide. represents the defect level in the silicon film.

[0352] As shown in FIG. 33, when a gate voltage is applied, for example, carriers are thermally excited. When this happens, carriers are trapped in the defect level (X in the figure), and the charge changes from positive ("+") to neutral. The charge state of the defect level changes to "0". That is, the Fermi level of the silicon oxide film The sum of the energy of the thermal excitation and the energy of the (Ef) is higher than the defect transition level (εf). When this occurs, the charge state of the defect level in the silicon oxide film changes from a positive state to a neutral state, and a transition occurs. The threshold voltage of the transistor will shift in the positive direction.

[0353] In addition, when oxide semiconductor films having different electron affinities are used, the gate insulating film and the oxide semiconductor film The depth at which the Fermi level is formed at the interface with the oxide with a large electron affinity may differ. When an oxide semiconductor film is used, the gate insulating film is In this case, the defect level that can be formed in the gate insulating film is The Fermi level of the gate insulating film and the oxide semiconductor The energy difference between the Fermi level of the film and the ion beam becomes large. As a result, the amount of charge trapped in the gate insulating film is reduced. The change in the charge state of the defect level that can be formed in the film is reduced, and the gate bias heat (Gat e Bias Temperature (GBT) stress This reduces the fluctuation in the threshold voltage of the transistor.

[0354] In addition, it takes a long time for charges trapped in defect states in the oxide semiconductor film to disappear. Therefore, oxides with high defect level density are Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. be.

[0355] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In addition, in order to reduce the impurity concentration in the oxide semiconductor film, It is preferable to reduce the impurity concentration in the adjacent film. , alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0356] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0357] When silicon or carbon, which is one of the group 14 elements, is contained in an oxide semiconductor film, Therefore, the defect level is formed in the silicon oxide semiconductor film. The concentration of silicon and carbon near the interface with the oxide semiconductor film (secondary ion mass) Secondary Ion Mass Spectrometer (SIMS) The concentration obtained by y) is 2 × 10 18 atoms / cm 3 Below, preferably 2 x 1 0 17 atoms / cm 3 The following applies.

[0358] Furthermore, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, a defect level Therefore, alkali metal or alkaline earth metal A transistor using an oxide semiconductor film containing metals tends to be normally on. Therefore, it is necessary to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film. Specifically, it is preferable to use an alkali metal in the oxide semiconductor film obtained by SIMS. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 Do the following:

[0359] Furthermore, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated, and As a result, the oxide semiconductor film containing nitrogen tends to become n-type. Transistors using semiconductors tend to be normally on. For example, oxide semiconductors The nitrogen concentration in the film was 5×10 19 atoms / cm 3 Less than, preferably is 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0360] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that bonds to metal atoms to form water. Therefore, oxygen vacancies may be formed. When hydrogen enters the oxygen vacancies, Electrons may be generated. Also, some of the hydrogen may combine with oxygen, which combines with the metal atom. Therefore, the oxide semiconductor film containing hydrogen may generate electrons, which are carriers. A transistor using an oxide semiconductor film tends to be normally on. It is preferable that the amount of hydrogen in the oxide semiconductor film be reduced as much as possible. The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm3 Less than, preferred 1×10 19 atoms / cm 3 less than 5 × 10 18 atoms / c m 3 less than 1×10 18 atoms / cm 3 Less than.

[0361] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This allows stable electrical properties to be imparted.

[0362] In addition, the oxide semiconductor film has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferable to have one.

[0363] The thickness of the oxide semiconductor film is 3 nm to 200 nm, preferably 3 nm to 100 nm. 00 nm or less, and more preferably 3 nm or more and 60 nm or less.

[0364] In addition, when the oxide semiconductor film is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose is In:M:Zn. =1:1:0.5, In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, I n:M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2 :1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4.1, In:M: Zn=5:1:7, etc. is preferred.

[0365] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0366] (Embodiment 2) In this embodiment, a transistor that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail.

[0367] In this embodiment, a transistor having a top gate structure is described with reference to FIGS. 5 will be used to explain.

[0368] [Transistor configuration example 1] 34A is a top view of the transistor 100, and FIG. 34B is a top view of the transistor 100 shown in FIG. 34(C) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 34(A). 34(A) is a cross-sectional view of the insulating film 110 and other components for clarity. In the top view of the transistor, the elements are omitted. Even if the figure is different from the figure shown in FIG. 34(A), some of the components may be omitted. The dashed dotted line X1-X2 direction is the channel length (L) direction, and the dashed dotted line Y1-Y2 direction is the channel width ( It may be called the W direction.

[0369] The transistor 100 shown in FIGS. 34(A), (B), and (C) includes an insulating film 104 on a substrate 102. an oxide semiconductor film 108 on the insulating film 104; and an insulating film 110 on the oxide semiconductor film 108. the conductive film 112 over the insulating film 110, the insulating film 104, the oxide semiconductor film 108, and the conductive film 112 over the insulating film 110. and an insulating film 116 over the conductive film 112. Note that the oxide semiconductor film 108 is a channel region 108i overlapping the insulating film 116, a source region 108s contacting the insulating film 116, and and a drain region 108d in contact with 116.

[0370] The insulating film 116 contains nitrogen or hydrogen. s and the drain region 108d, the nitrogen or hydrogen in the insulating film 116 is sorbed. The source region 108s and the drain region 108d are doped with Zn. The carrier density of the rain region 108d increases when nitrogen or hydrogen is added.

[0371] The transistor 100 also includes an insulating film 118 on the insulating film 116 and a layer between the insulating films 116 and 11. A conductive layer electrically connected to the source region 108s is formed through an opening 141a in the semiconductor substrate 108. The drain region is connected to the insulating film 120a through an opening 141b formed in the insulating films 116 and 118. and a conductive film 120b electrically connected to the region 108d.

[0372] In this specification and the like, the insulating film 104 is referred to as a first insulating film, and the insulating film 110 is referred to as a second insulating film. The insulating film 116 is referred to as the third insulating film, and the insulating film 118 is referred to as the fourth insulating film. The conductive film 112 may function as a gate electrode. The conductive film 120a functions as a source electrode, and the conductive film 120b functions as a drain electrode. Has.

[0373] The insulating film 110 also functions as a gate insulating film. The insulating film 110 has an excess oxygen region. Excess oxygen can be supplied into the channel region 108i of the O8. Since the oxygen vacancies that may be formed in the panel region 108i can be compensated for by the excess oxygen, A highly reliable semiconductor device can be provided.

[0374] In order to supply excess oxygen into the oxide semiconductor film 108, Excess oxygen may be supplied to the insulating film 104 formed below the insulating film 10. The excess oxygen contained in the oxide semiconductor film 108 is used to form the source region 108s and the drain region 108s of the oxide semiconductor film 108. The source region 108s and the drain region 108d may also be supplied with When excess oxygen is supplied to the source region 108s and the drain region 108d, the resistance It may be higher.

[0375] On the other hand, in the structure in which the insulating film 110 formed above the oxide semiconductor film 108 contains excess oxygen, By forming the film, it is possible to selectively supply excess oxygen only to the channel region 108i. Alternatively, the channel region 108i, the source region 108s, and the drain region 10 After supplying excess oxygen to the source region 108s and the drain region 108d, By selectively increasing the region density, the resistance of the source region 108s and the drain region 108d can be reduced. Therefore, it is possible to suppress an increase in resistance.

[0376] The source region 108s and the drain region 108d of the oxide semiconductor film 108 are and each preferably has an element that forms an oxygen vacancy or an element that bonds to an oxygen vacancy. Representative elements that form oxygen vacancies or elements that bond with oxygen vacancies include: Examples include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gas elements include helium, neon, argon, krypton, and The insulating film 116 contains one or more of the above elements that form oxygen vacancies. When the insulating film 116 is included, the source region 108s and the drain region 108d are diffused. Alternatively, the element that forms the oxygen vacancy may be added to the source region 108s by an impurity addition process. , and is doped in the drain region 108d.

[0377] When an impurity element is added to an oxide semiconductor film, a bond between a metal element and oxygen in the oxide semiconductor film forms. Alternatively, an impurity element is added to the oxide semiconductor film, and oxygen vacancies are formed. When this occurs, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the metal element As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The carrier density increases and the conductivity increases.

[0378] Next, the components of the semiconductor device shown in FIGS. 34(A), 34(B), and 34(C) will be described in detail. .

[0379] 〔substrate〕 The substrate 102 is made of a material that has heat resistance enough to withstand the heat treatment during the manufacturing process. It is possible.

[0380] Specifically, non-alkali glass, soda-lime glass, alkali glass, crystal glass The insulating film may be made of glass, quartz, sapphire, etc. Alternatively, an inorganic insulating film may be used. Examples of the inorganic insulating film include a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. Examples of the film include an aluminum oxide film.

[0381] The alkali-free glass may have a thickness of 0.2 mm or more and 0.7 mm or less. Alternatively, the above thickness may be achieved by polishing the alkali-free glass.

[0382] In addition, alkali-free glass is available in 6th generation (1500mm x 1850mm) and 7th generation. (1870mm x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400mm) etc. This allows the use of a large glass substrate, making it possible to manufacture a large display device. can be done.

[0383] The substrate 102 may be a single crystal semiconductor substrate made of silicon or silicon carbide, or a polycrystalline A semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, or the like may also be used. .

[0384] Alternatively, an inorganic material such as a metal may be used as the substrate 102. Examples of the material include stainless steel and aluminum.

[0385] The substrate 102 is made of an organic material such as resin, resin film, or plastic. The resin film may be polyester, polyolefin, polyamide (nano), or the like. Iron, aramid, etc.), polyimide, polycarbonate, polyurethane, acrylic resin, Epoxy resin, polyethylene terephthalate (PET), polyethylene naphthalate (P Examples include polyethersulfone (PES), polyethersulfone (PEN), and resins with siloxane bonds. It can be obtained.

[0386] Alternatively, the substrate 102 may be made of a composite material that combines an inorganic material and an organic material. The composite material is a material made by bonding a metal plate or a thin glass plate to a resin film. composite materials, fibrous metal, particulate metal, fibrous glass, or particulate glass. Materials dispersed in an oil film, or fibrous resin or particulate resin dispersed in inorganic materials Materials, etc.

[0387] The substrate 102 is at least capable of supporting a film or layer formed thereon or therebelow. Any suitable film may be used, and the film may be one or more of an insulating film, a semiconductor film, and a conductive film. stomach.

[0388] [First insulating film] The insulating film 104 can be formed by sputtering, CVD, evaporation, pulsed laser deposition ( The insulating film 104 can be formed by appropriately using a photo-induced laser deposition (PLD) method, a printing method, a coating method, or the like. For example, an oxide insulating film or a nitride insulating film may be formed as a single layer or a stacked layer. Note that in order to improve the interface characteristics with the oxide semiconductor film 108, In this case, at least a region in contact with the oxide semiconductor film 108 is preferably formed using an oxide insulating film. It is also preferable to use an oxide insulating film that releases oxygen by heating as the insulating film 104. Then, oxygen contained in the insulating film 104 is transferred to the oxide semiconductor film 108 by heat treatment. It is possible.

[0389] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or The thickness of the insulating film 104 can be set to 200 nm or more and 1000 nm or less. This can increase the amount of oxygen released from the insulating film 104 and also increase the The interface state at the interface with the conductor film 108 and the channel region 1 of the oxide semiconductor film 108 It is possible to reduce the oxygen vacancies contained in 08i.

[0390] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The insulating film may be formed as a single layer or a stacked layer. The layer structure 104 is a stack of a silicon nitride film and a silicon oxynitride film. The insulating film 104 has a laminated structure, with a silicon nitride film on the lower layer and an oxynitride film on the upper layer. By using a silicon film, oxygen can be efficiently introduced into the oxide semiconductor film 108. Cut.

[0391] [Oxide Semiconductor Film] The metal oxide film described in Embodiment 1 can be used as the oxide semiconductor film 108. can.

[0392] In addition, when the oxide semiconductor film 108 is formed by a sputtering method, the film density can be increased. When the oxide semiconductor film 108 is formed by a sputtering method, The tarnishing gas may be a rare gas (typically argon), oxygen, or a mixture of rare gas and oxygen. A mixed gas is used as appropriate. In addition, the sputtering gas must be highly purified. For example, The oxygen gas and argon gas used as the sputtering gas preferably have a dew point of -60°C or less. Alternatively, a gas highly purified to −100° C. or lower may be used to form the oxide semiconductor film 108 with water. This can prevent as much as possible the incorporation of chemicals, etc.

[0393] In addition, when the oxide semiconductor film 108 is formed by a sputtering method, a sputtering apparatus The chamber is then cooled to remove as much water as possible, which may be an impurity for the oxide semiconductor film 108. To remove the gas, a high vacuum (5×10) was created using an adsorption type vacuum pump such as a cryopump. - 7 Pa to 1 x 10 -4 It is preferable to evacuate the gas to a pressure of about 100 Pa. When the analyzer is in standby, gas molecules equivalent to H2O (m / z = 18) in the chamber The partial pressure of the gas molecules (corresponding to the -4 Pa or less, preferably 5 x 10 -5 Pa or less It is preferable.

[0394] [Second insulating film] The insulating film 110 functions as a gate insulating film of the transistor 100. 10 has a function of supplying oxygen to the oxide semiconductor film 108, particularly to the channel region 108i. For example, the insulating film 110 may be a single layer or a stacked layer of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor film 108, In the insulating film 110, a region in contact with the oxide semiconductor film 108 is at least an oxide insulating film. The insulating film 110 is preferably formed using a film such as silicon oxide or oxynitride. Silicon oxide, silicon nitride, silicon nitride, or the like may be used.

[0395] The thickness of the insulating film 110 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. The thickness can be 10 nm or less, or 10 nm or more and 250 nm or less.

[0396] Furthermore, it is preferable that the insulating film 110 has few defects. The signal observed by ESR (Electron Spin Resonance) For example, the signal above is observed at a g value of 2.001. The E' center is an electron-doped ion that occurs in the dangling bond of silicon. The insulating film 110 has a spin density due to the E' center of 3×10 17 spi ns / cm 3Less than or equal to 5 x 10 16 spins / cm 3 Silicon oxide is less than A silicon oxynitride film or a silicon nitride film may be used.

[0397] In addition to the above signals, the insulating film 110 also contains signals due to nitrogen dioxide (NO2). The signal is divided into three signals depending on the nuclear spin of N. The g value of each is between 2.037 and 2.039 (first signal). , g value is 2.001 or more and 2.003 or less (second signal), and g value is 1.96 It is observed between 4 and 1.966 (referred to as the third signal).

[0398] For example, the insulating film 110 may have a spin density of 1×10 1 7 spins / cm 3 More than 1×10 18 spins / cm 3 When an insulating film having a thickness of less than It is suitable.

[0399] In addition, nitrogen oxides (NO x ) creates a level in the insulating film 110 The level is located within the energy gap of the oxide semiconductor film 108. Therefore, nitrogen oxides (NOx) diffuse to the interface between the insulating film 110 and the oxide semiconductor film 108. When this happens, the level may trap electrons on the insulating film 110 side. The trapped electrons remain near the interface between the insulating film 110 and the oxide semiconductor film 108. Therefore, the insulating film 11 When a film containing a small amount of nitrogen oxide is used, the threshold voltage of the transistor is The shift can be reduced.

[0400] Nitrogen oxides (NO x ) is released in a small amount, for example, a silicon oxynitride film. The silicon oxynitride film can be analyzed by thermal desorption spectroscopy (TDS). Thermal Desorption Spectroscopy (DSS) revealed that nitrogen oxides (NO x ) is a membrane that releases more ammonia than water, and typically Output is 1 x 10 18 molecules / cm 3 5x10 or more 19 molecules / cm 3 The following is the case. The amount of ammonia released is higher when the temperature of the heat treatment in TDS is between 50°C and 650°C, or or the total amount in the range of 50°C or more and 550°C or less.

[0401] Nitrogen oxides (NO x ) reacts with ammonia and oxygen during heat treatment, By using an insulating film that releases a large amount of monoxide, x ) is reduced.

[0402] When the insulating film 110 was analyzed by SIMS, the nitrogen concentration in the film was 6×10 20 ato ms / cm 3 It is preferable that the following is true:

[0403] The insulating film 110 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z), high-k materials such as hafnium oxide may also be used. The use of this high-k material can reduce gate leakage of transistors.

[0404] [Third insulating film] The insulating film 116 contains nitrogen or hydrogen. The insulating film 116 also contains fluorine. The insulating film 116 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, silicon oxynitride, silicon nitride fluoride, The insulating film 116 can be formed using silicon fluoride nitride or the like. is 1 x 10 22 atoms / cm 3 The insulating film 116 is preferably formed of an acid. The source region 108s and the drain region 108d of the nitride semiconductor film 108 are in contact with each other. Therefore, the impurities in the source region 108s and the drain region 108d that are in contact with the insulating film 116 The (nitrogen or hydrogen) concentration increases, and the source region 108s and the drain region 108d The carrier density can be increased.

[0405] [Fourth insulating film] The insulating film 118 can be an oxide insulating film. For example, a stacked film of an oxide insulating film and a nitride insulating film can be used. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, Hafnium oxide, gallium oxide, Ga-Zn oxide, or the like may be used.

[0406] The insulating film 118 functions as a barrier film against hydrogen, water, and the like from the outside. It is preferable that

[0407] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. m or less.

[0408] [Conductive film] The conductive films 112, 120a, and 120b can be formed by sputtering, vacuum deposition, pulse deposition, or the like. It can be formed by using a laser deposition (PLD) method, a thermal CVD method, etc. 112, 120a, and 120b are made of conductive metal films and those having a function of reflecting visible light. A conductive film having a function of transmitting visible light or a conductive film having a function of transmitting visible light may be used.

[0409] Conductive metal films include aluminum, gold, platinum, silver, copper, chromium, tantalum, Titanium, molybdenum, tungsten, nickel, iron, cobalt, palladium or manganese Alternatively, a material containing the above-mentioned metal element can be used. An alloy containing the metal may also be used.

[0410] Specifically, the conductive metal film may be a two-layer structure in which a copper film is laminated on a titanium film. Two-layer structure with copper film laminated on titanium nitride film, two-layer structure with copper film laminated on tantalum nitride film A three-layer structure is used, in which a copper film is laminated on a titanium film, and a titanium film is formed on top of that. In particular, by using a conductive film containing copper, the resistance can be reduced. Furthermore, the conductive film containing copper element is preferably an alloy film containing copper and manganese. The alloy film is suitable because it can be processed using a wet etching method. .

[0411] It is preferable to use a tantalum nitride film as the conductive films 112, 120a, and 120b. The tantalum nitride film is electrically conductive and has a high barrier property against copper or hydrogen. Furthermore, tantalum nitride film releases less hydrogen from itself, so it is less susceptible to oxidation. As a metal film in contact with the oxide semiconductor film 108 or a metal film near the oxide semiconductor film 108, It can be most preferably used.

[0412] In addition, a conductive polymer or a conductive high polymer is used as the conductive film having the above-mentioned conductivity. That's fine.

[0413] The conductive film having the above-mentioned function of reflecting visible light may be made of gold, silver, copper, or para- In particular, conductive materials containing silver can be used. The use of a film is preferable because it can increase the reflectance in visible light.

[0414] The conductive film having the above-mentioned function of transmitting visible light may be formed of indium, tin, zinc, A material containing an element selected from gallium or silicon can be used. are In oxide, Zn oxide, In-Sn oxide (also called ITO), In-Sn-Si oxide (also called ITSO), In-Zn oxide, In-Ga-Zn oxide, etc. do.

[0415] The conductive film having the above-mentioned function of transmitting visible light may be made of graphene or graphene. A film containing graphene oxide may be used as the film containing graphene. and reducing the graphene oxide-containing film to form a graphene-containing film. The reduction method can be achieved by applying heat or by using a reducing agent. can be done.

[0416] The conductive films 112, 120a, and 120b can be formed by electroless plating. Materials that can be formed by the electroless plating method include, for example, Cu, Ni, Al, One or more selected from Au, Sn, Co, Ag, and Pd may be used. In particular, when Cu or Ag is used, the resistance of the conductive film can be reduced. Therefore, it is preferable.

[0417] Furthermore, when a conductive film is formed by electroless plating, the constituent elements of the conductive film tend to diffuse outward. In order to prevent the diffusion of the conductive film, a diffusion prevention film may be formed under the conductive film. A seed layer may be formed between the film and the conductive film on which the conductive film can be grown. The diffusion prevention film can be formed by, for example, sputtering. The diffusion prevention film may be, for example, a tantalum nitride film or a titanium nitride film. The seed layer can be formed by electroless plating. The seed layer may be made of a conductive film material that can be formed by electroless plating. Materials similar to those used for the stencil printing can be used.

[0418] The conductive film 112 is formed using an oxide semiconductor such as In-Ga-Zn oxide. When nitrogen or hydrogen is supplied from the insulating film 116, the oxide semiconductor In other words, the oxide semiconductor has a high carrier density. Therefore, oxide semiconductors function as gate electrodes. It can be used as such.

[0419] For example, the conductive film 112 may have a single layer structure of an oxide conductor (OC) or a single layer structure of a metal film. Alternatively, a laminated structure of an oxide conductor (OC) and a metal film may be used.

[0420] The conductive film 112 may have a single-layer structure of a metal film having a light-shielding property or an oxide conductor ( When a laminated structure of an OC and a metal film having a light-shielding property is used, a layer formed below the conductive film 112 This is preferable because the channel region 108i that is to be covered by the conductive film 11 can be shielded from light. 2. A laminate of an oxide semiconductor or oxide conductor (OC) and a metal film having a light-shielding property. When using this structure, a metal film (e.g., a thin film of a metal oxide) is formed on an oxide semiconductor or an oxide conductor (OC). By forming a metal film, the constituent elements in the metal film can be converted into an oxide semiconductor. or diffusion into the oxide conductor (OC) side, resulting in low resistance, or damage during the deposition of the metal film (for example, The resistance is reduced due to the presence of oxide semiconductor in the metal film. Alternatively, oxygen in the oxide conductor (OC) diffuses, forming oxygen vacancies and resulting in low resistance. do.

[0421] The thickness of the conductive films 112, 120a, and 120b is 30 nm or more and 500 nm or less. Alternatively, it can be 100 nm or more and 400 nm or less.

[0422] [Transistor configuration example 2] Next, regarding the transistors having different structures from those shown in FIGS. 34(A), (B), and (C), the transistors shown in FIGS. Explain using A), (B), and (C).

[0423] 35(A) is a top view of the transistor 100A, and FIG. 35(B) is a top view of the transistor 100A. 35(C) is a cross-sectional view taken along the dashed line Y1-X2 in FIG. 10 is a cross-sectional view of the section Y2.

[0424] The transistor 100A shown in FIGS. 35(A), (B), and (C) includes a conductive film 10 on a substrate 102. 6, the insulating film 104 on the conductive film 106, the oxide semiconductor film 108 on the insulating film 104, and An insulating film 110 on the nitride semiconductor film 108, a conductive film 112 on the insulating film 110, and 4, the oxide semiconductor film 108, and the insulating film 116 over the conductive film 112. The compound semiconductor film 108 includes a channel region 108i overlapping with the conductive film 112, an insulating film 116, and a a source region 108s in contact with the insulating film 116 and a drain region 108d in contact with the insulating film 116; .

[0425] The transistor 100A has the same structure as the transistor 100 described above, but also has a conductive film 106 and a , and an opening 143.

[0426] The opening 143 is provided in the insulating films 104 and 110. The conductive film 106 is The conductive film 106 is electrically connected to the conductive film 112 through the opening 143. The same potential is applied to the conductive film 112. 6 and the conductive film 112 may be applied with different potentials. For example, the conductive film 106 may be made of a light-shielding material. By forming the insulating layer 108a, it is possible to suppress light from below irradiating the channel region 108i. Cut.

[0427] In addition, in the case of the transistor 100A, the conductive film 106 is a first gate electrode ( The conductive film 112 functions as a second gate electrode ( The insulating film 104 functions as a first gate electrode. The insulating film 110 functions as a first gate insulating film. do.

[0428] The conductive film 106 is made of the same material as the conductive films 112, 120a, and 120b described above. In particular, the conductive film 106 can be formed of a material containing copper, which can For example, the conductive film 106 may be a titanium nitride film or a titanium nitride film. A copper film is provided over a tungsten film or a tungsten film. 0b is a laminated structure in which a copper film is provided on a titanium nitride film, a tantalum nitride film, or a tungsten film. In this case, the transistor 100A is preferably used as a pixel transistor of a display device. By using the conductive film 106 and the conductive film 107 in either one or both of the driving transistor and the conductive film 108, The parasitic capacitance occurring between the conductive film 106 and the conductive film 120a, and the parasitic capacitance occurring between the conductive film 106 and the conductive film 120b Therefore, the capacitance can be reduced. 120b to the first gate electrode, source electrode, and drain electrode of the transistor 100A. It is not only used as a power supply wiring for a display device, a signal supply wiring, or a connection It can also be used for wiring for electrical equipment.

[0429] In this way, the transistor 100A shown in FIGS. 35(A), (B), and (C) has the same structure as that described above. Unlike the transistor 100, the oxide semiconductor film 108 is provided above and below the oxide semiconductor film 108, and functions as a gate electrode. As shown in the transistor 100A, the semiconductor device of one embodiment of the present invention The device may be provided with multiple gate electrodes.

[0430] As shown in FIGS. 35B and 35C, the oxide semiconductor film 108 is the conductive film 106 functioning as a first gate electrode and the conductive film 112 functioning as a second gate electrode. It is positioned opposite to the gate electrode and is sandwiched between two conductive films that function as gate electrodes.

[0431] The length of the conductive film 112 in the channel width direction is equal to that of the oxide semiconductor film 108. The length of the oxide semiconductor film 108 in the channel width direction is longer than the length of the insulating film 110. The conductive film 112 and the conductive film 106 are sandwiched between the insulating film 112 and the conductive film 106. 104 and the insulating film 110 through the opening 143. One of the side surfaces of the conductive film 108 in the channel width direction is connected to a conductive film 112 with an insulating film 110 sandwiched therebetween. and is opposed to it.

[0432] In other words, in the channel width direction of the transistor 100A, the conductive film 106 and the conductive film 108 are The film 112 is connected to the insulating film 104 and the insulating film 110 at an opening 143 provided therein. The oxide semiconductor film 108 is surrounded by the insulating film 104 and the insulating film 110. It is a structure that includes:

[0433] With this configuration, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 106 functioning as a first gate electrode and a conductive film 108 functioning as a second gate electrode. The transistor 100A can be electrically surrounded by the electric field of the conductive film 112. As described above, a channel region is formed by the electric fields of the first gate electrode and the second gate electrode. The device structure of the transistor that electrically surrounds the oxide semiconductor film 108 is called Surro. This can be called an unded channel (S-channel) structure.

[0434] Since the transistor 100A has an S-channel structure, the conductive film 106 or The conductive film 112 effectively applies an electric field for inducing a channel to the oxide semiconductor film 108. This improves the current driving capability of the transistor 100A, resulting in a high on-state current. It is also possible to increase the on-current, which allows The transistor 100A can be miniaturized. Since the transistor 1 has a structure surrounded by the conductive film 106 and the conductive film 112, The mechanical strength of 00A can be improved.

[0435] Note that the opening in the oxide semiconductor film 108 in the channel width direction of the transistor 100A An opening different from opening 143 may be formed on the side where portion 143 is not formed.

[0436] As shown in the transistor 100A, a transistor is formed with a semiconductor film sandwiched therebetween. When a pair of gate electrodes are present, one gate electrode is connected to signal A and the other gate is connected to signal B. A fixed potential Vb may be applied to the gate electrodes. A signal B may be applied to one of the gate electrodes. A fixed potential V a, and the other gate electrode may be given a fixed potential Vb.

[0437] The signal A is, for example, a signal for controlling the conductive state or the non-conductive state. It is a digital signal that takes two types of potential: potential V1 or potential V2 (V1>V2). For example, the potential V1 may be a high power supply potential and the potential V2 may be a low power supply potential. Signal A may be an analog signal.

[0438] The fixed potential Vb is, for example, a potential for controlling the threshold voltage VthA of a transistor. The fixed potential Vb may be the potential V1 or the potential V2. This is preferable because it does not require a separate potential generating circuit for generating the fixed potential Vb. The fixed potential Vb may be a potential different from the potential V1 or the potential V2. As a result, the gate-source voltage VthA can be increased. The drain current when Vgs is 0V is reduced, and the leakage current of the circuit containing the transistor is reduced. For example, the fixed potential Vb may be set lower than the low power supply potential. Therefore, by increasing the fixed potential Vb, the threshold voltage VthA can sometimes be reduced. As a result, the drain current is improved when the gate-source voltage Vgs is at a high power supply potential, and the transistor For example, the fixed potential Vb can be lowered. It may be higher than the power supply potential.

[0439] The signal B is, for example, a signal for controlling the conductive state or the non-conductive state. It is a digital signal that takes two types of potential: potential V3 or potential V4 (V3>V4). For example, the potential V3 may be a high power supply potential and the potential V4 may be a low power supply potential. Signal B may be an analog signal.

[0440] If signal A and signal B are both digital signals, signal B will have the same digital value as signal A. In this case, the on-current of the transistor is improved, and the transistor In this case, the potential V1 and the potential V2 of the signal A can be increased. The potential V2 may be different from the potentials V3 and V4 in the signal B. For example, The gate insulating film corresponding to the gate to which signal B is input is the gate insulating film corresponding to the gate to which signal A is input. If the gate insulating film is thicker than the gate insulating film, the potential amplitude of signal B (V3-V4) is It may be set larger than (V1-V2). By doing so, the transistor conduction state or The influence of signal A on the non-conducting state is set to the same degree as the influence of signal B on the non-conducting state. It may be possible to do this.

[0441] If signal A and signal B are both digital signals, signal B has a different digital value than signal A. In this case, the control of the transistor is divided into signals A and B. For example, if a transistor is In the case of a channel type, when signal A is at potential V1 and signal B is at potential V3, When only signal A is in a conducting state, or when signal B is at potential V4, If only one transistor is non-conductive, it is possible to use a single transistor to perform functions such as a NAND circuit or a NOR circuit. In addition, the signal B is a signal for controlling the threshold voltage VthA. For example, signal B may be a signal during which a circuit having a transistor is operating. The signal B may be a signal whose potential is different between the period when the circuit is in operation and the period when the circuit is not in operation. In this case, signal B may be a signal with a different potential depending on the operating mode of the circuit. In some cases, the potential may not be switched as frequently as

[0442] If both signal A and signal B are analog signals, signal B is an analog signal with the same potential as signal A. analog signal obtained by multiplying the potential of signal A by a constant, or by adding a constant to the potential of signal A Alternatively, it may be an analog signal obtained by subtracting the signal. In this case, the on-current of the transistor is The signal B is a signal A may be a different analog signal. In this case, the transistor control is performed by signal A and signal B can be performed separately, which may result in higher functionality.

[0443] Signal A may be a digital signal and signal B may be an analog signal. Signal B may be an analog signal and signal B may be a digital signal.

[0444] When a fixed potential is applied to both gate electrodes of a transistor, the transistor is connected to a resistor element. For example, a transistor can function as an n-channel transistor. In the case of a transistor type, the fixed potential Va or the fixed potential Vb can be increased (decreased). In some cases, the effective resistance of the resistor can be lowered (or raised). By making both Vb high (low), a transistor with only one gate In some cases, a lower (higher) effective resistance may be obtained.

[0445] The other configurations of the transistor 100A are the same as those of the transistor 100 shown above. and has the same effect.

[0446] An insulating film may be further formed on the transistor 100A. 36(A) and 36(B) are cross-sectional views of a transistor 100B. The top view of the transistor 100B is the same as that of the transistor 100A shown in FIG. Since it is the same as the above, the explanation will be omitted here.

[0447] The transistor 100B shown in FIGS. 36(A) and 36(B) includes conductive films 120a and 120b, an insulating film 120b, and a The insulating film 122 is provided on the film 118. The other configurations are the same as those of the transistor 100A. and has the same effect.

[0448] The insulating film 122 has a function of planarizing unevenness caused by transistors and the like. The film 122 may be made of any insulating material, and may be made of an inorganic or organic material. The inorganic material may be a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a nitride film, or the like. Examples of the organic material include a silicon film, an aluminum oxide film, and an aluminum nitride film. Examples of the material include photosensitive resin materials such as acrylic resin and polyimide resin. .

[0449] [Transistor configuration example 3] Next, regarding the transistors having different structures from those shown in FIGS. 35(A), 35(B), and 35(C), the transistors shown in FIGS. This will be explained using Figure 39.

[0450] 37(A) and (B) are cross-sectional views of the transistor 100C, and FIGS. 38(A) and (B) are cross-sectional views of the transistor 100C. 39(A) and 39(B) are cross-sectional views of the transistor 100E. 10C, 100D, and 100E. The top view of the transistor 100E is the same as that of the transistor 100A shown in FIG. Therefore, the explanation here will be omitted.

[0451] The transistor 100C shown in FIGS. 37A and 37B has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 110 and the shape of the insulating film 112 are different from those of the transistor 100A.

[0452] The conductive film 112 of the transistor 100C is a conductive film 112_1 on the insulating film 110 and a conductive film 112_2 on the insulating film 110. For example, the conductive film 112_1 may be made of an acid. By using a nitride conductive film, excess oxygen can be added to the insulating film 110. The oxide conductive film is formed by sputtering in an atmosphere containing oxygen gas. The oxide conductive film may be, for example, an oxide film containing indium and tin. oxides containing tungsten and indium; oxides containing tungsten, indium, and zinc oxides containing titanium and indium; oxides containing titanium, indium, and tin oxides containing indium and zinc; oxides containing silicon, indium, and tin; Examples of suitable oxides include oxides containing indium, gallium, and zinc.

[0453] As shown in FIG. 37(B), in the opening 143, the conductive film 112_2 and the conductive When the opening 143 is formed, the conductive film 112_1 is connected to the conductive film 106. After forming the hole 142, an opening 143 is formed, thereby forming the shape shown in FIG. 37(B). When an oxide conductive film is used for the conductive film 112_1, the conductive film 112_2 and the conductive film 112_3 can be formed. By using a structure in which the conductive film 112 and the conductive film 106 are connected, the connection resistance between the conductive film 112 and the conductive film 106 can be reduced. It is possible.

[0454] The conductive film 112 and the insulating film 110 of the transistor 100C have a tapered shape. More specifically, the lower end of the conductive film 112 is formed outside the upper end of the conductive film 112. The lower end of the insulating film 110 is formed outside the upper end of the insulating film 110. The lower end of the conductive film 112 is formed at approximately the same position as the upper end of the insulating film 110 .

[0455] The conductive film 112 and the insulating film 110 of the transistor 100C are tapered, Compared with the case where the conductive film 112 and the insulating film 110 of the transistor 100A are rectangular, This is preferable because it can improve the coverage of 16.

[0456] The other configurations of the transistor 100C are the same as those of the transistor 100A shown above. and has the same effect.

[0457] The transistor 100D shown in FIGS. 38A and 38B has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 110 and the shape of the insulating film 112 are different from those of the transistor 100A.

[0458] The conductive film 112 of the transistor 100D is a conductive film 112_1 on the insulating film 110 and a conductive film 112_2 on the insulating film 110. The conductive film 112_2 is formed on the conductive film 112_1. For example, the conductive film 112_1 and the conductive film 112_2 are formed on the outer side of the upper end of the conductive film 112_1. The film 112_2 and the insulating film 110 are processed using the same mask, and the conductive film 112_2 is wet The conductive film 112_1 and the insulating film 110 are dry-etched by etching. By processing, the above structure can be obtained.

[0459] In addition, by using the structure of the transistor 100D, the region 1 The region 108f may be formed between the channel region 108i and the source region 108i. 108s and between the channel region 108i and the drain region 108d.

[0460] The region 108f functions as either a high resistance region or a low resistance region. The resistance region has a resistance equivalent to that of the channel region 108i and is a conductive region that functions as a gate electrode. This is the region where the film 112 does not overlap. When the region 108f is a high resistance region, the region 108f is This functions as a so-called offset region. When the region 108f functions as an offset region, In order to suppress a decrease in the on-state current of the transistor 100D, the channel length (L ) direction, the region 108f may be set to 1 μm or less.

[0461] The low resistance region is a region having a resistance lower than that of the channel region 108i and a resistance lower than that of the source region 10 The region 108f is a low-resistance region. In this case, the region 108f is a so-called LDD (Lightly Doped Drain) region. When the region 108f functions as an LDD region, the drain This allows for the relaxation of the electric field in the drain region, thereby reducing the threshold voltage of the transistor due to the electric field in the drain region. This can reduce fluctuations in the value voltage.

[0462] When the region 108f is used as an LDD region, for example, the insulating film 116 is 8f is supplied with one or more of nitrogen, hydrogen, and fluorine, or the insulating film 110 and the conductive film 11 By adding an impurity element from above the conductive film 112_1 using the conductive film 112_1 as a mask, The impurities pass through the conductive film 112_1 and the insulating film 110 and are added to the oxide semiconductor film 108. It can be formed by

[0463] As shown in FIG. 38(B), in the opening 143, the conductive film 112_2 and the conductive The membrane 106 is connected.

[0464] The other configurations of the transistor 100D are the same as those of the transistor 100A shown above. and has the same effect.

[0465] The transistor 100E shown in FIGS. 39(A) and 39(B) has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 110 and the shape of the insulating film 112 are different from those of the transistor 100A.

[0466] The conductive film 112 of the transistor 100E is a conductive film 112_1 on the insulating film 110 and a conductive film 112_2 on the insulating film 110. The conductive film 112_2 is formed on the conductive film 112_1. The insulating film 110 is formed on the outer side of the lower end of the conductive film 112_2. For example, the conductive film 112_1 and the conductive film 112_2 are formed on the outer side of the lower end of the conductive film 112_1. The conductive film 112_2 and the insulating film 110 are processed using the same mask. 12_1 is processed by wet etching, and the insulating film 110 is processed by dry etching. By performing this process, the above structure can be achieved.

[0467] In addition, like the transistor 100D, the transistor 100E has an oxide semiconductor film 1 A region 108f may be formed in the SiO2 layer. The region 108f may be a channel region 108i. and the source region 108s, and between the channel region 108i and the drain region 108d. is formed.

[0468] As shown in FIG. 39(B), in the opening 143, the conductive film 112_2 and the conductive The membrane 106 is connected.

[0469] The other configurations of the transistor 100E are the same as those of the transistor 100A shown above. and has the same effect.

[0470] [Transistor configuration example 4] Next, regarding the configuration different from the transistor 100A shown in FIGS. 35(A), (B), and (C), This will be explained using Figures 40 to 44.

[0471] 40(A) and (B) are cross-sectional views of the transistor 100F, and FIGS. 41(A) and (B) are cross-sectional views of the transistor 100F. 42(A) and 42(B) are cross-sectional views of the transistor 100H. 43(A) and (B) are cross-sectional views of the transistor 100J, and FIG. 44 (A) and (B) are cross-sectional views of the transistor 100K. Transistor 100G, transistor 100H, transistor 100J, and transistor The top view of the transistor 100K is the same as that of the transistor 100A shown in FIG. Therefore, the explanation here will be omitted.

[0472] Transistor 100F, Transistor 100G, Transistor 100H, Transistor The transistor 100J and the transistor 100K are the same as the transistor 100A shown above, except that the oxide semiconductor The structure of the film 108 is different. Other configurations are the same as the transistor 100A shown above. It has the same configuration and produces the same effects.

[0473] The oxide semiconductor film 108 included in the transistor 100F shown in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film 108_1 an oxide semiconductor film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2; The channel region 108i, the source region 108s, and the drain region 108d are The oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3 are It has a three-layer laminated structure of 108_3.

[0474] The oxide semiconductor film 108 included in the transistor 100G shown in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 The semiconductor layer 108_3 includes a channel region 108i, a source region 108s, and The drain region 108d is formed by the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3. It has a two-layer laminated structure of 08_3.

[0475] The oxide semiconductor film 108 included in the transistor 100H shown in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film 108_1 The semiconductor layer 108_2 also includes a channel region 108i, a source region 108s, and The drain region 108d is formed by the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2. It has a two-layer laminated structure of 08_2.

[0476] The oxide semiconductor film 108 included in the transistor 100J shown in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film 108_1 an oxide semiconductor film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2; The channel region 108i is formed by the oxide semiconductor film 108_1 and the oxide semiconductor film 108 The source region 108s and the oxide semiconductor film 108_2 are stacked. The drain region 108d is formed of the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, respectively. The transistor 100J has a two-layer stack structure of 108_2. In the cross section in the direction perpendicular to the plane, the oxide semiconductor film 108_3 is It covers the side surface of the semiconductor film 108_2.

[0477] The oxide semiconductor film 108 included in the transistor 100K shown in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 The channel region 108i includes the oxide semiconductor film 108_3. 2 and an oxide semiconductor film 108_3, and The drain region 108d has a single-layer structure of the oxide semiconductor film 108_2. In the cross section of the transistor 100K in the channel width (W) direction, the oxide semiconductor film 108 The oxide semiconductor film 108_3 covers the side surface of the oxide semiconductor film 108_2.

[0478] The side surface or the vicinity of the channel region 108i in the channel width (W) direction is processed. Damage in the Therefore, even if the channel region 108i is substantially intrinsic, When stress such as an electric field is applied, the channel width ( The side surface or its vicinity in the W direction is activated and tends to become a low-resistance (n-type) region. When the side surface of the channel region 108i in the channel width (W) direction or its vicinity is an n-type region, Since the n-type region serves as a path for carriers, a parasitic channel may be formed.

[0479] Therefore, in the transistor 100J and the transistor 100K, the channel region The channel region 108i has a stacked structure, and the side surface of the channel region 108i in the channel width (W) direction is By using this structure, the side surface of the channel region 108i is covered with one of the layers. or suppressing defects on or near the side of the channel region 108i. This makes it possible to reduce the adhesion of impurities to the substrate.

[0480] [Band structure] Here, the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3, and the insulating film 104 The band structure of the insulating film 110, the insulating film 104, the oxide semiconductor films 108_2 and 108_3, and The band structure of the insulating film 110, the insulating film 104, the oxide semiconductor films 108_1 and 108_2, and the The band structure of 2 will be explained using Figures 45(A), (B), and (C). A), (B), and (C) are band structures in the channel region 108i.

[0481] FIG. 45(A) shows the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3. 4 is an example of a band structure in the thickness direction of a laminated structure having the insulating film 110. 5(B) shows the insulating film 104, the oxide semiconductor films 108_2 and 108_3, and the insulating film 110. FIG. 45(C) shows an example of a band structure in the film thickness direction of a laminated structure having an insulating film. 104, a stacked structure including oxide semiconductor films 108_1 and 108_2, and an insulating film 110. This is an example of a band structure in the film thickness direction. For ease of understanding, the band structure is shown as an insulating film. 104, the oxide semiconductor films 108_1, 108_2, 108_3, and the insulating film 110 The energy level (Ec) at the lower band edge is shown.

[0482] In addition, in FIG. 45(A), silicon oxide films are used as the insulating films 104 and 110, and oxide semiconductor films are used. The metal oxide film 108_1 has an atomic ratio of In:Ga:Zn=1:3:2. An oxide semiconductor film formed using a metal target was used as the oxide semiconductor film 108_2. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film 108_3 is formed by using an oxide semiconductor film formed by adding an atom of a metal element. Oxide formed using a metal oxide target with a numerical ratio of In:Ga:Zn=1:3:2 FIG. 1 is a band diagram of a configuration using a semiconductor film.

[0483] In addition, in FIG. 45(B), silicon oxide films are used as the insulating films 104 and 110, and oxide semiconductor films are used. The conductor film 108_2 is made of a metal having an atomic ratio of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 108_3 is formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 was used. FIG. 10 is a band diagram of a structure using an oxide semiconductor film formed by

[0484] FIG. 45(C) shows a case where silicon oxide films are used as the insulating films 104 and 110, and oxide semiconductor films are used as the insulating films 104 and 110. The metal oxide film 108_1 has an atomic ratio of In:Ga:Zn=1:3:2. An oxide semiconductor film formed using a metal target was used as the oxide semiconductor film 108_2. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. A band structure using an oxide semiconductor film formed by Figure.

[0485] As shown in FIG. 45A, in the oxide semiconductor films 108_1, 108_2, and 108_3, The energy level at the bottom of the conduction band changes gradually as shown in Figure 45(B). As shown, the energy level of the conduction band minimum in the oxide semiconductor films 108_2 and 108_3 is As shown in FIG. 45C, the oxide semiconductor films 108_1 and 1 In O8_2, the energy level at the bottom of the conduction band changes smoothly. It can be said that the band structure changes continuously or is a continuous junction. For this purpose, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 or the oxide At the interface between the semiconductor film 108_2 and the oxide semiconductor film 108_3, trap centers and recombination Assume that there are no impurities that form defect levels such as coalescence centers.

[0486] In order to form a continuous junction in the oxide semiconductor films 108_1, 108_2, and 108_3, A multi-chamber deposition system (sputtering system) equipped with a load lock chamber was used. It is necessary to laminate each film successively without exposing it to the atmosphere.

[0487] By using the structure shown in FIGS. 45(A), (B), and (C), the oxide semiconductor film 108_2 is formed in a well. In a transistor using the above stacked structure, the channel region becomes an oxide semiconductor (well). It can be seen that it is formed on the conductive film 108_2.

[0488] Note that by providing the oxide semiconductor films 108_1 and 108_3, the oxide semiconductor film 1 Defect states that may be formed in the oxide semiconductor film 108_2 can be kept away from the oxide semiconductor film 108_2. .

[0489] In addition, the defect level is at the bottom of the conduction band of the oxide semiconductor film 108_2 which functions as a channel region. The energy level (Ec) can be farther from the vacuum level, and electrons accumulate in the defect level. When electrons accumulate in the defect level, they become a fixed negative charge. Therefore, the threshold voltage of the transistor is shifted in the positive direction. is closer to the vacuum level than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 108_2. By doing so, electrons are less likely to accumulate in the defect level. This increases the on-state current of the transistor and also increases the field-effect mobility. can be increased.

[0490] The oxide semiconductor films 108_1 and 108_3 are more conductive than the oxide semiconductor film 108_2. The energy level of the bottom of the conduction band is close to the vacuum level. The energy levels of the conduction band minimums of the oxide semiconductor films 108_1 and 108_3 are The difference between the energy levels is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, That is, the electron affinity of the oxide semiconductor films 108_1 and 108_3 is The difference between the electron affinity of the oxide semiconductor film 108_2 and the electron affinity of the oxide semiconductor film 108_2 is 0.15 eV or more, or 0. It is 5 eV or more and 2 eV or less, or 1 eV or less.

[0491] With such a structure, the oxide semiconductor film 108_2 serves as a main current path. That is, the oxide semiconductor film 108_2 functions as a channel region. The films 108_1 and 108_3 function as oxide insulating films. The films 108_1 and 108_3 constitute the oxide semiconductor film 108_2 in which a channel region is formed. It is preferable to use an oxide semiconductor film formed of one or more metal elements. By using such a structure, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, Alternatively, the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3 may be diffused at the interface between them. Therefore, the movement of carriers is not hindered at the interface, and therefore, The field effect mobility of the transistor increases.

[0492] The oxide semiconductor films 108_1 and 108_3 function as part of a channel region. To prevent this, a material with sufficiently low electrical conductivity is used. The conductive films 108_1 and 108_3 are each made of oxide insulating material in view of their physical properties and / or functions. Alternatively, the oxide semiconductor films 108_1 and 108_3 may be formed by using a material having a high electron affinity (vacuum the energy level difference between the conduction band minimum and the conduction band minimum) is smaller than that of the oxide semiconductor film 108_2, The energy level of the conduction band minimum is the same as that of the oxide semiconductor film 108_2. The material with a difference (band offset) is used. In order to suppress the difference in threshold voltage depending on the thickness of the oxide semiconductor film 108, The energy levels of the conduction band minimums of the oxide semiconductor film 108_1 and 108_3 are higher than the conduction band minimum of the oxide semiconductor film 108_2. It is preferable to use a material whose energy level is closer to the vacuum level than the lower energy level. For example, oxide The energy level of the conduction band minimum of the semiconductor film 108_2 and the oxide semiconductor films 108_1 and 108_2 are The difference in energy level between the conduction band minimum of 8_3 and the It is preferable that the above is set.

[0493] The oxide semiconductor films 108_1 and 108_3 each contain a spinel crystal structure. It is preferable that the oxide semiconductor films 108_1 and 108_3 do not contain spinel-type crystals. When the spinel type crystal structure is included, the conductive film 120 The constituent elements of the oxide semiconductor film 108_2 may diffuse into the oxide semiconductor film 108_2. When the oxide semiconductor films 108_1 and 108_3 are CAAC-OS films, which will be described later, This is preferable because it increases the blocking properties of the constituent elements of 120a and 120b, such as copper.

[0494] In this embodiment, the oxide semiconductor films 108_1 and 108_3 are made of a metal The atomic ratio of the elements was In:Ga:Zn=1:3:2. However, the present invention is not limited to this. The compound semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 [atomic ratio] ], In:Ga:Zn=1:1:1.2[atomic ratio], In:Ga:Zn=1:3:4[ Atomic ratio], In:Ga:Zn=1:3:6 [Atomic ratio], In:Ga:Zn=1:4: 5 [atomic ratio], In:Ga:Zn=1:5:6 [atomic ratio], or In:Ga:Zn Oxide semiconductor film formed using a metal oxide target with an atomic ratio of 1:10:1 Alternatively, the oxide semiconductor films 108_1 and 108_3 may be formed using a metal element. Oxide semiconductors formed using a metal oxide target with an atomic ratio of Ga:Zn=10:1 In this case, the oxide semiconductor film 108_2 may have an atomic ratio of metal elements of Oxide semiconductor formed using a metal oxide target with an In:Ga:Zn=1:1:1 ratio The oxide semiconductor films 108_1 and 108_3 are formed by using a Ga:Z When an oxide semiconductor film formed using a metal oxide target of n=10:1 is used, The energy level of the bottom of the conduction band of the oxide semiconductor film 108_2 and the energy level of the oxide semiconductor film 108_1, The difference in energy level between the conduction band minimum of 108_3 and that of 108_3 can be made 0.6 eV or more. This is therefore preferable.

[0495] Note that the oxide semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 When a metal oxide target having an atomic ratio of 108 is used, the oxide semiconductor films 108_1 and 108 _3 is the case where In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦2) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga:Zn=1 When a metal oxide target having an atomic ratio of 1:3:4 is used, the oxide semiconductor film 108_1 , 108_3 is In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga: When a metal oxide target with an atomic ratio of Zn=1:3:6 is used, the oxide semiconductor film 1 08_1 and 108_3 are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β 6≦8).

[0496] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0497] (Embodiment 3) In this embodiment, a transistor that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail.

[0498] In this embodiment, a bottom-gate transistor will be described with reference to FIGS. This will be explained using:

[0499] [Transistor configuration example 1] FIG. 46(A) is a top view of the transistor 300A, and FIG. 46(B) is a top view of the transistor 300A. 46(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 6(A) along the dashed line Y1-Y2 in FIG. In (A), in order to avoid complication, some of the components of the transistor 300A are The insulating film (which functions as a gate insulating film, etc.) is omitted in the illustration. When the -X2 direction is called the channel length direction and the dashed dotted line Y1-Y2 direction is called the channel width direction Note that the top views of the transistors in the following drawings are the same as those in FIG. Similarly, some of the components may be omitted in the drawings.

[0500] The transistor 300A shown in FIG. 46 includes a conductive film 304 on a substrate 302 and a and an insulating film 306 on the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film 307 on the insulating film 307. the oxide semiconductor film 308, the conductive film 312a over the oxide semiconductor film 308, and the oxide semiconductor and a conductive film 312b on the film 308. The insulating films 314 and 316 are formed over the conductive films 312a and 312b and the oxide semiconductor film 308. An insulating film 318 is provided.

[0501] In the transistor 300A, the insulating films 306 and 307 are A, and the insulating films 314, 316, and 318 function as the gate insulating films of the transistor The insulating film functions as a protective insulating film for the transistor 300A. The conductive film 304 functions as a gate electrode, and the conductive film 312a functions as a source electrode. The conductive film 312b functions as a drain electrode.

[0502] In this specification and the like, the insulating films 306 and 307 are referred to as the first insulating film, and the insulating film 314, The insulating film 316 may be referred to as a second insulating film, and the insulating film 318 may be referred to as a third insulating film. .

[0503] The transistor 300A shown in FIG. 46 has a channel-etched transistor structure. The oxide semiconductor film of one embodiment of the present invention can be suitably used for a channel-etch transistor. This can be done.

[0504] [Transistor configuration example 2] FIG. 47(A) is a top view of the transistor 300B, and FIG. 47(B) is a top view of the transistor 300B. 47(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 7(A) along the dashed line Y1-Y2.

[0505] The transistor 300B shown in FIG. 47 includes a conductive film 304 on a substrate 302 and a and an insulating film 306 on the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film 307 on the insulating film 307. the oxide semiconductor film 308, the insulating film 314 over the oxide semiconductor film 308, and the insulating film 314 through the insulating film 316 and the opening 341a provided in the insulating film 314 and the insulating film 316. The conductive film 312a electrically connected to the oxide semiconductor film 308, the insulating film 314, and the insulating film The insulating film 316 is electrically connected to the oxide semiconductor film 308 through an opening 341b. The conductive film 312b is formed on the transistor 300B, more specifically, on the conductive film 31 An insulating film 318 is provided on the layers 2 a and 312 b and the insulating film 316 .

[0506] In the transistor 300B, the insulating films 306 and 307 are B, and the insulating films 314 and 316 function as gate insulating films for the oxide semiconductor film 308 The insulating film 318 functions as a protective insulating film for the transistor 300B. In the transistor 300B, the conductive film 304 functions as a gate The conductive film 312a functions as a source electrode, and the conductive film 3 12b functions as a drain electrode.

[0507] The transistor 300A shown in FIG. 46 has a channel-etched structure. On the other hand, the transistor 300B shown in FIGS. 47(A), (B), and (C) has a channel protection type structure. The oxide semiconductor film of one embodiment of the present invention is also suitable for a channel protective transistor. It can be used.

[0508] [Transistor configuration example 3] FIG. 48(A) is a top view of the transistor 300C, and FIG. 48(B) is a top view of the transistor 300C. 48(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 8(A) along the dashed line Y1-Y2.

[0509] The transistor 300C shown in FIG. 48 is the same as the transistors shown in FIGS. 47(A), (B), and (C). The shape of the insulating films 314 and 316 differs from that of the transistor 300B. The insulating films 314 and 316 are provided in an island shape on the channel region of the oxide semiconductor film 308. The other configurations are the same as those of the transistor 300B.

[0510] [Transistor configuration example 4] FIG. 49(A) is a top view of the transistor 300D, and FIG. 49(B) is a top view of the transistor 300D. 49(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 9(A) along the dashed line Y1-Y2.

[0511] The transistor 300D shown in FIG. 49 includes a conductive film 304 on a substrate 302 and a and an insulating film 306 on the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film 307 on the insulating film 307. the oxide semiconductor film 308, the conductive film 312a over the oxide semiconductor film 308, and the oxide semiconductor The conductive film 312b over the oxide semiconductor film 308, the conductive films 312a and 312b, and the oxide semiconductor film 308 an insulating film 314 on the insulating film 314, an insulating film 316 on the insulating film 314, and an insulating film 318 on the insulating film 316; and conductive films 320a and 320b on the insulating film 318.

[0512] In the transistor 300D, the insulating films 306 and 307 are The insulating films 314, 316, and 318 function as the first gate insulating film of the transistor D. The second gate insulating film of the transistor 300D also functions as a second gate insulating film. In D, the conductive film 304 functions as a first gate electrode, and the conductive film 320a functions as a second gate electrode. The conductive film 320b functions as a pixel electrode used in a display device. The conductive film 312a also functions as a source electrode. The film 312b functions as a drain electrode.

[0513] As shown in FIG. 49(C), the conductive film 320a is formed on the insulating films 306, 307, 314, In the openings 342b and 342c formed in the conductive film 316 and 318, Therefore, the conductive film 320a and the conductive film 304 are applied with the same potential.

[0514] In the transistor 300D, openings 342b and 342c are provided, and the conductive film 3 Although the configuration in which 20a and the conductive film 304 are connected has been exemplified, the present invention is not limited to this. , only one of the openings 342b and 342c is formed, and the conductive film 3 20a and the conductive film 304 are connected, or openings 342b and 342c are provided. In this case, the conductive film 320a and the conductive film 304 may not be connected to each other. In the case where the conductive film 320a and the conductive film 304 are not connected, the conductive film 320a and the conductive film 304 are Each of the electrodes can be given a different potential.

[0515] The conductive film 320b is formed through the openings 342a provided in the insulating films 314, 316, and 318. , and is connected to the conductive film 312b via the conductive film 312c.

[0516] The transistor 300D has the S-channel structure described above.

[0517] [Transistor configuration example 5] In addition, the oxide semiconductor film included in the transistor 300A shown in FIGS. 308 may have a multi-layer structure. An example of this case is shown in FIGS. 50(A) and 50(B) and FIG. Shown in (A) and (B).

[0518] 50(A) and 50(B) are cross-sectional views of the transistor 300E, and FIGS. 51(A) and 51(B) are cross-sectional views of the transistor 300E. 1 and 2 are cross-sectional views of the transistor 300F. The diagram is similar to the transistor 300A shown in FIG.

[0519] The oxide semiconductor film 308 included in the transistor 300E illustrated in FIGS. 50A and 50B is an oxide semiconductor film. an oxide semiconductor film 308_1, an oxide semiconductor film 308_2, and an oxide semiconductor film 308_3 51(A) and 51(B) have an oxide semiconductor. The oxide semiconductor film 308 includes an oxide semiconductor film 308_2 and an oxide semiconductor film 308_3.

[0520] Note that the conductive film 304, the insulating film 306, the insulating film 307, the oxide semiconductor film 308, and the oxide semiconductor film 309 are Conductor film 308_1, oxide semiconductor film 308_2, oxide semiconductor film 308_3, conductive film 31 2a, 312b, insulating films 314, 316, 318, and conductive films 320a, 3 20b are the conductive film 106, the insulating film 116, the insulating film 114, and the oxide film 20c, respectively. oxide semiconductor film 108, oxide semiconductor film 108_1, oxide semiconductor film 108_2, oxide semiconductor the conductive film 108_3, the conductive films 120a and 120b, the insulating film 104, the insulating film 118, and the insulating film 11 6 and the conductive film 112 can be used.

[0521] [Transistor configuration example 6] 52(A) is a top view of the transistor 300G, and FIG. 52(B) is a top view of the transistor 300G. 52(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 5 2(A) along the dashed line Y1-Y2.

[0522] The transistor 300G shown in FIG. 52 includes a conductive film 304 on a substrate 302 and a and an insulating film 306 on the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film 307 on the insulating film 307. the oxide semiconductor film 308, the conductive film 312a over the oxide semiconductor film 308, and the oxide semiconductor The conductive film 312b over the oxide semiconductor film 308, the conductive film 312a, and the conductive film 312b are An insulating film 314 on 12b, an insulating film 316 on the insulating film 314, and a conductive film on the insulating film 316 320a and a conductive film 320b on the insulating film 316.

[0523] The insulating film 306 and the insulating film 307 have an opening 351. On the film 307, a conductive film 312 electrically connected to the conductive film 304 through the opening 351 is formed. The insulating film 314 and the insulating film 316 have an opening that reaches the conductive film 312b. The conductive film 312c has a portion 352a and an opening 352b that reaches the conductive film 312c.

[0524] The oxide semiconductor film 308 is formed by stacking an oxide semiconductor film 308_2 on the conductive film 304 side and an oxide semiconductor film 308_3 on the conductive film 304 side. and an oxide semiconductor film 308_3 on the oxide semiconductor film 308_2.

[0525] An insulating film 318 is provided on the transistor 300G. The insulating film 316 is formed to cover the conductive film 320a and the conductive film 320b.

[0526] In the transistor 300G, the insulating films 306 and 307 are The insulating films 314 and 316 function as the first gate insulating film of the transistor 3G. The insulating film 318 functions as a second gate insulating film of the transistor 300. In the transistor 300G, the conductive film 3 The conductive film 320a functions as a first gate electrode, and the conductive film 320b functions as a second gate electrode. The conductive film 320b functions as a pixel electrode used in a display device. In the transistor 300G, the conductive film 312a functions as a source electrode. The conductive film 312b functions as a drain electrode. In 0G, the conductive film 312c functions as a connection electrode.

[0527] The transistor 300G has the S-channel structure described above.

[0528] In addition, the structures of the transistors 300A to 300G can be freely combined. They may also be used in combination.

[0529] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0530] (Fourth embodiment) In this embodiment, a semiconductor device including a metal oxide film according to one embodiment of the present invention will be described with reference to FIG. 3 to 55.

[0531] <Configuration Example 1 of Semiconductor Device> FIG. 53 shows a transistor 300D shown in the third embodiment and a transistor 300E shown in the second embodiment. 10 is a cross-sectional view in the channel length (L) direction of an example in which a first electrode 100B and a second electrode 100C are laminated together.

[0532] The transistor 300D and the transistor 100B are stacked together to form a transistor This allows the layout area of the register to be reduced.

[0533] For example, by using the configuration of FIG. 53 in the pixel portion of a display device, the pixel density of the display device can be increased. For example, if the pixel density of a display device is 1000 ppi (pixel per inch), or the pixel density of the display device exceeds 2000 ppi. Even in this case, the aperture ratio of the pixel can be increased by using the arrangement shown in FIG. Note that ppi is a unit that represents the number of pixels per inch.

[0534] In addition, by forming the transistor 300D and the transistor 100B into a stacked structure, The configuration will be partially different from that shown.

[0535] For example, in FIG. 53, the transistor 300D has the following different configuration from the configuration shown above: do.

[0536] The transistor 300D shown in FIG. 53 has an insulating film 318 and a conductive film 320a. The insulating film 110a includes a film 319 and an insulating film 110a.

[0537] The insulating film 319 can be made of the material shown in the insulating film 314 or the insulating film 316. The insulating film 319 is provided so that the oxide semiconductor film 108 and the insulating film 318 are not in contact with each other. The insulating film 110a is formed by processing the same insulating film as the insulating film 110. Note that the conductive film 320a of the transistor 330D and the conductive film 320b of the transistor 100 The conductive film 112 included in B is formed by processing the same conductive film.

[0538] 53, the transistor 100B includes a conductive film 312c instead of the conductive film 106. In addition, the transistor 100B shown in FIG. The insulating film 104 has 314, 316, 318, and 319. By using insulating films 314, 316, 318, and 319 that are It can be made easier.

[0539] In addition, in FIG. 53, the conductive film 344 is connected to the conductive film 120b of the transistor 300D. The conductive film 344 is connected to the insulating film 122 through an opening 342 formed in the insulating film 122. , and is electrically connected to the conductive film 120b. Note that the conductive film 344 may be formed of a material that can be used for a pixel electrode of a display device. It functions as a pole.

[0540] In addition, in FIG. 53, the transistor 300D and the transistor 100B are stacked. Although the above description has been given of the case where the structure is used, the present invention is not limited to this. For example, the structure shown in Figs. This may also be configured as follows.

[0541] <Configuration Example 2 of Semiconductor Device> FIG. 54 shows a structure in which the transistor 950 and the transistor 100A shown in the second embodiment are stacked. FIG. 10 is a cross-sectional view in the channel length (L) direction of an example of the structure.

[0542] The transistor 950 shown in FIG. 54 includes a substrate 952, an insulating film 954 on the substrate 952, and A semiconductor film 956 on the insulating film 954, an insulating film 958 on the semiconductor film 956, and an insulating film 958 The insulating film 960 is formed on the insulating film 954, the semiconductor film 956, and the conductive film 960. 2, an insulating film 964 on the insulating film 962, and a conductive film 9 An insulating film 968 is provided over the transistor 950. can be.

[0543] The semiconductor film 956 contains silicon. In particular, the semiconductor film 956 contains crystalline silicon. The transistor 950 is preferably a transistor using so-called low-temperature polysilicon. For example, transistors using low-temperature polysilicon are used in the driving circuit section of a display device. This is preferable because it can provide high field effect mobility. The capacitor 300A is preferably used in the pixel portion of a display device, for example, because it can reduce power consumption. do.

[0544] The substrate 952 may be a glass substrate or a plastic substrate. The insulating film 954 also functions as a base insulating film of the transistor 950. The film 954 may be, for example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. The insulating film 958 is a gate insulating film of the transistor 950. The insulating film 958 functions as a film. The insulating film 958 can be made of any of the materials listed for the insulating film 954. The conductive film 960 functions as a gate electrode of the transistor 950. The conductive film 960 may be formed by the conductive films 312a, 312b, 120a, and 120b shown in the previous embodiment. The insulating films 962, 964, and 968 can be made of the same material as that of the transistor 9. The conductive films 966a and 966b function as a protective insulating film for the transistor 50. The conductive film 966a functions as a source electrode or a drain electrode of the transistor 950. The conductive films 66b are the same as the conductive films 312a, 312b, 120a, 120b, etc. shown in the previous embodiment. The same materials can be used.

[0545] Between the transistor 950 and the transistor 300A, an insulating film 970 and an insulating film An insulating film 972 is provided. The insulating film 970 functions as a barrier film. The insulating film 970 is formed to prevent impurities, such as hydrogen, contained in the transistor 950 from being introduced into the transistor. The insulating film 972 is formed so as not to penetrate into the transistor 300A side. It functions as a 300A base insulating film.

[0546] The insulating film 970 may be made of a material that releases little hydrogen and can suppress the diffusion of hydrogen. Such materials include silicon nitride and aluminum oxide. The insulating film 972 preferably contains, for example, excess oxygen. The materials shown for the veneers 314, 316 can be used.

[0547] In addition, in FIG. 54, the transistor 950 and the transistor 300A do not overlap. However, the present invention is not limited to this structure. For example, the channel region of the transistor 950 and the The channel region of the transistor 300A may be arranged so as to overlap with the channel region of the transistor 300B. FIG. 55 shows a transistor 950 and a transistor 300A in a stacked structure. 55 is a cross-sectional view in the channel length (L) direction of an example of the case where the structure shown in FIG. This allows the layout area of the transistors to be further reduced.

[0548] Although not shown, the transistor 950 and the other transistors described in the second and third embodiments may be used. Transistors (e.g., transistors 100A to 100K, and transistors The transistors 300A to 300G may have a stacked structure.

[0549] In this manner, the metal oxide film of one embodiment of the present invention can be used to stack transistors of various shapes. It can also be suitably used in such a structure.

[0550] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0551] (Embodiment 5) In this embodiment, a display device including the transistor described in the previous embodiment will be described. An example will be described below with reference to FIGS.

[0552] 56 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver 703 is provided on the second substrate 701. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, a sealant 712 disposed to surround the path portion 704 and the gate driver circuit portion 706; and a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 56, a display element is provided between the first substrate 701 and the second substrate 705. It can be done.

[0553] The display device 700 is surrounded by a sealant 712 on the first substrate 701. In a region different from the region, a pixel section 702, a source driver circuit section 704, a gate driver circuit section FPC terminals electrically connected to the wiring portion 706 and the gate driver circuit portion 706, respectively. A sub-unit 708 (FPC: Flexible printed circuit) is provided. In addition, an FPC 716 is connected to the FPC terminal portion 708, and the FPC 716 Various signals are sent to the source driver circuit section 702, the source driver circuit section 704, and the gate driver circuit section 706. Also, a pixel section 702, a source driver circuit section 704, a gate driver circuit section A signal line 710 is connected to each of the path portion 706 and the FPC terminal portion 708. Various signals supplied by 716 are transmitted to the pixel section 702, the source driver 716, and the like via signal lines 710. 704, the gate driver circuit section 706, and the FPC terminal section 708. do.

[0554] Furthermore, the display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit etc. is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is formed on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead of COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0555] The display device 700 also includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit section 706 includes a plurality of transistors.

[0556] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light according to the current) transistors), electron emission elements, liquid crystal elements, electronic ink elements, electrophoretic elements, Low-wetting element, plasma display panel (PDP), MEMS (micro- Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Glass Laser Diode), Digital Micromirror Device (DMD), Digital Microshaft Distributed Membrane Switching (DMS) element, Interferometric Modulation (IMOD) element ), piezoelectric ceramic displays, etc.

[0557] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductive n Electron-emitter Display) etc. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Displays, reflective LCD displays, direct-view LCD displays, projection LCD displays Examples of display devices using electronic ink elements or electrophoretic elements include: There are also semi-transmissive LCD displays and reflective LCD displays. In this case, a part or all of the pixel electrode should function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This can further reduce power consumption.

[0558] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a B pixel, and a W (white) pixel. Like the column, two colors of RGB make up one color element, and two different colors are created by the color element. Alternatively, you can select one or more colors such as yellow, cyan, magenta, etc. for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but also to monochrome display devices. The present invention can also be applied to display devices such as those shown in the accompanying drawings.

[0559] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B), or the like. ), yellow (Y), etc. can be used in combination as appropriate. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. By placing the color layer in the display, the decrease in brightness caused by the color layer can be reduced during bright display, and power consumption can be reduced by 2. However, it may be possible to reduce the emission by approximately 100% to 30%. When using optical elements to display full color, R, G, B, Y, and W are emitted by each color. By using a self-luminous element, it is possible to make the light emitted from a colored layer. In some cases, power consumption can be further reduced.

[0560] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts red, green, and blue by filtering, A method that uses each color of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method of converting to green (color conversion method, quantum dot method) may also be applied.

[0561] In this embodiment, a liquid crystal element and an EL element are used as display elements. 57 to 59. Note that FIGS. 57 and 58 are diagrams showing the chained dotted line shown in FIG. This is a cross-sectional view taken along line QR, and shows a configuration in which a liquid crystal element is used as a display element. 59 is a cross-sectional view taken along the dashed line QR in FIG. 56, and shows a display device using an EL element as a display element. This is the configuration used.

[0562] First, the common parts shown in Figures 57 to 59 will be explained, and then the different parts will be explained. This will be explained below.

[0563] [Explanation of common parts of display devices] The display device 700 shown in FIGS. 57 to 59 includes a wiring portion 711, a pixel portion 702, and a , a source driver circuit section 704, and an FPC terminal section 708. The line portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and The source driver circuit portion 704 includes a transistor 752. Has.

[0564] Transistor 750 and transistor 752 are similar to transistor 100B shown above. The transistors 750 and 752 have the following configurations. Other transistors shown in the embodiment may also be used.

[0565] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. This allows for a longer retention time for electrical signals such as signals, and the write interval can also be extended when the power is on. Therefore, the frequency of refresh operations can be reduced, resulting in reduced power consumption. It has the effect of suppressing force.

[0566] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section can be In other words, the driver transistor can be formed on the same substrate as a separate driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, high quality images can be provided.

[0567] The capacitor 790 includes a conductive film which functions as a first gate electrode of the transistor 750. The lower electrode formed through a process of processing the same conductive film and the Through a process of processing the same conductive film as the conductive film that functions as the source electrode and the drain electrode, and an upper electrode formed on the lower electrode. A step of forming an insulating film identical to the insulating film that functions as the first gate insulating film of 750. and an insulating film that functions as a protective insulating film for the transistor 750. The insulating film is formed through a process of forming a first insulating film. 790 is a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. do.

[0568] 57 to 59, a transistor 750, a transistor 752, and a capacitor A planarization insulating film 770 is provided on the capacitor 790 .

[0569] 57 to 59, the transistor 750 and the The transistor 752 in the source driver circuit portion 704 has the same structure as the transistor 752 in the source driver circuit portion 704. However, the present invention is not limited to this. For example, the pixel section 702 and the source A transistor different from that of the driver circuit section 704 may be used. A top-gate transistor is used for the source driver circuit section 702, and a bottom-gate transistor is used for the source driver circuit section 704. Alternatively, a bottom-gate transistor may be used in the pixel portion 702. and a top-gate transistor is used in the source driver circuit section 704. The source driver circuit section 704 may be referred to as a gate driver circuit section. It may be read differently.

[0570] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the signal line 710. When materials containing ZnO are used, signal delays caused by wiring resistance are minimal, making it possible to display on a large screen. It becomes Noh.

[0571] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0572] The first substrate 701 and the second substrate 705 may be made of, for example, glass. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0573] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled. It should be noted that the structures 778 may be spherical spacers.

[0574] On the second substrate 705 side, there is a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, a light-shielding film 738, and a film that contacts the colored film 736 An insulating film 734 is provided.

[0575] [Configuration example of a display device using a liquid crystal element] The display device 700 shown in FIG. 57 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is formed on the second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. This controls whether light is transmitted or not, allowing images to be displayed.

[0576] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. The pixel electrode functions as one electrode of the display element.

[0577] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a light-transmitting property in visible light can be used. For example, a material containing one of the elements selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum Alternatively, a material containing silver may be used.

[0578] When a conductive film that is reflective to visible light is used as the conductive film 772, the display device 700 The liquid crystal display device is a reflective type. When using the above, the display device 700 becomes a transmissive liquid crystal display device.

[0579] In addition, by changing the structure on the conductive film 772, the driving method of the liquid crystal element can be changed. An example of this case is shown in FIG. 58. The display device 700 shown in FIG. 58 is This is an example of a configuration using a horizontal electric field method (e.g., FFS mode) as the driving method. In the structure shown in FIG. 1, an insulating film 773 is provided over a conductive film 772, and a conductive film 773 is provided over the insulating film 773. In this case, the conductive film 774 is used as a common electrode. The insulating film 773 functions as a conductive film. The orientation state of the liquid crystal layer 776 can be controlled by the field.

[0580] Although not shown in FIGS. 57 and 58, either the conductive film 772 or the conductive film 774 An alignment film is provided on either one or both of the surfaces of the substrate 771 and the liquid crystal layer 776. Although not shown in FIGS. 57 and 58, a polarizing member, a phase difference member, a reflecting member, Optical members (optical substrates) such as a polarizing substrate and a positioning member may be provided as appropriate. Circularly polarized light produced by a retardation substrate may also be used. Either may be used.

[0581] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0582] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational speed and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0583] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr It can be used in dielectric liquid crystal mode. .

[0584] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode Mode, ASV mode, etc. can be used.

[0585] [Display device using light-emitting elements] The display device 700 shown in FIG. 59 includes a light-emitting element 782. The light-emitting element 782 is made of a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0586] Materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dots. materials, alloy-type quantum dot materials, core-shell-type quantum dot materials, core-type quantum dot materials, Also, the elements of the 12th and 16th families, the 13th and 15th families, or the 14th and 16th families Materials containing the element group may also be used. Alternatively, cadmium (Cd), selenium (Se), Zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (P b) Quantum atoms with elements such as gallium (Ga), arsenic (As), and aluminum (Al). Dot material may also be used.

[0587] The organic compounds and inorganic compounds described above can be prepared by, for example, deposition methods (including vacuum deposition methods). The method used is a droplet ejection method (also called an inkjet method), a coating method, a gravure printing method, etc. The EL layer 786 can be formed using a low molecular weight material, a medium molecular weight material (o The polymer may comprise a polymeric material, such as a polymeric polymer (including a polymeric polymer, a dendrimer, or a polymer).

[0588] Here, a method for forming the EL layer 786 by droplet discharge will be described with reference to FIG. 60(A) to 60(D) are cross-sectional views illustrating a method for manufacturing the EL layer 786. be.

[0589] First, a conductive film 772 is formed over a planarization insulating film 770. The insulating film 730 is formed as shown in FIG. 60(A).

[0590] Next, a droplet is discharged from a droplet discharge device 783 to an exposed portion of the conductive film 772, which is an opening in the insulating film 730. Droplets 784 are ejected to form a layer 785 containing the composition. The droplets 784 contain the composition including the solvent. and is attached onto the conductive film 772 (see FIG. 60B).

[0591] The step of discharging the droplets 784 may be performed under reduced pressure.

[0592] Next, the solvent is removed from the layer 785 containing the composition, and the layer is solidified to form an EL layer 786. (See Figure 60(C)).

[0593] The solvent may be removed by a drying step or a heating step.

[0594] Next, a conductive film 788 is formed on the EL layer 786 to form a light emitting element 782 (FIG. 60( See D).

[0595] In this way, when the EL layer 786 is formed by the droplet discharge method, the composition can be selectively discharged. This reduces material waste. Since no additional steps are required, the process can be simplified and costs can be reduced.

[0596] The droplet discharge method described above is a method of discharging a composition using a nozzle having a discharge port, or one or more is a general term for anything that has a means for ejecting droplets, such as a head having multiple nozzles.

[0597] Next, a droplet discharge device used in the droplet discharge method will be described with reference to FIG. 14 is a conceptual diagram illustrating a droplet ejection device 1400. FIG.

[0598] The droplet discharge device 1400 has a droplet discharge means 1403. 3 has a head 1405 and a head 1412.

[0599] The head 1405 and the head 1412 are connected to a control means 1407, which controls the computer. By controlling the image forming apparatus 1410, it is possible to draw a pattern in a pre-programmed manner. can.

[0600] The timing of drawing may be, for example, the timing of the marker 1 formed on the substrate 1402. Alternatively, the reference point may be determined based on the outer edge of the substrate 1402. Here, the marker 1411 is detected by the imaging means 1404, and the image processing means 1 The signal converted into a digital signal by 409 is recognized by a computer 1410 and a control signal is generated. The generated signal is sent to the control means 1407.

[0601] The imaging means 1404 may be a charge coupled device (CCD) or a complementary metal oxide semiconductor (CM An image sensor using an OS can be used. The information of the pattern to be formed is stored in the storage medium 1408. A control signal is sent to the control means 1407, and the individual heads 140 of the droplet discharging means 1403 are controlled. 5, the head 1412 can be controlled individually. The material to be discharged is supplied from the material supply source 141 3. A material is supplied from a material supply source 1414 to heads 1405 and 1412 through piping. will be provided.

[0602] The inside of the head 1405 is a space for filling the liquid material as shown by the dotted line 1406, and a space for discharging the material. Although not shown, head 1412 is also a head 1. The head 1405 and the head 1412 have the same internal structure. By providing a head with a different size, different materials can be printed at different widths simultaneously. It is possible to discharge and draw multiple types of luminescent materials, etc., and when drawing over a wide area, In order to improve throughput, the same material is ejected from multiple nozzles simultaneously to create a pattern. When a large substrate is used, the head 1405 and the head 1412 move over the substrate as shown in FIG. 1) Scan freely in the directions of the X, Y, and Z arrows shown in the figure to freely set the area to be drawn. This allows the same pattern to be drawn multiple times on a single substrate.

[0603] The step of discharging the composition may be carried out under reduced pressure. After the composition is discharged, one or both of the steps of drying and baking are carried out. Both processes involve heat treatment, but the purpose, temperature and time are different. The drying and firing processes are carried out under normal or reduced pressure by laser light irradiation, instantaneous thermal annealing, or heating. The timing and number of times of this heat treatment are not particularly limited. In order to perform the drying and baking processes well, the temperature at that time should be adjusted depending on the material and composition of the substrate. It depends on the nature of the composition.

[0604] As described above, the EL layer 786 can be manufactured using a droplet discharge apparatus.

[0605] Returning to the description of the display device 700 shown in FIG.

[0606] 59, an insulating film is formed on the planarization insulating film 770 and the conductive film 772. An insulating film 730 is provided. The insulating film 730 covers part of the conductive film 772. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to, for example, a bottom emission structure in which light is emitted to both the conductive film 772 and the conductive film 788; It can also be applied to al-emission structures.

[0607] A colored film 736 is provided at a position overlapping the light-emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided in the position where the light-shielding film 738 is to be drawn, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is exemplified. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0608] [Configuration example of providing an input / output device to a display device] Furthermore, the display device 700 shown in Figures 58 and 59 may be provided with an input / output device. An example of the force device is a touch panel.

[0609] 58. The display device 700 shown in FIG. 58 is provided with a touch panel 791 as shown in FIG. 62. FIG. 63 shows a configuration in which a touch panel 791 is provided on a display device 700.

[0610] FIG. 62 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 63 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. be.

[0611] First, the touch panel 791 shown in FIGS. 62 and 63 will be described below.

[0612] The touch panel 791 shown in FIGS. 62 and 63 is provided between the substrate 705 and the colored film 736. The touch panel 791 is a so-called in-cell type touch panel. 736 and may be formed on the substrate 705 side before the colored film 736 is formed.

[0613] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. When a detection object such as a stylus approaches, the mutual capacitance between electrode 793 and electrode 794 changes. It is possible to detect the change.

[0614] 62 and 63, an electrode 793 and The electrode 796 is formed through an opening in the insulating film 795. 62. The electrode 794 is electrically connected to the two electrodes 793 that sandwich the electrode 794 via the electrodes 793. 63 illustrates a configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702. However, the present invention is not limited to this, and may be formed in the source driver circuit section 704, for example.

[0615] The electrodes 793 and 794 are provided in a region overlapping with the light-shielding film 738. As shown in FIG. 1, the electrode 793 is preferably provided so as not to overlap with the light-emitting element 782. As shown in FIG. 63, the electrode 793 is provided so as not to overlap with the liquid crystal element 775. In other words, the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. In other words, the electrode 793 has a mesh shape. By configuring the electrode 793 in this manner, the electrode 793 does not block the light emitted from the light emitting element 782. Alternatively, the electrode 793 may have a structure that does not block light that passes through the liquid crystal element 775. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Since the number of pixels is small, a display device with high visibility and reduced power consumption can be realized. The pole 794 may have a similar configuration.

[0616] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 782, The electrode 794 can be made of a metal material with low transmittance for visible light. Since the electrodes 793 and 794 do not overlap with the liquid crystal element 775, For example, a metal material having low transmittance of visible light can be used.

[0617] Therefore, compared with electrodes using oxide materials with high visible light transmittance, The resistance of the electrode 794 can be reduced, improving the sensor sensitivity of the touch panel. It is possible.

[0618] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size of the nanoparticles may be 5 nm or less, more preferably 5 nm or more and 25 nm or less. The wires may be metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, the electrodes 664, 665 may be made of wires or carbon nanotubes. When Ag nanowires are used for either 65 or 667, or both, the The light transmittance is 89% or more, and the sheet resistance is 40Ω / □ or more and 100Ω / □ or less. can.

[0619] 62 and 63 show examples of the configuration of an in-cell type touch panel. For example, a so-called on-cell type transistor formed on the display device 700 may be used. a touch panel or a so-called out-cell type touch panel that is attached to the display device 700 It may also be possible to use the following.

[0620] In this way, the display device of one embodiment of the present invention can be used in combination with various types of touch panels. It can be used.

[0621] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0622] (Sixth embodiment) In this embodiment, an example of a semiconductor device according to one embodiment of the present invention will be described. The transistor is suitable for miniaturization.

[0623] FIG. 64 shows an example of a transistor 200. FIG. 64(A) shows the transistor 200. The top view is shown. Note that some of the membranes are omitted in Figure 64(A) for clarity. FIG. 64(B) is a cross-sectional view corresponding to the dashed line X1-X2 shown in FIG. 64(A). FIG. 64(C) is a cross-sectional view corresponding to Y1-Y2.

[0624] The transistor 200 includes a conductor 205 (conductor 205a, and conductor 205b), and conductor 260 (conductor 260a and conductor 260b) , an insulator 220 serving as a gate insulating layer, an insulator 222, an insulator 224, and an insulator The oxide semiconductor 230 (oxide semiconductor 23) has a region where a channel is formed. 0a, oxide semiconductor 230b, and oxide semiconductor 230c), and a source or drain a conductor 240a serving as one of the two, and a conductor 240b serving as the other of the two. The dielectric 240b includes an insulator 280 having excess oxygen.

[0625] The oxide semiconductor 230 includes an oxide semiconductor 230a and an oxide film on the oxide semiconductor 230a. The semiconductor layer 230 includes an oxide semiconductor 230b and an oxide semiconductor 230c on the oxide semiconductor 230b. When the transistor 200 is turned on, a current flows mainly through the oxide semiconductor 230b. On the other hand, the oxide semiconductor 230a and the oxide semiconductor 230c In other words, current does not flow near the interface with the oxide semiconductor 230b (which may be a mixed region). Some regions may act as insulators, while others may act as insulators.

[0626] In the structure shown in FIG. 64, the conductor 260 functioning as the gate electrode is formed by the conductors 260a and 260b. The layer structure has a conductor 260b and a conductor 260c. 60 has an insulator 270 thereon.

[0627] The conductor 205 may be made of molybdenum, titanium, tantalum, tungsten, aluminum, copper, A metal film containing an element selected from chromium, neodymium, and scandium, or Metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) Or, indium tin oxide, indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide containing tin oxide, indium oxide containing titanium oxide, titanium oxide Indium tin oxide, indium zinc oxide, indium tin oxide doped with silicon oxide Conductive materials such as oxides can also be applied.

[0628] For example, the conductor 205a may be a nitride conductor having a barrier property against hydrogen. It is preferable to use tantalum or the like, and to stack tungsten, which has high conductivity, as the conductor 205b. By using this combination, it is possible to obtain an oxide semiconductor 23 while maintaining the conductivity of the wiring. 64, the conductor 205a and Although the two-layer structure of the conductor 205b is shown, the present invention is not limited to this configuration, and the conductor 205b may be a single layer or a laminate of three or more layers. The structure may also be

[0629] The insulators 220 and 224 are made of a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator contains oxygen. In particular, the insulator 224 contains excess oxygen (chemical It is preferable to use an insulator containing oxygen in excess of the stoichiometric composition. By providing an insulator containing oxygen in contact with the oxide that constitutes the transistor 200, The insulators 220 and 224 can compensate for the oxygen vacancies in the oxide. They do not necessarily have to be made of the same material.

[0630] The insulator 222 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations Alternatively, for example, aluminum oxide, bismuth oxide, or gel oxide may be added to these insulators. Titanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be laminated on the above insulator. good.

[0631] The insulator 222 may have a laminated structure of two or more layers. The laminated structure is not limited to the laminated structure made of the above materials, but may be a laminated structure made of different materials.

[0632] Between the insulator 220 and the insulator 224, there is an insulator 222 including a high-k material. This allows the insulator 222 to capture electrons under certain conditions, increasing the threshold voltage. That is, the insulator 222 may become negatively charged.

[0633] For example, silicon oxide is used for the insulators 220 and 224, and silicon dioxide is used for the insulator 222. , materials with many electron trapping levels such as hafnium oxide, aluminum oxide, and tantalum oxide When used in a semiconductor device, temperatures higher than the operating temperature or storage temperature (e.g., 125 The electric current of the conductor 205 is applied under a temperature of from 150°C to 450°C, typically from 150°C to 300°C. The potential of the source electrode and drain electrode is kept higher than that of the source electrode for 10 milliseconds or more, typically 1 minute. By maintaining the above, the oxide constituting the transistor 200 is At this time, some of the moving electrons are captured by the electron capture level of the insulator 222. will be done.

[0634] The transistor in which the necessary number of electrons are captured in the electron capture level of the insulator 222 reaches the threshold The voltage shifts to the positive side. The amount can be controlled, and the threshold voltage can be controlled accordingly. By having this, the transistor 200 is in a non-conducting state (off) even when the gate voltage is 0V. The transistor is a normally-off transistor, which is a transistor in a non-conductive state.

[0635] The electron capture process may be performed during the manufacturing process of a transistor. After forming a conductor that connects to the source or drain conductor of the transistor, or After the pre-process (wafer processing) or after the wafer dicing process, This should be done at some stage before shipping from the factory, such as after the product has been shipped.

[0636] In addition, by appropriately adjusting the film thickness of the insulators 220, 222, and 224, the threshold It is possible to control the voltage to a low value. Furthermore, it is possible to provide a transistor having stable electrical characteristics. Alternatively, a transistor with a large on-state current can be provided. It is possible to provide a transistor with a small threshold swing value. This makes it possible to provide a highly reliable transistor.

[0637] The oxide semiconductor 230a, the oxide semiconductor 230b, and the oxide semiconductor 230c are In It is formed of metal oxides such as M-Zn oxide (M is Al, Ga, Y, or Sn). The oxide semiconductor 230 may also be an In—Ga oxide or an In—Zn oxide.

[0638] The insulator 250 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations Alternatively, these insulators can be coated with, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. stomach.

[0639] In addition, as the insulator 250, similar to the insulator 224, a material having a stoichiometric composition of oxygen is used. It is preferable to use an oxide insulator containing as much oxygen as possible. By providing the insulating layer in contact with the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 can be reduced. can be reduced.

[0640] The insulator 250 may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxide. Gallium oxide nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, yttrium oxynitride Using insulating films such as hafnium and silicon nitride that have barrier properties against oxygen and hydrogen When such a material is used, oxygen release from the oxide semiconductor 230 can be prevented. It functions as a layer that prevents leakage and the intrusion of impurities such as hydrogen from the outside.

[0641] The insulator 250 has the same product as the insulators 220, 222, and 224. The insulator 250 may have a layer structure. By having an insulator, the threshold voltage of the transistor 200 is shifted to the positive side. With this configuration, the transistor 200 can be Even if the transistor is turned on, it becomes a normally-off transistor, which is in a non-conducting state (also referred to as an off state).

[0642] In the semiconductor device shown in FIG. 64, the following is provided between the oxide semiconductor 230 and the conductor 260: A barrier film may be provided in addition to the insulator 250. Alternatively, a barrier film may be provided on the oxide semiconductor 230c. It is also possible to use materials with this property.

[0643] For example, an insulating film containing excess oxygen is provided in contact with the oxide semiconductor 230, and a barrier film is further provided. By wrapping the oxide, the oxide is brought into a state where the composition is almost the same as the stoichiometric ratio, or The oxide semiconductor 230 can be made into a supersaturated state with a higher oxygen content than the composition. This can prevent the intrusion of impurities such as silicon dioxide.

[0644] One of the conductors 240a and 240b functions as a source electrode and the other functions as a It functions as a drain electrode.

[0645] The conductor 240a and the conductor 240b are made of aluminum, titanium, chromium, nickel, Copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, etc. The metal or alloy containing this metal as the main component can be used. However, a laminated structure of two or more layers may also be used.

[0646] For example, a titanium film and an aluminum film may be stacked. Two-layer structure with aluminum film laminated on top of copper-magnesium-aluminum alloy film a two-layer structure with a copper film laminated on a titanium film; a two-layer structure with a copper film laminated on a tungsten film; It may have a two-layer structure.

[0647] Also, a titanium film or titanium nitride film and an aluminum film overlaid on the titanium film or titanium nitride film are used. An aluminum film or a copper film is laminated, and a titanium film or a titanium nitride film is further formed thereon. A three-layer structure consisting of a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum or copper film is layered on top of the molybdenum film, and then a molybdenum or There are three-layer structures in which indium oxide, tin oxide or molybdenum nitride are formed. Alternatively, a transparent conductive material containing zinc oxide may be used.

[0648] The conductor 260 having the function of a gate electrode is made of, for example, aluminum, chromium, A metal selected from copper, tantalum, titanium, molybdenum, and tungsten, or the above-mentioned gold The alloy may be formed using an alloy containing the above metals or an alloy combining the above metals. In addition, the present invention uses a metal selected from one or more of manganese and zirconium. Also, semiconductors such as polycrystalline silicon doped with impurity elements such as phosphorus may be used. Alternatively, a silicide such as nickel silicide may be used.

[0649] For example, a two-layer structure in which a titanium film is laminated on an aluminum film is preferable. Two-layer structure with titanium film stacked on titanium film, two-layer structure with tungsten film stacked on titanium nitride film Two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film It may also be constructed as such.

[0650] In addition, a titanium film is laminated on the titanium film, and an aluminum film is laminated on the titanium film. There are also three-layer structures that form a film. A composite of one or more metals selected from the group consisting of silicon, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film may be used.

[0651] The conductor 260 may be made of indium tin oxide, indium oxide containing tungsten oxide, or the like. Indium zinc oxide containing tungsten oxide, Indium oxide containing titanium oxide Indium tin oxide, indium zinc oxide, and silicon oxide are added to titanium oxide. A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal may also be used.

[0652] The conductor 260a is formed by using a thermal CVD method, an MOCVD method, or an ALD method. , using the atomic layer deposition (ALD) method. By forming it by the ALD method or the like, it is possible to prevent the insulating layer 250 from being damaged. It can reduce damage caused by Zuma. It can also improve coverage. This is preferable. Therefore, a highly reliable transistor 200 can be provided.

[0653] The conductor 260b is made of conductive material such as tantalum, tungsten, copper, or aluminum. It is made using high quality materials.

[0654] Further, an insulator 270 is provided so as to cover the conductor 260. Oxygen is released from the insulator 280. When an oxide material is used, the conductor 260 is prevented from being oxidized by the desorbed oxygen. To achieve this, the insulator 270 is made of a material that has a barrier property against oxygen.

[0655] For example, the insulator 270 can be a metal oxide such as aluminum oxide. The insulator 270 may be provided to the extent that it prevents oxidation of the conductor 260. For example, the film thickness of the insulator 270 is 1 nm or more and 10 nm or less, preferably 3 nm or more and 7 nm or less. Set as below.

[0656] Therefore, oxidation of the conductor 260 is suppressed, and the oxygen desorbed from the insulator 280 is efficiently oxidized. The semiconductor layer 230 can be supplied with the silicon dioxide.

[0657] An insulator 280 is provided above the transistor 200. The insulator 280 has a stoichiometric It is preferable to use an oxide containing more oxygen than the oxygen that satisfies the dielectric constant. The insulating layer 280 has a region where oxygen is present in excess of the stoichiometric composition (hereinafter referred to as the excess oxygen region). In particular, the transistor 200 preferably has an oxide semiconductor When using the above, an insulator having an oxygen excess region is formed in an interlayer film or the like near the transistor 200. By providing the insulating layer, oxygen vacancies in the transistor 200 can be reduced, thereby improving reliability. This can be done.

[0658] As an insulator having an excess oxygen region, specifically, an oxide in which a part of oxygen is released by heating is used. It is preferable to use oxide materials. Oxides that release oxygen when heated are those that are The amount of oxygen released in terms of oxygen atoms is 1.0 × 10 18 atoms / cm 3 That's all good Preferably 3.0 x 10 20 atoms / cm 3 The oxide film is the above T The surface temperature of the film during DS analysis is 100°C or higher and 700°C or lower, or 100°C or lower. The temperature is preferably in the range of 500°C or higher.

[0659] For example, such a material may include silicon oxide or silicon oxynitride. Alternatively, a metal oxide can also be used. Silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen. Silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0660] The insulator 280 covering the transistor 200 is a flat surface that covers the uneven surface underneath. It may also function as a protective film.

[0661] [Application example] An example in which transistors having different compositions are stacked will be described below.

[0662] The semiconductor device shown in FIG. 65 includes a transistor 400, a transistor 200, and a capacitor. It has element 410.

[0663] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. Since the off-state current of the transistor 200 is small, it is used as a semiconductor device (memory By using it in a device, it is possible to retain the memory contents for a long period of time. Semiconductors that do not require refresh operations or require refresh operations very infrequently Since it is possible to use it as a semiconductor device (memory device), power consumption can be reduced sufficiently. Cut.

[0664] As shown in FIG. 65, the semiconductor device includes a transistor 400, a transistor 200, a capacitor element, and a The transistor 200 is provided above the transistor 400, and the capacitor element The transistor 410 is disposed above the transistor 400 and the transistor 200 .

[0665] The transistor 400 is provided on a substrate 401, and includes a conductor 406, an insulator 404, and a substrate A semiconductor region 402 consisting of a part of 401 and functioning as a source region or a drain region. The resistive layer 408 has a low resistance region 408a that functions as a resistive layer, and a low resistance region 408b.

[0666] Transistor 400 can be either p-channel or n-channel.

[0667] The region where the channel of the semiconductor region 402 is formed, the region in the vicinity thereof, the source region, or In the low resistance region 408a which becomes the drain region and the low resistance region 408b, silicon It preferably contains a semiconductor such as a silicon-based semiconductor, and it preferably contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium It may be made of materials containing gallium aluminum arsenide (GaAlAs) or GaAlAs (Gallium Aluminum Arsenide). Silicon with effective mass controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, GaAs and GaAlAs may be used to form a transistor. The Star 400 is a HEMT (High Electron Mobility Transistor) stor) can also be used.

[0668] The low resistance region 408a and the low resistance region 408b are formed by the semiconductor layer applied to the semiconductor region 402. In addition to the conductive material, elements that impart n-type conductivity, such as arsenic and phosphorus, or p-type conductivity, such as boron, are added. It contains elements that impart electrical conductivity to the material.

[0669] The conductor 406, which functions as a gate electrode, is made of arsenic, phosphorus, or the like, which provides n-type conductivity. Semiconductor materials such as silicon that contain elements or elements that give them p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0670] The threshold voltage can be adjusted by determining the work function depending on the conductor material. Specifically, it is preferable to use materials such as titanium nitride and tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, tungsten or aluminum is used as the conductor. It is preferable to use metal materials such as tungsten as lamination materials, and tungsten is particularly suitable for this purpose. This is preferable in terms of thermal stability.

[0671] The transistor 400 shown in FIG. 65 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method.

[0672] Over the transistor 400 are an insulator 420, an insulator 422, an insulator 424, and an insulator 426. The edge members 426 are stacked in order.

[0673] The insulators 420, 422, 424, and 426 may be, for example, an acid. silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like may be used.

[0674] The insulator 422 serves to eliminate a step caused by the transistor 400 and the like provided below. The top surface of the insulator 422 is chemically treated to enhance the planarization. Mechanical polishing (CMP) method The surface may be planarized by a planarization process using a metal or the like.

[0675] The insulator 424 may include, for example, a substrate 401 or a transistor 400, which may be connected to the transistor. A film having a barrier property to prevent hydrogen and impurities from diffusing into the region where the resistor 200 is provided. It is preferable to use

[0676] For example, silicon nitride formed by CVD is an example of a film that has a barrier property against hydrogen. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. The diffusion of hydrogen into the semiconductor element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 400. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0677] The amount of desorbed hydrogen can be measured, for example, by thermal desorption spectroscopy (TDS). For example, analysis can be performed using techniques such as Optometry. The amount of hydrogen desorption from the insulator 424 was measured in the range of 50°C to 500°C by TDS analysis. The amount of hydrogen atoms released per area of the insulator 424 is 10 × 10 15 atoms / cm 2 Less than or equal to 5 x 10 15 atoms / cm 2 If it is below good.

[0678] It is preferable that the insulator 426 has a lower dielectric constant than the insulator 424. For example, The dielectric constant of the insulator 426 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulator 424 is preferably 0.7 times or less than the relative dielectric constant of the insulator 426, and more preferably 0.6 times or less. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. can be reduced.

[0679] The insulators 420, 422, 424, and 426 are provided with capacitance elements. 410, or a conductor 428 electrically connected to the transistor 200, and a conductor 43 0 and the like are embedded. The conductor 428 and the conductor 430 are plugs or wiring. It has a function as a line. As will be described later, a conductor that has a function as a plug or wiring In some cases, multiple structures may be collectively assigned the same symbol. The wiring and the plug electrically connected to the wiring may be integrated. A part of the conductor may function as a wiring, and a part of the conductor may function as a plug. do.

[0680] The materials of the plugs and wiring (the conductors 428 and 430, etc.) are metal. Conductive materials such as metals, alloy materials, metal nitride materials, or metal oxide materials are applied as single layers or Materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use any high melting point material, and it is preferable to use tungsten. It is preferable to form the conductive layer from a low-resistance conductive material such as aluminum or copper. By using this material, the wiring resistance can be reduced.

[0681] The conductors 428 and 430 are made of conductors having a barrier property against hydrogen. In particular, the opening in the insulator 424 having a barrier property against hydrogen is preferably A conductor having a barrier property against hydrogen is formed on the surface of the transistor. 400 and transistor 200 can be separated by a barrier layer, and transistor 4 Diffusion of hydrogen from the 00 to the transistor 200 can be suppressed.

[0682] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 400 can be suppressed while maintaining the overall conductivity. In this case, the tantalum nitride layer having a barrier property against hydrogen is It is preferable that the insulating layer 424 is in contact with the insulating layer 424 having the above structure.

[0683] A wiring layer may be provided over the insulator 426 and the conductor 430. For example, as shown in FIG. 5, an insulator 450, an insulator 452, and an insulator 454 are stacked in this order. In addition, a conductor 456 is formed in the insulator 450, the insulator 452, and the insulator 454. The conductor 456 functions as a plug or a wiring. 6 can be formed using the same material as the conductor 428 and the conductor 430.

[0684] The conductor 456 is preferably made of a low-resistance conductive material such as aluminum or copper. It is preferable to use a low-resistance conductive material to reduce the wiring resistance. When copper is used for the body 456, it is preferable to laminate it with a conductor that suppresses copper diffusion. Conductors that suppress copper diffusion include tantalum, tantalum nitride, and other tantalum-containing materials. It is preferable to use alloys, ruthenium, and alloys containing ruthenium.

[0685] Also, for example, the insulator 450 may be used to suppress copper diffusion or to provide resistance to oxygen and hydrogen. For example, it is preferable to use an insulator having a barrier property that suppresses copper diffusion. As an example, silicon nitride can be used. Therefore, the same material as the insulator 424 can be used. It can be used.

[0686] In particular, the insulator 450 is in contact with the opening of the insulator 450, which suppresses copper diffusion. It is preferable to provide a conductive material and laminate copper on the conductive material that suppresses copper diffusion. This structure can prevent copper from diffusing into the periphery of the wiring.

[0687] On the insulator 454, an insulator 458, an insulator 210, an insulator 212, and an insulator 21 4 are stacked in this order. The insulating layer 214 or any of the insulating layers 212 may be formed to suppress copper diffusion or to resist oxygen and hydrogen. It is preferable to use a material that has a barrier property.

[0688] The insulator 458 and the insulator 212 may be, for example, a substrate 401 or a transistor 4 00 to the region where the transistor 200 is to be provided. Alternatively, it is preferable to use a film that has a barrier property that prevents diffusion of hydrogen and impurities. Therefore, the same material as the insulator 424 can be used.

[0689] The insulator 210 can be made of the same material as the insulator 420. For example, The edge 210 may be made of a silicon oxide film, a silicon oxynitride film, or the like.

[0690] For example, the insulator 214 may be made of aluminum oxide, hafnium oxide, or tantalum oxide. It is preferable to use a metal oxide such as

[0691] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 200. This can suppress the release of oxygen from the oxide that makes up the transistor. It is suitable for use as a protective film for the capacitor 200.

[0692] An insulator 216 is provided on the insulator 214. The insulator 216 has the same structure as the insulator 420. For example, the insulator 216 may be a silicon oxide film or a silicon oxynitride film. A silicon film or the like can be used.

[0693] Also, the insulator 458, the insulator 210, the insulator 212, the insulator 214, and the insulator 216 The conductive material 218 and the conductive material 205 constituting the transistor 200 are embedded in the insulating film 214. Note that the conductor 218 is electrically connected to the capacitor 410 or the transistor 400. The conductor 218 functions as a plug or wiring for connecting the conductor 428 and the The conductive material 430 can be used to form the conductive layer 430 .

[0694] In particular, the conductor 218 in the area in contact with the insulator 458, the insulator 212, and the insulator 214 is a conductive material that inhibits copper diffusion or has barrier properties against oxygen, hydrogen, and water. With this configuration, the transistor 400 and the transistor 200 is a layer that suppresses copper diffusion or has barrier properties against oxygen, hydrogen, and water. In other words, the diffusion of copper from the conductor 456 is suppressed, and the The diffusion of hydrogen from the transistor 400 to the transistor 200 can be suppressed.

[0695] Above the insulator 214, the transistor 200 and the insulator 280 are provided. The transistor 200 shown in FIG. 65 is an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the structure and driving method.

[0696] On the insulator 280, an insulator 282, an insulator 284, and an insulator 470 are stacked in this order. Also, the insulators 220, 222, 224, and 280 are provided. The conductor 244 and the like are embedded in the insulator 282, the insulator 284, and the insulator 470. In addition, the conductors 240a and 240b of the transistor 200 On the body, a conductor 245 and the like are provided to connect to the conductors in the upper layer. The capacitor 410, the transistor 200, or the transistor 400 The conductor 244 functions as a lug or a wire. It can be provided using the same material as 30.

[0697] In addition, either or both of the insulator 282 and the insulator 284 may have a resistance to oxygen and hydrogen. Therefore, it is preferable to use a material having a barrier property as the insulator 282. The insulator 284 can be made of the same material as the insulator 212. The following materials can be used.

[0698] For example, the insulator 282 may be made of aluminum oxide, hafnium oxide, tantalum oxide, or the like. It is preferable to use a metal oxide.

[0699] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 200. This can suppress the release of oxygen from the oxide that makes up the transistor. It is suitable for use as a protective film for the capacitor 200.

[0700] The insulator 284 has a region from the region where the capacitor 410 is provided to the region where the transistor 200 is provided. It is preferable to use a film having a barrier property that prevents hydrogen and impurities from diffusing into the region. Therefore, the same material as the insulator 424 can be used.

[0701] For example, silicon nitride formed by CVD is an example of a film that has a barrier property against hydrogen. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. The diffusion of hydrogen into the semiconductor element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 400. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0702] Therefore, the transistor 200 and the insulator 280 containing the excess oxygen region are 0, the stacked structure of the insulator 212 and the insulator 214, and the insulator 282 and the insulator 284 The insulating layer 210, the insulating layer 212, and the insulating layer 213 may be sandwiched between the insulating layer 210, the insulating layer 212, and the insulating layer 213. The insulator 214, the insulator 282, and the insulator 284 are resistant to oxygen or hydrogen, water, and other gases. It has barrier properties that suppress the diffusion of impurities.

[0703] The oxygen released from the insulator 280 and the transistor 200 is transferred to the capacitor element 410 or Alternatively, it is possible to suppress diffusion into the layer in which the transistor 400 is formed. Alternatively, hydrogen and oxygen may be introduced from the layers above the insulator 282 and the layers below the insulator 214. This can prevent impurities such as oxygen and water from diffusing into the transistor 200.

[0704] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. The oxide that forms the channel in the transistor 200 has oxygen vacancies due to impurities. Therefore, the channel in the transistor 200 is prevented from being formed. The oxide thus formed can be an oxide semiconductor having a low density of defect states and stable characteristics. That is, the fluctuation of the electrical characteristics of the transistor 200 can be suppressed and the reliability can be improved. It can be done.

[0705] Above the insulator 470, the capacitor 410 and the conductor 474 are provided. The capacitor 410 is disposed on an insulator 470, and is connected to a conductor 462, an insulator 480, and an insulator 490. 82, an insulator 484, and a conductor 466. Note that the conductor 474 is a capacitive element. a plug electrically connecting to the transistor 410, the transistor 200, or the transistor 400; Or it functions as wiring.

[0706] The conductor 462 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High-melting-point materials such as tungsten and molybdenum, which are both heat-resistant and conductive, are used. It is preferable to use tungsten, and it is particularly preferable to use tungsten. When forming the insulating film simultaneously with other structures, low-resistance metal materials such as copper and aluminum can be used. That's fine.

[0707] Note that the conductor 474 is formed using a material similar to that of the conductor 462 which functions as an electrode of the...

Claims

1. A display device including a first transistor and a second transistor over a substrate, a first insulating layer, a second insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer; the first insulating layer has a region disposed above a channel formation region of the first transistor; a channel formation region of the second transistor has a region disposed above the first insulating layer; the second insulating layer has a region disposed above a gate electrode of the second transistor; the first conductive layer has a region disposed below the first insulating layer; the second conductive layer has a region disposed above the second insulating layer; the third conductive layer has a region disposed above the second insulating layer; the first conductive layer is electrically connected to a source or a drain of the first transistor; the second conductive layer is electrically connected to one of the source and the drain of the second transistor; the third conductive layer is electrically connected to the other of the source and the drain of the second transistor; the oxide semiconductor layer including the channel formation region of the second transistor includes a first region, a second region, and a third region; the second region is disposed between the first region and the third region in a cross section taken along a channel length direction of the second transistor; the second region has a channel formation region of the second transistor, the first region has a region in contact with the second conductive layer, the third region has a region in contact with the third conductive layer, In the cross-sectional view, a height of an upper surface of the first region from an upper surface of the substrate is greater than a height of an upper surface of the third region from an upper surface of the substrate; In the cross-sectional view, the first region overlaps with the first conductive layer.

2. A display device including a first transistor and a second transistor over a substrate, a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer; the first insulating layer has a region disposed above a channel formation region of the first transistor; a channel formation region of the second transistor has a region disposed above the first insulating layer; the second insulating layer has a region disposed above a gate electrode of the second transistor; the first conductive layer has a region disposed below the first insulating layer; the second conductive layer has a region disposed above the second insulating layer; the third conductive layer has a region disposed above the second insulating layer; the third insulating layer has a region disposed above the second conductive layer and a region disposed above the third conductive layer; the fourth conductive layer has a region disposed above the third insulating layer; the first conductive layer is electrically connected to a source or a drain of the first transistor; the second conductive layer is electrically connected to one of the source and the drain of the second transistor; the third conductive layer is electrically connected to the other of the source and the drain of the second transistor; the top surface of the third insulating layer is flat; the fourth conductive layer has a region that functions as a pixel electrode, the oxide semiconductor layer including the channel formation region of the second transistor includes a first region, a second region, and a third region; the second region is disposed between the first region and the third region in a cross section taken along a channel length direction of the second transistor; the second region has a channel formation region of the second transistor, the first region has a region in contact with the second conductive layer, the third region has a region in contact with the third conductive layer, In the cross-sectional view, a height of an upper surface of the first region from an upper surface of the substrate is greater than a height of an upper surface of the third region from an upper surface of the substrate; In the cross-sectional view, the first region overlaps with the first conductive layer.

3. A display device including a first transistor and a second transistor over a substrate, a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer; the first insulating layer has a region disposed above a channel formation region of the first transistor; a channel formation region of the second transistor has a region disposed above the first insulating layer; the second insulating layer has a region disposed above a gate electrode of the second transistor; the first conductive layer has a region disposed below the first insulating layer; the second conductive layer has a region disposed above the second insulating layer; the third conductive layer has a region disposed above the second insulating layer; the third insulating layer has a region disposed above the second conductive layer and a region disposed above the third conductive layer; the fourth conductive layer has a region disposed above the third insulating layer; the first conductive layer is electrically connected to a source or a drain of the first transistor; the second conductive layer is electrically connected to one of the source and the drain of the second transistor; the third conductive layer is electrically connected to the other of the source and the drain of the second transistor; the third insulating layer comprises an organic material; the fourth conductive layer has a region that functions as a pixel electrode, the oxide semiconductor layer including the channel formation region of the second transistor includes a first region, a second region, and a third region; the second region is disposed between the first region and the third region in a cross section taken along a channel length direction of the second transistor; the second region has a channel formation region of the second transistor, the first region has a region in contact with the second conductive layer, the third region has a region in contact with the third conductive layer, In the cross-sectional view, a height of an upper surface of the first region from an upper surface of the substrate is greater than a height of an upper surface of the third region from an upper surface of the substrate; In the cross-sectional view, the first region overlaps with the first conductive layer.

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