Semiconductor device, electrical device, and method of manufacturing semiconductor device

Abstract

To provide a semiconductor device, an electrical device, and a method of manufacturing the semiconductor device that can prevent poor heat dissipation by suppressing the generation of resin burrs on the surface exposed from a resin sealing body of a substrate without using fixing pins and without deteriorating adhesion with a heat sink or cooling device.SOLUTION: A semiconductor device includes a substrate, a semiconductor element arranged on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin sealing body that resin-seals the semiconductor element and inner leads on the substrate, and at least a portion of the lower surface of the substrate is exposed from the resin sealing body, the tip of the power lead is joined to the upper surface of the substrate, and the signal lead has an introduction portion that extends from the outside to the inside of the resin sealing body and a pressing portion that bends at the end of the introduction portion and faces toward the upper surface of the substrate, and the tip of the pressing portion is in contact with the upper surface of the substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device, an electric device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] BACKGROUND ART Conventionally, semiconductor devices have been known in which a semiconductor element (also called a chip) is mounted on a substrate on which a circuit pattern is formed, and the circuit pattern on the substrate to which the semiconductor element is bonded is connected by a wiring portion such as a lead frame.

[0003] In addition, some semiconductor devices have a substrate, semiconductor element, and lead frame (especially inner leads including power leads and signal leads) sealed in a resin sealant, and in some cases the back surface of the substrate is exposed from the resin sealant and connected to a heat sink or cooling device in order to efficiently dissipate heat generated by the semiconductor element outside the semiconductor device.

[0004] Furthermore, the outer leads of the lead frame that are drawn out from the resin encapsulant may be bent for mounting on other components, etc., and during this bending process, a load is applied to the substrate, causing damage. To avoid this, Patent Document 1 discloses an example in which four bends are formed in advance in the power supply lead that is joined to the substrate, reducing the load transmission at these bends when the outer lead is bent, thereby preventing damage to the joint between the substrate and the power supply lead. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-26791 Summary of the Invention [Problem to be solved by the invention]

[0006] FIG. 11 is a cross-sectional view of a conventional semiconductor device 28. The semiconductor device 28 includes a substrate 2, a power chip (semiconductor element) 3 and a control chip (semiconductor element) 14 arranged on the upper surface of the substrate 2, a lead frame having inner leads 6 including power leads 4 and signal leads 5, and a resin encapsulant 7 that resin-encapsulates the power chip (semiconductor element) 3, the control chip (semiconductor element) 14, and the inner leads 6 on the substrate 2. At least a portion of the lower surface of the substrate 2 is exposed from the resin encapsulant 7, and the tips of the power leads 4 are bonded to the upper surface of the substrate 2 with a bonding material 8 (solder, conductive adhesive, etc.). The power leads 4 include bonding pads 15 and a die pad 16. The lower surface of the die pad 16 is bonded to the upper surface of the substrate 2 via the bonding material 8. The power chip (semiconductor element) 3 is arranged on the upper surface of the die pad 16, and the power chip (semiconductor element) 3 and the bonding pads 15 are connected by wires 17. The signal leads 5 include bonding pads 18 and are connected to a metal pattern layer (hereinafter also referred to as a metal pattern) 13 of the substrate 2 with wires 19.

[0007] The general procedure for manufacturing such a semiconductor device 28 is to first press the tip of the power lead 4 against bonding material 8 to bond the power lead 4 to the substrate 2 and integrate the lead frame and substrate 2, then place the substrate 2 integrated with the lead frame in a lower mold die (also called a chase), close the upper and lower mold dies to press the lead frame, and with the power lead 4 pressing downward against the substrate 2, fill the mold with resin and harden it to resin-encapsulate the power chip (semiconductor element) 3, control chip (semiconductor element) 14, and inner leads 6 on the substrate 2, forming a resin encapsulant 7 so that at least a portion (heat dissipation layer 11) of the underside of the substrate 2 is exposed. However, the power lead 4 is only on the right side of Figure 11, and the position where the power lead 4 is pressed by the mold is outside the resin encapsulant 7 (i.e., the rightmost end of the power lead 4 in Figure 11), so that this is the fixed end, and the tip of the power lead 4 bonded to the substrate 2 is a free end that is easily bent. In other words, it has a cantilever structure in which the right side of the substrate 2 is pressed downward, and when the resin is filled and hardened, the left side of the substrate 2 floats up, which causes the resin to fill the gap that is created at the bottom left of the substrate 2 and form a resin burr below the heat dissipation layer 11, which prevents the heat dissipation layer 11 from adhering to the heat sink or cooling device (not shown), resulting in poor heat dissipation. One solution to this problem would be to remove the resin burr at the bottom left of the heat dissipation layer 11, but the removal process would instead create a depression in the bottom left of the heat dissipation layer 11, creating a step, which again reduces adhesion to the heat sink or cooling device and results in poor heat dissipation.

[0008] Therefore, another method is to use a fixing pin. Fig. 12 is a cross-sectional view of semiconductor device 29 before the fixing pin is removed, and Fig. 13 is a top view of semiconductor device 29 before resin sealing. Fig. 12 differs from Fig. 11 in that fixing pin 30 is used to press down on the upper surface of die pad 16 from directly above, fixing substrate 2 so that it does not lift up. This eliminates gaps below substrate 2 and suppresses the occurrence of resin burrs, improving adhesion to the heat sink and cooling device and preventing poor heat dissipation.

[0009] However, there is a drawback in that space is required on the substrate 2 to be pressed down by the fixing pin 30 (for example, in FIG. 13, a distance A between the fixing pin 30 and the wire 17, a distance B between the power chip (semiconductor element) 3, a distance C to the end of the die pad 16, etc. are required), which results in the substrate 2 becoming larger, or the layout on the substrate 2 having to be reconsidered to prevent the substrate 2 from becoming larger, or the density on the substrate 2 becoming higher and there being no room for error.

[0010] Furthermore, when the fixing pin 30 is removed after the resin has hardened, a hole 31 is inevitably formed, as shown in the top view of FIG. 14. If a hole 31 is present, detergent 32 accumulates in the hole 31 during cleaning, as shown in the cross-sectional view of FIG. 15. In a subsequent process, multiple substrates may be stacked and dried, and the detergent 32 accumulated in the hole 31 of the lower substrate will adhere to the underside (the portion exposed from the resin encapsulant) of the upper substrate. If the heat dissipation layer 33 on the underside of the upper substrate is made of copper, it may be oxidized by the detergent and discolored. FIG. 16 is a photograph of the underside of a semiconductor device 34, clearly showing discolored areas 35.

[0011] Figure 17 is a cross-sectional view of another conventional semiconductor device 36, which differs in that the power chip (semiconductor element) 3 is not on the power lead 4 and the control chip (semiconductor element) 14 is on the signal lead 5, but is the same in that it uses a fixing pin 30, and has the same problems.

[0012] The present disclosure has been made to solve the above problems, and aims to provide a semiconductor device, an electrical device, and a method for manufacturing a semiconductor device that can suppress the occurrence of resin burrs on the surface exposed from the resin sealing body of the substrate without using fixing pins, and that can prevent poor heat dissipation without worsening adhesion with a heat sink or a cooling device. [Means for solving the problem]

[0013] The present disclosure has been made to achieve the above-mentioned object, and provides a semiconductor device including a substrate, a semiconductor element arranged on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin sealing body that resin-seals the semiconductor element and inner leads on the substrate, wherein at least a portion of the lower surface of the substrate is exposed from the resin sealing body, the tip of the power lead is joined to the upper surface of the substrate, and the signal lead has an introduction portion that extends from the outside to the inside of the resin sealing body and a pressing portion that bends at the end of the introduction portion and faces toward the upper surface of the substrate, and the tip of the pressing portion is in contact with the upper surface of the substrate.

[0014] With such a semiconductor device, the top surface of the substrate is pressed down by the tips of the power leads and the tips of the pressing portions of the signal leads, so that the substrate can be fixed so that it does not float up without using a separate fixing pin, and since no gaps are created on the underside of the substrate, the occurrence of resin burrs on the underside of the substrate exposed from the resin sealing body is suppressed, and poor adhesion with the heat sink or cooling device is not deteriorated, thereby preventing poor heat dissipation.

[0015] It is also preferable that the signal lead is disposed on the opposite side of the semiconductor element from the power lead.

[0016] As a result, the upper surface of the substrate is pressed down on both sides of the semiconductor element, so that a wide area can be pressed down, and the substrate can be more reliably fixed so that it does not lift up.

[0017] It is also preferable that the power supply lead comprises a bonding pad and a die pad, the lower surface of the die pad is bonded to the upper surface of the substrate, the semiconductor element is placed on the upper surface of the die pad, and the semiconductor element and the bonding pad are connected by a wire.

[0018] As a result, the top surface of the substrate is pressed down by the tip of the pressing part of the signal lead, and also by the bottom surface of the die pad of the power lead, so that the substrate can be fixed more reliably so that it does not float up.

[0019] It is also preferable that the power supply lead has a bonding pad, the tip of the power supply lead is bonded to the upper surface of the substrate, the semiconductor element is placed on a metal pattern on the upper surface of the substrate, and the semiconductor element and the bonding pad are connected by a wire.

[0020] As a result, the top surface of the board is pressed down by the tip of the pressing part of the signal lead, and also by the tip of the power lead, so that the board can be fixed more reliably so that it does not float up.

[0021] It is also preferable that the signal leads have bonding pads.

[0022] As a result, the top surface of the substrate is pressed down by the tip of the pressing part of the signal lead while the signal lead has the function of a bonding pad, so the signal lead can be used effectively and without waste, and the substrate can be fixed so as not to float up.

[0023] Furthermore, it is preferable that the tip of the pressing portion that contacts the upper surface of the substrate is rounded, and that the rounded tip of the pressing portion contacts an area on the upper surface of the substrate that does not have a metal pattern or an area on which a dummy pattern is formed.

[0024] This reduces the contact area between the tip of the retainer and the top surface of the board, preventing unintended contact with other metal patterns. This is particularly effective if the retainer is placed in an area without a metal pattern or an area with a dummy pattern. Furthermore, because the rounded tip of the retainer contacts the top surface of the planar board, there is a space around the contact point that can be filled with resin. While this can sometimes leave the resin unfilled between opposing surfaces when two surfaces come into contact, this prevents this from happening.

[0025] It is also preferable that a plurality of the signal leads are provided, and the pressing portions of at least two of the signal leads are in contact with the upper surface of the substrate.

[0026] As a result, the upper surface of the board is pressed down by the pressing portions of at least two signal leads, so that a wide area can be pressed down, and the board can be more reliably fixed so that it does not lift up.

[0027] In this case, an electrical device including the semiconductor device can be provided.

[0028] By using a semiconductor device in which poor heat dissipation is suppressed, electrical equipment can be made to have excellent durability.

[0029] The present disclosure also provides a method for manufacturing a semiconductor device including a substrate, a semiconductor element arranged on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin encapsulant, the method including a lead frame bending step including bending the signal leads to form pressing portions so that the tips of the signal leads face the substrate when the lead frame is arranged on the substrate, and a step of pressing the tips of the power leads against the bonding material with the tips of the pressing portions in close proximity to the upper surface of the substrate, thereby bonding the power leads to the substrate and encapsulating the lead frame. a power supply lead bonding step of integrating the semiconductor element and the substrate; an in-mold substrate placement step of locating the substrate integrated with the lead frame within a lower mold die; a clamping step of closing the upper mold die and the lower mold die to press the lead frame and bring the pressing portions of the signal leads into contact with the upper surface of the substrate; and a resin sealing step of filling the mold with resin and hardening it to resin-seal the semiconductor element and inner leads on the substrate and form a resin-sealed body so that at least a part of the lower surface of the substrate is exposed.

[0030] According to this method of manufacturing a semiconductor device, the top surface of the substrate is held down by the tips of the power leads and the tips of the holding portions of the signal leads, so that the substrate can be fixed so as not to float up without using a separate fixing pin, eliminating the need for a fixing pin mechanism in the manufacturing equipment and facilitating manufacturing. In a semiconductor device manufactured by this manufacturing method, there is no gap on the bottom surface of the substrate, so the generation of resin burrs on the bottom surface of the substrate exposed from the resin encapsulant is suppressed, and adhesion to the heat sink or cooling device is not deteriorated, thereby preventing poor heat dissipation.

[0031] Furthermore, in the lead frame bending process, it is preferable to bend the power supply leads and the signal leads so that the height of the portions of the power supply leads and the signal leads sandwiched between the upper mold die and the lower mold die from the bottom surface of the substrate is greater than the depth of the lower mold die.

[0032] As a result, by closing the upper molding die and the lower molding die in the clamping process, the lead frame is pressed to lower its height, and the pressing portion of the signal lead can be brought into contact with the upper surface of the substrate. [Effects of the Invention]

[0033] As described above, according to the semiconductor device of the present disclosure, the top surface of the substrate is pressed down by the tips of the power leads and the tips of the pressing portions of the signal leads, so that the substrate can be fixed so that it does not float up without using a separate fixing pin, and since no gaps are created on the underside of the substrate, the occurrence of resin burrs on the underside of the substrate exposed from the resin sealing body is suppressed, and poor heat dissipation can be prevented without worsening adhesion with the heat sink or cooling device.

[0034] Furthermore, according to the manufacturing method of the semiconductor device of the present disclosure, since the top surface of the substrate is held down by the tips of the power leads and the tips of the holding portions of the signal leads, the substrate can be fixed so as not to float up without using a separate fixing pin, eliminating the need for a fixing pin mechanism in the manufacturing equipment and facilitating manufacturing. In the semiconductor device manufactured by this manufacturing method, since no gaps are formed on the bottom surface of the substrate, the generation of resin burrs on the bottom surface of the substrate exposed from the resin encapsulant is suppressed, and poor adhesion with the heat sink or cooling device is not impaired, thereby preventing poor heat dissipation.

[0035] Preventing poor heat dissipation from the semiconductor device in this way leads to improved reliability of the semiconductor device.

[0036] Furthermore, an electrical device equipped with the semiconductor device of the present disclosure does not suffer from poor heat dissipation from the semiconductor device, and therefore is an electrical device with excellent durability.

[0037] Furthermore, since fixing pins are no longer required and there is no need for space on the board for the fixing pins to press them down, the board can be made smaller and the degree of freedom in board layout design is increased. Also, since there are no holes for the fixing pins on the outside of the resin encapsulant, it is possible to prevent the adverse effects of the intrusion of cleaning detergents and foreign matter. [Brief explanation of the drawings]

[0038] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a top view of the semiconductor device according to the first embodiment of the present disclosure before being sealed with resin. [Figure 3] FIG. 2 is a top view of the semiconductor device according to the first embodiment of the present disclosure after being sealed with resin. [Figure 4] 10 is a photograph of the underside of a semiconductor device according to the first embodiment of the present disclosure after it has been sealed with resin, washed, and then a plurality of semiconductor devices are stacked and dried. [Figure 5] 1A and 1B are cross-sectional views and an enlarged cross-sectional view for explaining an example of a signal lead used in a semiconductor device according to the present disclosure. [Figure 6] FIG. 10 is a cross-sectional view illustrating a modified example of a signal lead. [Figure 7] FIG. 10 is a cross-sectional view of a semiconductor device according to a second embodiment of the present disclosure. [Figure 8] 10 shows another configuration of a signal lead used in the semiconductor device of the present disclosure. [Figure 9] 1A to 1C are diagrams illustrating an example of a method for manufacturing a semiconductor device according to the present disclosure. [Figure 10] 1 is a diagram illustrating an air conditioner as an embodiment of an electrical appliance including a semiconductor device according to the present disclosure. [Figure 11] FIG. 10 is a cross-sectional view of a conventional semiconductor device (without a fixing pin). [Figure 12] FIG. 10 is a cross-sectional view of another conventional semiconductor device (with fixing pins). [Figure 13] FIG. 10 is a top view of another conventional semiconductor device (with fixing pins) before being sealed with resin. [Figure 14] 10 is a top view of another conventional semiconductor device (with a fixing pin) in a state where the fixing pin is removed after the device is sealed with resin. [Figure 15] 10 is a cross-sectional view of another conventional semiconductor device (with fixing pins) after the fixing pins have been removed and the device has been washed after being sealed with resin. [Figure 16]This is a photograph of the underside of another conventional semiconductor device (with fixing pins) after resin sealing, removing the fixing pins, cleaning, and then stacking and drying multiple semiconductor devices. [Figure 17] FIG. 10 is a cross-sectional view of another conventional semiconductor device (with fixing pins). DETAILED DESCRIPTION OF THE INVENTION

[0039] The present disclosure will be described in detail below, but the present disclosure is not limited thereto.

[0040] As described above, there has been a demand for a semiconductor device, an electrical device, and a method for manufacturing a semiconductor device that can suppress the generation of resin burrs on the surface of the substrate exposed from the resin sealing body without using fixing pins, and that can prevent poor heat dissipation without worsening adhesion with a heat sink or a cooling device.

[0041] As a result of extensive research into the above-mentioned problems, the inventors have discovered that, for signal leads, by bending the end of the introduction portion extending from the outside to the inside of the resin sealing body to form a pressing portion facing toward the top surface of the substrate and arranging the tip of the pressing portion so that it is in contact with the top surface of the substrate, it is possible to suppress the occurrence of resin burrs on the surface of the substrate exposed from the resin sealing body without using a fixing pin, and have completed the present disclosure.

[0042] That is, the present disclosure provides a semiconductor device including a substrate, a semiconductor element arranged on the upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin sealing body that resin-seals the semiconductor element and inner leads on the substrate, wherein at least a portion of the lower surface of the substrate is exposed from the resin sealing body, the tip of the power lead is joined to the upper surface of the substrate, and the signal lead has an introduction portion that extends from the outside to the inside of the resin sealing body and a pressing portion that bends at the end of the introduction portion and faces toward the upper surface of the substrate, and the tip of the pressing portion is in contact with the upper surface of the substrate.

[0043] The present disclosure also relates to an electrical device including the semiconductor device.

[0044] Furthermore, the present disclosure also provides a method for manufacturing a semiconductor device including a substrate, a semiconductor element arranged on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin encapsulant, the method including: a lead frame bending step including bending the signal leads to form pressing portions so that the tips of the signal leads face the substrate when the lead frame is arranged on the substrate; and a substrate having a bonding material arranged on its upper surface, with the tips of the pressing portions pressed against the bonding material in a state where the tips of the pressing portions are close to the upper surface of the substrate, thereby joining the power leads to the substrate and pressing the leads. This is a method for manufacturing a semiconductor device, comprising: a power supply lead bonding process for integrating a frame and the substrate; an in-mold substrate placement process for arranging the substrate integrated with the lead frame within a lower mold die; a clamping process for pressing the lead frame by closing the upper mold die and the lower mold die to bring the pressing portions of the signal leads into contact with the upper surface of the substrate; and a resin sealing process for filling the mold with resin and hardening it to resin-seal the semiconductor element and inner leads on the substrate and form a resin-sealed body so that at least a portion of the underside of the substrate is exposed.

[0045] The following description will be made with reference to the drawings.

[0046] [Semiconductor Devices] A semiconductor device according to a first embodiment of the present disclosure will be described with reference to FIGS. Fig. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present disclosure, Fig. 2 is a top view before resin sealing, and Fig. 3 is a top view after resin sealing. Fig. 4 is a photograph of the underside after cleaning after resin sealing and after multiple semiconductor devices are stacked and dried. Fig. 5 is a cross-sectional view and an enlarged cross-sectional view for explaining an example of a signal lead.

[0047] The semiconductor device 1A includes a substrate 2, a power chip (semiconductor element) 3 and a control chip (semiconductor element) 14 arranged on the upper surface of the substrate 2, a lead frame having inner leads 6 including power leads 4 and signal leads 5, and a resin encapsulant 7 that resin-encapsulates the power chip (semiconductor element) 3 and the control chip (semiconductor element) 14 on the substrate 2 and the inner leads 6. At least a portion of the lower surface of the substrate 2 is exposed from the resin encapsulant 7. The tips of the power leads 4 are joined to the upper surface of the substrate 2 with a bonding material 8 (solder, conductive adhesive, etc.). The signal leads 5 include an introduction portion 9 extending from the outside to the inside of the resin encapsulant 7 and a pressing portion 10 that bends at the end of the introduction portion 9 and faces the upper surface of the substrate 2, with the tip of the pressing portion 9 contacting the upper surface of the substrate 2. The substrate 2 includes a heat dissipation layer 11, an insulating layer 12, and a metal pattern layer 13. The tip of the pressing portion 9 contacts the insulating layer 12, and the heat dissipation layer 11 is exposed from the resin encapsulant 7.

[0048] According to such a semiconductor device 1A, the top surface of the substrate 2 is pressed down by the tips of the power leads 4 and the tips of the pressing portions 9 of the signal leads 5, so that the substrate 2 can be fixed so as not to float up without using a separate fixing pin, and since no gaps are created on the bottom surface of the substrate 2 (the bottom surface of the heat dissipation layer 11), the occurrence of resin burrs on the bottom surface (heat dissipation layer 11) exposed from the resin sealing body 7 of the substrate 2 is suppressed, and poor adhesion with the heat sink or cooling device is not deteriorated, thereby preventing poor heat dissipation.

[0049] In the example shown in the figure, the power supply lead 4 extends from the outside to the inside of the resin sealing body 7 and has two bent portions (a first bent portion and a second bent portion) in the thickness direction. On the other hand, the signal lead 5 also extends from the outside to the inside of the resin sealing body 7 like the power supply lead 4, but has only one bent portion in the thickness direction.

[0050] Furthermore, it is more preferable that the signal leads 5 be arranged on the opposite side to the power supply leads 4, with the power chip (semiconductor element) 3 and the control chip (semiconductor element) 14 sandwiched between them, as shown in FIGS.

[0051] As a result, the upper surface of the substrate 2 is pressed down on both sides of the semiconductor elements 3 and 14, so that a wide area can be pressed down and the substrate 2 can be more reliably fixed so that it does not rise up.

[0052] Furthermore, it is more preferable that the power supply lead 4 has a bonding pad 15 and a die pad 16, the lower surface of the die pad 16 is bonded to the upper surface of the substrate 2 by a bonding material 8, the power chip (semiconductor element) 3 is placed on the upper surface of the die pad 16 and bonded by the bonding material 8, and the power chip (semiconductor element) 3 and the bonding pad 15 are connected by a wire 17.

[0053] As a result, the upper surface of the substrate 2 is pressed down by the tip of the pressing portion 10 of the signal lead 5, and also by the lower surface of the die pad 16 of the power lead 4, so that the substrate 2 can be fixed more reliably so that it does not float up.

[0054] It is more preferable that a part of the lead-in portion 9 of the signal lead 5 also serves as a bonding pad 18. This bonding pad 18 is used to connect to the metal pattern layer 13 with a wire 19.

[0055] As a result, the upper surface of the substrate 2 is pressed down by the tip of the pressing part 10 of the signal lead 5 while the signal lead 5 is given the function of a bonding pad 18, so the signal lead 5 can be effectively used without waste and fixed so that the substrate 2 does not rise up.

[0056] 5A and 5B are a cross-sectional view and an enlarged cross-sectional view, respectively, illustrating the signal lead 5. The pressing portion 10 that contacts the upper surface of the substrate (insulating layer 12) has a rounded tip, and it is more preferable that the rounded tip of the pressing portion 10 contacts the insulating layer 12 (area without a metal pattern) on the upper surface of the substrate. The rounded tip is also called chamfering, and results in rounded corners.

[0057] This reduces the contact area between the tip of the pressing part 10 and the top surface of the substrate, preventing unintended contact with other metal patterns. This is particularly reliable when the tip is in contact with the insulating layer 12, which is an area without metal patterns. Furthermore, it is more preferable to have the rounded tip of the pressing part 10 in contact with the top surface of the planar substrate (insulating layer 12), as this ensures that a space can be filled with resin around the contact point, making it less likely that the resin will be left unfilled.

[0058] Incidentally, as a modified example of a signal lead, an example having two bent portions between the introduction portion and the pressing portion is shown in Figure 6. Figure 6 is a cross-sectional view for explaining signal lead 20. Signal lead 20 has two bent portions 21 and 22 between introduction portion 24 and pressing portion 23. Even when such a signal lead 20 is used, the top surface of the substrate is pressed down by the tip of the power lead and the tip of the pressing portion of the signal lead, so the substrate can be fixed so that it does not float up without using a separate fixing pin. In addition, no gaps are created on the bottom surface of the substrate, which suppresses the generation of resin burrs on the bottom surface of the substrate exposed from the resin encapsulant, does not deteriorate adhesion with the heat sink or cooling device, and prevents poor heat dissipation.

[0059] Comparing the example shown in Figure 6 with the example shown in Figure 5, the example shown in Figure 5 has a larger angle between the top surface of the substrate and the clamping portion (clamping portion 10 in Figure 5 is more upright than clamping portion 23 in Figure 6), making it less likely to produce unfilled areas around the contacts and therefore more preferable.

[0060] Here, an example has been shown in which the tip of the rounded pressing portion 10 comes into contact with an area on the top surface of the substrate 2 where there is no metal pattern 13, but this is not limited to this, and it may also come into contact with an area on the top surface of the substrate 2 where a dummy pattern (an independent dummy metal pattern) is formed, for example.

[0061] 2, it is more preferable that the pressing portions 10 of three signal leads 5 are in contact with the upper surface of the substrate 2. Of course, this is not limited to three, and it is preferable to have a plurality of signal leads, with the pressing portions of at least two signal leads in contact with the upper surface of the substrate.

[0062] As a result, the upper surface of the board is pressed down by the pressing portions of at least two signal leads, so that a wide area can be pressed down and the board can be more reliably fixed so that it does not lift up.

[0063] 2, it is preferable to select the top and bottom two of the three signal leads 5. This is because it is possible to cover as wide a range as possible, so it is considered more preferable to select both ends of multiple signal leads.

[0064] The semiconductor device 1A of the first embodiment described above has the configuration shown in FIG. 3 when viewed from above and FIG. 4 when viewed from below. The semiconductor device 1A of this embodiment does not use fixing pins, so there are no holes for the fixing pins when viewed from above (FIG. 3). Because there are no holes, detergent does not accumulate in the holes during cleaning. Furthermore, in the past, when multiple substrates were stacked and dried, detergent that had accumulated in the holes of the lower substrate would adhere to the underside (portion exposed from the resin encapsulant) of the upper substrate, causing oxidation and discoloration. However, this does not occur in this embodiment, and the exposed underside of the substrate (the underside of the heat dissipation layer 11) can be kept clean without discoloration, as shown in FIG.

[0065] Next, FIG. 7 shows a cross-sectional view of a semiconductor device 1B according to a second embodiment of the present disclosure.

[0066] Figure 7 shows a configuration in which the power supply lead 4 has a bonding pad 15, the tip of the power supply lead 4 is bonded to the upper surface of the substrate 2 via a bonding material 8, the power chip (semiconductor element) 3 is placed on the metal pattern 13 of the substrate 2 via the bonding material 8, and the power chip (semiconductor element) 3 and the bonding pad 15 are connected by a wire 17.

[0067] As a result, the top surface of the substrate 2 is pressed down by the tip of the pressing part 10 of the signal lead 5, and also by the tip of the power lead 4, so that the substrate 2 can be fixed more reliably so as not to float up.

[0068] Next, Figure 8 shows other signal lead configurations that are suitable for use in the semiconductor device of the present disclosure. There are three types: a straight type in which the introduction portion 9 and the pressing portion 10 are straight when viewed from above, a diagonal type in which they are diagonal, and a split type in which one introduction portion 9 is split into two pressing portions 10. Although the configurations on the top surface are different, as is clear from the side view, in all cases the pressing portion 10 is bent at the end of the introduction portion 9 and faces toward the top surface of the substrate, making it easy to press down on the top surface of the substrate.

[0069] The lead frame including the inner leads 6 that form the power leads 4 and the signal leads 5 is not particularly limited, but can be made of a copper alloy plate material.

[0070] Furthermore, the power chip (semiconductor element) is not particularly limited, but may be a power chip such as a transistor or diode that handles large amounts of power, and may be an IGBT (Insulated Gate Bipolar Transistor).

[0071] Furthermore, the control chip (semiconductor element) is not particularly limited, but may be a control chip such as a control IC that does not handle as much power as a power chip, and may be a MIC (Microwave Integrated Circuit).

[0072] Furthermore, semiconductor elements such as power chips and control chips may be fixed onto the substrate by soldering, conductive adhesive, or the like, although this is not particularly limited.

[0073] The substrate is not particularly limited as long as it can accommodate semiconductor elements. As shown in Figures 1 to 7, the substrate 2 can have a metal pattern 13 on its upper surface, an insulating layer 12, and a heat dissipation layer 11 on its lower surface. The materials for each are not particularly limited. The metal pattern may be copper foil and the heat dissipation layer may be an aluminum plate, or the heat dissipation layer may also be copper foil. The insulating layer is not particularly limited, but can be ceramic.

[0074] The substrate may be a ceramic substrate with metal patterns on both sides, such as a DBC (Direct Bonded Copper Substrate) in which copper is directly bonded to an insulating ceramic substrate, or an AMB (Active Metal Brazing Substrate).

[0075] 2 is also called an Intelligent Power Module (IPM). In the example of an IPM, multiple semiconductor devices can be provided on a DBC substrate or an AMB substrate.

[0076] The molding resin used as the resin sealant is not particularly limited, but may be an epoxy resin sealant.

[0077] [Method of manufacturing semiconductor device] Next, a method for manufacturing a semiconductor device will be described. Fig. 9 shows an example of a method for manufacturing a semiconductor device according to the present disclosure.

[0078] In general terms, this is a method for manufacturing a semiconductor device that includes a substrate 2, semiconductor elements such as a power chip 3 and a control chip 14 arranged on the upper surface of the substrate 2, a lead frame having inner leads 6 including a power lead 4 and a signal lead 5, and a resin sealant 7 that seals the semiconductor elements such as the power chip 3 and the control chip 14 on the substrate 2 and the inner leads 6 with resin.

[0079] (Lead frame bending process) First, the signal leads 5 are bent to form the holding portions 10 so that the tips of the signal leads 5 face the substrate 2 when the lead frame is placed on the substrate 2. Figure 9(a) shows the lead frame (inner leads 6) after the lead frame bending process placed above the substrate 2, with the substrate 2 placed in the pocket region of the jig tool 25.

[0080] It is preferable to bend the power supply leads so that the depth of the tip of the power supply lead is deeper than the depth of the tip of the signal lead, so that the signal leads do not interfere when the power supply leads are attached to the board in the next step.

[0081] (Power supply lead bonding process) Next, with the tip of the pressing part 10 in close proximity to the top surface of the substrate 2, the tip of the power supply lead 4 is pressed against the bonding material 8, bonding the power supply lead 4 to the substrate 2 and integrating the lead frame and the substrate 2 (FIG. 9(b)). Thereafter, the power chip (semiconductor element) 3 and the bonding pad 15 of the power supply lead 4 are connected by wire 17, and the control chip (semiconductor element) 14, the bonding pad 18 of the signal lead 5, and the metal pattern layer 13 etc. are connected by wire 19.

[0082] (Substrate placement process inside the mold) Next, the bottom surface of the substrate 2 integrated with the lead frame is aligned with the bottom surface of the recess (also called a cavity) in the lower mold die 26 (FIG. 9(c)).

[0083] (Clamping process) Next, the upper molding die 27 and the lower molding die 26 are closed to press the lead frame, and the pressing portion 10 of the signal lead 5 is brought into contact with the upper surface of the substrate.

[0084] (Resin sealing process) Next, the mold formed by closing the upper mold die 27 and the lower mold die 26 is filled with resin and hardened to resin-seal the semiconductor elements on the substrate 2, such as the power chip 3 and the control chip 14, and the inner leads 6, and form a resin-sealed body 7 so that at least a portion of the underside of the substrate 2 (heat dissipation layer 11) is exposed (Figure 9(d)).

[0085] Finally, the upper mold die 27 and the lower mold die 26 are removed to complete the semiconductor device.

[0086] According to this method for manufacturing a semiconductor device, the top surface of the substrate 2 is pressed down by the tips of the power leads 4 and the tips of the pressing portions 10 of the signal leads 5, so that the substrate 2 can be fixed so as not to float up without using a separate fixing pin, and no gaps are created on the bottom surface of the substrate 2. Therefore, it is possible to suppress the generation of resin burrs on the bottom surface (heat dissipation layer 11) of the substrate 2 exposed from the resin sealing body 7, and to prevent poor adhesion with the heat sink or cooling device, thereby preventing poor heat dissipation.

[0087] In addition, in the lead frame bending process, it is preferable to bend the power supply leads 4 and the signal leads 5 so that the height of the portions of the power supply leads 4 and the signal leads 5 sandwiched between the upper mold die 27 and the lower mold die 26 from the bottom surface of the substrate 2 is greater than the depth of the lower mold die 26.

[0088] As a result, by closing the upper mold die 27 and the lower mold die 26 in the subsequent clamping process, the lead frame is pressed to lower its height, and the pressing portion 10 of the signal lead 5 can be brought into contact with the upper surface of the substrate 2.

[0089] More specifically, when the bottom surface of the substrate is placed in the bottom of the recess in the lower mold, it is preferable that the lead frame be positioned slightly above the parting line of the lower mold, so that when the upper and lower molds are closed, the difference in the depth of the lower mold and the height of the substrate combined with the lead frame allows the tips of the power and signal leads to press the substrate firmly and reliably against the bottom surface of the lower mold.

[0090] [Electrical Equipment] Furthermore, an embodiment of an electrical device including the semiconductor device of the present disclosure will be described with reference to FIG.

[0091] The semiconductor device described above can be applied to electrical equipment. By using a semiconductor device that suppresses poor heat dissipation, the electrical equipment can be made to have excellent durability. The electrical equipment is not particularly limited, but in particular, the example of the semiconductor device (IPM) described above can be suitably applied as a small, high-voltage, three-phase motor driver for driving compressors in air conditioners, refrigerators, etc., or as the main motor of a washing machine, etc.

[0092] 10 is a diagram illustrating an air conditioner 300 as one embodiment of an electrical device. The air conditioner 300 comprises an indoor unit 310 and an outdoor unit 320, each of which is equipped with fan motors 311 and 321, a compressor 322, and an IPM 200 as a semiconductor device. It is preferable to use an IPM 200 with specifications suitable for driving the respective motors and compressors.

[0093] The present specification includes the following aspects. [1]: A semiconductor device including a substrate, a semiconductor element disposed on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin sealant that seals the semiconductor element and inner leads on the substrate with resin, At least a portion of the lower surface of the substrate is exposed from the resin encapsulant, a tip of the power lead is bonded to an upper surface of the substrate; The semiconductor device is characterized in that the signal lead has an introduction portion that extends from the outside to the inside of the resin sealing body, and a pressing portion that bends at the end of the introduction portion and faces toward the top surface of the substrate, and the tip of the pressing portion is in contact with the top surface of the substrate. [2]: The semiconductor device according to [1] above, wherein the signal lead is arranged on the opposite side of the semiconductor element from the power lead. [3]: The semiconductor device according to [1] or [2] above, characterized in that the power supply lead comprises a bonding pad and a die pad, the underside of the die pad is bonded to the upper surface of the substrate, the semiconductor element is placed on the upper surface of the die pad, and the semiconductor element and the bonding pad are connected by a wire. [4]: The semiconductor device according to [1] or [2] above, characterized in that the power supply lead has a bonding pad, the tip of the power supply lead is bonded to the top surface of the substrate, the semiconductor element is placed on a metal pattern on the top surface of the substrate, and the semiconductor element and the bonding pad are connected by a wire. [5]: The semiconductor device according to any one of [1] to [4] above, wherein the signal leads are provided with bonding pads. [6]: The semiconductor device according to any one of [1] to [5] above, characterized in that the tip of the pressing portion that contacts the upper surface of the substrate is rounded, and the rounded tip of the pressing portion contacts an area on the upper surface of the substrate that does not have a metal pattern or an area on which a dummy pattern is formed. [7]: A semiconductor device according to any one of [1] to [6] above, characterized in that it comprises a plurality of signal leads, and the pressing portions of at least two of the signal leads are in contact with the upper surface of the substrate. [8]: An electrical device comprising the semiconductor device according to any one of [1] to [7] above. [9]: A method for manufacturing a semiconductor device including a substrate, a semiconductor element disposed on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin encapsulant, a lead frame bending step including bending the signal leads to form pressing portions so that the tips of the signal leads face the substrate when the lead frame is placed on the substrate; a power supply lead bonding step of bonding the power supply lead to the substrate by pressing the tip of the power supply lead against the bonding material with the tip of the pressing portion in close proximity to the top surface of the substrate, the bonding material being disposed on the top surface of the substrate, thereby integrating the lead frame and the substrate; a step of placing the substrate integrated with the lead frame in a lower mold; a clamping step of pressing the lead frame by closing the upper mold die and the lower mold die to bring the pressing portions of the signal leads into contact with the upper surface of the substrate; a resin sealing process of filling the inside of the mold with resin and hardening it to resin-seal the semiconductor element and inner leads on the substrate, thereby forming a resin-sealed body so that at least a part of the lower surface of the substrate is exposed; 1. A method for manufacturing a semiconductor device, comprising:

[10] : The method for manufacturing a semiconductor device according to [9] above, characterized in that in the lead frame bending process, the power supply leads and the signal leads are bent so that the height of the portions of the power supply leads and the signal leads sandwiched between the upper mold die and the lower mold die from the bottom surface of the substrate is greater than the depth of the lower mold die.

[0094] The present disclosure is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration that is substantially identical to the technical idea described in the claims of the present disclosure and that provides similar effects is included within the technical scope of the present disclosure. [Explanation of symbols]

[0095] 1A, 1B, 28, 29, 34, 36...Semiconductor device, 2...Substrate, 3...power chip (semiconductor element), 4...power supply lead, 5, 20...signal lead, 6...inner lead; 7...resin sealing body; 8...bonding material; 9, 24...introduction portion; 10, 23...pressure portion; 11, 33...heat dissipation layer; 12...insulation layer; 13...metal pattern layer, 14...control chip (semiconductor element), 15, 18...bonding pads; 16...die pad; 17, 19...wires; 21, 22... Bending portion, 25... Jig tool, 26... Lower mold die, 27...Upper mold die, 30...Fixing pin, 31...Punch hole, 32...Detergent, 35...Discolored part, 200...IPM (semiconductor device), 300...Air conditioner, 310... indoor unit, 311, 321... fan motor, 320... outdoor unit, 322...Compressor. A, B, C…distance.

Claims

1. A semiconductor device including a substrate, a semiconductor element disposed on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin sealant that seals the semiconductor element and inner leads on the substrate with resin, At least a portion of the lower surface of the substrate is exposed from the resin encapsulant, a tip of the power lead is bonded to an upper surface of the substrate; The semiconductor device is characterized in that the signal lead has an introduction portion that extends from the outside to the inside of the resin sealing body, and a pressing portion that bends at the end of the introduction portion and faces toward the top surface of the substrate, and the tip of the pressing portion is in contact with the top surface of the substrate.

2. 2. The semiconductor device according to claim 1, wherein the signal lead is disposed on the opposite side of the semiconductor element from the power supply lead.

3. 2. The semiconductor device according to claim 1, wherein the power supply lead comprises a bonding pad and a die pad, the lower surface of the die pad is bonded to the upper surface of the substrate, the semiconductor element is disposed on the upper surface of the die pad, and the semiconductor element and the bonding pad are connected by a wire.

4. 2. The semiconductor device according to claim 1, wherein the power supply lead has a bonding pad, the tip of the power supply lead is bonded to the upper surface of the substrate, the semiconductor element is placed on a metal pattern on the upper surface of the substrate, and the semiconductor element and the bonding pad are connected by a wire.

5. 2. The semiconductor device according to claim 1, wherein the signal lead has a bonding pad.

6. The semiconductor device described in claim 1, characterized in that the pressing portion that contacts the upper surface of the substrate has a rounded tip, and the rounded tip of the pressing portion contacts an area on the upper surface of the substrate that does not have a metal pattern or an area on which a dummy pattern is formed.

7. 2. The semiconductor device according to claim 1, wherein the signal leads are plural, and the pressing portions of at least two of the signal leads are in contact with the upper surface of the substrate.

8. An electrical device comprising the semiconductor device according to claim 1 .

9. A method for manufacturing a semiconductor device including a substrate, a semiconductor element disposed on an upper surface of the substrate, a lead frame having inner leads including power leads and signal leads, and a resin encapsulant, the method comprising: a lead frame bending step including bending the signal leads to form pressing portions so that the tips of the signal leads face the substrate when the lead frame is placed on the substrate; a power supply lead bonding step of bonding the power supply lead to the substrate by pressing the tip of the power supply lead against the bonding material with the tip of the pressing portion in close proximity to the top surface of the substrate, the bonding material being disposed on the top surface of the substrate, thereby integrating the lead frame and the substrate; a step of placing the substrate integrated with the lead frame in a lower mold; a clamping step of pressing the lead frame by closing the upper mold die and the lower mold die to bring the pressing portions of the signal leads into contact with the upper surface of the substrate; a resin sealing process of filling the inside of the mold with resin and hardening it to resin-seal the semiconductor element and inner leads on the substrate, thereby forming a resin-sealed body so that at least a part of the lower surface of the substrate is exposed; 1. A method for manufacturing a semiconductor device, comprising:

10. 10. The method for manufacturing a semiconductor device according to claim 9, wherein in the lead frame bending process, the power supply leads and the signal leads are bent so that the height of the portions of the power supply leads and the signal leads sandwiched between the upper mold die and the lower mold die from the bottom surface of the substrate is greater than the depth of the lower mold die.

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