Debug system and log analysis method

Abstract

To prepare long-term analysis data to improve the efficiency of error cause analysis and software debugging.SOLUTION: A debug system comprises a first and a second semiconductor device, and a log analysis device. Each of the first and second semiconductor devices runs software to generate a trace log, a first execution log, and a second execution log. The first semiconductor device transfers the trace log and the first execution log to the log analysis device. The second semiconductor device transfers the trace log and the second execution log to the log analysis device. The log analysis device identifies a processing order of the first and second execution logs on the basis of timestamps assigned to the trace log, the first execution log, and the second execution log transferred from the first and second semiconductor devices, and generates analysis data by combining the first and second execution logs in accordance with the identified processing order. The analysis data is used for analyzing the causes of errors.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a debugging system and a log analysis method. [Background technology]

[0002] In recent years, with the improvement of the functionality of advanced driving systems and the level of autonomous driving, the scale of development of in-vehicle software has become larger than ever before. Because in-vehicle software is closely related to safety, convenience, and other factors, efficient, high-quality debugging is required. In the debugging of in-vehicle software, data such as logs and statuses of the software executed on the in-vehicle device (hereinafter also referred to as execution logs) are collected, and the collected execution logs are temporarily stored in memory. The execution logs temporarily stored in memory are read by a log analysis device and used for error analysis. For example, Patent Document 1 discloses a technology for temporarily storing data used for debugging in memory and reading the data temporarily stored in memory. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-310702 Summary of the Invention [Problem to be solved by the invention]

[0004] In the development of in-vehicle software, it is assumed that debugging work is performed using execution logs obtained by running the software on an actual vehicle. In this case, the execution logs obtained by running the software are collected and then temporarily stored in memory on the actual vehicle. Because memory capacity is finite, when the memory becomes full with collected execution logs, old execution logs are overwritten with new execution logs. Therefore, it is necessary to transfer the execution logs stored in memory to a log analysis device via a wireless network such as a mobile communication system before the execution logs required for debugging are overwritten.

[0005] However, if the speed at which execution logs are written to memory (data collection speed) exceeds the speed at which they are transferred from memory (data transfer speed), it is not possible to transfer all of the collected execution logs to the log analysis device. In other words, there is a limit to the execution logs that can be used for analysis, which could hinder efficient debugging work.

[0006] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0007] A debugging system according to one embodiment includes a first semiconductor device mounted on a first vehicle, a second semiconductor device mounted on a second vehicle, and a log analysis device. Each of the first and second semiconductor devices executes software to perform a series of related processes, generates a trace log and a plurality of execution logs according to the series of related processes, assigns a timestamp to each of the trace log and the plurality of execution logs, stores the timestamped trace log and the plurality of execution logs, and transfers at least one of the stored trace log and the plurality of execution logs to the log analysis device. The plurality of execution logs include a first execution log and a second execution log. The log analysis device receives the trace log and the first and second execution logs from the first and second semiconductor devices, respectively. The log analysis device determines a processing order of the first execution log and the second execution log based on the timestamps assigned to the trace log, the first execution log, and the second execution log, combines the first and second execution logs according to the determined processing order, generates analysis data, and analyzes the cause of an error using the analysis data.

[0008] A log analysis method according to one embodiment is executed in a debugging system including a first semiconductor device mounted on a first vehicle, a second semiconductor device mounted on a second vehicle, and a log analyzer. The log analysis method includes a first processing step using each of the first and second semiconductor devices and a second processing step using the log analyzer. In the first processing step, software is executed to perform a series of related processes, a trace log and multiple execution logs are generated according to the series of related processes, a timestamp is assigned to each of the trace log and the multiple execution logs, the timestamped trace log and the multiple execution logs are stored in memory, and at least one of the trace log and the multiple execution logs stored in memory is transferred to the log analyzer. The multiple execution logs include a first execution log and a second execution log. In the second processing step, a trace log and a first execution log are received from the first semiconductor device, and a trace log and a second execution log are received from the second semiconductor device. Based on the timestamps assigned to these trace logs, first execution logs, and second execution logs, a processing order of the first execution log and the second execution log is identified, the first and second execution logs are combined according to the identified processing order to generate analysis data, and the analysis data is used to analyze the cause of the error. [Effects of the Invention]

[0009] According to one embodiment, analysis data for analyzing the cause of an error is created by combining execution logs transferred from multiple semiconductor devices. This makes it possible to prepare analysis data covering a long period of time, which is difficult to achieve with only the execution log transferred from a single semiconductor device, and allows for efficient analysis of the cause of the error and software debugging. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram showing a configuration of a debugging system according to an embodiment. [Figure 2] FIG. 2 is a block diagram showing a configuration of the semiconductor device according to the embodiment. [Figure 3] FIG. 3 is a diagram for explaining a trace log and an execution log output from a processor of the semiconductor device according to the embodiment. [Figure 4] FIG. 4 is a diagram for explaining the trace log and the execution log transferred to the log analysis device according to the embodiment. [Figure 5] FIG. 5 is a block diagram illustrating a configuration of a log analysis device according to an embodiment. [Figure 6] FIG. 6 is a diagram illustrating the difference in execution flow that occurs due to processing related to conditional branching. [Figure 7] FIG. 7 is a diagram for explaining analysis data generated by combining a plurality of execution logs. [Figure 8] FIG. 8 is a diagram for explaining a method for combining a plurality of execution logs. [Figure 9] FIG. 9 is a flowchart showing an example of the operation of the semiconductor device according to the embodiment. [Figure 10] FIG. 10 is a flowchart illustrating an example of the operation of the log analysis device according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments will be described with reference to the drawings. Note that the drawings are simplified, and the technical scope of the embodiments should not be narrowly interpreted based on the description in the drawings. Furthermore, identical or similar elements are given the same reference numerals, and redundant explanations will be omitted.

[0012] In the following embodiments, when necessary for convenience, the description will be divided into multiple sections or embodiments. However, unless otherwise specified, they are not unrelated to each other, and one is a partial or complete modification, application example, detailed explanation, supplementary explanation, etc. of the other. Furthermore, in the following embodiments, when the number of elements (including the number, numerical value, amount, range, etc.) is mentioned, it is not limited to that specific number, and may be more or less than the specific number, unless otherwise specified or when it is clearly limited to a specific number in principle.

[0013] Furthermore, in the following embodiments, the components (including operational steps, etc.) are not necessarily essential unless otherwise specified or considered to be clearly essential in principle. Similarly, in the following embodiments, when referring to the shape, positional relationship, etc. of components, etc., it is intended to include those that are substantially similar or similar to the shape, etc., unless otherwise specified or considered to be clearly not essential in principle. The same applies to the above numbers, etc. (including numbers, numerical values, amounts, ranges, etc.).

[0014] The configuration of a debugging system according to this embodiment will be described. FIG. 1 is a block diagram showing the configuration of the debugging system 1. As shown in FIG. 1, the debugging system 1 includes a log analysis device 10, a plurality of semiconductor devices 21-24, and a network 40. The semiconductor device 21 is mounted on a vehicle 201. The semiconductor device 22 is mounted on a vehicle 202. The semiconductor device 23 is mounted on a vehicle 203. The semiconductor device 24 is mounted on a vehicle 204. In the present disclosure, when any one of the plurality of semiconductor devices 21-24 is indicated, it is also referred to as a semiconductor device 2. Furthermore, when any one of the plurality of vehicles 201-204 is indicated, it is also referred to as a vehicle 20.

[0015] The log analysis device 10 is connected to each of the semiconductor devices 21-24 via a network 40 such as the Internet or a mobile communication system, and is configured to enable data transmission and reception between the log analysis device 10 and each of the semiconductor devices 21-24. Each of the semiconductor devices 21-24 transmits a software execution log to the log analysis device 10 via the network 40. The log analysis device 10 receives the software execution log from the semiconductor devices 21-24. The log analysis device 10 is also configured to analyze the cause of an error that occurs during software execution based on the execution log and debug the software.

[0016] Next, we will explain the configuration of the semiconductor device 2. Fig. 2 is a block diagram showing the configuration of the semiconductor device 2. As shown in Fig. 2, the semiconductor device 2 includes a processor 211 such as a CPU (Central Processing Unit), a memory 212 for storing software, a data recorder 213, a memory 214 for storing execution logs and the like, an error control module (ECM) 215, and a log transfer control unit 216.

[0017] The processor 211 performs a plurality of processes by executing software. The memory 212 is connected to the processor 211 and stores the software executed by the processor 211. The software includes various software such as an operating system (OS) and device drivers. The processor 211 also generates and outputs an execution log corresponding to each of the plurality of processes.

[0018] The processor 211 executes software to perform multiple processes and generates an execution log corresponding to each of the multiple processes. Therefore, the multiple processes and the generation of the execution logs are performed in accordance with the execution order of the software. Furthermore, the processor 211 typically performs a predetermined number of consecutive related processes. In the present disclosure, a series of execution logs generated consecutively in response to a series of related processes is referred to as an execution log group.

[0019] When generating an execution log group, the processor 211 generates a trace log. The trace log includes identification information (ID) for identifying the execution log group. The processor 211 assigns one ID to an execution log group including multiple execution logs generated in accordance with a series of multiple related processes, and generates one trace log including the ID. The ID assigned by the processor 211 is information commonly used in the semiconductor devices 21-24.

[0020] Furthermore, the processor 211 outputs an execution log group, which includes a trace log and multiple execution logs generated in response to a series of multiple related processes, in the order of the trace log and the execution log group. Therefore, by checking the ID included in the trace log output immediately before the execution log group, it is possible to identify the process in relation to which the execution log group was generated. In the present disclosure, a set of a trace log and an execution log group to which the ID included in the trace log is assigned is also referred to as an execution log set.

[0021] Fig. 3 is a diagram for explaining the trace log and execution log output from the processor 211 of the semiconductor device 2. Fig. 3 shows an example in which the processor 211 outputs seven execution log sets. Each execution log group included in the execution log set contains four execution logs.

[0022] Also, in the example of Figure 3, the trace logs contained in each of the seven execution log sets contain one of seven different IDs, ID1 to ID7, along the timeline. For example, the first trace log output contains ID1. Therefore, the execution log group between the trace log containing ID1 and the execution log group output immediately after that trace log - in other words, the trace log group between the trace log containing ID1 and the trace log containing a different ID (ID2) - constitutes the execution log set for ID1. The same is true for the execution log sets from ID2 to ID7.

[0023] 3, the processor 211 outputs the execution log set from ID1 to ID7 along the time axis in the order of ID1 to ID7. That is, it can be understood that the processes identified by ID1 to ID7 are executed sequentially by the processor 211.

[0024] Returning to FIG. 2, the description of the configuration of the semiconductor device 2 will continue. The data recorder 213 is connected to the processor 211 and receives a plurality of execution log sets output from the processor 211. The data recorder 213 assigns (embeds) a timestamp to each of the trace logs and a plurality of execution logs included in the received execution log set. For example, if the seven execution log sets shown in FIG. 3 are received by the data recorder 213, a timestamp is assigned to each of the trace logs and four execution logs included in each execution log set, in the order of execution log set ID1 to execution log set ID7. Note that there is no particular limit to the interval at which timestamps are assigned, but at least one timestamp must be assigned to each of the trace logs and execution logs.

[0025] The data recorder 213 is also connected to the memory 214. The data recorder 213 assigns timestamps to the trace logs and multiple execution logs included in the execution log set, and then stores the execution log set in the memory 214. The execution log sets to which timestamps have been assigned are stored in the memory 214 in the order in which the data recorder 213 receives the execution log sets from the processor 211.

[0026] Because the processor 211 outputs execution log sets one after another, the execution log sets stored by the data recorder 213 eventually exceed the data storage capacity of the memory 214. When the stored execution log sets exceed the data capacity of the memory 214, the old execution log sets stored in the memory 214 are overwritten with the new execution log sets to store the new execution log sets. In other words, the execution log sets (trace logs and execution logs) output from the processor 211 are temporarily stored in the memory 214 until they are deleted by overwriting.

[0027] The ECM 215 is configured to determine whether an error has occurred during software execution. For example, the ECM 215 can determine whether an error has occurred during software execution by monitoring an execution log output from the processor 211 and checking whether any of a plurality of pre-registered errors has occurred. If the ECM 215 determines that an error has occurred during software execution, it generates an error occurrence notification.

[0028] The ECM 215 is connected to the log transfer control unit 216 and transmits an error occurrence notification to the log transfer control unit 216. The ECM 215 also transmits the error occurrence notification and error information to the log analysis device 10 via the network 40. The error information includes information for identifying the semiconductor device 2 in which the error occurred, information for identifying the type of error that occurred, etc. The error occurrence notification may be transmitted from the ECM 215 to the log transfer control unit 216 via the processor 211 or via the log analysis device 10.

[0029] The log transfer control unit 216 is connected to the memory 214 and the ECM 215. The log transfer control unit 216 is also connected to the log analysis device 10 via a network 40. The log transfer control unit 216 is configured to read the trace log and the execution log from the memory 214, and transfer the trace log and the execution log to the log analysis device 10 via the network 40.

[0030] Furthermore, the log transfer control unit 216 receives an error occurrence notification generated by the ECM 215. Upon receiving the error occurrence notification, the log transfer control unit 216 prohibits the writing of the execution log set (trace log and execution log) from the data recorder 213 to the memory 214. This makes it possible to prevent the trace log and execution log stored in the memory 214 from being deleted due to data overwriting when it is determined that an error has occurred during software execution.

[0031] Here, the transfer of trace logs and execution logs controlled by the log transfer control unit 216 will be described in detail with reference to Fig. 4. Fig. 4 is a diagram for explaining the trace logs and execution logs transferred from the memory 214 to the log analysis device 10. Fig. 4 shows multiple execution log sets output from the data recorder 213 along the time axis. Each execution log set includes a trace log and four execution logs. Note that the four execution logs are also referred to as the first execution log, the second execution log, the third execution log, and the fourth execution log along the time axis.

[0032] In Figure 4, it is assumed that an error occurs during software execution at time t2, and writing of execution log sets to memory 214 is prohibited. It is also assumed here that memory 214 has a storage capacity sufficient to store three execution log sets as shown in Figure 4. Therefore, when an error occurs at time t2 and writing of execution log sets to memory 214 is prohibited, the execution log sets stored in memory 214 are the three execution log sets shown from time t1 to time t2.

[0033] Furthermore, the multiple execution log sets shown before time t1 are data that were previously temporarily stored in memory 214 in chronological order. However, at time t2 when the error occurred, these execution log sets have been overwritten by new execution log sets, and are data that have already been deleted from memory 214. Note that the execution log sets shown after time t2 are not stored in memory 214 because writing to memory 214 is prohibited.

[0034] The log transfer control unit 216 transfers the trace log and the execution log stored in the memory 214 to the log analysis device 10 by switching between two transfer modes based on an error occurrence notification generated by the ECM 215. The two transfer modes include a first transfer mode and a second transfer mode. The first transfer mode is a transfer mode used when an error occurrence notification has not been received by the log transfer control unit 216, i.e., when no error has occurred during software execution. On the other hand, the second transfer mode is a transfer mode used when an error occurrence notification has been received by the log transfer control unit 216, i.e., when an error has occurred during software execution. In this way, the log transfer control unit 216 selects either the first transfer mode or the second transfer mode in response to the error occurrence notification.

[0035] If no error occurrence notification has been received, the log transfer control unit 216 controls log transfer in the first transfer mode. When the first transfer mode is selected, the log transfer control unit 216 reads out the trace log and at least one execution log included in each execution log set from the memory 214 based on the transfer log designation information, and transfers them to the log analysis device 10. The transfer log designation information is information for designating the execution log that should be transferred to the log analysis device 10 from among the execution logs included in each execution log set.

[0036] 4 shows an example in which the transfer log designation information designates the first execution log of the four execution logs included in each execution log set as the execution log to be transferred. The log transfer control unit 216 reads the trace log and the first execution log included in each execution log set based on the transfer log designation information designating the first execution log, and transfers them to the log analysis device 10. In the first transfer mode, the execution log temporarily stored in the memory 214 when no error occurs becomes the execution log to be transferred. In the example shown in FIG. 4, an error occurs at time t2, so the execution log shown from time t0 to time t1 is the execution log to be transferred in the first transfer mode, and the execution log shown from time t1 to time t2 is not the execution log to be transferred in the first transfer mode.

[0037] As in-vehicle software becomes more sophisticated, the amount of data in the software execution logs generated by the processor 211 becomes extremely large, and so it becomes necessary to write a large amount of the execution logs to the memory 214. On the other hand, the transfer speed of the execution logs from the memory 214 to the log analysis device 10 is limited depending on the communication protocol of the network 40, such as a mobile communication system. In other words, if the writing speed of the execution logs to the memory 214 is faster than the transfer speed of the execution logs from the memory 214, it should be noted that there is a possibility that the execution logs required for analysis will be overwritten by new execution logs and deleted before they are transferred from the memory 214.

[0038] However, in the first transfer mode, the log transfer control unit 216 writes the trace log and the execution log from the data recorder 213 to the memory 214, while transferring the trace log and the execution log from the memory 214 to the log analysis device 10. At this time, the log transfer control unit 216 does not transfer all of the execution logs stored in the memory 214, but transfers only the execution logs specified by the transfer log designation information. As a result, the amount of data of the transferred execution logs is reduced, and the execution logs specified by the transfer log designation information can be transferred from the memory 214 to the log analysis device 10 without any omissions.

[0039] 4, the execution log specified by the transfer log designation information is only the first execution log included in each execution log set, but this is not limited to this. For example, the transfer log designation information may be set to designate the first and second execution logs included in each set as the execution logs to be transferred. In this case, the number of execution logs to be transferred may be determined taking into account the amount of data of the collected execution logs, the storage capacity of memory 214, the writing speed to memory 214, the transfer speed from memory 214, etc.

[0040] Furthermore, the execution log specified by the transfer log specification information may be set to be different for each ID assigned to the execution log group. For example, the transfer log specification information may be set so that in an execution log set including an execution log group assigned ID1, the first execution log is specified as the execution log to be transferred, and in an execution log set including an execution log group assigned ID2, the second execution log is specified as the execution log to be transferred.

[0041] As will be described in detail later, the execution log specified by the transfer log designation information can be set differently depending on the semiconductor device 2 mounted on the vehicle 20. In this embodiment, four semiconductor devices 21-24 are mounted on each of the vehicles 201-204. For example, the transfer log designation information of the semiconductor device 21 designates the first execution log. The transfer log designation information of the semiconductor device 22 designates the second execution log. The transfer log designation information of the semiconductor device 23 designates the third execution log. The transfer log designation information of the semiconductor device 24 designates the fourth execution log.

[0042] When an error occurrence notification is received, the log transfer control unit 216 controls log transfer in the second transfer mode. As described above, when an error occurrence notification is received, the log transfer control unit 216 prohibits writing of trace logs and execution logs from the data recorder 213 to the memory 214. When the log transfer control unit 216 selects the second transfer mode, it reads out the trace logs and execution logs from the memory 214, which is write-prohibited, and transfers the read trace logs and execution logs to the log analysis device 10 in response to a log transfer request sent from the log analysis device 10.

[0043] In the second transfer mode, writing to the memory 214 is prohibited, so that the execution logs stored in the memory 214 are not overwritten by the writing of new execution logs. In other words, the log transfer control unit 216 can transfer all of the execution logs stored in the memory 214 to the log analysis device 10 without taking into consideration the difference between the speed at which the execution logs are written to the memory 214 and the speed at which the execution logs are transferred from the memory 214.

[0044] Next, the configuration of the log analysis device 10 will be described. Fig. 5 is a block diagram showing the configuration of the log analysis device 10. The log analysis device 10 is connected to the semiconductor device 2 via a network 40, and is configured to enable data communication between the log analysis device 10 and the semiconductor device 2. As shown in Fig. 5, the log analysis device 10 includes a log data storage unit 11, an error type identification unit 12, an execution flow identification unit 13, an analysis data generation unit 14, and a debug execution unit 15.

[0045] The log analysis device 10 can be realized by, for example, a computer that can access the network 40. The computer includes a processor and a memory that stores a program. The processor of the computer executes the program stored in the memory to realize all or part of the functions of the log analysis device 10.

[0046] The log data storage unit 11 is configured to store an execution log set (trace log and execution log) transferred from the semiconductor device 2 via the network 40. The trace log and execution log transferred from the semiconductor device 21 are also referred to as a trace log 21 and an execution log 21, and the trace log 21 and the execution log 21 are also collectively referred to as a log 21. The same applies to the trace log and the execution log transferred from the semiconductor device 22-24. Therefore, the log data storage unit 11 stores the log 21-24 (the trace log 21-24 and the execution log 21-24) transferred from the semiconductor device 21-24.

[0047] As described above, the log transfer control unit 216 of the semiconductor device 2 switches the transfer method of the execution logs between the first transfer mode and the second transfer mode. In the second transfer mode, in other words, when an error occurs, all of the execution logs stored in the memory 214 of the semiconductor device 2 are transferred to the log analysis device 10. On the other hand, in the first transfer mode, in other words, when no error occurs, only a portion of the execution logs stored in the memory 214 of the semiconductor device 2 are transferred to the log analysis device 10.

[0048] The error type identification unit 12 receives error information transmitted from the semiconductor device 2 via the network 40. As described above, the error information includes information for identifying the semiconductor device 2 in which the error has occurred, information for identifying the type of the error that has occurred, etc. The error type identification unit 12 refers to the error information to identify the semiconductor device 2 in which the error has occurred and the type of the error that has occurred, and classifies the semiconductor device 2 in which the error has occurred according to the type of error.

[0049] For example, suppose that errors have occurred in all of the semiconductor devices 21-24, but the type of error that occurred in the semiconductor devices 21 and 22 is different from the type of error that occurred in the semiconductor devices 23 and 24. In this case, the error type identification unit 12 classifies the semiconductor devices 21-24 into two groups: a group of the semiconductor devices 21 and 22 and a group of the semiconductor devices 23 and 24.

[0050] The log analysis device 10 can analyze the cause of an error for each execution log transferred from the semiconductor device 2 classified into the same group by the error type identification unit 12. The error type identification unit 12 generates information for classifying the semiconductor device 2 according to the type of error as first analysis log information. In the example described above, the error type identification unit 12 generates first analysis log information indicating that the semiconductor devices 21 and 22 are classified into the same group and the semiconductor devices 23 and 24 are classified into a group different from the group of the semiconductor devices 21 and 22.

[0051] The execution flow identification unit 13 is connected to the log data storage unit 11 and is configured to be able to reference the trace logs stored in the log data storage unit 11. The execution flow identification unit 13 is also connected to the error type identification unit 12 and receives first analysis log information. Based on the first analysis log information, the execution flow identification unit 13 identifies semiconductor devices 2 that belong to the same group, accesses the log data storage unit 11, and references the IDs included in the trace logs transferred from the identified semiconductor devices 2. Based on the IDs in the referenced trace logs, the execution flow identification unit 13 checks the order of the IDs, i.e., the processing order of the execution logs. This allows the execution flow identification unit 13 to identify the execution flow of the processing performed by each semiconductor device 2.

[0052] Note that the processing executed by the processor 211 of the semiconductor device 2 includes processing related to a conditional branch. The processing executed after the processing related to the conditional branch varies depending on the result of the conditional branch. Therefore, when processing related to a conditional branch is included in the processing executed by the processor 211, the execution flows of the processing executed by the semiconductor devices 21-24 do not necessarily match even if the same error occurs.

[0053] Figure 6 is a diagram illustrating the difference in execution flow caused by processing related to a conditional branch. In the example shown in Figure 6, the processing corresponding to the trace log containing ID3 is processing related to the conditional branch. Note that here, the processing corresponding to the execution log group identified by ID3 is also referred to as the processing of ID3. The same applies to processing corresponding to execution log groups identified by IDs other than ID3.

[0054] 6, after the conditional branch of ID3, the process flowchart branches into a flow for executing ID4 and a flow for executing ID6. Therefore, the execution flow of the process executed by the processor 211 is either execution flow A, which includes ID4, or execution flow B, which includes ID6. The execution flow identification unit 13 checks the order of the IDs included in the trace log 21-24 transferred from the semiconductor device 21-24, thereby identifying execution flow B, which is the process executed by the semiconductor device 21, and execution flow A, which is the process executed by the semiconductor device 22-24.

[0055] After identifying the execution flows for all semiconductor devices 2 classified into the same group, the execution flow identification unit 13 further classifies the semiconductor devices 2 based on differences in their execution flows. In the example of FIG. 6, the semiconductor devices 2 are divided into two groups, one for semiconductor device 21 and the other for semiconductor devices 22-24, based on the same execution flow. The execution flow identification unit 13 generates second analysis log information to further classify the semiconductor devices 2 based on their execution flows. In other words, the second analysis log information serves as information for classifying the semiconductor devices 2 based on the type of error and differences in their execution flows.

[0056] It goes without saying that the execution flow identified by the execution flow identification unit 13 may be only a portion of the entire execution flow, since it is highly likely that no execution log will exist that completely matches the entire execution flow of the processes executed by the semiconductor device 2. The execution flow identification unit 13 can classify the semiconductor device 2 according to a specific pattern contained in the execution flow.

[0057] Returning to Figure 5, we will continue to explain the configuration of the log analysis device 10. The analysis data generation unit 14 is connected to the log data storage unit 11 and can read out the trace logs and execution logs stored in the log data storage unit 11. The analysis data generation unit 14 is also connected to the execution flow identification unit 13 and receives second analysis log information. Based on the second analysis log information, the analysis data generation unit 14 reads out from the log data storage unit 11 the trace logs and execution logs transferred from the semiconductor devices 2 that have been sorted into the same group based on differences in error type and execution flow, and generates analysis data for analyzing the cause of the error.

[0058] While the log transfer control unit 216 of the semiconductor device 2 is controlling log transfer in the first transfer mode, not all execution logs are transferred. Therefore, the analysis data generation unit 14 generates analysis data consisting of execution logs on the execution flow identified based on the second analysis log information by supplementing the missing parts of the execution logs transferred from one semiconductor device 2 with execution logs transferred from other semiconductor devices 2 in the same group. In other words, the analysis data is generated by combining execution logs transferred from semiconductor devices 2 related to the same execution flow.

[0059] 7 is a diagram illustrating analysis data generated by combining execution logs 21-24 transferred in the first transfer mode from semiconductor devices 21-24 associated with the same execution flow. FIG. 7 illustrates the logs 21-24 (trace logs 21-24 and execution logs 21-24) transferred in the first transfer mode from each of the semiconductor devices 21-24. Each execution log set contains four execution logs. In this example, during the period in which log transfer is performed in the first transfer mode, the semiconductor device 21 transfers the first execution log of the four execution logs included in each execution log set. The semiconductor device 22 transfers the second execution log of the four execution logs included in each execution log set, the semiconductor device 23 transfers the third execution log of the four execution logs included in each execution log set, and the semiconductor device 24 transfers the fourth execution log of the four execution logs included in each execution log set.

[0060] 7 shows an example in which analysis data is generated by combining four execution logs included in the execution log set for ID1, the execution log set for ID2, and the execution log set for IDn, all of which were transferred in the first transfer mode from semiconductor devices 21-24. For example, the analysis data generation unit 14 references the trace log including ID1 and extracts the first execution log included in the execution log set for ID1 transferred from semiconductor device 21, the second execution log included in the execution log set for ID1 transferred from semiconductor device 22, the third execution log included in the execution log set for ID1 transferred from semiconductor device 23, and the fourth execution log included in the execution log set for ID1 transferred from semiconductor device 24. The analysis data generation unit 14 combines the trace log and the extracted four execution logs to generate the execution log set for ID1 as analysis data.

[0061] In this way, the analysis data generation unit 14 references the IDs included in the trace logs and extracts each of the execution logs included in the same execution log set from the execution logs transferred from the semiconductor devices 21-24 in the first transfer mode. The analysis data generation unit 14 combines the extracted multiple execution logs into an execution log included in a single execution log set. The analysis data generation unit 14 generates analysis data including an execution log set consisting of the trace logs and the combined execution logs.

[0062] The analysis data generation unit 14 also identifies the processing order of the execution logs based on the timestamps assigned to the trace logs and the execution logs, and combines the execution logs according to the identified processing order. The analysis data generation unit 14 calculates the offset time of the execution logs as the difference between the timestamp assigned to the trace log and the timestamp assigned to the execution logs included in the same execution log set as the trace log. This offset time calculation is performed for all execution logs to be combined. The analysis data generation unit 14 identifies the processing order of the execution logs transferred from the semiconductor devices 21-24 by comparing the calculated offset times of the execution logs, and combines the execution logs included in the same execution log set according to the identified processing order.

[0063] FIG. 8 is a diagram illustrating a method for combining the execution logs 21-24 transferred in the first transfer mode using timestamps added to the logs 21-24 (trace logs 21-24 and execution logs 21-24). FIG. 8 shows only one section of the execution flow, i.e., only the execution log set with IDn. Furthermore, among the execution logs 21-24, the execution logs transferred in the first transfer mode are those marked with numbers. For example, the execution log marked with the number 1 is the execution log transferred from the semiconductor device 21 in the first transfer mode. In the one section shown in FIG. 8, five execution logs 21, five execution logs 22, four execution logs 23, and five execution logs 24 are transferred.

[0064] The analysis data generation unit 14 calculates the offset time of the execution log as the difference between the time stamp assigned to the trace log 21 of IDn and the time stamp assigned to each of the five execution logs 21 included in the same execution log set as the trace log 21. The analysis data generation unit 14 also calculates the offset times of the execution logs for the five execution logs 22 included in the same execution log set as the trace log 22 of IDn, the four execution logs 23 included in the same execution log set as the trace log 23 of IDn, and the five execution logs 24 included in the same execution log set as the trace log 24 of IDn. The analysis data generation unit 14 compares the calculated offset times of the execution logs to determine the processing order of the execution logs, and combines the execution logs according to this processing order.

[0065] It should be noted that if multiple types of errors occur in the semiconductor device 2, or if the same error occurs in the semiconductor device 2 but the processing execution flows are different, there will be multiple groups into which the semiconductor device 2 is classified. Since the analysis of the cause of the error can be performed for each group into which the semiconductor device 2 is classified, the analysis data generation unit 14 can generate the same number of analysis data as the number of groups into which the semiconductor device 2 is classified, based on the second analysis log information.

[0066] 5, the description of the configuration of the log analysis device 10 will continue. The debug execution unit 15 is connected to the semiconductor device 2 via the network 40. The debug execution unit 15 receives an error occurrence notification transmitted from the semiconductor device 2. In response to the error occurrence notification, the debug execution unit 15 transmits a log transfer request to the semiconductor device 2 that is the sender of the error occurrence notification.

[0067] Furthermore, the debug execution unit 15 transmits transfer log designation information to the semiconductor device 2. However, the transfer log designation information may be stored in advance in the semiconductor device 2. In this case, the debug execution unit 15 may be configured to be able to update the transfer log designation information stored in the semiconductor device 2 in accordance with the execution log included in the analysis data or the analysis result of the cause of the error.

[0068] The debug execution unit 15 is also connected to the analysis data generation unit 14 and receives the analysis data. The debug execution unit 15 analyzes the cause of the error that has occurred based on the trace log and execution log included in the analysis data. The debug execution unit 15 debugs the software executed in the semiconductor device 2 based on the analysis result of the cause of the error. When there are multiple pieces of analysis data, the debug execution unit 15 analyzes the cause of the error for each piece of analysis data and reflects the analysis result in the debugging work of the software.

[0069] In this embodiment, an example has been shown in which the debugging system 1 includes four semiconductor devices 21-24, but the number of semiconductor devices 21-24 is not limited to four. For analyzing the cause of an error, the more semiconductor devices 2 to transfer execution logs, in other words, the more vehicles equipped with the semiconductor devices 2, the more advantageous it is. For example, the log analysis device 10 can analyze a large amount of trace log and execution log data (big data) transferred from semiconductor devices 2 equipped in several tens to several thousand vehicles 20, and debug software.

[0070] Furthermore, depending on the circumstances under which an error occurs, the log analysis device 10 may not be able to collect enough execution logs to analyze the cause of the error. In such cases, the analysis data generated by the analysis data generation unit 14 may lack some of the execution logs that constitute a specific execution flow that caused a specific error, which may result in a decrease in the efficiency of the analysis of the cause of the error performed by the debug execution unit 15. Therefore, it is possible to make up for the missing execution logs by re-collecting the execution logs that constitute a specific execution flow that caused a similar error.

[0071] For example, suppose that analysis data is generated based on the execution logs transferred from the semiconductor devices 21 and 22 among the semiconductor devices 21-24, but the execution logs transferred from the semiconductor devices 21 and 22 alone are not enough to collect all the execution logs in the execution flow. If the debug execution unit 15 determines that the execution logs included in the analysis data are insufficient, it updates the transfer log designation information of the semiconductor devices 21 and 22 to compensate for the missing execution logs. That is, the transfer log designation information is changed to designate execution logs different from the previous information. The debug execution unit 15 transmits the updated transfer log designation information to the semiconductor devices 21 and 22. From the next time onwards, the semiconductor devices 21 and 22 transfer their execution logs in the first transfer mode based on the updated transfer log designation information. This makes it possible to collect the execution logs necessary to analyze the cause of an error, thereby improving the efficiency of the error cause analysis performed by the debug execution unit 15.

[0072] In the above example, it has been explained that the transfer log designation information is updated only for the semiconductor devices 21 and 22 that have a history of errors occurring in the past, but since there is still a possibility that missing execution logs can be collected from the semiconductor devices 23 and 24, the transfer log designation information may be updated not only for the semiconductor devices 21 and 22 but also for the semiconductor devices 23 and 24. In this case, although there is a possibility that the transfer of execution logs that are not necessary for analyzing the cause of the error may put a strain on the data communication bandwidth, the probability of quickly collecting the execution logs necessary for error analysis increases.

[0073] Next, the operation of the semiconductor device 2 according to this embodiment will be described. Fig. 9 is a flowchart showing an example of the operation of the semiconductor device 2 according to this embodiment. The flowchart in Fig. 9 includes 10 processing steps including steps S101 to S110. As shown in Fig. 9, first, in step S101, the processor 211 determines whether or not the target software is being executed. Since a large amount of software is executed in the semiconductor device 2, in step S101, it is confirmed whether or not the software to be debugged is being executed.

[0074] In step S101, if it is determined that the target software is being executed (YES in step S101), the processor 211 performs multiple processes based on the execution of the target software and generates a trace log including an execution log corresponding to each of the multiple processes and an ID for identifying the execution log (step S102).

[0075] On the other hand, if it is not determined in step S101 that the target software is being executed (NO in step S101), the processor 211 waits in step S101 until the execution of the target software starts.

[0076] Next, in S103, the data recorder 213 assigns a timestamp to the trace log and the execution log, and stores the timestamped trace log and the execution log in the memory 214.

[0077] Next, in step S104, the ECM 215 determines whether an error has occurred during execution of the target software.

[0078] If it is determined in step S104 that an error has occurred during execution of the target software (YES in step S104), the ECM 215 generates an error occurrence notification and error information (step S105) and transmits them to the log analysis device 10. At this time, in response to receiving the error occurrence notification, the log analysis device 10 transmits a log transfer request to the target semiconductor device 2.

[0079] Next, in step S106, the log transfer control unit 216 prohibits the writing of the trace log and the execution log to the memory 214 in response to the error occurrence notification.

[0080] Next, in step S107, the log transfer control unit 216 determines whether or not a log transfer request has been received from the log analysis device 10.

[0081] If it is determined in step S107 that a log transfer request has been received from the log analysis device 10 (YES in step S107), the log transfer control unit 216 transfers the trace log and the execution log stored in the memory 214 to the log analysis device 10 in the second transfer mode (step S108). Step S108 marks the end of a series of operations of the semiconductor device 2 shown in FIG.

[0082] On the other hand, if it is not determined in step S107 that a log transfer request has been received from the log analysis device 10 (NO in step S107), the log transfer control unit 216 waits in step S107 until it is determined that a log transfer request has been received.

[0083] Also, if it is determined in step S104 that no error has occurred during execution of the target software (NO in step S104), the log transfer control unit 216, in the first transfer mode, reads out the trace log and at least one execution log contained in each execution log set from the memory 214 based on the transfer log designation information, and transfers them to the log analysis device 10 (step S109).

[0084] Finally, in step S110, the processor 211 determines whether the target software has finished.

[0085] If it is determined in step S110 that the target software has finished (YES in step S110), the series of operations of the semiconductor device 2 shown in FIG. 9 ends.

[0086] On the other hand, if it is not determined in step S110 that the target software has finished (NO in step S110), the semiconductor device 2 returns to the operation of step S102.

[0087] Next, the operation of the log analysis device 10 according to this embodiment will be described. FIG. 10 is a flowchart showing an example of the operation of the log analysis device 10 according to this embodiment. The flowchart in FIG. 10 includes five processing steps, including steps S201-S205. As shown in FIG. 10, first, in step S201, the log data storage unit 11 stores the execution log sets (trace logs and execution logs) transferred from the semiconductor device 2. More specifically, during a period in which the semiconductor device 2 performs log transfer in the second transfer mode, the log data storage unit 11 receives the trace logs and all of the execution logs included in each execution log set from the semiconductor device 2 and stores them. Furthermore, during a period in which the semiconductor device 2 performs log transfer in the first transfer mode, the log data storage unit 11 receives the trace logs and at least one execution log included in each execution log set from the semiconductor device 2 and stores them.

[0088] Next, in step S202, the error type identification unit 12 refers to the error information received from the semiconductor device 2 to identify the type of error that has occurred in the semiconductor device 2. The error type identification unit 12 classifies the semiconductor device 2 in which the error has occurred according to the identified type of error, and generates information for classifying the semiconductor device 2 according to the type of error as first analysis log information.

[0089] Next, in step S203, the execution flow identification unit 13 identifies semiconductor devices 2 that have been grouped according to the error type based on the first analysis log information generated by the error type identification unit 12. The execution flow identification unit 13 then accesses the log data storage unit 11 and references the IDs included in the trace logs transferred from the identified semiconductor devices 2. Based on the IDs in the referenced trace logs, the execution flow identification unit 13 checks the order of the IDs, i.e., the processing order of the execution logs. This allows the execution flow identification unit 13 to identify the execution flow of the processes executed by each semiconductor device 2. The execution flow identification unit 13 then generates second analysis log information to classify semiconductor devices 2 according to differences in error type and execution flow.

[0090] Next, in step S204, the analysis data generation unit 14 generates analysis data for analyzing the cause of the error by combining trace logs and execution logs transferred from semiconductor devices 2 classified into the same group according to the error type and execution flow differences, based on the second analysis log information generated by the execution flow identification unit 13. The analysis data generation unit 14 supplements missing parts of an execution log transferred from one semiconductor device 2 with execution logs transferred from other semiconductor devices 2 classified into the same group—in other words, by combining execution logs transferred from multiple semiconductor devices 2—to generate analysis data consisting of execution logs on the execution flow identified based on the second analysis log information. The analysis data generation unit 14 combines the execution logs transferred from the multiple semiconductor devices 2 by identifying the processing order of the execution logs based on the timestamps added to the trace logs and execution logs.

[0091] Finally, in step S205, the debug execution unit 15 analyzes the cause of the error that has occurred based on the trace log and the execution log included in the analysis data generated by the analysis data generation unit 14. The debug execution unit 15 debugs the software executed in the semiconductor device 2 based on the analysis result of the cause of the error.

[0092] As described above, the semiconductor device 2 according to this embodiment switches between the first transfer mode and the second transfer mode to transfer the trace logs and execution logs stored in the memory 214 to the log analysis device 10. In particular, in the first transfer mode in which the writing of the execution logs to the memory 214 and the transfer of the execution logs from the memory 214 are simultaneously performed, the semiconductor device 2 does not transfer all of the execution logs stored in the memory 214, but transfers only the execution logs specified by the transfer log specification information. In other words, even if the data writing speed (data collection speed) of the execution logs is higher than the data transfer speed of the execution logs, by appropriately adjusting the data transfer amount of the execution logs according to the difference, it is possible to prevent the execution logs that should be transferred from being overwritten by new execution logs and deleted before being transferred from the memory 214.

[0093] Furthermore, in the first transfer mode, only the execution logs specified by the transfer log specification information are transferred to the log analysis device 10. Therefore, if only the execution logs transferred from one semiconductor device 2 are used, there will be gaps in the execution logs on the execution flow, which may hinder analysis of the cause of the error. However, the log analysis device 10 according to this embodiment combines the execution logs transferred from multiple semiconductor devices 2 to complement the gaps in the execution log transferred from a single semiconductor device 2, thereby generating analysis data consisting of the execution logs on the execution flow where the error occurred. This makes it possible to prepare analysis data covering a long period of time, including a sufficient number of execution logs, and to efficiently perform error analysis and debugging work.

[0094] As autonomous driving technology continues to develop and improve, automotive systems, including those that sense vehicle conditions and control systems based on sensor output, are expected to become increasingly complex, leading to larger in-vehicle software (especially the amount of data used). Therefore, it is easy to imagine that the amount of execution log data required for debugging in-vehicle software will also become enormous, and the causes of errors will also become more complex. In other words, the execution log data temporarily stored in memory 214 when an error occurs will not be sufficient for efficient error analysis, and it is likely that there will be many situations in which longer execution log data will be required. Therefore, it is expected that debugging in-vehicle software based on long-term analysis data generated by distributing and collecting huge amounts of execution logs from semiconductor devices installed in many vehicles, as in the debugging system 1 disclosed herein, will become increasingly useful in the future.

[0095] In the debugging system 1 according to this embodiment, a storage area on the cloud can also be used to transfer trace logs and execution logs. In this case, the semiconductor device 2 uploads the trace logs and execution logs to the storage area on the cloud. The log analysis device 10 downloads the trace logs and execution logs uploaded to the storage area on the cloud and stores the downloaded trace logs and execution logs in the log data storage unit 11.

[0096] Furthermore, although the semiconductor device 2 according to the present embodiment has been described as including one processor 211, the number of processors 211 included in the semiconductor device 2 is not limited to one. Furthermore, the semiconductor device 2 does not need to be configured as one semiconductor chip or one semiconductor device. For example, the memory 214 may be an external storage device.

[0097] Although the execution flow identification unit 13 according to the present embodiment has been described as classifying semiconductor devices 2 according to differences in execution flows, this is not limiting. In addition to differences in execution flows, the execution flow identification unit 13 can also classify semiconductor devices 2 based on information such as processing time, various parameter values, and memory space usage.

[0098] The invention made by the inventor has been specifically described above based on the embodiments, but it goes without saying that the present invention is not limited to the embodiments already described, and various modifications are possible within the scope of the gist of the invention.

[0099] As described above, some or all of the functions of the log analysis device 10 can be realized by causing the CPU to execute a computer program. The same is true for some or all of the functions of the semiconductor device 2.

[0100] The above-described program includes a set of instructions (or software code) that, when loaded into a computer, causes the computer to perform one or more functions described in the embodiments. The program may be stored in a non-transitory computer-readable medium or a tangible storage medium. By way of example and not limitation, computer-readable media or tangible storage media include random access memory (RAM), read-only memory (ROM), flash memory, solid-state drives (SSD) or other memory technologies, CD-ROMs, digital versatile discs (DVDs), Blu-ray discs or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices. The program may also be transmitted on a transitory computer-readable medium or a communication medium. By way of example and not limitation, transitory computer-readable media or communication media include electrical, optical, acoustic, or other forms of propagated signals. [Explanation of symbols]

[0101] 1 Debugging System 10 Log analysis device 11 Log data storage section 12 Error type identification part 13 Execution flow identification part 14 Analysis data generation unit 15 Debug execution unit 2, 21-24 Semiconductor Devices 201-204 vehicles 211 processor 212, 214 memory 213 Data Recorder 215 Error Control Module 216 Log transfer control section 40 Network

Claims

1. a first semiconductor device mounted on a first vehicle; a second semiconductor device mounted on a second vehicle; a log analysis device that performs data communication with each of the first and second semiconductor devices via a network; Equipped with Each of the first and second semiconductor devices is a processor that executes software to perform a series of related processes and generates a trace log and a number of execution logs in response to the series of related processes; a data recorder that assigns a timestamp to each of the trace log and the plurality of execution logs; a memory for storing the trace log and a plurality of execution logs to which the timestamp is added; a log transfer control unit that transfers at least one of the trace log and the plurality of execution logs stored in the memory to the log analysis device based on transfer log designation information; and the plurality of execution logs include a first execution log and a second execution log; The log analysis device receiving the trace log and the first execution log from the first semiconductor device; receiving the trace log and the second execution log from the second semiconductor device; Identifying a processing order of the first execution log and the second execution log based on timestamps assigned to the trace logs from the first and second semiconductor devices, the first execution log, and the second execution log; combining the first and second execution logs in accordance with the specified processing order to generate analysis data; Analyzing the cause of the error using the analysis data. Debug system.

2. 2. The debugging system of claim 1, the transfer log designation information of the first semiconductor device designates the first execution log as an execution log to be transferred from the first semiconductor device to the log analysis device; the transfer log designation information of the second semiconductor device designates the second execution log as an execution log to be transferred from the second semiconductor device to the log analysis device; Debug system.

3. 3. The debugging system of claim 2, The log analysis device updating transfer log designation information used in the first or second semiconductor device according to an analysis result of an execution log or an error cause included in the analysis data; transmitting the updated transfer log designation information to the first or second semiconductor device; Debug system.

4. 2. The debugging system of claim 1, The log analysis device calculating a difference between a time stamp added to the trace log from the first semiconductor device and a time stamp added to the first execution log as an offset time of the first execution log; calculating a difference between a time stamp added to the trace log from the second semiconductor device and a time stamp added to the second execution log as an offset time of the second execution log; identifying a processing order of the first execution log and the second execution log by comparing the calculated offset times of the first and second execution logs; Debug system.

5. 2. The debugging system of claim 1, the transfer log designation information is information for designating which of the execution logs included in the plurality of execution logs stored in the memory is to be transferred to the log analysis device, the number of execution logs to be transferred, which is specified by the transfer log specification information, is determined based on a data write speed to the memory and a data transfer speed from the memory to the log analysis device. Debug system.

6. 2. The debugging system of claim 1, When generating the trace log, the processor includes identification information for identifying the plurality of execution logs in the trace log. Debug system.

7. 2. The debugging system of claim 1, each of the first and second semiconductor devices further includes an error control module that determines whether an error occurs during execution of the software; the error control module generates an error occurrence notification when it determines that an error has occurred during execution of the software; the log transfer control unit prohibits writing of the trace log and the execution log to the memory when the error occurrence notification is received. Debug system.

8. 8. The debug system of claim 7, the error control module monitors a plurality of execution logs generated by the processor and checks whether any of a plurality of registered errors has occurred, thereby determining whether an error has occurred during the execution of the software; Debug system.

9. 8. The debug system of claim 7, The log transfer control unit switching between a first transfer mode and a second transfer mode to control data transfer from the memory to the log analysis device; If the error occurrence notification has not been received, the first transfer mode is selected; When the error occurrence notification is received, the second transfer mode is selected; When the first transfer mode is selected, the trace log and at least one execution log among the plurality of execution logs stored in the memory are transferred to the log analysis device based on the transfer log designation information; When the second transfer mode is selected, the trace log and the plurality of execution logs stored in the memory are transferred to the log analysis device. Debug system.

10. 10. The debugging system of claim 9, In the second transfer mode, the trace log and the plurality of execution logs transferred to the log analysis device are those stored in the memory before writing to the memory is prohibited based on the error occurrence notification. Debug system.

11. 10. The debugging system of claim 9, when it is determined that an error has occurred during execution of the software, the error control module generates error information including information for identifying the semiconductor device in which the error has occurred and information for identifying the type of the error that has occurred; The processor: When generating the trace log, identification information for identifying the plurality of execution logs is included in the trace log; generating a plurality of execution log sets including a trace log and a plurality of execution logs generated in accordance with a series of a plurality of related processes; the data recorder assigns a timestamp to each of the trace logs and the plurality of execution logs included in each execution log set; the memory stores a plurality of execution log sets each including a trace log and a plurality of execution logs to which the timestamps are assigned; The log transfer control unit In the first transfer mode, the plurality of execution log sets, each of which includes the trace log and at least one execution log among the plurality of execution logs, are transferred from the memory to the log analysis device based on the transfer log designation information; In the second transfer mode, the plurality of execution log sets, each including the trace log and the plurality of execution logs, are transferred from the memory to the log analysis device. Debug system.

12. 12. The debugging system of claim 11, The log analysis device a log data storage unit for storing the plurality of execution log sets transferred from the first and second semiconductor devices in the first and second transfer modes; an error type identification unit that generates first analysis log information for distinguishing the first and second semiconductor devices according to the type of error; an execution flow identification unit that generates second analysis log information for distinguishing the first and second semiconductor devices according to the type of error and the difference in the execution flow; an analysis data generation unit that generates the analysis data; a debug execution unit that analyzes the cause of the error using the analysis data; and The error type identification unit Identifying the type of error occurring in the first and second semiconductor devices by referring to the error information transmitted from the first and second semiconductor devices; classifying the first and second semiconductor devices according to the type of the identified error and generating the first analysis log information; The execution flow identification unit: When the first analysis log information indicates that the first and second semiconductor devices are to be classified into the same group, the log data storage unit is accessed, and identification information of trace logs included in a plurality of execution log sets transferred from the first and second semiconductor devices is referenced; confirming a processing order of an execution log based on identification information of the referenced trace log, and specifying an execution flow of processing to be executed in each of the first and second semiconductor devices; classifying the first and second semiconductor devices according to the identified difference in execution flow to generate the second analysis log information; The analysis data generation unit When the second analysis log information indicates that the first and second semiconductor devices are to be classified into the same group, reading out a plurality of execution log sets transferred from the first and second semiconductor devices from the log data storage unit; Identifying a processing order of the first execution log and the second execution log based on timestamps assigned to the trace logs, the first execution log, and the second execution log included in each of the read execution log sets; combining the first and second execution logs in accordance with the specified processing order to generate the analysis data; Debug system.

13. 2. The debugging system of claim 1, a storage area on a cloud used for transferring a trace log and an execution log from the log transfer control unit to the log analysis device; the log transfer control unit uploads the trace log and the execution log to be transferred to the log analysis device to a storage area on the cloud; the log analysis device downloads the trace log and the execution log uploaded by the log transfer control unit from the storage area on the cloud; Debug system.

14. A log analysis method executed in a debugging system including a first semiconductor device mounted on a first vehicle, a second semiconductor device mounted on a second vehicle, and a log analysis device that performs data communication with each of the first and second semiconductor devices via a network, a first processing step using each of the first and second semiconductor devices; a second processing step using the log analysis device, Equipped with The first processing step includes: Executing the software to perform a series of related processes, and generating a trace log and a plurality of execution logs in response to the series of related processes; assigning a timestamp to each of the trace log and the plurality of execution logs; storing the time-stamped trace log and a plurality of execution logs in a memory; transferring at least one of the trace log and the plurality of execution logs stored in the memory to the log analysis device based on transfer log designation information; Having that, the plurality of execution logs include a first execution log and a second execution log; The second processing step includes: receiving the trace log and the first execution log from the first semiconductor device; receiving the trace log and the second execution log from the second semiconductor device; Identifying a processing order of the first execution log and the second execution log based on timestamps assigned to the trace logs from the first and second semiconductor devices, the first execution log, and the second execution log; combining the first and second execution logs in accordance with the specified processing order to generate analysis data; Analyzing the cause of the error using the analysis data. Having that, Log analysis method.

15. The log analysis method according to claim 14, The second processing step includes: calculating a difference between a time stamp added to the trace log from the first semiconductor device and a time stamp added to the first execution log as an offset time of the first execution log; calculating a difference between a time stamp added to the trace log from the second semiconductor device and a time stamp added to the second execution log as an offset time of the second execution log; identifying a processing order of the first execution log and the second execution log by comparing the calculated offset times of the first and second execution logs; [0023] Log analysis method.

16. The log analysis method according to claim 14, The first processing step includes: determining whether an error occurs during execution of the software; generating an error occurrence notification when it is determined that an error has occurred during execution of the software; prohibiting the writing of trace logs and execution logs to the memory based on the error occurrence notification; [0023] Log analysis method.

17. The log analysis method according to claim 16, The first processing step includes: switching between a first transfer mode and a second transfer mode to control data transfer from the memory to the log analysis device; If the error occurrence notification is not generated, the first transfer mode is selected; If the error occurrence notification is generated, the second transfer mode is selected; In the first transfer mode, the trace log and at least one execution log among the plurality of execution logs stored in the memory are transferred to the log analysis device based on the transfer log designation information; In the second transfer mode, the trace log and the plurality of execution logs stored in the memory are transferred to the log analysis device. [0023] Log analysis method.

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