LAMINATE STRUCTURE, pn JUNCTION, SEMICONDUCTOR DEVICE, ELECTRONIC APPARATUS, AND SYSTEM

A laminated structure with a gallium metal oxide film on a carbon-based diamond substrate addresses heat dissipation issues in semiconductor devices, enhancing thermal conductivity and enabling p-type semiconductor layers for improved power devices.

JP2025117480APending Publication Date: 2025-08-12QUALTEC CO LTD
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Patent Information

Application Number
JP2024012353
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-30
Publication Date
2025-08-12

AI Technical Summary

Technical Problem

Semiconductor devices using gallium oxide face challenges with low thermal conductivity leading to poor heat dissipation, complicating manufacturing processes and hindering the development of p-type semiconductors, particularly for normally-off power devices like MOSFETs.

Method used

A laminated structure is created by laminating a crystal film containing gallium metal oxide on a carbon-based diamond substrate, which allows for easy manufacturing and enhances heat dissipation properties.

Benefits of technology

The laminated structure improves heat dissipation and semiconductor characteristics, facilitating the production of semiconductor devices with better thermal conductivity and enabling the fabrication of p-type semiconductor layers for improved power devices.

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Abstract

To provide a laminate structure useful for an oxide semiconductor device etc., having superior heat dissipation and semiconductor characteristics.SOLUTION: A laminate structure that has a crystal film laminated on a crystal substrate directly or via other layers is applied to, for example, a semiconductor device etc., wherein the crystal substrate includes carbon as a principal component, and has a diamond structure, the crystal film includes a metal oxide containing gallium as a principle component, and the crystal film is 1 μm or larger in thickness.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a laminated structure useful for semiconductor devices. [Background technology]

[0002] Semiconductor devices using gallium oxide (Ga2O3), which has a large band gap, are attracting attention as next-generation switching elements that can achieve high voltage resistance, low loss, and high heat resistance, and are expected to be applied to power semiconductor devices such as inverters.

[0003] However, Ga2O3 has a low thermal conductivity, which means that it has poor heat dissipation properties, and when used in semiconductor devices, it can cause problems such as heat generation and high-temperature operation.

[0004] Patent Document 1 describes a manufacturing method in which a crystalline oxide semiconductor film containing a crystalline oxide semiconductor as a main component is laminated on an insulating substrate, a conductive substrate is attached to the crystalline oxide semiconductor film via a conductive adhesive, and then the insulating substrate is removed, and the manufacturing method can industrially advantageously manufacture a conductive laminate structure and a crystalline oxide semiconductor film that are useful for semiconductor devices, particularly vertical elements. However, it is difficult to peel the thin film cleanly from the substrate, and the additional peeling step in the manufacturing process makes the process complicated and costly, and therefore the method is still unsatisfactory. Therefore, a method for producing crystals on a substrate with excellent heat dissipation properties has been eagerly awaited.

[0005] Furthermore, it is difficult to fabricate a p-type semiconductor from Ga2O3, and there are still many challenges to overcome in realizing normally-off power devices, particularly MOSFETs. Solutions to these challenges have been eagerly awaited. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 6647521 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of the present invention is to provide a laminated structure useful for oxide semiconductor devices and the like, which has excellent heat dissipation properties and semiconductor characteristics. [Means for solving the problem]

[0008] As a result of intensive research to achieve the above-mentioned object, the inventors have newly developed a mist CVD apparatus using a guide partition, and by using the mist CVD apparatus using the guide partition, they have succeeded in creating a laminated structure in which a crystal film is laminated on a crystal substrate directly or via another layer, wherein the crystal substrate contains carbon as a main component and has a diamond structure, and the crystal film contains a metal oxide containing gallium as a main component.They have found that the obtained laminated structure can be easily manufactured at low cost, has excellent crystallinity and excellent heat dissipation properties, etc., and is useful for semiconductor devices, etc., and have discovered that such a laminated structure can solve the above-mentioned conventional problems in one fell swoop. Furthermore, after obtaining the above findings, the present inventors conducted further studies and completed the present invention.

[0009] That is, the present invention relates to the following inventions. [1] A laminated structure in which a crystalline film is laminated on a crystalline substrate, either directly or via another layer, characterized in that the crystalline substrate contains carbon as its main component and has a diamond structure, and the crystalline film contains a metal oxide containing gallium as its main component. [2] The laminated structure according to [1], wherein the metal oxide contains gallium as a main component. [3] The laminated structure according to [1], wherein the crystalline film has a β-gallium structure and / or a corundum structure. [4] The laminated structure according to [1], wherein the crystal film has a thickness of 1 μm or more. [5] The crystalline film is 100 μm2 The laminated structure according to [1] above, having an area of at least 1000 m. [6] The laminated structure according to [1], wherein the crystal film has a surface roughness of 50 nm or less. [7] The laminated structure according to [1], wherein the crystalline film is a single crystalline film. [8] The layered structure according to [1], wherein the crystal substrate is diamond. [9] A pn junction in which an n-type semiconductor layer and a p-type semiconductor layer form a pn junction, characterized in that the n-type semiconductor layer contains a metal oxide containing gallium as a main component, and the p-type semiconductor layer has a diamond structure.

[10] The pn junction according to [9], wherein the p-type semiconductor layer contains diamond.

[11] A semiconductor device including a stacked structure, characterized in that the stacked structure is the stacked structure described in [1] above.

[12] The semiconductor device according to

[11] above, which is a power device.

[13] The semiconductor device according to

[11] , which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

[14] An electronic device including a semiconductor device, characterized in that the semiconductor device is the semiconductor device described in

[11] above.

[15] A system including an electronic device, characterized in that the electronic device is the electronic device described in

[14] above. [Effects of the Invention]

[0010] When used in an oxide semiconductor device, the laminated structure of the present invention exhibits the effects of improving heat dissipation and semiconductor characteristics. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic diagram illustrating an example of a film-forming apparatus that can be suitably used in the present invention. [Figure 2] 1 is a diagram schematically illustrating an atomization device preferably used in the present invention. [Figure 3] FIG. 1 is a diagram showing the results of XRD diffraction in Example 1. [Figure 4] FIG. 1 is a diagram showing an EDS image in Example 1. [Figure 5] FIG. 2 is a diagram showing an AFM image in Example 1. [Figure 6] FIG. 1 is a diagram showing the results of XRD diffraction in Example 2. [Figure 7] 1 is a diagram schematically illustrating a preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 8] 1 is a diagram schematically illustrating a preferred example of a high electron mobility transistor (HEMT) of the present invention. [Figure 9] FIG. 1 is a diagram schematically illustrating a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. [Figure 10] 1 is a diagram schematically illustrating a preferred example of a junction field effect transistor (JFET) of the present invention. [Figure 11] 1 is a diagram schematically illustrating a preferred example of an insulated gate bipolar transistor (IGBT) according to the present invention. [Figure 12] FIG. 1 is a diagram schematically illustrating a preferred example of a light-emitting element (LED) of the present invention. [Figure 13] 1 is a diagram schematically illustrating a preferred example of a junction barrier Schottky diode (JBS) of the present invention. [Figure 14] 1 is a schematic cross-sectional side view of an atomization device preferably used in the present invention. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0012] The laminated structure of the present invention is a laminated structure in which a crystalline film is laminated on a crystalline substrate, either directly or via another layer, characterized in that the crystalline substrate contains carbon as a main component and has a diamond structure, and the crystalline film contains a metal oxide containing gallium as a main component. In this specification, "film" can be read as "layer." A "laminated structure" is a structure containing one or more crystalline layers, and may also contain layers other than crystalline layers (e.g., amorphous layers). Furthermore, the crystalline film is preferably a single crystalline layer, but may also be a polycrystalline layer.

[0013] In the present invention, the term "main component" refers to a gallium-containing metal oxide content in the crystal film of 50% or more in terms of composition ratio in the crystal film. In an embodiment of the present invention, the gallium content in the crystal film is preferably 70% or more, more preferably 90% or more, in terms of composition ratio in the crystal film. It is also preferable that the metal oxide contains gallium as a main component. In an embodiment of the present invention, the gallium content in the metal oxide is preferably 70% or more, more preferably 90% or more, in terms of composition ratio in the metal oxide. This preferred range improves the interface with the crystal substrate, leading to improved thermal conductivity and improved semiconductor properties. The crystal film may also contain metals other than gallium. Examples of the other metals include one or more metals selected from Al, Fe, Cr, V, Ti, Rh, Ni, Mg, Si, Ca, Sc, V, Mn, Co, Cu, Zn, Ge, Sr, Y, Zr, Nb, Mo, Pd, Ag, Cd, In, SnSn, Sb, Te, La, Hf, Ta, W, Ir, Ce, and Gd. The atomic ratio of gallium among the metal elements in the crystal film is preferably 0.5 or more. By setting the atomic ratio of gallium within this preferred range, a crystal film with better semiconductor properties can be achieved. Furthermore, in the present invention, the crystal film preferably has a β-gallia structure and / or a corundum structure. This preferred range can improve semiconductor properties.

[0014] In the present invention, the area of the crystal film is 100 μm 2 It is preferable that the area is 100 mm or more. 2 It is more preferable that the crystal film has an area of 1000 mm or more. In the present invention, it is preferable that the crystal film is a single crystal film. If the crystal film has an area within these preferable ranges, it can be used more advantageously as an industrial product.

[0015] The preferred laminated structure described above can be more easily obtained, for example, by using a film-forming apparatus as shown in FIG. 1. The thickness of the crystal film is not particularly limited as long as it does not impede the object of the present invention. However, in the present invention, it is preferably 0.3 μm or more, more preferably 1 μm or more. When the crystal film is used as a semiconductor layer of the semiconductor device, the breakdown voltage of the semiconductor device can be improved. Furthermore, the surface roughness (RMS) of the crystal film is preferably 100 nm or less. By achieving such a preferred thickness or surface roughness, the semiconductor device can be endowed with superior electrical properties, such as breakdown voltage, when the laminated structure is applied to the semiconductor device. The surface roughness (RMS) refers to a value calculated in accordance with JIS B0601 using the surface profile measurement results of a 10 μm square area using an atomic force microscope (AFM).

[0016] Furthermore, the crystal substrate is not particularly limited as long as it does not impede the objectives of the present invention. It may be a known substrate, an insulating substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. When the crystal substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystal structure of the crystal substrate preferably has a diamond structure. Examples of substrates having a diamond structure include single crystal diamond substrates. The single crystal diamond substrate may be a conductive substrate containing a dopant such as boron (B), aluminum (Al), gallium (Ga), indium (In), thallium (Tl), nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), or bismuth (Bi), or may be an insulating substrate. The crystal substrate may have an off-axis angle. According to such a preferred range, ease of manufacture can be further improved, better crystallinity can be achieved, and heat dissipation can be improved, and the crystal substrate can be more easily applied to semiconductor devices, etc.

[0017] In the present invention, a film may be formed directly on the substrate, or other layers such as a layer different from the semiconductor layer (e.g., an n-type semiconductor layer, an n+-type semiconductor layer, an n-type semiconductor layer, etc.), an insulator layer (including a semi-insulator layer), or a buffer layer may be stacked on the substrate, and then the film may be formed on the substrate via the other layers. In particular, a buffer layer is preferably used to reduce the difference in lattice constant between the crystal substrate and the semiconductor layer. Examples of materials constituting the buffer layer include Al2O3, In2O3, Sc2O3, Cr2O3, V2O3, Fe2O3, Co2O3, and mixed crystals thereof.

[0018] The semiconductor layer can be more easily obtained by forming a crystalline film containing a metal oxide containing gallium as a main component and a mixed crystal film thereof using, for example, the film forming apparatus shown in FIG. 1. Furthermore, doping can also be performed appropriately using the film forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and an n-type dopant can be applied by conventional doping methods for oxide semiconductors. Examples of the n-type dopant include germanium (Ge), silicon (Si), tin (Sn), titanium (Ti), zirconium (Zr), vanadium (V), niobium (Nb), and hafnium (Hf). The present invention also encompasses the stacked structure obtained in this manner.

[0019] In the present invention, a pn junction portion in which an n-type semiconductor layer and a p-type semiconductor layer form a pn junction is preferably such that the n-type semiconductor layer contains a metal oxide containing gallium as a main component, and the p-type semiconductor layer has a diamond structure. According to such a preferred range, the semiconductor properties of the metal oxide semiconductor containing gallium and the semiconductor properties of the diamond semiconductor having a diamond structure can be improved while compensating for their respective shortcomings. Furthermore, it is preferable that the p-type semiconductor layer contains diamond. According to such a preferred range, the interface can be improved and the semiconductor properties can be improved. The pn junction portion can be fabricated using known means, for example, by p-doping a diamond crystal substrate or a diamond single crystal film, and then n-doping a gallium oxide crystal substrate or a gallium oxide single crystal film, and then laminating them. Note that in the present invention, it is preferable to n-do the gallium oxide single crystal film using, for example, the film-forming apparatus shown in FIG. 1, since this also makes film formation easier.

[0020] The laminated structure can be used as is or after known processing such as substrate peeling, using known means, for example, in semiconductor devices. Examples of such semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), high electron mobility transistors (HEMTs), metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light-emitting diodes (LEDs). The present invention can be applied to modules incorporating such semiconductor devices, electronic devices incorporating such semiconductor devices, and components thereof. These semiconductor devices are useful for a variety of applications, particularly power devices. Semiconductor devices can be classified into horizontal devices (horizontal devices) in which an electrode is formed on one side of the semiconductor layer, and vertical devices (vertical devices) in which electrodes are formed on both the front and back sides of the semiconductor layer. In the present invention, the semiconductor device can be used in both horizontal and vertical devices.

[0021] Examples of semiconductor devices suitable for use in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. A suitable example in which a crystal layer containing a metal oxide containing gallium as a main component in the crystal film is used as a semiconductor layer will be described below.

[0022] 7 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.

[0023] FIG. 8 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, and a substrate 129.

[0024] 9 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. Note that the p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.

[0025] FIG. 10 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b, and a drain electrode 145c.

[0026] FIG. 11 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0027] (LED) An example of a case where the semiconductor device of the present invention is a light-emitting diode (LED) is shown in Fig. 12. The semiconductor light-emitting device of Fig. 12 has an n-type semiconductor layer 161 on a second electrode 165b, and a light-emitting layer 163 is stacked on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is stacked on the light-emitting layer 163. A translucent electrode 167 that transmits light generated by the light-emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is stacked on the translucent electrode 167. The semiconductor light-emitting device of Fig. 12 may be covered with a protective layer except for the electrode portion.

[0028] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). More specifically, examples include In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or mixed crystals of two or more of these, or doped materials thereof. The translucent electrode can be formed by depositing these materials using known means such as sputtering. After the translucent electrode is formed, it may be subjected to thermal annealing to make the translucent electrode transparent.

[0029] In the semiconductor light-emitting device of FIG. 12, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and current is passed through these electrodes to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, causing the light-emitting layer 163 to emit light.

[0030] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof. The method for forming the electrodes is not particularly limited, and they can be formed on the substrate by a method appropriately selected from wet methods such as printing, spraying, and coating; physical methods such as vacuum deposition, sputtering, and ion plating; and chemical methods such as CVD and plasma CVD, taking into consideration their suitability for the material.

[0031] FIG. 13 shows the main components of a junction barrier Schottky diode (JBS) according to a preferred embodiment of the present invention. The JBS shown in FIG. 13 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+-type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field buffer region 1060. The Schottky electrode 1030 includes metal layers 1030a, 1030b, and 1030c. In the semiconductor device shown in FIG. 13, the outer ends of metal layers 1030a and / or 1030b, which serve as second electrode layers, are positioned outside the outer end of metal layer 1030c, which serves as a first electrode layer. In the semiconductor device shown in FIG. 13, the electric field buffer region 1060 includes at least two electric field buffer regions 1060 in a plane including at least a portion of the second electrode layer that is positioned outside the outer end of the first electrode layer and the outer end of the second electrode. In the semiconductor device of FIG. 13, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.

[0032] 13 may be formed by any known method without particular limitation as long as it does not impede the object of the present invention, such as forming a film by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or directly patterning by printing or the like. [Example]

[0033] Example 1 FIG. 1 shows a preferred embodiment of the film-forming apparatus used in this example. The film-forming apparatus 19 comprises a film-forming sample 20, a sample stage 21, a carrier gas source 22a, a carrier gas source 22b, a flow rate control valve 23a, a flow rate control valve 23b, a film-forming chamber 27, a heater 28, and an atomization device 30. The atomization device 30 comprises a raw material partition wall 24, a raw material liquid to be atomized 24a, an ultrasonically-transmitting substrate 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic-transmitting liquid tank 35, and an ultrasonic-transmitting liquid 36. FIG. 2 shows another preferred embodiment of the film-forming apparatus when the atomization device of the present invention is used as a film-forming atomization stage. The atomization device 30 comprises a raw material partition wall 24, a raw material liquid to be atomized 24a, an ultrasonically-transmitting substrate 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic-transmitting liquid tank 35, and an ultrasonic-transmitting liquid 36. The sample stage 21 is made of quartz, and the surface on which the film-forming sample 20 is placed is inclined relative to the horizontal plane. By fabricating both the film-forming chamber 27 and the sample stage 21 from quartz, impurities originating from the device are prevented from being mixed into the crystalline film formed on the film-forming sample 20. The raw material solution 24a is contained in the mist generating source 24. The guide partition 31 is in contact with the ultrasonic-transmitting substrate 38. Figure 14 is a schematic diagram showing a cross-sectional side view of the atomization device used in the present invention. The atomization device 30 in Figure 14 comprises the raw material partition 24, the ultrasonic-transmitting substrate 24b, the base 24c, the ultrasonic vibrator 26, the guide partition 31, and the ultrasonic-transmitting liquid tank 35. The guide partition 31 is in contact with the ultrasonic-transmitting liquid tank 35. The ultrasonic waves emitted from the ultrasonic vibrator 26 are more efficiently transmitted to the raw material partition 24 by using the guide partition 31.

[0034] Next, a diamond (100) substrate with a square shape measuring 5 mm on a side and an average thickness of 500 μm was placed on sample stage 21 as film-forming sample 20, and heater 28 was operated to raise the temperature inside film-forming chamber 27 to 450°C. Next, flow control valve 23 was opened to supply carrier gas from carrier gas source 22 into film-forming chamber 27. After the atmosphere inside film-forming chamber 27 was thoroughly replaced with carrier gas, the flow rate of the carrier gas was adjusted to 5 L / min. Nitrogen gas was used as the carrier gas.

[0035] Next, ultrasonic vibrator 26 was vibrated at 3.0 MHz, and the vibrations were propagated to raw material solution 24a through ultrasonic transmitter 25a, thereby atomizing raw material solution 24a and generating raw material fine particles. These raw material fine particles were introduced into film formation chamber 27 by carrier gas, where they reacted and formed a crystalline film of Ga2O3 having a β-gallia structure on film formation sample 20 through a CVD reaction on the film formation surface of film formation sample 20. The crystalline film was well formed on the entire substrate of film formation sample 20. The film thickness was 1.6 μm.

[0036] The obtained Ga2O3 crystalline film was measured using an X-ray diffractometer. The XRD diffraction results are shown in Figure 3. As is clear from Figure 3, the obtained crystalline film was a Ga2O3 single crystal film with a β-gallia structure.

[0037] Furthermore, when the surface of the obtained crystalline film was evaluated using EDS, it was found that the crystalline film was 100 μm thick on the entire surface, as shown in FIG. 2 It was found that the pores were formed over an area of more than 100m.

[0038] The surface of the obtained Ga2O3 crystal film was also observed using an atomic force microscope (AFM). The results are shown in Figure 5. As shown in Figure 5, the surface roughness (RMS) based on JIS B0601 was 46.6 nm, indicating excellent surface smoothness.

[0039] Example 2 Film formation was carried out in the same manner as in Example 1, except that the film formation temperature was set to 750°C. The obtained crystalline film was measured using an X-ray diffractometer. Figure 6 shows the XRD diffraction results. As is clear from Figure 6, the obtained crystalline film was a β-Ga2O3 crystalline film. The film thickness was 1.9 μm.

[0040] (Test Example 1) After heating Example 1 of the present invention at 850°C for 20 minutes, the temperature change was measured in the atmosphere using a radiation thermometer "TMHX-CGE2400-0300H4.5." As a result, the surface temperature of Example 1 was 55°C 20 seconds after being taken out into the atmosphere, and 45°C 30 seconds after. In addition, when measurements were taken using Comparative Example 1 in which a β-Ga2O3 crystal film was grown on a c-plane sapphire substrate, the surface temperature was 160°C 20 seconds after being taken out into the atmosphere, 68°C 30 seconds after, and 45°C 90 seconds after. From these results, it can be seen that Example 1 of the present invention has superior heat dissipation properties.

[0041] (Reference example) The semiconductor device is fabricated using a diamond single crystal substrate or diamond single crystal film containing a p-type dopant (e.g., boron) as the p-type semiconductor layer, and a gallium oxide single crystal substrate or gallium oxide single crystal film containing an n-type dopant (e.g., tin, germanium, etc.) as the n-type semiconductor layer. For example, in FIG. 7, the gallium oxide substrate or the gallium oxide single crystal film is used for the n-type semiconductor layer 101a and / or the n+ type semiconductor layer 101b, and the diamond single crystal film is used for the p-type semiconductor layer 102. In FIG. 8, the gallium oxide single crystal film is used for the n-type semiconductor layer 121a with a wide band gap, the n-type semiconductor layer 121b with a narrow band gap, and the n+ type semiconductor layer 121c, and the diamond single crystal substrate or the diamond single crystal film is used for the p-type semiconductor layer 123. In Fig. 9, a gallium oxide substrate is used for the n-type semiconductor layer 131a, gallium oxide single crystal films are used for the first n+ type semiconductor layer 131b and the second n+ type semiconductor layer 131c, and the diamond single crystal film is used for the p-type semiconductor layer 132 and the p+ type semiconductor layer 132a. In Fig. 10, the gallium oxide single crystal film is used for the n-type semiconductor layer 141a and the first n+ type semiconductor layer 141b, the gallium oxide single crystal substrate is used for the second n+ type semiconductor layer 141c, and the diamond single crystal film is used for the p-type semiconductor layer 142. In Fig. 11, the gallium oxide single crystal film is used for the n-type semiconductor layer 151, the n-type semiconductor layer 151a, and the n+ type semiconductor layer 151b, and the diamond single crystal substrate is used for the p-type semiconductor layer 152. In Fig. 12, the gallium oxide single crystal substrate or the gallium oxide single crystal film is used for n-type semiconductor layer 161, and the diamond single crystal film is used for p-type semiconductor layer 162. In Fig. 13, the gallium oxide single crystal film is used for n-type semiconductor layer 1010a, the gallium oxide single crystal substrate is used for n+ type semiconductor layer 1010b, and the diamond single crystal film is used for electric field relaxation region 1060 made of p-type semiconductor. The diamond single crystal film and the like may be produced by known means, for example, by known means such as plasma CVD. [Industrial Applicability]

[0042] The laminated structure of the present invention is suitable for use in, for example, semiconductor devices. [Explanation of symbols]

[0043] 19 Film forming equipment 20 Film sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow control valve 23b Flow control valve 24 Raw material bulkhead 24a Raw material liquid for atomization 24b Ultrasonic transparent base material 24c units 26 Ultrasonic vibrator 27 Film forming room 28 Heater 30 Atomization device 31 Guide bulkhead 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmission fluid tank 36 Ultrasonic transmission fluid 37 Film forming room 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide bandgap n-type semiconductor layer 121b Narrow bandgap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c drain electrode 128 Buffer layer 129 PCB 131a n-type semiconductor layer 131b First n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p-type semiconductor layer 132a p+ type semiconductor layer 134 Gate insulating film 135a gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a n-type semiconductor layer 141b First n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a first electrode 165b second electrode 167 Translucent electrode 169 PCB 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a metal layer 1030b metal layer 1030c metal layer 1060 Electrolytic relaxation region

Claims

1. A laminated structure in which a crystal film is laminated on a crystal substrate, either directly or via another layer, characterized in that the crystal substrate contains carbon as its main component and has a diamond structure, and the crystal film contains a metal oxide containing gallium as its main component.

2. 2. The laminated structure according to claim 1, wherein the metal oxide contains gallium as a main component.

3. 2. The laminated structure according to claim 1, wherein the crystalline film has a β-gallia structure and / or a corundum structure.

4. 2. The laminated structure according to claim 1, wherein the crystal film has a thickness of 1 [mu]m or more.

5. The crystal film is 100 μm 2 2. The laminated structure according to claim 1, having an area of at least 1000 mm.

6. 2. The laminated structure according to claim 1, wherein the surface roughness of the crystal film is 100 nm or less.

7. 2. The laminated structure according to claim 1, wherein the crystalline film is a single crystalline film.

8. 2. The laminate structure according to claim 1, wherein the crystalline substrate is diamond.

9. A pn junction in which an n-type semiconductor layer and a p-type semiconductor layer form a pn junction, characterized in that the n-type semiconductor layer contains a metal oxide containing gallium as a main component, and the p-type semiconductor layer has a diamond structure.

10. The pn junction of claim 9 wherein the p-type semiconductor layer comprises diamond.

11. A semiconductor device including a laminated structure, wherein the laminated structure is the laminated structure according to claim 1.

12. 12. The semiconductor device according to claim 11, which is a power device.

13. 12. The semiconductor device according to claim 11, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

14. 12. An electronic device including a semiconductor device, wherein the semiconductor device is the semiconductor device according to claim 11.

15. A system including an electronic device, wherein the electronic device is the electronic device according to claim 14.

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  • Method for manufacturing a conductive laminated structure

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