Electronic component built-in substrate and manufacturing method for the same
By designing a substrate with flush-fitting resin within and around openings housing electronic components, the excess resin issue is addressed, reducing costs and warping, and ensuring effective connectivity.
Patent Information
- Application Number
- JP2024013702
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-31
- Publication Date
- 2025-08-13
AI Technical Summary
Existing electronic component-embedded substrates have excess filler resin around the periphery of the electronic components, which can lead to increased material costs and potential warping of the substrate.
The substrate design includes a core substrate with openings that house electronic components, where the filling resin is flush with the surface and limited to the opening area, covered by resin layers on both surfaces, reducing the amount of resin used and minimizing warping.
This design reduces the amount of filler resin needed, lowers manufacturing costs, and minimizes substrate warping while maintaining structural integrity and connectivity.
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Figure 2025118394000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a substrate with built-in electronic components and a method for manufacturing such a substrate. [Background technology]
[0002] Patent Document 1 describes a printed wiring board having a core substrate having a conductor pattern on the outermost layer, an electronic component housed in an opening in the core substrate, and resin insulating layers formed on the first and second surfaces of the core substrate. A filling resin different from the resin constituting the resin insulating layer is filled between the electronic component and the inner wall of the opening. The filling resin is filled between the conductor patterns on the second surface. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-67858 Summary of the Invention [Problem to be solved by the invention]
[0004] In an electronic component built-in substrate in which an electronic component is housed in an opening, it is desirable to reduce the amount of filler resin that fills the periphery of the electronic component in the opening. [Means for solving the problem]
[0005] The electronic component-embedded substrate of the present disclosure comprises a core substrate having a first surface and a second surface opposite the first surface, and having openings that open to the first surface and the second surface; an electronic component housed in the opening; a filling resin filled between the opening and the electronic component, which is flush with the first surface on the first surface side and is provided within and around the opening on the second surface side when viewed from the second surface side; a first surface side resin layer covering the electronic component, the first surface, and the filling resin on the first surface side; and a second surface side resin layer covering the second surface and the filling resin on the second surface side.
[0006] The method for manufacturing a substrate with built-in electronic components disclosed herein includes: forming openings in a core substrate having a first surface and a second surface opposite the first surface, the openings opening into the first surface and the second surface; accommodating an electronic component in the opening; filling a filling resin between the opening and the electronic component, the filling resin being flush with the first surface on the first surface side and being disposed within and around the opening on the second surface side when viewed from the second surface side; forming a first surface-side resin layer that covers the electronic component, the first surface, and the filling resin on the first surface side; and forming a second surface-side resin layer that covers the second surface and the filling resin on the second surface side.
[0007] According to the embodiment of the present disclosure, in an electronic component built-in substrate in which an electronic component is housed in an opening, the amount of filler resin that fills the periphery of the electronic component in the opening can be reduced. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a cross-sectional view showing an electronic component built-in substrate according to a first embodiment of the present disclosure. [Figure 2] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 3] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 4] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 5] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 6] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 7] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 8] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 9] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 10] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 11] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 12] 5A to 5C are cross-sectional views illustrating an example of a manufacturing process for an electronic component-embedded substrate according to the first embodiment of the present disclosure. [Figure 13] FIG. 10 is a cross-sectional view showing an electronic component built-in substrate according to a second embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, an example of an embodiment of the present disclosure will be described in detail with reference to the drawings.
[0010] Components indicated by the same reference numerals in each drawing are the same or similar components. Duplicate descriptions and reference numerals in the embodiments described below may be omitted. All drawings used in the following description are schematic. The dimensional relationships, ratios, etc. of each element shown in the drawings do not necessarily match those in reality. The dimensional relationships, ratios, etc. of each element do not necessarily match between multiple drawings.
[0011] [First embodiment] 1 is a cross-sectional view showing an embodiment of an electronic component built-in substrate 10. Electronic component built-in substrate 10 has a core substrate 11, a resin insulating layer 21, and a conductor pattern 22. Core substrate 11 has a first surface 11F on the front side and a second surface 11S on the back side, i.e., the side opposite first surface 11F.
[0012] The resin insulating layer 21 is formed on the first surface 11F of the core substrate 11 and on the second surface 11S.
[0013] The conductive patterns 22 are formed on the resin insulating layer 21. Furthermore, a solder resist layer 26 is formed on the outermost conductive pattern 22.
[0014] The core substrate 11 has an insulating base material 13K. In the example shown in Fig. 1, the insulating base material 13K is a single layer. However, a plurality of insulating base materials 13K may be arranged in layers.
[0015] Conductive pattern 12 is formed on insulating base material 13K on the outer surface in the thickness direction of core substrate 11. In the example shown in Fig. 1, the thickness of conductive pattern 12 on the first surface 11F side is approximately the same as the thickness of conductive pattern 22 on the second surface 11S side. The thickness of conductive pattern 12 on the first surface 11F side may be different from the thickness of conductive pattern 22 on the second surface 11S side.
[0016] An opening 11A is formed in the core substrate 11. The opening 11A penetrates the core substrate 11 in the thickness direction. The opening 11A is open to the first surface 11F and the second surface 11S.
[0017] The opening 11A accommodates an electronic component 80. There is no particular limitation on the type of the electronic component 80. The electronic component 80 is, for example, a chip capacitor.
[0018] The surface of electronic component 80 arranged on first surface 11F side is referred to as first component surface 80F of electronic component 80. The surface of electronic component 80 arranged on second surface 11S side is referred to as second component surface 80S of electronic component 80.
[0019] The electronic component 80 has terminals 81F on a first component surface 80F thereof, and terminals 81S on a second component surface 80S thereof.
[0020] The height L1 of the external dimension of electronic component 80 is shorter than the thickness T2 of core substrate 11. The height L1 of the external dimension of electronic component 80 is the length from the outer surface of terminal 81F to the outer surface of terminal 81S. The thickness T2 of core substrate 11 is the length from conductive pattern 12 on first surface 11F to conductive pattern 12 on second surface 11S.
[0021] An outer width W1 of electronic component 80 is shorter than an opening width W2 of opening 11A. The outer width W1 of electronic component 80 is the length between side surfaces 80G of electronic component 80. Side surface 80G of electronic component 80 is spaced apart from inner surface 11N of opening 11A.
[0022] On the first surface 11F side of the core substrate 11, a first component surface 80F of the electronic component 80 is flush with the first surface 11F of the core substrate 11.
[0023] On the second surface 11S side of the core substrate 11, the second component surface 80S of the electronic component 80 is located further inward than the second surface 11S of the core substrate 11 in the thickness direction of the core substrate 11.
[0024] The gap between the electronic component 80 and the inner surface 11N of the opening 11A is filled with filling resin 30. The filling resin 30 is also provided on the second surface 11S side of the core substrate 11. When viewed from the second surface 11S side, the filling resin 30 is provided not over the entire second surface 11S, but within the opening 11A and around the opening 11A. Specifically, on the second surface 11S side of the core substrate 11, the filling resin 30 in the opening 11A is present between the conductive patterns 12N around the opening 11A. Furthermore, when viewed from the second surface 11S side, the filling resin 30 is also present in a portion outside the conductive patterns 12N. On the second surface 11S side, the filling resin 30 forms the same plane as the second surface 11S. That is, the filling resin 30 is flush with the conductive patterns 12N around the opening 11A.
[0025] The "periphery" of opening 11A refers to the area within 0.5 mm from the edge of opening 11A when core substrate 11 is viewed from above.
[0026] The presence of the filling resin 30 between the electronic component 80 and the opening 11A fixes the electronic component 80 within the opening 11A. The resin material constituting the filling resin 30 may be the same as or different from the resin material constituting the resin insulating layer 21. In the example shown in FIG. 1 , the resin material constituting the filling resin 30 is different from the resin material constituting the resin insulating layer 21.
[0027] Resin insulating layer 21 on the first surface 11F covers conductive patterns 12 on first surface 11F, insulating base material 13K in the portion where conductive patterns 12 are not present, the portion of filled resin 30 exposed on the first surface 11F side from opening 11A, and first component surface 80F of electronic component 80. On the first surface 11F side of core substrate 11, the resin material that constitutes resin insulating layer 21 is filled between conductive patterns 12.
[0028] The resin insulating layer 21 on the second surface 11S side covers the conductive patterns 12 on the second surface 11S, the insulating base material 13K in the portion on the second surface 11S where the conductive patterns 12 are not formed, and the portion of the filled resin 30 exposed on the second surface 11S side from the opening 11A. The resin material constituting the resin insulating layer 21 is also filled between the conductive patterns 12 on the second surface 11S side of the core substrate 11.
[0029] Via holes 23 are formed in resin insulating layer 21, penetrating resin insulating layer 21 in the thickness direction. Via holes 23 are filled with plating to form via conductors 24. Terminals 81F on the first surface 11F side of electronic component 80 are connected to conductive pattern 22 through via conductors 24. Terminals 81S on the second surface 11S side of electronic component 80 may also be connected to conductive pattern 22 through via conductors 24.
[0030] Through holes 15 are formed in core substrate 11, resin insulating layer 21 in contact with first surface 11F of core substrate 11, and resin insulating layer 21 in contact with second surface 11S, penetrating core substrate 11 and resin insulating layer 21. Through-hole conductors 16 are formed on the inner walls of through holes 15. Portions of through-hole conductors 16 are exposed on the first surface 11F side and the second surface 11S side of core substrate 11. Filling resin 17 is filled inside through-hole conductors 16. Conductive pattern 22 on the first surface 11F side of electronic component-embedded substrate 10 is connected to conductive pattern 22 on the second surface 11S side by through-hole conductors 16.
[0031] A semiconductor element mounting portion 27 is formed on the surface of the electronic component built-in substrate 10 on the first surface 11F side. The semiconductor element mounting portion 27 is, for example, a portion where a semiconductor element is mounted on the electronic component built-in substrate 10. The semiconductor element mounting portion 27 is formed, for example, at a position overlapping with the electronic component 80 when viewed in the normal direction of the first surface 11F. The solder resist layer 26 has, for example, conductive bumps formed in contact with the via conductors 24. The semiconductor element is mounted on the semiconductor element mounting portion 27 and connected to the electronic component built-in substrate 10 through the bumps.
[0032] Next, a description will be given of a method for manufacturing the electronic component built-in substrate 10. The electronic component built-in substrate 10 is manufactured as follows.
[0033] (1) As shown in Fig. 2, a core substrate 11 is prepared. A through-hole 15 is formed in this core substrate 11. A through-hole conductor 16 is formed on the inner wall of the through-hole 15. A hole-filling resin 17 is filled inside the through-hole conductor 16. An opening 11A has not yet been formed in the core substrate 11. The insulating base material 13K included in the core substrate 11 is made of, for example, glass cloth impregnated with BT (bismaleimide triazine) resin, epoxy resin, or the like, and then hardened.
[0034] (2) As shown in Fig. 3, openings 11A are formed in core substrate 11 by router processing. Openings 11A penetrate core substrate 11 in the thickness direction. Openings 11A are open to first surface 11F and second surface 11S.
[0035] 4, core substrate 11 is placed on adhesive tape 40, and opening 11A is closed by first surface 11F. At this time, first surface 11F of core substrate 11 faces adhesive tape 40.
[0036] (4) As shown in Figure 5, electronic component 80 is placed in opening 11A. First component surface 80F of electronic component 80 contacts adhesive tape 40. First component surface 80F of electronic component 80 is flush with first surface 11F of core substrate 11.
[0037] (5) As shown in FIG. 6 , filling resin 30 is filled between electronic component 80 and opening 11A. When viewed from the second surface 11S side, filling resin 30 fills inside opening 11A and between conductive patterns 12N around opening 11A. Furthermore, part of filling resin 30 is present further outside conductive patterns 12N around opening 11A, i.e., in a portion farther from opening 11A. On the first surface 11F side, filling resin 30 contacts adhesive tape 40 between electronic component 80 and opening 11A.
[0038] As the resin material constituting the filling resin 30, a resin material having at least a lower elastic modulus and a lower thermal expansion coefficient than the resin material constituting the insulating base material 13K of the core substrate 11 is effective. Specifically, a bismaleimide resin containing silica particles and polytetrafluoroethylene (PTFE) as fillers can be used.
[0039] (6) As shown in FIG. 7, the filled resin 30 between the conductive patterns 12 and 12N on the second surface 11S side is polished, and the second surface 11S of the core substrate 11 is flattened.
[0040] (7) As shown in FIG. 8, the adhesive tape 40 is peeled off.
[0041] (8) As shown in FIG. 9 , resin insulating layers 21 are formed on the first surface 11F and the second surface 11S of the core substrate 11. The resin insulating layer 21 is formed, for example, of a resin film that does not contain a core material and contains an inorganic filler. In the example shown in FIG. 9 , the resin material constituting the resin insulating layer 21 is different from the resin material constituting the filled resin 30. The resin material constituting the resin insulating layer 21 is filled between the conductive patterns 12 on the first surface 11F side and between the conductive patterns 12 on the second surface 11S side. Therefore, on the first surface 11F side, the resin insulating layer 21 covers the portions of the conductive patterns 12 and the through-hole conductors 16 on the first surface 11F that are exposed on the first surface 11F side, the insulating base material 13K on the first surface 11F where the conductive patterns 12 and the through-hole conductors 16 are not formed, the portions of the filled resin 30 that are exposed on the first surface 11F side from the openings 11A, and the first component surface 80F of the electronic component 80. On the first surface (11F) side, the spaces between the conductive patterns (12) are filled with the resin material that forms the resin insulating layer (21).
[0042] On the second surface (11S) side, the resin insulating layer (21) covers the portions of the conductive patterns (12) and the through-hole conductors (16) on the second surface (11S) that are exposed on the second surface (11S) side, the insulating base material (13K) in the portions of the second surface (11S) where the conductive patterns (12) and the through-hole conductors (16) are not formed, and the portions of the filled resin (30) that are exposed on the second surface (11S) side from the openings (11A). The resin material that constitutes the resin insulating layer (21) is also filled between the conductive patterns (12) on the second surface (11S) side.
[0043] (9) As shown in FIG. 10, via holes 23 are formed by laser processing.
[0044] (10) An electroless plating process is performed, and electroless plated film 33 is formed on resin insulating layer 21 and in via hole 23. In via hole 23, electroless plated film 33 contacts the portion of through-hole conductor 16 that is exposed from first surface 11F and second surface 11S.
[0045] (11) As shown in FIG. 11, a plating resist 34 having a predetermined pattern is formed on the electroless plating film 33.
[0046] (12) An electrolytic plating process is carried out, and as shown in FIG. 12, the via holes 23 are filled with electrolytic plating to form via conductors 24.
[0047] (13) The plating resist 34 is peeled off, and the electroless plated film 33 below the plating resist 34 is removed. The remaining electroless plated film 33 then forms the conductive pattern 22.
[0048] (14) The same processes as those in steps (8), (10) to (13) are carried out to form resin insulating layers 21 and conductor patterns 22 on both the front and back surfaces. Furthermore, solder resist layers 26 are formed on both the front and back surfaces. This completes the electronic component built-in substrate 10 shown in FIG. 1.
[0049] The resin insulating layer 21 may be made of prepreg. Prepreg is a resin sheet made by impregnating a core material with a resin containing an inorganic filler. The resin that makes up the prepreg is thermosetting and is in a semi-cured state. In this case, copper foil is laminated on the resin insulating layer 21. Furthermore, electroless plating and electrolytic plating are performed to form the conductor pattern 22.
[0050] In the manufacturing method of electronic component-embedded substrate 10 of this embodiment, filling resin 30 is filled between opening 11A and electronic component 80 accommodated in opening 11A of core substrate 11. In this case, the resin material constituting filling resin 30 fills opening 11A and the area around opening 11A on second surface 11S. However, a resin layer made of this resin material is not formed over the entire second surface 11S. Therefore, a smaller amount of resin material constituting filling resin 30 can be used compared to forming a resin layer that covers the entire second surface 11S with the resin material constituting filling resin 30.
[0051] Furthermore, in the manufacturing method of the electronic component built-in substrate 10 of this embodiment, the resin material that constitutes the filled resin 30 does not cover the entire second surface 11S. Therefore, the area where the resin material that constitutes the filled resin 30 needs to be polished is limited to the opening 11A and the periphery of the opening 11A. In other words, there is no need to polish this resin material over the entire second surface 11S. Therefore, the cost required to manufacture the electronic component built-in substrate 10 can be reduced compared to when the resin material that constitutes the filled resin 30 is used to form a resin layer that covers the entire second surface 11S.
[0052] Furthermore, if the resin material that makes up the filling resin 30 covers the entire second surface 11S, warping of the core substrate 11 may occur when the resin material hardens. In the manufacturing method for the electronic component-embedded substrate 10 of this embodiment, the resin material that makes up the filling resin 30 does not cover the entire second surface 11S, so warping of the core substrate 11 is less likely to occur.
[0053] In the electronic component-embedded substrate 10 of this embodiment, the resin material constituting the filled resin 30 and the resin insulating layer 21 can be different resin materials. Therefore, resin materials with properties suitable for their respective purposes can be selected for the filled resin 30 and the resin insulating layer 21. For example, a resin material that is less likely to produce voids when filling the opening 11A can be selected for the filled resin 30. Furthermore, a resin material with high adhesion to the first surface 11F and the second surface 11S of the core substrate 11 can be selected for the resin insulating layer 21. Furthermore, for example, by selecting a resin material with a lower unit price than the resin material constituting the filled resin 30 as the resin insulating layer 21, it is possible to reduce the material cost of the electronic component-embedded substrate 10. Alternatively, the resin material constituting the filled resin 30 and the resin insulating layer 21 can be the same resin material. In this case, the filled resin 30 and the resin insulating layer 21 can be formed from a single resin material, facilitating the manufacture of the electronic component-embedded substrate 10.
[0054] [Other embodiments] (1) Electronic component-embedded substrate 10 may include multiple electronic components 80 with different heights L1. In this case, multiple electronic components 80 may be housed in one opening 11A. Also, as shown in FIG. 13 , multiple openings 11A formed in core substrate 11 may each house one electronic component 80.
[0055] (2) In the above embodiment, the core substrate 11 may be a single-layer core having only one insulating base material 13K.
[0056] (3) The electronic component 80 may be a passive component such as a resistor or coil, or an active component such as an IC chip including a semiconductor element.
[0057] (4) In a method for manufacturing the electronic component-embedded substrate 10, a support plate may be prepared, adhesive tape 40 (see Figures 4 to 6) may be applied to both sides of the support plate, and the electronic component-embedded substrate 10 may be manufactured in parallel on both sides of the support plate.
[0058] (5) In the above embodiment, the electronic component 80 may be placed on the adhesive tape 40, and then the core substrate 11 may be placed on the adhesive tape 40 so that the electronic component 80 fits within the opening 11A.
[0059] Furthermore, the electronic component-embedded substrate of the technology of the present disclosure is not limited to the structures illustrated in the drawings and the structures, shapes, and materials illustrated in this specification. As described above, the electronic component-embedded substrate of the embodiment may have any layered structure. The electronic component-embedded substrate of the embodiment may include any number of conductor layers and insulating layers.
[0060] The method for manufacturing a substrate with built-in electronic components according to the technology of the present disclosure is not limited to the method described with reference to the drawings. Furthermore, each insulating layer is not limited to a film-like resin, and may be formed using any type of resin. The method for manufacturing a substrate with built-in electronic components according to the embodiment may include any additional process in addition to the processes described above, or some of the processes described above may be omitted. [Explanation of symbols]
[0061] 10. Electronic component embedded board 11 Core board 11F Front page 11S second side 11A opening 11N Inner surface of opening 12 Conductor pattern 13 Resin layer 13K insulating substrate 14 Conductor pattern 15 through holes 16 through-hole conductor 17 Hole-filling resin 21 Resin insulation layer 22 Conductor pattern 23 Beer Hall 24 via conductor 26 Solder resist layer 30 Filled Resin 33 Electroless plating film 34 Resist 40 adhesive tape 80 Electronic Components 80F First part side 80S 2nd part side 81F, 81S terminals
Claims
1. a core substrate having a first surface and a second surface opposite to the first surface, the core substrate having openings that open to the first surface and the second surface; an electronic component accommodated in the opening; a filling resin that is filled between the opening and the electronic component, that is flush with the first surface on the first surface side, and that is provided inside and around the opening on the second surface side when viewed from the second surface side; a first-surface-side resin layer covering the electronic component, the first surface, and the filling resin on the first surface side; a second-surface-side resin layer covering the second surface and the filling resin on the second surface side; A substrate having an embedded electronic component.
2. 2. The electronic component built-in substrate according to claim 1, the core substrate includes an insulating base material on which a conductor pattern is formed on the second surface side, The filling resin is flush with the conductive pattern around the opening on the second surface side.
3. 3. The electronic component built-in substrate according to claim 2, The second-surface-side resin layer is in contact with the conductive pattern, the insulating base material in a portion where the conductive pattern is not present, and the filling resin on the second surface side.
4. The electronic component built-in substrate according to claim 1, The first surface side resin layer and the second surface side resin layer are made of a resin material different from the resin material that makes up the filling resin.
5. The electronic component built-in substrate according to claim 1, A semiconductor element mounting portion is formed on the surface of the first surface side.
6. forming openings in a core substrate having a first surface and a second surface opposite to the first surface, the openings opening in the first surface and the second surface; accommodating an electronic component in the opening; filling a filling resin between the opening and the electronic component, the filling resin being provided on the first surface side so as to be flush with the first surface, and on the second surface side so as to be within the opening and around the opening when viewed from the second surface side; forming a first surface side resin layer that covers the electronic component, the first surface, and the filling resin on the first surface side; forming a second surface side resin layer that covers the second surface and the filling resin on the second surface side; A method for manufacturing a substrate with built-in electronic components, comprising:
7. 7. The method for manufacturing a substrate with built-in electronic components according to claim 6, the core substrate includes an insulating base material on which a conductor pattern is formed on the second surface side, The filling resin is formed on the second surface side so as to be flush with the second surface and the conductive pattern around the opening.
8. 8. The method for manufacturing a substrate with built-in electronic components according to claim 7, The second-surface-side resin layer is formed on the second surface side so as to be in contact with the conductor pattern, the insulating base material in the portion where the conductor pattern is not present, and the filling resin.
9. 7. The method for manufacturing a substrate with built-in electronic components according to claim 6, The first surface side resin layer and the second surface side resin layer are formed of a resin material different from the resin material constituting the filling resin.
Citation Information
Patent Citations
Printed wiring board and manufacturing method thereof
JP2019067858A