Apparatus for photoresist dry deposition

Abstract

SOLUTION: Systems and techniques for dry deposition of extreme ultraviolet-sensitive (EUV-sensitive) photoresist layers are discussed. In some such systems, a processing chamber may be provided that features a multi-plenum showerhead that is configured to receive a vaporized organometallic precursor in one plenum and a vaporized counter-reactant thereof in another plenum. The two vaporized reactants may be delivered to a reaction space within the processing chamber and over a wafer support that supports a substrate.SELECTED DRAWING: Figure 1

Description

[Background technology]

[0001] Related Applications A PCT Request Form is being filed contemporaneously herewith as part of this application. Each application to which this application claims benefit or priority as identified in the contemporaneously filed PCT Request Form is incorporated herein by reference in its entirety for all purposes.

[0002] The present disclosure relates generally to the field of semiconductor processing. In certain aspects, the present disclosure is directed to hardware for dry deposition of EUV photoresists (e.g., EUV-sensitive metal photoresists and / or metal oxide-containing photoresists), for example, to form patterning masks suitable for use in EUV or other wavelength patterning. While the following discussion may focus on EUV photoresists, it will be apparent that the photoresists discussed herein may also be suitable for use with other wavelengths of radiation, and the techniques and apparatus discussed herein are not limited to EUV photoresist production alone.

[0003] Reference will now be made in detail to specific embodiments of the present disclosure. Examples of specific embodiments are illustrated in the accompanying drawings. While the present disclosure has been described in connection with these specific embodiments, it should be understood that it is not intended to limit the disclosure to such specific embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents that may be included within the spirit and scope of the present disclosure. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. Additionally, detailed descriptions of well-known process operations have been omitted to avoid unnecessarily obscuring the present disclosure.

[0004] Patterning of thin films in semiconductor processing is often a critical step during semiconductor manufacturing. Patterning involves lithography. In traditional photolithography (such as 193 nm lithography), a pattern is printed by emitting photons from a photon source onto a mask to print the pattern onto a light-sensitive photoresist, which then triggers a chemical reaction in the photoresist that, after development, removes specific portions of the photoresist to form the pattern.

[0005] Advanced technology nodes (defined by the International Technology Roadmap for Semiconductors) include 22 nm, 16 nm, and beyond. For example, at the 16 nm node, a typical via or line width in a damascene structure is typically about 30 nm or less. The scaling of features in advanced semiconductor integrated circuits (ICs) and other devices is driving improvements in lithographic resolution.

[0006] Extreme ultraviolet (EUV) lithography extends lithography technology by moving to shorter imaging source wavelengths than can be achieved with conventional photolithography methods. EUV sources with wavelengths of approximately 10-20 nm or 11-14 nm (e.g., 13.5 nm wavelength) are at the lower end of the extreme ultraviolet spectrum from 124 nm to 10 nm and are available for state-of-the-art lithography tools (also called scanners). EUV radiation is strongly absorbed by a wide range of solid and fluid materials, including quartz and water vapor, and is therefore applied in a vacuum. Summary of the Invention

[0007] The details of one or more embodiments of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]

[0008] In the following description, reference will be made to the following drawings, which are not intended to be limiting in scope but are provided solely to facilitate the following description:

[0009] [Figure 1] 1 is a schematic cross-sectional view illustrating an example of a dry deposition apparatus for producing an EUV-sensitive photoresist layer.

[0010] [Figure 2] FIG. 1 is a detailed cross-sectional plan view showing a portion of the top plate, substrate, and edge ring.

[0011] [Figure 3] 1 is a flow chart illustrating a process including a dry deposition process. DETAILED DESCRIPTION OF THE INVENTION

[0012] EUV lithography utilizes a patterned EUV resist to form a mask used to etch the underlying layer. The EUV resist may be a polymeric chemically amplified resist (CAR) produced by a liquid-based spin-on technique. An alternative to CAR is a directly photopatternable metal oxide-containing film (such as those manufactured by Inpria, Inc., Corvallis, Oregon), as described, for example, in U.S. Patent Publication Nos. 2017 / 0102612, 2016 / 021660, and 2016 / 0116839, which are incorporated by reference herein for their disclosures at least regarding photopatternable metal oxide-containing films. Such films may be formed by spin-on techniques or dry-deposited.

[0013] Spin-on techniques are a form of "wet" film formation technology that involve placing a flat substrate on a turntable, depositing a quantity of liquid film composition at the center of the substrate, and then spinning the substrate, typically at high speed (e.g., 20-80 revolutions per second for 30-60 seconds), to produce a film of very uniform thickness. Dip coating is another type of wet film formation technique in which the substrate is oriented with its major surface parallel to the vertical and then immersed in a bath of liquid film composition and then withdrawn. However, due to the use of liquid components, "wet" film formation techniques may not be well suited to coating non-planar substrates (e.g., substrates having pre-existing feature patterns etched into their exposed top surface. For example, if the substrate is not flat, e.g., has pre-existing features patterned into the surface to be coated, the liquid component will tend to fill those features and produce different film thicknesses between feature-free portions of the substrate and feature-containing portions of the substrate (the top surface of the deposited film may be nominally flat and uniform, but the depth of the deposited film may vary due to the presence of underlying features).

[0014] Dry deposition techniques (also called evaporation techniques) and other similar techniques, in contrast, deliver film components to a substrate as gas-phase reactants, where the reactants condense or adsorb into a layer of substantially conformal, uniform thickness on the exposed surface of the substrate. As a result, the thickness of the deposited film layer can generally remain uniform across the substrate, regardless of whether the substrate is in feature- or feature-free regions. It should be understood that such deposition techniques are not considered "wet" techniques, even though, in some cases, there may be condensation of film components on the target substrate. Another important advantage of dry deposition processes as discussed herein is that such processes may be performed in a variety of different temperature and pressure environments, often at sub-atmospheric conditions. This allows the amount of reactant used to produce a given photoresist film to be much less than that required to produce an equivalent film using wet deposition processes. Therefore, providing such films results in reduced material costs compared to providing an equivalent film using wet deposition techniques. Dry deposition processes also require little or no drying of the substrate after applying the photoresist layer, so the produced substrates can be prepared for subsequent processing steps more quickly, resulting in less throughput loss.

[0015] Metal oxide-containing films can be patterned directly (i.e., without utilizing a separate photoresist) by EUV exposure in a vacuum atmosphere to provide patterning resolution of less than 30 nm, as described, for example, in U.S. Pat. No. 9,996,004, issued June 12, 2018, entitled "EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARD MASKS," and / or International Patent Application No. PCT / US19 / 31618, filed May 9, 2019, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS," the disclosures of which, at least, relating to the composition, deposition, and patterning of directly photopatternable metal oxide films to form EUV resist masks, are incorporated herein by reference. Generally, patterning involves exposing an EUV resist to EUV radiation to form a photopattern in the resist, followed by development to remove portions of the resist according to the photopattern to form a mask. The mask can then be utilized in a subsequent processing operation (eg, an etching process).

[0016] Directly photopatternable EUV resists may be composed of or contain metals and / or metal oxides mixed within an organic component. Metal / metal oxide-containing materials are highly promising in that they may promote EUV photon adsorption, generate secondary electrons, and / or exhibit high etch selectivity relative to underlying film stacks and device layers.

[0017] EUV-sensitive metal- or metal oxide-containing films may be dry-deposited onto a substrate. Suitable compositions, materials, and some features of dry deposition process operations according to the present disclosure are described in International Patent Application No. PCT / US19 / 31618, filed May 9, 2019, which is incorporated herein by reference for its disclosure of methods and materials applicable to the present disclosure. Such methods include those in which a polymerized organometallic material is produced in a vapor and deposited on a substrate. In particular, a method for forming an EUV-patternable thin film on a surface of a semiconductor substrate may comprise mixing a vapor flow of an organometallic precursor with a vapor flow of a counter-reactant to form a polymerized organometallic material, and depositing the organometallic polymer-like material on the surface of the semiconductor substrate. In some embodiments, two or more organometallic precursors are included in the vapor flow. In some embodiments, two or more counter-reactants are included in the vapor flow. In some embodiments, the mixing and deposition operations are performed in a sequential chemical vapor deposition (CVD), atomic layer deposition (ALD) process, or ALD with a CVD component (such as a discontinuous ALD-like process in which the metal precursor and reaction partner are separated in time or time and space); for example, in some ALD-type processes, one or more organometallic precursors may be flowed onto the substrate, and the substrate may then be moved to another processing station or another processing chamber where one or more reaction partners may be flowed onto the substrate. When simply referring to "reactants" herein, it is intended to refer to both the organometallic precursor and the reaction partner; for example, it is understood that "co-flow of reactants" refers to the co-flow of the organometallic precursor and the reaction partner.

[0018] After deposition, the EUV-patternable thin film is patterned by exposing the wafer bearing the thin film to a beam of EUV light, typically under a relatively high vacuum, through an optical mask having the features to be patterned on the wafer, followed by removing the wafer from the vacuum and optionally performing a post-exposure bake in ambient air. The exposure results in one or more exposed regions, such that the film contains one or more unexposed regions that have not been exposed to EUV light. Further processing of the coated substrate may take advantage of the chemical and physical differences between the exposed and unexposed regions.

[0019] The substrate may comprise any material composition suitable for photolithographic processing, particularly for the fabrication of integrated circuits and other semiconductor-based devices. In some embodiments, such a substrate may be a silicon wafer. The substrate on which the features ("underlying features") are formed may have an irregular surface topography (as referred to herein, a "surface" is a surface onto which a film of the present disclosure is deposited or which is exposed to EUV during processing). Such underlying features may include areas from which material has been removed (e.g., by etching) or to which material has been added (e.g., by deposition) during processing prior to performing the methods of the present disclosure. Such pre-processing may involve the methods of the present disclosure or other processing methods in an iterative process in which two or more feature layers are formed on the substrate.

[0020] As described above, an EUV-sensitive thin film may be deposited on a substrate to form a mask layer. Such an EUV-sensitive film may act as a resist for subsequent EUV lithography and processing and may include a material that, upon exposure to EUV, undergoes a change, such as the loss of bulky pendant substituents bonded to metal atoms in a low-density M-OH-rich material, allowing crosslinking to a denser M-OH-bonded metal oxide material, where M is a metal with a high EUV absorption cross-section. EUV patterning creates regions of the film with altered physical or chemical properties compared to unexposed regions. These properties may be exploited in subsequent processing, such as to dissolve either the unexposed or exposed regions, or to selectively deposit materials in either the exposed or unexposed regions. In some embodiments, the unexposed film has a more hydrophobic surface than the exposed film under conditions under which such subsequent processing is performed. For example, material removal may be achieved by exploiting differences in the film's chemical composition, density, and cross-linking. The removal may be by wet or dry processing, as further described below.

[0021] The thin film may, in various embodiments, be made of an organometallic material (e.g., SnO x The organometallic compounds may be formed in a gas-phase reaction between an organometallic precursor and a reaction partner. In various embodiments, the organometallic compounds are formed by mixing specific combinations of organometallic precursors with bulky alkyl or fluoroalkyl groups and a reaction partner, and polymerizing the gas-phase mixture to produce a low-density, EUV-sensitive material that is deposited on a substrate.

[0022] In various embodiments, the organometallic precursor may include at least one alkyl group on each metal atom that may remain after the gas phase reaction, but other ligands or ions coordinated to the metal atom may be replaced by reaction partners. The organometallic precursor may have the chemical formula M a R b L cwhere M is a metal with a high EUV absorption cross section and R is C n H 2n+1 and the like, preferably n≧3; L is a ligand, ion, or other moiety that reacts with the reaction partner; a≧1, b≧1, c≧1.

[0023] In various embodiments, M is 1·10 7 cm 2 / mol or greater. M can be, for example, tin, bismuth, antimony, tellurium, or a combination of two or more thereof. In some embodiments, M is tin. R can be fluorinated, for example, a compound of formula C n F x H 2n+1 In various embodiments, R has at least one beta hydrogen or beta fluorine. For example, R can be i-propyl, n-propyl, t-butyl, i-butyl, n-butyl, sec-butyl, n-pentyl, i-pentyl, t-pentyl, sec-pentyl, or a mixture of two or more thereof. L can be any moiety that is readily displaced by a reaction partner to generate an M-OH moiety, such as a moiety that is an amine (such as a dialkylamino or monoalkylamino group), an alkoxy group, a carboxylate, a halogen, or a mixture of two or more thereof.

[0024] The organometallic precursor may be any of a variety of potential organometallic precursors. For example, when M is tin, such precursors include t-butyltris(dimethylamino)tin, i-butyltris(dimethylamino)tin, n-butyltris(dimethylamino)tin, sec-butyltris(dimethylamino)tin, i-propyl(tris)dimethylaminotin, n-propyltris(dimethylamino)tin, and similar alkyl(tris)(t-butoxy)tin compounds (such as t-butyltris(t-butoxy)tin). In some embodiments, the organometallic precursor may be partially fluorinated.

[0025] The reaction partner may be selected to be capable of substituting a reactive moiety, ligand, or ion (e.g., L in Formula 1 above) to chemically link at least two metal atoms. Reaction partners may include water, peroxides (e.g., hydrogen peroxide), dihydric or polyhydric alcohols, fluorinated dihydric or polyhydric alcohols, fluorinated glycols, and other sources of hydroxyl moieties. In various embodiments, the reaction partner reacts with the organometallic precursor by forming oxygen bridges between adjacent metal atoms. Other potential reaction partners include hydrogen sulfide and hydrogen disulfide, which can bridge metal atoms via sulfur bridges.

[0026] The thin films may include optional materials in addition to the organometallic precursors and reaction partners to alter the chemical or physical properties of the film, such as to modify the film's sensitivity to EUV or to increase etch resistance. Such optional materials may be introduced, for example, by doping during gas-phase formation before deposition of the film on the substrate, after deposition of the film, or both. In some embodiments, a mild remote H plasma may be introduced to replace some Sn-L bonds with Sn-H, thereby increasing the reactivity of the resist under EUV.

[0027] In various embodiments, EUV-patternable films can be deposited on a substrate using deposition equipment and processes known to those skilled in the art. In such processes, polymerized organometallic materials can be formed in the vapor phase or in situ on the surface of the substrate. Processes suitable for forming such polymerized organometallic materials on a substrate include, for example, depositing the material using chemical vapor deposition (CVD), atomic layer deposition (ALD), or ALD with a CVD component (such as a discontinuous ALD-like process in which the metal precursor and reaction partner are separated in time or in time and space).

[0028] In general, the method may comprise mixing a vapor flow of an organometallic precursor with a vapor flow of a reaction partner to form a polymerized organometallic material, and then depositing the organometallic material on the surface of a semiconductor substrate. As will be appreciated by those skilled in the art, the mixing and deposition aspects of the process may be performed in parallel in a substantially continuous process.

[0029] In an example of a sequential CVD process, two or more gas streams of organometallic precursor and reaction partner sources are introduced into a deposition chamber of a CVD apparatus via separate inlets, where they can mix and react in the gas phase to form a coagulated polymeric material (e.g., by forming metal-oxygen-metal bonds). The gas streams may be introduced separately into the deposition chamber, for example, using separate inlets or via a dual plenum showerhead. The apparatus may be configured so that the organometallic precursor and reaction partner streams mix within the deposition chamber, allowing them to react to form a polymerized organometallic material. Without limiting the mechanism, function, or utility of the present technology, it is believed that the product of such a gas-phase reaction will have a high molecular weight as the metal atoms are crosslinked by the reaction partners before condensing or otherwise depositing on the substrate. In various embodiments, the steric hindrance of the bulky alkyl groups inhibits the formation of a densely packed network, producing a porous, low-density film.

[0030] CVD processes are typically carried out at reduced pressures, such as between 10 mTorr and 10 Torr. In some embodiments, processes are carried out at between 0.5 and 2 Torr. The temperature of the substrate may preferably be maintained at or below the temperature of the reactant stream. For example, the substrate temperature may be between 0°C and 250°C, or between ambient temperature (e.g., 23°C) and 150°C. In various processes, deposition of polymerized organometallic materials onto the substrate may occur at a rate that is inversely proportional to the surface temperature.

[0031] The thickness of the EUV-patternable film formed on the surface of a substrate can vary depending on the surface characteristics, the material utilized, the deposition duration, and the process conditions. In various embodiments, the film thickness can range from 0.5 nm to 100 nm, and the total absorption of the resist film can be 30% or less (e.g., 10% or less, or 5% or less) to ensure that the resist material at the bottom of the resist film is fully exposed. In some embodiments, the film thickness is 10 to 20 nm. Without limiting the mechanism, function, or utility of the present disclosure, unlike prior art wet spin-coating processes, the disclosed processes are believed to be applicable to a wider variety of substrates due to fewer limitations on the surface adhesion of the substrate. Furthermore, as discussed above, the deposited film can closely conform to surface features, providing advantages in forming a mask on a substrate (such as a substrate with underlying features) without "filling" or otherwise planarizing such features.

[0032] Deposited films may be patterned by exposing one or more regions of the film to EUV light, for example, using a scanner or other lithographic photopatterning transfer tool. EUV devices and imaging methods useful herein include those well known to those skilled in the art. In particular, as described above, exposed regions of a film produced through EUV patterning may have altered physical or chemical properties relative to unexposed regions of the film. For example, in exposed regions, cleavage of metal-carbon bonds may occur via beta-hydrogen elimination, leaving reactive and accessible hydride functionalities that can be converted to hydroxides and metal oxide moieties crosslinked via metal-oxygen bridges, which can be used to create chemical contrast as a negative-tone resist or as a hard mask template. Generally, a larger number of beta-H groups in the alkyl group leads to a more photosensitive film. After exposure, the film may be baked, for example, at temperatures of 150-250°C to induce further crosslinking of the metal oxide film. The difference in properties between the exposed and unexposed regions may be exploited in subsequent processing, such as to dissolve the unexposed regions or deposit material onto the exposed regions. For example, the pattern may be developed using dry methods to form a metal oxide-containing mask. Methods and apparatus useful for such processing are described in U.S. Patent Application No. 62 / 782,578, filed December 20, 2018, which is incorporated herein by reference for its disclosure of the method and apparatus.

[0033] Such dry development processes can be achieved by using either a mild plasma (high pressure, low power) or thermal process, either of which may be carried out in conjunction with a flow of a hydrogen halide dry developer, such as HBr or HCl. In some embodiments, the hydrogen halide can rapidly remove unexposed material, leaving a pattern in the exposed film that can be transferred to an underlying substrate layer by subsequent application of a plasma-based etch process (e.g., a conventional etch process).

[0034] Suitable plasma-based dry development processes may include the use of transformer-coupled plasma (TCP), inductively coupled plasma (ICP), or capacitively coupled plasma (CCP) processes and may be carried out using equipment and techniques known to those skilled in the art. For example, the plasma-based development process may be carried out at a pressure of >5 mT (e.g., >15 mT) and a power level of <1000 W (e.g., <500 W). The temperature may be between 0°C and 300°C (e.g., 30°C and 120°C) with a flow rate of 100 to 1000 standard cubic centimeters per minute (sccm) (e.g., about 500 sccm) for a duration of 1 to 3000 seconds (e.g., 10 to 600 seconds).

[0035] In a thermal development process, the substrate may be exposed to a dry developer. A suitable chamber for carrying out such a thermal development process may include a vacuum line, one or more dry developer gas lines for supplying dry developer gas to the chamber, and a heater to enable temperature control of the chamber. In some embodiments, the interior of the chamber may be coated with a corrosion-resistant film (such as an organic polymer or inorganic coating). One such coating is polytetrafluoroethene (PTFE, e.g., Teflon™). While such materials can be utilized in the thermal processes of the present disclosure, such coatings may not be suitable for plasma-based processes due to the risk of removal by plasma exposure.

[0036] Current EUV resist coating techniques typically utilize spin-on photoresists that are applied in an ambient environment (e.g., at typical atmospheric pressure). This technique generally does not allow for atmospheric control or influence and only allows for a single chemical mixture to be applied to the entire film stack. Additionally, spin-on techniques do not provide a uniform photoresist layer thickness for substrates with non-planar surfaces on which the film is formed.

[0037] As previously mentioned, dry deposition techniques may be used to produce photoresist layers that do not suffer from the thickness non-uniformity problems that wet deposition techniques have on substrates with pre-existing features. Such dry deposition techniques may be performed using a photoresist film deposition chamber. An example of a photoresist film deposition chamber is shown in FIG. 1.

[0038] 1 illustrates an apparatus 100 having a processing chamber 102 with a lid 108. The processing chamber 102 may include a wafer transfer passage 104 through one of its walls sized to allow a substrate 122 to be placed inside the processing chamber 102 therethrough, where the substrate 122 may be disposed on a wafer support 124. The wafer transfer passage 104 may have a gate valve 106 or similar door mechanism operable to open and close the wafer transfer passage, thereby isolating the environment within the processing chamber 102 from the environment on the other side of the gate valve 106. For example, the processing chamber 102 may be provided with a substrate 122 via a wafer handling robot disposed in an adjacent transfer chamber. Such a transfer chamber may, for example, have multiple processing chambers 102 arranged around it, with each such processing chamber 102 connected to the transfer chamber via a corresponding gate valve 106.

[0039] The wafer support 124 may include, for example, an electrostatic chuck (ESC) 126, which may be used to provide a wafer support surface for supporting the substrate 122. The ESC 126 may include, for example, a base plate 134 coupled to a top plate 128 disposed on top of the base plate 134. The top plate 128 may be formed of, for example, a ceramic material and may have several other components embedded therein. In the illustrated example, the top plate 128 has two separate electrical systems embedded therein. One such system is an electrostatic clamping electrode system, which may have one or more clamping electrodes 132 that may be used to generate an electric charge in the substrate 122 that causes the substrate 122 to be attracted to the wafer support surface of the top plate 128. While the embodiment of FIG. 1 has two clamping electrodes providing a bipolar electrostatic clamping system, some embodiments may use only a single clamping electrode 132 to provide a monopolar electrostatic clamping system.

[0040] The other system is a thermal control system that can be utilized to control the temperature of the substrate 122 under processing conditions. In FIG. 1 , the thermal control system is a multi-zone thermal control system featuring four concentric annular resistive heater traces 130 a, 130 b, 130 c, and 130 d positioned beneath the clamping electrode 132. The central resistive heater trace 130 a may, in some embodiments, occupy a generally circular area, and each of the resistive heater traces 130 a / b / c / d may follow a generally serpentine or other serpentine path within the corresponding annular area. Each of the resistive heater traces 130 a / b / c / d may be individually controlled to provide various radial heating profiles at the top plate 128, and such a four-zone heating system may, for example, be controlled to maintain the substrate 122 with a temperature uniformity of ±0.5° C. in some instances. Although the apparatus 100 of FIG. 1 features a four-zone heating system in the ESC 126, other embodiments may use a single-zone heating system or a multi-zone heating system having more or less than four zones.

[0041] For example, in some embodiments of the temperature control mechanisms described above, a heat pump may be used in place of the resistive heating traces. For example, in some embodiments, the resistive heater traces may be replaced or augmented by Peltier junctions or other similar devices that can be controlled to "pump" heat from one side to the other. Such a mechanism may be used, for example, to draw heat from the top plate 128 (and thus from the substrate 122) and deliver it to the base plate 134 and heat exchange channels 136, thereby allowing the substrate 122 to cool more quickly and effectively, if desired.

[0042] The ESC 126 may include a base plate 134, which may be used, for example, to provide structural support to the underside of the top plate 128 and may also function as a heat dissipation system. For example, the base plate 134 may include one or more heat exchange passages 136 arranged in a generally distributed manner across the base plate 134, e.g., the heat exchange passages 136 may follow a serpentine pattern, a circular switchback pattern, or a spiral pattern around the center of the base plate 134. A heat exchange medium (e.g., water or an inert fluorinated liquid) may be circulated through the heat exchange passages 136 during use. The flow rate and temperature of the heat exchange medium may be externally controlled to result in specific heating or cooling behavior in the base plate 134.

[0043] The ESC 126 may be supported, for example, by a wafer support housing 142 connected to and supported by a wafer support 144. The wafer support 144 may have routing passages 148 or other pass-throughs, for example, on the underside of the base plate 134 and / or top plate 128, for routing wiring, fluid flow conduits, and other equipment. For example, although not shown in FIG. 1 , wiring for supplying power to the resistive heater traces 130 a / b / c / d may be routed through the routing passages 148, as may wiring for supplying power to the clamp electrodes 132. Other wiring (e.g., wiring for temperature sensors) may be routed through the routing passages 148 to multiple locations within the wafer support 124. In embodiments with a temperature-controllable base plate 134, conduits for carrying heat exchange medium to and from the base plate 134 may be routed through the routing passages 148. It should be understood that such wiring and conduits are not shown in FIG. 1 to avoid undue clutter, but are still present.

[0044] 1 further includes a wafer support z-actuator 146 that can provide movable support for the wafer support 144. The wafer support z-actuator 146 can be actuated to vertically raise and lower the wafer support 124, and thereby the wafer support 124, within the reaction volume 120 of the processing chamber 102, for example, by up to several inches. In doing so, the gap distance X between the substrate 122 and the underside of the showerhead 110 can be adjusted for various processing conditions.

[0045] The wafer support 124 may further include one or more edge rings, which may be utilized in some embodiments to control and / or fine-tune various processing conditions. In FIG. 1 , for example, an upper edge ring 138 is provided atop lower edge rings 140a and 140b, which are supported by a wafer support housing 142 and a third lower edge ring 140c. For example, the upper edge ring 138 may generally be exposed to the same processing environment as the substrate 122, while the lower edge rings 140a / b / c may generally be protected from the processing environment. Due to the increased exposure of the upper edge ring 138, the upper edge ring 138 may have a limited lifespan and may require more frequent replacement or cleaning compared to the lower edge rings 140a / b / c.

[0046] The apparatus 100 may further include a system for removing process gases from the processing chamber 102 during and after processing is completed. For example, the processing chamber 102 may include an annular plenum 156 surrounding the wafer support 144. The annular plenum 156 may then be fluidly connected to a vacuum foreline 152 (e.g., located below the subfloor below the apparatus 100), which may be connected to a vacuum pump. An adjustable valve 154 may be provided between the vacuum foreline 152 and the processing chamber 102 and may be actuated to control flow to the vacuum foreline 152. In some embodiments, a baffle 150 (e.g., an annular plate or other structure operable to direct a flow into the annular plenum 156 that is evenly distributed around the wafer support 144) may be provided to reduce the possibility of flow non-uniformities in reactants flowed across the substrate 122.

[0047] The showerhead 110 is shown as a dual-plenum showerhead 110, including a first plenum 112 supplied with process gas via a first inlet 116 and a second plenum 114 supplied with process gas via a second inlet 118. While the showerhead 110 may have more than two plenums in some embodiments, two plenums is generally the minimum required to maintain separation between the organometallic precursor and the reaction partner before releasing them into the reaction space 120 of the processing chamber 102. Each plenum may have a corresponding set of gas distribution ports fluidly connecting the respective plenum to the reaction space 120 through a faceplate of the showerhead 110 (the faceplate is the portion of the showerhead 110 sandwiched between the bottom plenum and the reaction space 120).

[0048] The first inlet 116 and the second inlet 118 of the showerhead 110 may be supplied with process gases via a gas supply system, which may be configured to supply one or more organometallic precursors and one or more reaction partners as described herein above.

[0049] However, the illustrated apparatus 100 is configured to deliver multiple organometallic precursors and multiple reaction partners. For example, a first valve manifold 168a may be configured to deliver an organometallic precursor to the first inlet 116, while a second valve manifold 168b may be configured to deliver a reaction partner to the second inlet 118.

[0050] In this example, the first valve manifold 168a includes, for example, a plurality of valves A1-A5. Valve A2 may be, for example, a three-way valve having one port fluidly connected to the first vaporizer 172a, another port fluidly connected to the bypass line 170a, and a third port fluidly connected to a port of another three-way valve A3. Similarly, valve A4 may be, for example, a three-way valve having one port fluidly connected to the second vaporizer 172b, another port fluidly connected to the bypass line 170a, and a third port fluidly connected to a port of another three-way valve A5. One of the other ports of valve A5 may be fluidly connected to the first inlet 116, while the remaining port of valve A5 may be fluidly connected to one of the remaining ports of valve A3. The remaining port of valve A3 may then be fluidly connected to valve A1, which may be fluidly inserted between valve A3 and a purge gas source 174 (e.g., nitrogen, argon, or other gas with suitable inertness (with respect to the organometallic precursor and / or reaction partners)).

[0051] In this disclosure, the term "fluidically connected" is used in reference to spaces, plenums, holes, etc. that can be connected to each other to form a fluid connection, similar to the use of the term "electrically connected" in reference to components that are connected to each other to form an electrical connection. The term "fluidically inserted" is used in reference to a component, space, plenum, or hole that is fluidly connected to at least two other components, spaces, plenums, or holes, to refer to a fluid flowing from one of those other components, spaces, plenums, or holes to another one of those other components, spaces, plenums, or holes first passing through the "fluidically inserted" component before reaching the other one of those other components, spaces, plenums, or holes. For example, if a pump is fluidly inserted between a reservoir and an outlet, fluid flowing from the reservoir to the outlet will first pass through the pump before reaching the outlet.

[0052] The first valve manifold 168a may be controllable to allow vapor from one or both of the vaporizers 172a and 172b to flow into the processing chamber 102 or through the first bypass line 170a to the vacuum foreline 152. The first valve manifold 168a may also be controllable to allow purge gas to flow from a purge gas source 174 to the first inlet 116.

[0053] For example, to flow vapor from the first vaporizer 172a to the reaction space 120, valve A2 may be actuated to initially allow the vapor to flow from the first vaporizer 172a to the first bypass line 170a. This flow may be maintained for a period of time sufficient to allow the vapor flow to reach a steady flow state. After a sufficient amount of time has passed (or after a flow meter, if utilized, indicates that the flow rate has stabilized), valves A2, A3, and A5 may be actuated to direct the vapor flow from the first vaporizer 172a to the first inlet. Similar operation by valves A4 and A5 may be performed to supply vapor from the second vaporizer 172b to the first inlet 116. In some examples, it may be desirable to purge one of the vapors from the first plenum 112 by actuating valves A1, A3, and A5 to allow purge gas from the purge gas source 174 to flow to the first inlet 116. In some further embodiments, it may be desirable to simultaneously flow vapor from one of vaporizers 172a or 172b in parallel with flowing gas from the purge gas into first inlet 116. Such embodiments may be used to dilute the concentration of reactants contained in such vapor.

[0054] It is understood that second valve manifold 168b may be similarly controlled, for example, by controlling valves B1-B5, to supply vapor from vaporizers 172c and 172d to second inlet 118 or second bypass line 170b. It is further understood that different manifold configurations may be utilized, such as a single integrated manifold with valves to control the flow of both organometallic precursor and reaction partner to first inlet 116 and second inlet 118.

[0055] As previously mentioned, some devices 100 may feature fewer vapor sources (e.g., only two vaporizers 172), in which case valve manifold 168 may be modified to have fewer valves (e.g., only valves A1-A3).

[0056] As described above, an apparatus such as apparatus 100 may be used to provide dry deposition of photoresist films using organometallic precursors and reaction partners and may be configured to maintain a particular temperature profile within the process chamber 102. In particular, such an apparatus 100 may be configured to maintain the substrate 122 at a lower temperature (e.g., at least 25° C. to 50° C. lower) than most of the equipment of the apparatus 102 that is in direct contact with the organometallic precursors and reaction partners. Furthermore, the temperature of the equipment of the apparatus 100 that is in direct contact with the organometallic precursors and reaction partners may be maintained at a level high enough to inhibit condensation of vaporized reactants on the surfaces of such equipment. At the same time, the temperature of the substrate 122 may be controlled to a level that promotes condensation, or at least deposition, of the reactants on the substrate 122.

[0057] To provide such temperature control, various heating systems may be included in the apparatus 100. For example, the processing chamber 102 may have a receptacle for receiving a cartridge heater 158; for example, for a processing chamber 102 having a generally cylindrical interior but a square or rectangular exterior, vertical holes for receiving the cartridge heater 158 may be drilled into the four corners of the housing of the chamber 102. In some embodiments, the showerhead 110 may be covered with a heater blanket 160, which may be used to apply heat to the exposed top surface of the showerhead 110 to maintain an elevated showerhead temperature. It may also be beneficial to heat the various gas lines used to direct vaporized reactants from the vaporizer 172 to the showerhead 110. For example, resistive heater tape may be wrapped around such gas lines and used to heat the gas lines to elevated temperatures. 1, all gas lines through which either organometallic precursors or reaction partners can potentially flow are shown to be heated, including bypass line 170. The only exceptions are the gas lines from valve manifold 168 to first inlet 116 and second inlet 118, which can be fairly short and therefore indirectly heated by showerhead 110. Of course, these gas lines can also be actively heated, if desired. In some embodiments, a heater can be provided in proximity to gate valve 106 to provide heat to the gate valve as well.

[0058] The various operating systems of the apparatus 100 may be controlled by a controller 184, which may include one or more processors 186 and one or more memory devices 188, which are operatively coupled to each other and communicatively coupled to the various systems and subsystems of the apparatus 100 to provide control functions for those systems. For example, the controller 184 may be configured to control valves A1-A5 and B1-B5, the various heaters 158, 160, the vaporizer 172, the regulating valve 154, the gate valve 106, the wafer support z-actuator, etc.

[0059] Another feature that the apparatus 100 may include is shown in FIG. 2, which is an enlarged cross-sectional plan view of the substrate 122, top plate 128, and a portion of the upper edge ring 138 of FIG. 1. As can be seen, in some embodiments, the substrate 122 may be elevated away from most of the top plate 128 by a plurality of small mesas 176, which may be thin bosses that protrude a short distance from the nominal top surface of the top plate 128 to provide a back gap 178 between the underside of the substrate 122 and most of the top plate 128. A peripheral wall feature 177 may be provided around the periphery of the top plate 128. The peripheral wall feature 177 may extend around the entire periphery of the top plate 128 and be nominally flush with the mesas 176. During processing operations, a typically inert gas (such as helium) may be flowed into the back gap 178 via one or more gas ports 182. This gas may then flow radially outward until it encounters peripheral wall feature 177, which may then restrict such radially outward flow, causing a higher-pressure region of gas to be trapped between substrate 122 and top plate 128. Inert gas that leaks beyond peripheral wall 177 may eventually escape through radial gap 180 between the outer edge of substrate 122 and a portion of upper edge ring 138. Such gas may help protect the underside of the substrate from being undesirably affected by processing operations being performed by acting to prevent gases emitted by showerhead 110 from reaching the underside of substrate 122. At the same time, gas emitted in the region of back gap 178 may also act to increase thermal coupling between substrate 122 and top plate 128, allowing top plate 128 to more effectively heat or cool substrate 122. Due to the higher pressure provided by the peripheral wall, the gas in the area of the back gap 178 may also be denser than the gas in the rest of the chamber, thereby providing more effective thermal coupling between the substrate 122 and the top plate 128.

[0060] The controller 184 may be configured, for example, by executing computer-executable instructions, to cause the apparatus 100 to perform various operations consistent with the above disclosure. Figure 3 is a flow chart illustrating various operations that may be performed in the context of the apparatus 100 and subsequent operations that may be performed on a substrate processed by the apparatus 100.

[0061] In block 302, for example, the controller 184 may control the apparatus 100 to provide and position the substrate 122 in the processing chamber 102. For example, the wafer handling robot may be controlled to pass the substrate through the wafer transfer path 104 while the gate valve 106 is controlled to be actuated to an open state. The wafer support 124 may be controlled, for example, by the wafer support z-actuator 146 to be positioned at an appropriate height to receive the substrate 122, and the substrate 122 may be positioned (and centered) above the wafer support 124 by the wafer handling robot. Lift pins (not shown) that are part of the wafer support 124 may extend vertically from the wafer support 124 to lift the substrate from an end effector of the wafer handling robot, thereby allowing the wafer handling robot to withdraw from the processing chamber 102 and close the gate valve 106 to seal the processing chamber 102. At the same time, the lift pins may retract into the wafer support 124 to lower the substrate 122 onto the top plate 128 .

[0062] Once the substrate 122 is loaded in block 302, the resistive heater traces 130a / b / c / d may be controlled along with the temperature and flow rate of the heat exchange medium circulated through the base plate 134 to bring the substrate 122 to a desired temperature in block 304. Such control may include, for example, activating clamping electrodes to provide electrostatic clamping of the substrate 122 to the top plate 128, as well as supplying an inert gas flow to gas ports 182 in the top plate 128 to flow such gas into the back gap 178 between the substrate 122 and the top plate 128. For example, the controller 184 may control various heater systems in the apparatus 100 to maintain the temperatures of the interior wall surfaces of the processing chamber 102, the lid 108, and the showerhead 110 between 80°C and 120°C (e.g., 100°C). Simultaneously, controller 184 may control top plate 128 to reach and maintain a temperature of 55° C. to 75° C. (e.g., 65° C.) The temperatures of top plate 128 and substrate 122 may generally be maintained at a lower level than the rest of the chamber to promote vapor adsorption and / or condensation on substrate 122 over adsorption and / or condensation on other chamber components, although other temperature ranges may be used.

[0063] In block 306, gas flow from the vaporizers 172 supplying gases used in the dry deposition process may be initiated and allowed to reach a steady state, for example, by selectively activating valves A1-A5 and B1-B5 to divert gas flow from these vaporizers 172 to bypass line 170 and then to vacuum foreline 152. Once the flow rate from the selected vaporizer reaches a steady state, the technique may proceed to block 308 or block 312.

[0064] Blocks 308 and 312 represent two alternative approaches to dry-depositing an EUV-sensitive photoresist on the substrate 122. It is understood that either approach may be selectively used as needed. In the approach of block 308, the controller may be configured to simultaneously supply the metalorganic precursor and the corresponding reactant from the respective vaporizers 172 through the respective plenums of the showerhead 110 into the reaction space 120 for a given period of time. In block 310, a determination may be made as to whether the desired period of time for the metalorganic precursor and the corresponding reactant has elapsed (or whether the desired amount of such reactant has been supplied). If not, the technique may return to block 308 for supplying additional reactant. If so, the technique may proceed to block 316, where the substrate 122 is removed from the processing chamber 102 and may be transferred, for example, to a cleaning station or other apparatus. It is understood that the dry deposition process is essentially complete, at least with respect to the EUV-sensitive photoresist layer deposited in blocks 308 and 310, before removing the substrate 122 from the processing chamber 102. Subsequent portions of the technique of FIG. 3 may be performed in other apparatus and / or directed by other controllers, as appropriate. The technique of blocks 308 and 310 may be referred to as a sequential CVD technique because all of the reactants are flowed simultaneously into the reaction space 120 for a given period of time or in a given amount, similar to a CVD process.

[0065] In an alternative approach to block 312, the valves of the apparatus 100 may be operated to alternately flow the organometallic precursor and the corresponding reactant, e.g., by first flowing the organometallic precursor through the showerhead 110, then stopping the flow of the organometallic precursor and starting the flow of the reactant through the showerhead 110. In some embodiments, a purge gas may be flowed through the showerhead 110 between each reactant flow. These alternating flows may be repeated one or more times as needed. For example, in block 314, a determination may be made as to whether the desired number of alternating flow cycles have been performed; if not, the technique may return to block 312 to perform additional such flow cycles. If so, the technique may proceed to block 316. This alternative approach is somewhat similar to atomic layer deposition techniques, in which two different precursors are alternately flowed into a deposition chamber. As with the previous co-flow technique, at the end of the alternating flow technique, i.e., after block 314 and before block 316, the dry deposition process is essentially complete, at least with respect to the EUV-sensitive photoresist layer deposited in blocks 312 and 314, before removing the substrate 122 from the processing chamber 102.

[0066] It will be appreciated that various modifications and variations of such techniques may be implemented. For example, in some embodiments, different organometallic precursors and / or reaction partners may be used during different stages of an EUV-sensitive photoresist layer deposition process. In one such example, a first organometallic precursor having high EUV sensitivity may first be flowed onto the substrate to generate a first sublayer of the EUV-sensitive photoresist layer. Then, a second organometallic precursor (different from the first) may be flowed onto the substrate to generate a second sublayer on top of the first sublayer. This process may be repeated with any number of different organometallic precursors (and / or reaction partners). Such a configuration may enable the EUV-sensitive photoresist layer to be a hybrid of different types of materials. If desired, organometallic precursors may be selected to generate sublayers with different EUV sensitivity; for example, a first sublayer may be formed using an organometallic precursor that generates a sublayer that is more EUV-sensitive than a second sublayer. This can help offset potential gradient effects, for example, when a deposited EUV-sensitive photoresist film is subjected to EUV exposure. For example, when a deposited EUV-sensitive photoresist film is exposed to EUV light, such light can cause physical or chemical changes in the exposed areas of the photoresist film that can later be utilized in post-exposure processing (e.g., developer processing). However, such physical or chemical changes can depend on the intensity of the EUV radiation. Because EUV radiation tends to decrease in intensity as a function of increasing penetration depth into the photoresist film due to absorption of a portion of its energy by the upper sublayer of the photoresist film, the exposure intensity for a lower sublayer of the photoresist film can be lower than for an upper sublayer. As a result, in a photoresist film formed of the same material throughout its thickness, the amount of physical or chemical change that occurs in the EUV exposure process can vary as a function of film depth. In some such instances, the duration of such exposure can also affect this variation.

[0067] However, by tailoring the photoresist film to utilize different materials for different sub-layers, the variability in physical or chemical changes that occur across the thickness of the photosensitive film can be reduced. For example, if a lower sub-layer is formed of a material that is more sensitive to EUV exposure than an upper sub-layer, this can help compensate for the reduced intensity of EUV exposure experienced by the lower sub-layer.

[0068] Such conditioning techniques can have significant advantages in the context of EUV processing, both in terms of throughput and quality. For example, to expose the bottommost sublayer(s) of a single-material photoresist film to a sufficient amount of EUV light to induce a desired level of chemical or physical change in that / those sublayers, it may be necessary to continue exposing the photosensitive film for a significantly longer period of time than is required to achieve the same level of chemical or physical change in an upper sublayer. This additional exposure time could be used, for example, to perform EUV exposure on another substrate, thus reducing throughput. Given the extreme cost of EUV processing equipment (EUV scanners, for example, can cost on the order of $100 million or more (U.S.)), minimizing processing time for EUV scanning operations is highly desirable to maximize the return on investments made in EUV scanners.

[0069] Long exposure times can also degrade the quality of the photopattern transferred to the photosensitive film through the EUV exposure process. For the nanometer-scale feature sizes required using EUV processing, even minimal movement of the EUV mask (the mask used to direct EUV light to generate the desired photopattern on the substrate 122) relative to the substrate 122 can be significant in terms of feature size. For example, for a 30 nm wide feature, a 5 nm shift of the EUV mask relative to the substrate 122 during the exposure process can result in a ∼15% reduction in the deepest feature width. While EUV scanners are designed to minimize the likelihood of such events, the longer the exposure process for a given substrate 122, the greater the risk of encountering such movement (or, more likely, the greater the risk of encountering small degrees of movement that collectively have a greater adverse effect than the individual movements have).

[0070] It is readily apparent that tailoring the material composition of such photoresist films using the techniques described herein can, for example, enable shorter exposure times, which increases throughput and improves the likelihood of obtaining higher quality photopatterns. The conformal nature of dry-deposited photoresist films also contributes to achieving such throughput improvements, as their relatively uniform thickness avoids scenarios where extended EUV exposure times are required as a result of variations in total film thickness.

[0071] As discussed above, wet deposition of such EUV-sensitive photoresist films is generally not suitable for tailored film deposition because different materials cannot be used for different sublayers of the wet-deposited EUV-sensitive photoresist film. Furthermore, wet deposition techniques are inherently non-conformal. Thus, the dry deposition techniques and apparatus described herein offer significant improvements over wet deposition techniques and apparatus using similar chemistries.

[0072] Another example of a dry deposition technique that can be implemented in the above-described apparatus is the deposition of different metalorganic sublayers on substrate 122 using different dry deposition processes. For example, the techniques of blocks 312 and 314 may be used to deposit a thin sublayer of a first EUV-sensitive photoresist material on substrate 122, which may enhance the adsorption or condensation of reactants used to produce a subsequently applied sublayer of a different second EUV-sensitive photoresist material. In this sense, the first photoresist material may be used as a “seed sublayer” to enhance adhesion of the second photoresist material. In such an embodiment, it may be preferable to use the techniques of blocks 312 and 314 for the seed sublayer, which may be more easily controlled to produce a thinner sublayer, and then switch to the techniques of blocks 308 and 310, which may provide a higher, but less finely controllable, deposition rate that may be used to provide a thicker sublayer of the second EUV-sensitive photoresist.

[0073] Once the EUV-sensitive photoresist film is deposited on the substrate 122, the substrate 122 may be transferred to one or more subsequent processing chambers or tools for further operations, as described above. The remaining blocks of Figure 3 summarize such further operations for one such embodiment, although other embodiments may include other operations or other sequences of operations.

[0074] For example, following completion of the dry deposition processes of blocks 308 / 310 and / or 312 / 314, the substrate 122 may be transferred to a cleaning station in block 316, which may be controlled to perform, for example, backside and / or bevel cleaning operations on the substrate 122 in block 318. Following such post-deposition cleaning, the substrate may be transferred to an EUV scanner system or similar photolithography tool in block 320. In block 322, the EUV scanner may be controlled to apply a photopattern to the substrate using a pattern mask that exposes or shields various portions of the substrate 122 from EUV radiation. The exposure process may continue for a period of time necessary to achieve a desired degree of EUV exposure in exposed areas of the photoresist film on the substrate 122.

[0075] After the EUV scanner has provided sufficient EUV exposure to the substrate 122, the substrate 122 may be transferred to a dry development chamber in block 324 and subjected to a dry development process (such as a thermal-based or plasma-based development process). During such a development process, one or other of the EUV-exposed portions of the substrate 122 and the unexposed portions of the substrate 122 may be removed using a development process (e.g., the dry development process described above) to generate the desired feature mask on the substrate 122.

[0076] After the feature mask is created on the substrate 122, the substrate 122 may be removed from the dry development chamber and provided to a processing chamber (e.g., a deposition or etch chamber) in block 328. An appropriate semiconductor processing operation (e.g., an etch or deposition process) may then be performed in block 330 using the feature mask provided with the patterned EUV-sensitive photoresist film.

[0077] In some embodiments, the controller may be part of a larger system. Such a system may include semiconductor processing equipment, such as one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (e.g., wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics for controlling the operation of the system before, during, and after processing of semiconductor wafers or substrates. The electronics may be referred to as a "controller" and may control various components or subcomponents of the system. Depending on the processing requirements and / or type of system, the controller may be programmed to control any of the processes disclosed herein, such as supply of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid supply settings, position and motion settings, and wafer movement in and out of the tool and other transfer tools and / or load locks connected or coupled to the specific system.

[0078] Generally, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be communicated to the controller in the form of various individual settings (or program files) that define operational parameters for performing specific processes on or for semiconductor wafers or instructions for the system. The operational parameters, in some embodiments, may be part of a recipe defined by a process engineer to accomplish one or more process steps during processing of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0079] In some embodiments, the controller may be part of or connected to a computer that is integrated with, connected to, or otherwise networked with the system, or a combination thereof. For example, the controller may be in the “cloud” or may be all or part of a fab host computer system that can enable remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, or examine trends or performance indicators from multiple manufacturing operations, to change parameters of a current process, configure processing steps according to a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network (which may include a local network or the Internet). The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, where the instructions specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed as well as the type of tool the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, such as by having one or more separate controllers that are networked and operate toward a common purpose (such as the process and control described herein). One example of a distributed controller for such purposes is one or more integrated circuits on the chamber that communicate with one or more remotely located integrated circuits (e.g., located at the platform level or remotely as part of a remote computer) that cooperate to control the process in the chamber.

[0080] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing system that may be associated with or utilized in the fabrication and / or manufacturing of semiconductor wafers.

[0081] As described above, depending on the processing step or steps being performed by the tool, the controller may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used in material transport to carry containers of wafers to or from tool locations and / or load ports within a semiconductor fabrication factory.

[0082] It is generally understood that references to "film," "photoresist film," "deposited layer," "sub-layer," etc. in the context of the dry deposition techniques described herein are intended to include EUV-sensitive photoresist films, even if not expressly stated.

[0083] It will also be understood that the various components of the apparatus may be formed from a variety of suitable materials. For example, as described above, the top plate of the ESC may be formed from a ceramic material, which may function to electrically insulate the clamping electrodes (and resistive heating elements embedded therein) and to protect the base plate disposed thereunder. The upper edge rig and lower edge ring may also be formed from a ceramic material, if desired. Other structures (such as the processing chamber itself, the showerhead, the base plate of the ESC, and the wafer support housing) may be formed from materials such as aluminum alloys, which in some instances may be anodized or otherwise coated with a protective coating. Materials such as aluminum are relatively inexpensive to machine, exhibit good chemical resistance when properly coated, and provide excellent thermal conductivity, making them easily heated to desired operating temperatures.

[0084] It should also be understood that while this disclosure relates to lithographic patterning techniques and materials using EUV lithography as an example, it is also applicable to other next-generation lithography technologies. In addition to EUV, which includes the standard 13.5 nm EUV wavelength currently being used and developed, the most suitable radiation sources for such lithography are DUV (deep UV) (generally referring to the use of 248 nm or 193 nm excimer laser sources), X-ray (which formally includes EUV in the relatively low energy range of the X-ray range), and e-beam (which can cover a wide energy range). Specific methods may depend on the specific materials and applications used for the semiconductor substrate and final semiconductor device. Therefore, the methods described herein are merely exemplary of methods and materials that may be used with current technology.

[0085] It should be understood that, when used herein, phrases such as "for each <item> of one or more <items>," "for each <item> of one or more <items>," and the like, include both single-item groups and multiple-item groups; i.e., the phrase "for each" is used in the sense used in programming languages to refer to each item in any collection of items. For example, if the collection of items referred to is a single item, then "each" refers only to that single item and does not imply that there must be at least two of those items (even though dictionary definitions of "each" often define the term as referring to "every one of two or more"). Similarly, the terms "set" or "subset" should not, by themselves, be considered to necessarily include multiple items; it will be understood that a set or subset may include only one member or multiple members (unless the context suggests otherwise). It should also be understood that the term "set" can similarly be utilized to refer to a group containing one and a group containing more than one. Thus, for example, collectively, there are one or more items that contain one or more subitems, this encompasses a single item that contains a single subitem, a single item that contains multiple subitems, multiple items that each contain a single subitem, and multiple items that each contain multiple subitems, as well as other permutations and combinations (e.g., hybrids of such examples).

[0086] It is understood that the examples and embodiments described herein are for illustrative purposes only, and that various modifications or alterations will occur to those skilled in the art in light thereof. Various details have been omitted for simplicity, and various design changes may be implemented. Therefore, the above examples are to be considered as illustrative and not limiting, and the disclosure is not limited to the details set forth herein, but may be modified within the scope of the disclosure.

[0087] While the above disclosure focuses on one or more particular embodiments, it should be understood that the disclosure is not limited to only the above-described examples, but is also applicable to similar modifications and mechanisms, and such similar modifications and mechanisms are also considered to be within the scope of the present disclosure.

Claims

1. 1. An apparatus for providing a photoresist film, comprising: a processing chamber; a wafer support disposed within the processing chamber; a showerhead disposed above the wafer support and configured to distribute gas flowing therethrough across the wafer support, the showerhead comprising a first plenum fluidly connected to a plurality of first gas distribution ports that lead to a reaction space between the wafer support and the showerhead; Generally, one or more valve manifolds having one or more valves; a controller having one or more processors and one or more memory devices; Equipped with the one or more processors and the one or more memory devices are operatively connected; the one or more memory devices a) actuating at least a first valve of the one or more valves to flow a first organometallic precursor in a vapor phase through the first plenum of the showerhead and into the reaction space via the first gas distribution port; b) actuating at least a second valve of the one or more valves to flow a first reactant in a vapor phase through the second plenum of the showerhead and into the reaction space via the second gas distribution port; An apparatus storing computer-executable instructions for controlling said one or more processors.

2. 10. The apparatus of claim 1, wherein the photoresist film is an extreme ultraviolet photoresist film.

3. 10. The apparatus of claim 1, The first organometallic precursor has the formula M ａ R ｂ L ｃ wherein M is a metal with a high EUV absorption cross section, R is an alkyl, L is a ligand, ion, or other moiety that reacts with said first reaction partner, and a, b, and c are each 1 or greater; The apparatus, wherein the first reaction partner reacts with the first organometallic precursor to chemically bond two or more metal atoms of the first organometallic precursor.

4. 10. The apparatus of claim 1, wherein the metal of the first organometallic precursor is 1.10 ７ cm ２ / mol or greater EUV absorption cross section.

5. 4. The apparatus of claim 3, wherein the first organometallic precursor comprises a metal selected from the group consisting of tin, bismuth, antimony, and tellurium.

6. 4. The apparatus of claim 3, further comprising: a first vaporizer fluidly connected to the first valve; a quantity of the first organometallic precursor disposed in the first vaporizer; An apparatus comprising:

7. 7. The apparatus of claim 6, further comprising: a second vaporizer fluidly connected to the second valve; a quantity of said reaction partner disposed in said second vaporizer; Equipped with wherein the first reaction partner comprises a material selected from the group consisting of water, peroxide, dihydric alcohols, polyhydric alcohols, fluorinated dihydric alcohols, fluorinated polyhydric alcohols, fluorinated glycols, and materials containing one or more hydroxyl moieties.

8. 4. The apparatus of claim 3, wherein the first reaction partner comprises a material selected from the group consisting of water, peroxide, dihydric alcohols, polyhydric alcohols, fluorinated dihydric alcohols, fluorinated polyhydric alcohols, fluorinated glycols, and materials containing one or more hydroxyl moieties.

9. 9. The apparatus of claim 8, further comprising: a second vaporizer fluidly connected to the second valve; a quantity of said reaction partner disposed in said second vaporizer; An apparatus comprising:

10. 10. The apparatus of claim 1, wherein the one or more memory devices further store further computer-executable instructions for further controlling the one or more processors to simultaneously perform (a) and (b).

11. 10. The apparatus of claim 1, wherein the one or more memory devices further store further computer-executable instructions for further controlling the one or more processors to alternately perform (a) and (b) for one or more cycles of (a) and (b).

12. 10. The apparatus of claim 1, wherein the one or more memory devices further comprise: c) actuating at least a third valve of the one or more valves to flow a second organometallic precursor in a vapor phase through the first plenum of the showerhead and into the reaction space via the first gas distribution port; d) actuating at least a fourth valve of the one or more valves to flow a first reactant in a vapor phase through the second plenum of the showerhead and into the reaction volume via the second gas distribution port; storing further computer-executable instructions for further controlling the one or more processors; The apparatus, wherein the first organometallic precursor and the second organometallic precursor are different.

13. 13. The apparatus of claim 12, further comprising: a first vaporizer fluidly connected to the first valve; a second vaporizer fluidly connected to the second valve; a third vaporizer fluidly connected to the third valve; a fourth vaporizer fluidly connected to the second valve; a quantity of the first organometallic precursor disposed in the first vaporizer; a quantity of the first reaction partner disposed in the second vaporizer; a quantity of the second organometallic precursor disposed in the third vaporizer; a quantity of the second reaction partner disposed in the fourth vaporizer; An apparatus comprising:

14. 14. The apparatus of claim 13, wherein the one or more memory devices further comprise: e) performing (a) and (b) to form a first sublayer on a substrate supported by the wafer support; f) performing (c) and (d) after (e) to form a second sub-layer on top of the first sub-layer; storing further computer-executable instructions for further controlling the one or more processors; the first sub-layer is a first metal oxide having a first EUV absorption cross section; the second sub-layer is a second metal oxide having a second EUV absorption cross section; The apparatus, wherein the second EUV absorption cross section is smaller than the first EUV absorption cross section.

15. 14. The apparatus of claim 13, wherein the one or more memory devices further comprise: e) performing (a) and (b) multiple times, alternating, to form a first sublayer on a substrate supported by the wafer support; f) simultaneously performing (c) and (d) after (e) to form a second sublayer on top of the first sublayer; storing further computer-executable instructions for further controlling the one or more processors.

16. 10. The apparatus of claim 1, further comprising: a first heater system for heating the showerhead; a second heater system for heating the processing chamber; a top plate that is part of the wafer support and has a third heater system embedded therein; Equipped with the one or more memory devices further storing further computer-executable instructions for further controlling the one or more processors to control the first heater system, the second heater system, and the third heater system so that the interior wall surface of the processing chamber is at least 95°C higher than the average temperature of the upper plate during (a) and (b).

17. 17. The apparatus of claim 16, wherein the one or more memory devices further store further computer-executable instructions for further controlling the one or more processors to control the first heater system, the second heater system, and the third heater system such that, during (a) and (b), an inner wall surface of the processing chamber reaches at least 95°C and an average temperature of the upper plate is 100°C or less.

18. 17. The apparatus of claim 16, the top plate has a plurality of mesas on its top surface that protrude from a wafer support area; the mesas are configured to support a substrate disposed thereon such that a backside gap exists between the top surface and the substrate; the wafer support includes a plurality of gas ports within the wafer support region that are fluidly connected to the upper surface; the one or more memory devices further storing further computer-executable instructions for further controlling the one or more processors to direct backside cooling gas through the gas ports during (a) and (b).

19. 17. The apparatus of claim 16, the third heater system comprises a plurality of concentric zones; Each zone has one or more resistive heater traces disposed therein; The apparatus, wherein the one or more resistive heater traces in each zone are configured to be independently controllable by the controller.

20. 10. The apparatus of claim 1, further comprising: a vacuum foreline fluidly connected to the processing chamber, the wafer support fluidly interposed between the vacuum foreline and the showerhead; a first bypass line; A second bypass line; Equipped with the first bypass line is fluidly connected to the vacuum foreline and to a first bypass valve of the one or more valves; the second bypass line is fluidly connected to the vacuum foreline and to a second bypass valve of the one or more valves; The one or more memory devices may further comprise: before performing (a), actuating the one or more valves to flow the first organometallic precursor through the first bypass line to the vacuum foreline; before performing (b), actuating the one or more valves to flow the first reaction partner through the second bypass line to the vacuum foreline; storing further computer-executable instructions for further controlling the one or more processors.

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