Power conversion apparatus

Abstract

To provide a power conversion apparatus which can enhance noise characteristics in a low-speed and high-load operation region while reducing switching loss by two-phase modulation.SOLUTION: A control device 21 comprises a command value calculation unit 30 which executes two-phase modulation. The command value calculation unit 30 includes a command value correction section 35. In a case where an output pulse width command value of an intermediate phase, in which the output pulse width command value becomes intermediate, enters a dead zone in a carrier period, the command value correction section 35 applies correction in which the output pulse width command value of the intermediate phase in the carrier period is basically multiplied by a multiplier N (where N is an integer equal to or larger than 2), and executes command value correction control for stopping switching in (N-1) other carrier periods consecutive to the carrier period.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power conversion device that generates a three-phase AC output using an inverter circuit. [Background technology]

[0002] Conventionally, a power conversion device for driving a motor of, for example, an electric compressor for a vehicle has configured a three-phase inverter circuit using upper and lower arm switching elements for each of the UV and W phases, and has controlled the switching elements (IGBTs, etc.) of each phase using PWM (Pulse Width Modulation) to apply a voltage waveform (three-phase AC output) that is close to a sine wave to the motor to drive it.

[0003] The key factor in determining the operating range of an electric compressor is its low-speed, high-load drive characteristics. This is because it is difficult for a typical electric compressor to operate in the low-speed, high-load range. The main reason for this is that when the compressor is operated at low speed, the refrigerant flow rate is low, which deteriorates the cooling characteristics of the switching elements that are cooled by the circulating refrigerant. In addition, under high-load conditions, the motor current increases, which increases losses in the switching elements.

[0004] For these reasons, the temperature of the switching elements is likely to rise under low-speed, high-load conditions, and there is a risk that the switching elements will exceed their heat resistance temperature and be destroyed, making operation difficult. Because the temperature of the switching elements in the inverter circuit that drives the motor depends on the losses in the switching elements, methods have been developed to reduce the losses in the switching elements.

[0005] One known example of such a power conversion device is one that applies a method called two-phase modulation. This two-phase modulation method fixes the ON / OFF states of the upper and lower arm switching elements of one of the UVW phases, and modulates and controls the ON / OFF states of only the upper and lower arm switching elements of the other two phases, thereby reducing the number of switching operations of the switching elements compared to three-phase modulation, and reducing switching loss and heat generation while performing PWM control (see, for example, Patent Document 1).

[0006] The two-phase modulation will be described below with reference to the drawings. First, an example of a general three-phase modulation method is shown in Figures 11 and 12. Figure 12 is an enlarged view of the dashed-line rectangle X3 in Figure 11, where cnt is the carrier signal (a triangular wave in this embodiment), Cu1 is the U-phase output pulse width command value (a count command value normalized between 0 and 1), Cv1 is the V-phase output pulse width command value (a count command value normalized between 0 and 1), Cw1 is the W-phase output pulse width command value (a count command value normalized between 0 and 1), Vu' is the U-phase applied voltage Vu actually applied to the motor from the inverter circuit normalized using the input voltage (hereinafter referred to as the U-phase output applied voltage), Vv' is the V-phase applied voltage Vv normalized using the input voltage (hereinafter referred to as the V-phase output applied voltage), and Vw' is the W-phase applied voltage Vw normalized using the input voltage (hereinafter referred to as the W-phase output applied voltage).

[0007] During PWM switching, switching loss occurs in the switching element (IGBT). Switching loss affects the efficiency of the power conversion device and also leads to a rise in temperature of the switching element. Both efficiency and temperature rise are important factors, and it is desirable to reduce switching loss. However, since low noise is important for electric compressors used in vehicles, the PWM switching frequency (frequency of the carrier signal: carrier frequency) is often set high, such as 20 kHz, which is outside the audible range. Therefore, in three-phase modulation methods such as those shown in Figures 11 and 12, the number of switching times of the switching element increases, resulting in increased switching loss.

[0008] Next, Figures 13 to 16 show examples of the two-phase modulation method described above. Note that the parameters in each figure show the same values ​​as in Figures 11 and 12 (but corrected for two-phase modulation). Also, Figure 14 is an enlarged view of the dashed square X4 portion of Figure 13, and Figure 16 is an enlarged view of the dashed square X5 portion of Figure 15.

[0009] Figures 13 and 14 show the applied voltage command value Vu of each UVW phase. * , Vv * , Vw * After normalizing these values, the modulation value Cmod, which is the minus of the value of the phase (minimum phase) among the values ​​Cu1', Cv1', and Cw1' converted into count values, is added to each phase, and the output pulse width command value Cu1, Cv1, or Cw1 of the minimum phase is set to zero, fixing the lower arm switching element of that phase (minimum phase) to the ON state and the upper arm switching element to the OFF state, thereby pausing PWM operation. This modulation method reduces the number of switching operations of the switching elements compared to the previously described three-phase modulation method, significantly reducing switching losses. Hereinafter, this method will be referred to as subscripted two-phase modulation.

[0010] 15 and 16 show a modulation method in which the difference between the value of the phase (minimum phase) with the smallest value among the above values ​​Cu1', Cv1', and Cw1' and zero is compared with the absolute value of the difference between the value of the phase (maximum phase) with the largest value and the maximum value Cmax (1 after normalization) of the output pulse width command value; if the former is smaller, a modulation value Cmod obtained by minus the minimum phase value is added to each phase; the minimum phase output pulse width command value Cu1, Cv1, or Cw1 is set to zero, the lower arm switching element of that phase (minimum phase) is fixed to the ON state, the upper arm switching element is fixed to the OFF state, and PWM operation is paused; if the latter is smaller, a value obtained by subtracting the maximum phase value from the maximum value Cmax(1) is added to each phase as a modulation value Cmod; the maximum phase output pulse width command value Cu1, Cv1, or Cw1 is set to the maximum value Cmax(1), the upper arm switching element of that phase (maximum phase) is fixed to the ON state, the lower arm switching element is fixed to the OFF state, and PWM operation is paused. This also makes it possible to significantly reduce switching loss compared to the three-phase modulation method described above. Hereinafter, this method will be referred to as upper and lower two-phase modulation.

[0011] In practice, the aforementioned output pulse width command values ​​Cu1, Cv1, and Cw1 are multiplied by the maximum value Cmax (this Cmax is the maximum pulse width command value before normalization) to obtain the pulse width command values ​​Cu, Cv, and Cw for each of the UVW phases. This allows any pulse width command value to be output. [Prior art documents] [Patent documents]

[0012] [Patent Document 1] Patent No. 4276097 Summary of the Invention [Problem to be solved by the invention]

[0013] Figure 17 shows the relationship between noise and current / voltage for this type of motor. The left side of Figure 17 shows the FFT result of the motor current waveform, and the right side shows the noise level measured with a microphone in that case. The power conversion device that drives the motor uses a fixed carrier signal such as the triangular wave mentioned above to drive the motor. This is known to generate noise at the carrier frequency. This occurs when current ripple is superimposed on the motor current due to the PWM generated using the carrier signal, and this current ripple distorts the motor's stator coil. Furthermore, the current ripple causes torque fluctuations in the motor's rotor, causing minute changes in rotation speed, which results in the effect of torque ripple.

[0014] In this way, distortion of the motor current is directly linked to noise. This can be confirmed by the measured waveform in Figure 17. That is, Figure 17 shows that there is a strong correlation between the frequency characteristics of the motor current and noise. For this reason, if the motor current contains harmonic components, noise will be excited, so it is preferable to control the motor current so that it does not contain harmonic components.

[0015] Here, the above-mentioned output pulse width command values ​​Cu1, Cv1, and Cw1 are set at the first timing of the carrier cycle. Therefore, in the case of a triangular wave carrier signal, the pulse width command value can be updated at both or either of the valleys and peaks of the triangular carrier signal shown in FIG. 18.

[0016] On the other hand, if the upper and lower arm switching elements of the same phase in an inverter circuit are turned ON at the same time, the circuit will be short-circuited and a large current will flow through the switching element (IGBT).To avoid such a short circuit, a control device (microcomputer) is generally configured to turn OFF one of the upper and lower arm switching elements, and then turn ON the other switching element after providing a certain period called dead time.

[0017] This will be explained using the aforementioned Fig. 18. In Fig. 18, Cmax is the maximum normalized output pulse width command value (the peak of the crest of the triangular wave, where 0 is the bottom of the valley), Cdt is the value obtained by converting the dead time into a count value (number of pulses) (normalized value), and the range D1 from 0 to Cdt / 2 and the range D2 (shown with thin hatching) from (Cmax - Cdt / 2) to Cmax are dead zones where an output pulse width command value cannot be given in order to ensure the dead time.

[0018] 18, U-phase upper arm PWM indicates the ON / OFF state of the U-phase upper arm switching element, U-phase lower arm PWM indicates the ON / OFF state of the U-phase lower arm switching element, V-phase upper arm PWM indicates the ON / OFF state of the V-phase upper arm switching element, and V-phase lower arm PWM indicates the ON / OFF state of the V-phase lower arm switching element, and the hatched area corresponds to the dead time described above. In order to ensure this dead time, when output pulse width command value Cv1 approaches dead zone D2 as shown in FIG. 18, it can be seen that the ON period of the V-phase lower arm switching element (V-phase lower arm PWM) becomes extremely narrow, as indicated by Z1 in the figure.

[0019] As described above, two-phase modulation adds the modulation value Cmod to each phase to shift the output pulse width command value to zero or to the maximum value Cmax, but as the modulation rate decreases, the voltage amplitude decreases and the output pulse width command value falls more often into the dead zone as shown in Fig. 19. Fig. 19 shows the case where the U-phase output pulse width command value Cu1 falls into the dead zone D1.

[0020] Normally, a narrow U-phase output applied voltage Vu' should be output as shown in the upper box Y1 in FIG. 19, but due to the presence of the dead zone D1, the control device cannot output the U-phase pulse width command value Cu1 as shown in the box Y2 in FIG. 19, and the U-phase output applied voltage Vu' is set to 0, resulting in significant current distortion.

[0021] The upper part of Figure 20 shows the phase currents iu, iv, and iw when the modulation rate is low using two-phase modulation with upper and lower modulation, while the lower part shows the FFT result of the U-phase current iu (when the current feedback control gain is small). With two-phase modulation, when driving in the low modulation rate region where the ratio of output voltage to input voltage is low (AC driving period), it is often impossible to output the output pulse width command value for the middle phase, which is the intermediate value of the output pulse width command value. In such cases, the current becomes distorted. This is evident in the current FFT at the bottom of Figure 20, where there is a significant increase in the components around 1 kHz. For these reasons, when two-phase modulation is used, the current ripple component becomes very large.

[0022] Figure 21 shows the analysis results when the current feedback gain is large (when the current response is increased using two-phase modulation). In this case, two-phase modulation is performed as in Figure 20, but the current control band is increased. In this case, current distortion occurs due to the influence of the dead band, but this current distortion is suppressed by feedback control. As a result, noise around 1 kHz is reduced, but on the other hand, the 5 kHz to 9 kHz component increases. In this way, it is possible to forcibly suppress distortion using feedback control, but in that case the noise characteristics that appear will change depending on the feedback control method, making design difficult.

[0023] Next, Figure 22 shows the case of the above-mentioned conventional technology (Patent Document 1). This conventional technology is used only during the DC drive period, so by taking advantage of the fact that the pulse widths of the U and V phases are equal, the same output pulse width command value is output alternately, thereby reducing switching loss. In addition, since the three phases are not switched simultaneously, there is little electromagnetic noise. When this conventional technology is applied in a region where the modulation rate during the AC drive period is low, it can output a relatively high voltage even in a region where the pulse width of the U-phase output applied voltage Vu' is very small.

[0024] The analysis results for the case in Figure 22 are shown in Figure 23. With this method, the 1 kHz component is suppressed and the current itself is reduced. However, the switching frequency is concentrated at 10 kHz, which is in the audible range, resulting in a loud noise at 10 kHz. When driving at low speeds, it is necessary to reduce both loss and noise at the same time, so this method cannot be used.

[0025] The present invention has been made to solve the above-mentioned conventional technical problems, and aims to provide a power conversion device that can reduce switching losses through two-phase modulation while also improving noise characteristics in the low-speed, high-load operating range. [Means for solving the problem]

[0026] A power conversion device of the present invention includes an inverter circuit that generates a three-phase AC output by switching upper and lower arm switching elements of each phase, and a control device that controls the switching of the upper and lower arm switching elements of each phase by providing a dead zone to ensure a dead time so that the upper and lower arm switching elements of the same phase are not turned on simultaneously. The control device includes a command value calculation unit that performs two-phase modulation by turning on the lower arm switching element of the phase for which a command value for generating a voltage to be applied to each phase is smallest to stop switching, or by turning on the upper arm switching element of the phase for which the command value is largest to stop switching. The command value calculation unit has a command value correction unit that, when a command value for an intermediate phase for which a command value is intermediate falls within the dead zone in a carrier cycle, applies a correction based on multiplying the command value of the intermediate phase in that carrier cycle by a multiplier N (where N is an integer of 2 or greater), and performs command value correction control to stop switching in (N-1) other carrier cycles consecutive to the carrier cycle.

[0027] The power conversion device of the invention of claim 2 is characterized in that in the above invention, the command value calculation unit performs two-phase modulation by turning on the lower arm switching element of the phase for which the command value is smallest to stop switching, and the command value correction unit performs command value correction control by multiplying the command value of the intermediate phase that falls within the dead band by a multiplier N, and sets the command values ​​in the other carrier cycles to zero.

[0028] The power conversion device of the invention of claim 3 is characterized in that in the invention of claim 1, the command value calculation unit performs two-phase modulation by turning on the upper arm switching element of the phase for which the command value is maximum to stop switching, and the command value correction unit, in the command value correction control, multiplies the command value of the intermediate phase that falls within the dead band by a multiplier N and performs a correction by subtracting the value obtained by multiplying the maximum command value by (N-1), so as to make the command values ​​in other carrier periods the maximum value.

[0029] The power conversion device of the invention of claim 4 is characterized in that in each of the above inventions, the command value calculation unit switches between executing two-phase modulation in which the lower arm switching element of the phase with the smallest command value is turned on to stop switching, and two-phase modulation in which the upper arm switching element of the phase with the largest command value is turned on to stop switching.

[0030] The power conversion device of the invention of claim 5 is characterized in that in the inventions of claims 1 to 3, the command value corrector mixes command value correction control in which the multiplier N is changed.

[0031] The power conversion device of the invention of claim 6 is characterized in that in the inventions of claims 1 to 3, the command value calculation unit has a phase voltage command calculation unit that calculates an applied voltage command value for each phase, and a line-to-line modulation calculation unit that calculates an output pulse width command value for each phase from the applied voltage command value for each phase, and the line-to-line modulation calculation unit performs two-phase modulation, and the command value correction unit performs command value correction control on the output pulse width command value for each phase calculated by the line-to-line modulation calculation unit.

[0032] The power conversion device of the invention of claim 7 is characterized in that, in the inventions of claims 1 to 3, the applied voltage at the connection point of the upper and lower arm switching elements of each phase is applied to the motor as a three-phase AC output. [Effects of the Invention]

[0033] According to the present invention, in a power conversion device including an inverter circuit that generates a three-phase AC output by switching upper and lower arm switching elements of each phase, and a control device that controls the switching of the upper and lower arm switching elements of each phase by providing a dead zone that ensures a dead time to prevent the upper and lower arm switching elements of the same phase from being turned ON simultaneously, the control device includes a command value calculation unit that performs two-phase modulation by turning ON the lower arm switching element of the phase for which a command value for generating a voltage to be applied to each phase is minimum to stop switching, or by turning ON the upper arm switching element of the phase for which the command value is maximum to stop switching, so that the number of times the upper and lower arm switching elements are switched can be reduced compared to three-phase modulation, and switching losses can be significantly reduced.

[0034] In particular, in the present invention, the command value calculation unit has a command value correction unit, and when the command value of an intermediate phase for which the command value is intermediate falls within the dead zone in a carrier cycle, this command value correction unit applies a correction based on multiplying the command value of the intermediate phase in that carrier cycle by a multiplier N (where N is an integer of 2 or more) and executes command value correction control to stop switching in (N-1) other carrier cycles consecutive to the carrier cycle.Therefore, when the command value of the intermediate phase in two-phase modulation falls within the dead zone, a correction based on multiplying the command value in that carrier cycle by a multiplier N is applied, making it possible to make the command value deviate from the dead zone.

[0035] This eliminates the inconvenience of being unable to output a command value due to a dead zone as in the past. In particular, since the command value correction control is based on multiplying the command value by the multiplier N, there is an advantage that the control is easier than, for example, when the command value is moved from another carrier cycle.

[0036] On the other hand, in the subsequent (N-1) carrier cycles, the intermediate phase undergoes single-phase modulation, resulting in noise at a frequency 1 / N of the carrier frequency. However, this only occurs when the command value for the intermediate phase falls within the dead zone, so the noise is generated only partially, making it possible to reduce all other noise components.

[0037] As described above, according to the present invention, it is possible to improve the overall noise characteristics through relatively simple control, while reducing losses in the low-speed, high-load range even when driving an electric compressor using a motor such as that of the invention of claim 7.

[0038] In this case, when the command value calculation unit performs two-phase modulation in which the lower arm switching element of the phase with the smallest command value is turned on to stop switching, as in the invention of claim 2, the command value correction unit performs command value correction control by multiplying the command value of the intermediate phase that falls within the dead band by a multiplier N, and sets the command values ​​in the other carrier cycles to zero. This makes it possible to output a command value that is approximately as intended in so-called subscripted two-phase modulation without causing large fluctuations in the command value even after correction.

[0039] Furthermore, when the command value calculation unit executes two-phase modulation in which the upper arm switching element of the phase in which the command value is maximum is turned on to stop switching as in the invention of claim 3, the command value correction unit performs command value correction control by multiplying the command value of the intermediate phase that falls within the dead band by a multiplier N and subtracting a value obtained by multiplying the maximum command value by (N-1), so that the command values ​​in other carrier cycles are set to the maximum value. This makes it possible to output approximately the intended command value even in so-called superscript two-phase modulation, without causing large fluctuations in the command value even after correction.

[0040] The present invention is also effective in the case of so-called upper and lower two-phase modulation in which the command value calculation unit switches between two-phase modulation in which the lower arm switching element of the phase with the smallest command value is turned on to stop switching, and two-phase modulation in which the upper arm switching element of the phase with the largest command value is turned on to stop switching, as in the invention of claim 4.

[0041] Furthermore, if the command value corrector mixes in command value correction control with a changed multiplier N, as in the invention of claim 5, the noise component at a frequency 1 / N of the carrier frequency is diffused. This produces a diffusion effect in the frequency characteristics of the phase current, and further noise suppression effects can be expected.

[0042] In practice, as in the invention of claim 6, the command value calculation unit may be configured to have a phase voltage command calculation unit that calculates an applied voltage command value for each phase, and a line-to-line modulation calculation unit that calculates an output pulse width command value for each phase from the applied voltage command value for each phase, and the line-to-line modulation calculation unit may perform two-phase modulation, and the command value correction unit may perform command value correction control on the output pulse width command value for each phase calculated by the line-to-line modulation calculation unit. [Brief explanation of the drawings]

[0043] [Figure 1] 1 is an electrical circuit diagram of a power conversion device according to an embodiment of the present invention. [Figure 2] 2 is a vertical cross-sectional side view of an electric compressor according to an embodiment of the present invention, which includes the power converter shown in FIG. 1. [Figure 3] 2 is a flowchart illustrating upper and lower two-phase modulation executed by the control device of FIG. 1. [Figure 4] 2 is a flowchart illustrating command value correction control executed by the control device of FIG. 1. [Figure 5] 1. FIG. 2 is a diagram illustrating U-phase output pulse width command values ​​Cu1-1 and Cu1-2 and carrier signal cnt corrected by the command value correction unit of the control device of FIG. 1, and output applied voltages Vu', Vv', and Vw' of each of the UVW phases. [Figure 6]FIG. 10 is a diagram showing U-phase output pulse width command values ​​Cu1-1, Cu1-2 corrected by the command value correction unit, V-phase output pulse width command values ​​Cv1-1, Cv1-2 corrected by the command value correction unit, W-phase pulse width command values ​​Cw1-1, Cw1-2 corrected by the command value correction unit, and output applied voltages Vu', Vv', Vw' of each of the UVW phases in the case of upper and lower two-phase modulation. [Figure 7] FIG. 7 is an enlarged view of the dashed square X1 portion in FIG. 6. [Figure 8] FIG. 10 is a diagram showing U-phase output pulse width command values ​​Cu1-1, Cu1-2 corrected by the command value correction unit, V-phase output pulse width command values ​​Cv1-1, Cv1-2 corrected by the command value correction unit, W-phase pulse width command values ​​Cw1-1, Cw1-2 corrected by the command value correction unit, and output applied voltages Vu', Vv', Vw' of the U, U, and W phases, in the case of two-phase modulation with upper and lower phases. [Figure 9] FIG. 9 is an enlarged view of the dashed square X2 portion in FIG. 8. [Figure 10] 1. FIG. 4 is a diagram showing the FFT results of the phase currents iu, iv, iw and the U-phase current iu in the case of an upper / lower two-phase modulation method by the control device of FIG. [Figure 11] FIG. 10 is a diagram showing output pulse width command values ​​and output applied voltages for each of the UVW phases in the case of a general three-phase modulation method. [Figure 12] FIG. 12 is an enlarged view of the dashed square X3 portion in FIG. [Figure 13] FIG. 10 is a diagram showing output pulse width command values ​​and output applied voltages for each of the UVW phases in the case of a general subscript two-phase modulation method. [Figure 14] FIG. 14 is an enlarged view of the dashed square X4 portion in FIG. [Figure 15] FIG. 10 is a diagram showing output pulse width command values ​​and output applied voltages for each of the UVW phases in the case of a general two-phase modulation method with upper and lower phases. [Figure 16] FIG. 16 is an enlarged view of the dashed square X5 portion in FIG. [Figure 17] FIG. 10 is a diagram showing the relationship between motor noise and current and voltage. [Figure 18] FIG. 1 is a diagram illustrating a dead time and a dead zone in two-phase modulation. [Figure 19] 10A and 10B are diagrams illustrating a case where a U-phase output pulse width command value falls within a dead zone in two-phase modulation. [Figure 20] FIG. 10 is a diagram showing the FFT results of each phase current and the U-phase current when the modulation rate is low in the upper and lower two-phase modulation method (when the gain of the current feedback control is small). [Figure 21] FIG. 10 is a diagram showing the FFT results of each phase current and the U-phase current when the modulation rate is low in the upper and lower two-phase modulation method (when the gain of the current feedback control is large). [Figure 22] FIG. 10 is a diagram showing a U-phase output pulse width command value and an output applied voltage in the case of the prior art (Patent Document 1). [Figure 23] FIG. 23 is a diagram showing the FFT results of each phase current and the U-phase current in the case of FIG. 22. DETAILED DESCRIPTION OF THE INVENTION

[0044] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, an electric compressor (so-called inverter-integrated electric compressor) 16 according to the embodiment, which is integrally equipped with a power conversion device 1 according to the present invention, will be described with reference to Fig. 2. The electric compressor 16 according to the embodiment constitutes part of a refrigerant circuit of a vehicle air conditioner mounted on a vehicle such as a hybrid vehicle or an electric vehicle, and is driven by power supplied from a DC power supply (battery) 29 mounted on the vehicle.

[0045] (1) Configuration of the electric compressor 16 2, the interior of a metal housing 2 of an electric compressor 16 is divided into a compression mechanism accommodating section 4 and an inverter accommodating section 6 by a partition wall 3 that intersects with the axial direction of the housing 2, and a scroll-type compression mechanism 7, for example, and a motor 8 that drives this compression mechanism 7 are housed within the compression mechanism accommodating section 4. In this case, the motor 8 is a star-connected interior permanent magnet synchronous motor (IPMSM) that is made up of a stator 9 fixed to the housing 2 and a rotor 11 with an internal permanent magnet that rotates inside the stator 9.

[0046] A bearing 12 is formed in the center of the partition wall 3 on the compression mechanism-accommodating section 4 side, and one end of a drive shaft 13 of the rotor 11 is supported by this bearing 12, with the other end of the drive shaft 13 connected to the compression mechanism 7. An intake port 14 is formed near the partition wall 3 at a position corresponding to the compression mechanism-accommodating section 4 of the housing 2, and when the rotor 11 (drive shaft 13) of the motor 8 rotates and drives the compression mechanism 7, a refrigerant, which is a working fluid, flows from this intake port 14 into the compression mechanism-accommodating section 4 of the housing 2, where it is sucked into the compression mechanism 7 and compressed.

[0047] The refrigerant compressed by the compression mechanism 7 and having a high temperature and pressure is discharged from a discharge port (not shown) into the refrigerant circuit outside the housing 2. The low-temperature refrigerant that flows in from the suction port 14 passes near the partition wall 3, passes around the motor 8, and is drawn into the compression mechanism 7, thereby cooling the partition wall 3 as well.

[0048] The inverter accommodating section 6, which is separated from the compression mechanism accommodating section 4 by the partition wall 3, accommodates the power conversion device 1 of the present invention that drives and controls the motor 8. In this case, the power conversion device 1 is configured to supply power to the motor 8 via sealed terminals and lead wires that pass through the partition wall 3.

[0049] (2) Structure of the power conversion device 1 In the present embodiment, the power conversion device 1 is configured with a substrate 17, six switching elements 18A to 18F wired on one side of the substrate 17, a control device 21 wired on the other side of the substrate 17, and an HV connector, an LV connector, etc. (not shown). In the present embodiment, the switching elements 18A to 18F are configured with insulated gate bipolar transistors (IGBTs) or the like incorporating a MOS structure in the gate portion.

[0050] In this case, in the embodiment, the upper arm switching element 18A and the lower arm switching element 18D of the U-phase half-bridge circuit 19U, the upper arm switching element 18B and the lower arm switching element 18E of the V-phase half-bridge circuit 19V, and the upper arm switching element 18C and the lower arm switching element 18F of the W-phase half-bridge circuit 19W of the three-phase inverter circuit (three-phase inverter circuit) 28 described later are arranged side by side in pairs.

[0051] Furthermore, terminal portions 22 of each of switching elements 18A to 18F are connected to substrate 17 with the terminal portions 22 facing the center of substrate 17. The power conversion device 1 assembled in this manner is then housed in inverter accommodating section 6 with the side on which each of switching elements 18A to 18F is located facing partition wall 3, attached to partition wall 3, and closed with cover 23. In this case, substrate 17 is fixed to partition wall 3 via boss portions 24 that stand up from partition wall 3.

[0052] With the power conversion device 1 attached to the partition wall 3 in this manner, each of the switching elements 18A to 18F is in close contact with the partition wall 3 directly or via a predetermined insulating and heat-conductive material, and is in a heat exchange relationship with the partition wall 3 of the housing 2. As described above, the partition wall 3 is cooled by the refrigerant drawn into the compression mechanism-accommodating section 4, and therefore each of the switching elements 18A to 18F is in a heat exchange relationship with the drawn refrigerant via the partition wall 3, is cooled by the refrigerant drawn into the compression mechanism-accommodating section 4 through the thickness of the partition wall 3, and each of the switching elements 18A to 18F itself radiates heat to the refrigerant via the partition wall 3.

[0053] (3) Circuit configuration of power conversion device 1 1, the power conversion device 1 of the embodiment includes the above-mentioned three-phase inverter circuit 28 and the control device 21. The inverter circuit 28 is a circuit that converts the DC voltage of a DC power source (vehicle battery: for example, 350 V) 29 into a three-phase AC voltage (three-phase AC output) and applies it to the motor 8.

[0054] Inverter circuit 28 has the above-mentioned U-phase half-bridge circuit 19U, V-phase half-bridge circuit 19V, and W-phase half-bridge circuit 19W, and each of half-bridge circuits 19U to 19W of each phase has upper arm switching elements 18A to 18C and lower arm switching elements 18D to 18F. Furthermore, a free wheel diode 31 is connected in anti-parallel to each of switching elements 18A to 18F.

[0055] The collectors of the upper arm switching elements 18A to 18C of the inverter circuit 28 are connected to an upper arm power supply line (positive bus) 10 of the DC power supply 29 and the smoothing capacitor 32. On the other hand, the emitters of the lower arm switching elements 18D to 18F of the inverter circuit 28 are connected to a lower arm power supply line (negative bus) 15 of the DC power supply 29 and the smoothing capacitor 32.

[0056] In this case, the emitter of upper arm switching element 18A and the collector of lower arm switching element 18D of U-phase half-bridge circuit 19U are connected in series, the emitter of upper arm switching element 18B and the collector of lower arm switching element 18E of V-phase half-bridge circuit 19V are connected in series, and the emitter of upper arm switching element 18C and the collector of lower arm switching element 18F of W-phase half-bridge circuit 19W are connected in series.

[0057] The connection point (U-phase applied voltage Vu) between the upper arm switching element 18A and the lower arm switching element 18D of the U-phase half-bridge circuit 19U is connected to the U-phase armature coil of the motor 8, the connection point (V-phase applied voltage Vv) between the upper arm switching element 18B and the lower arm switching element 18E of the V-phase half-bridge circuit 19V is connected to the V-phase armature coil of the motor 8, and the connection point (W-phase applied voltage Vw) between the upper arm switching element 18C and the lower arm switching element 18F of the W-phase half-bridge circuit 19W is connected to the W-phase armature coil of the motor 8.

[0058] (4) Configuration of the control device 21 Next, the control device 21 is composed of a microcomputer having a processor, and in this embodiment, receives a rotation speed command value from the vehicle's ECU and a motor current (phase current) from the motor 8, and based on these, controls the ON / OFF state (switching) of each of the switching elements 18A to 18F of the inverter circuit 28. Specifically, it controls the gate voltage applied to the gate of each of the switching elements 18A to 18F.

[0059] Control device 21 of the embodiment has command value calculation unit 30, PWM signal generation unit 36, gate driver 37, and current sensors 26A, 26B, and 26C each consisting of a current transformer for measuring U-phase current iu, V-phase current iv, and W-phase current iw, which are motor currents (phase currents) of each phase flowing through motor 8. Current sensor 26A is actually connected between the emitter of lower-arm switching element 18D of U-phase half-bridge circuit 19U and lower-arm power supply line 15, current sensor 26B is connected between the emitter of lower-arm switching element 18E of V-phase half-bridge circuit 19V and lower-arm power supply line 15, and current sensor 26C is connected between the emitter of lower-arm switching element 18F of W-phase half-bridge circuit 19W and lower-arm power supply line 15.

[0060] (4-1) Command value calculation unit 30 Command value calculation unit 30 includes a phase voltage command calculation unit 33, a line modulation calculation unit 34, and a command value correction unit 35, and current sensors 26A to 26C are connected to phase voltage command calculation unit 33. Note that in the embodiment, current sensor 26A measures U-phase current iu, current sensor 26B measures V-phase current iv, and current sensor 26C measures W-phase current iw, but current sensor 26A may measure U-phase current iu, current sensor 26B may measure V-phase current iv, and W-phase current iw may be calculated from these. Alternatively, only the current in lower arm power supply line 15 may be detected, and U-phase current iu, V-phase current iv, and W-phase current iw may be estimated by utilizing the switching conditions of U-phase half-bridge circuit 19U, V-phase half-bridge circuit 19V, and W-phase half-bridge circuit 19W, and used as current sensors 26A to 26C.

[0061] (4-2) Phase voltage command calculation unit 33 The phase voltage command calculation unit 33 of the command value calculation unit 30 calculates a phase applied voltage command value Vu for three-phase modulation to generate a U-phase applied voltage Vu, a V-phase applied voltage Vv, and a W-phase applied voltage Vw to be applied to the armature coils of each phase of the motor 8 by vector control based on the electrical angle of the motor 8, the current command value, and the d-axis current and the q-axis current obtained from the phase current. * (Hereinafter, U-phase applied voltage command value Vu * ), Vv * (Hereinafter, V-phase applied voltage command value Vv * ), Vw * (Hereinafter, W-phase applied voltage command value Vw * ) and generate it.

[0062] Here, we will explain the half-bridge three-phase inverter that drives a star-connected IPMSM. The voltages that the inverter applies to the three-phase motor are Vu, Vv, and Vw. The voltages applied to each phase are potentials from the midpoint potential of the motor, and the motor windings are short-circuited at the midpoint of the three phases. Therefore, the midpoint voltage is the average value of the three-phase applied voltages, and the voltages applied by the inverter and the voltages applied to the motor are related by the following formula (I). Here, Vumtr, Vvmtr, and Vwmtr are the voltages applied to the windings of the motor's U, V, and W phases, and Vu, Vv, and Vw are the applied voltages of the U, V, and W phases.

[0063]

number

[0064] When the IPMSM is expressed in dq axes, which are a rotating coordinate system in which the magnetic pole position is the d axis and the coordinates themselves are rotated, the following formula (II) is obtained.

[0065]

number

[0066] In equation (I), the phase applied voltages are calculated taking into account the midpoint voltage, but from equation (II), it can be seen that the value (Vu + Vv + Vw) / 3, which is equally subtracted from the three phases, is canceled out when converted to the dq axis and is not reflected.

[0067] The voltage equation for the motor in the dq-axis rotating coordinate system is given by the following formula (III): where Id and Iq are the d-axis current and q-axis current, and p is the differential term. Also, Ld and Lq are the d-axis inductance and q-axis inductance, r is the phase resistance, kE is the motor power generation constant, and wre is the motor rotation speed.

[0068]

number

[0069] The torque output by the IPMSM can be expressed by the following formula (IV): where P is the number of pole pairs.

[0070]

number

[0071] When the differential term component of the voltage equation (III) described above is moved to the left side and expressed in the form of a differential equation, it is shown in the following equation (V). The torque of an IPMSM is controlled by the d-axis current Id and q-axis current Iq, but the d-axis current Id and q-axis current Iq can be controlled by the d-axis voltage command value Vd and q-axis voltage command value Vq using feedback or the like. This type of control method is generally known as vector control.

[0072]

number

[0073] The phase voltage command calculation unit 33 calculates the d-axis voltage command value Vd and the q-axis voltage command value Vq obtained by the above-described vector control as applied voltage command values ​​Vu of the UVW phases using the following equations (VI) and (VII). * , Vv* , Vw * Here, Vm is the peak value, θ is the magnetic pole position based on the U phase, θm is the voltage phase difference with respect to the magnetic pole position, and θv is the voltage phase, where θv = θ + θm.

[0074]

number

[0075] In addition, when considering PWM, the applied voltage command value Vu of each phase is * , Vv * , Vw * Therefore, the phase voltage command calculation unit 33 calculates the applied voltage command value Vu using the following formula (VIII): * , Vv * , Vw * are replaced with the count values ​​Cu1', Cv1', and Cw1'. Note that in Equation (VIII), the values ​​are normalized to 0 to 1 as a preliminary step.

[0076]

number

[0077] (4-3) Line modulation calculation unit 34 The line modulation calculation unit 34 of the command value calculation unit 30 calculates the U-phase applied voltage command value Vu calculated by the phase voltage command calculation unit 33. * , V-phase applied voltage command value Vv * , W-phase applied voltage command value Vw * ), the count values ​​Cu1', Cv1', Cw1' are converted into count values ​​and output, and the same modulation value Cmod is added to these count values ​​using the following formula (IX), thereby calculating and outputting output pulse width command values ​​Cu1, Cv1, Cw1, and performing two-phase modulation (line modulation).

[0078]

number

[0079] In the case of the subscript two-phase modulation described above, the line modulation calculation unit 34 calculates the modulation value Cmod using the following formula (X). That is, the modulation value Cmod is calculated by subtracting the value of the phase (minimum phase) that has the smallest count value among Cu1', Cv1', and Cw1'. This modulation value Cmod is then added to each phase using formula (IX), and the output pulse width command value Cu1, Cv1, or Cw1 for the minimum phase is set to zero. The lower arm switching element of that phase (minimum phase) is fixed to the ON state, and the upper arm switching element is fixed to the OFF state, pausing PWM operation. This reduces the number of switching operations of the switching elements compared to three-phase modulation, significantly reducing switching loss.

[0080]

number

[0081] In the case of the above-mentioned superscript two-phase modulation, the line-to-line modulation calculation unit 34 derives the modulation value Cmod as shown in the flowchart of Fig. 3. That is, in step S1 of Fig. 3, the line-to-line modulation calculation unit 34 calculates the modulation value Cmod1 (hereinafter referred to as the modulation value of the superscript two-phase modulation) using the following formula (XI), and further calculates the modulation value Cmod2 of the subscript two-phase modulation using the following formula (XII). Cmod1=1-max(Cu1', Cv1', Cw1')...(XI) Cmod2=-min(Cu1', Cv1', Cw1') ···(XII)

[0082] In formula (XI), max(Cu1', Cv1', Cw1') means the maximum phase value among the count values ​​Cu1', Cv1', and Cw1' described above, and formula (XI) means that this value is subtracted from 1 (normalized maximum value Cmax) to become the modulation value Cmod1 of the superscript two-phase modulation. In formula (XII), min(Cu1', Cv1', Cw1') means the minimum phase value among the count values ​​Cu1', Cv1', and Cw1', and formula (XII) means that the negative value of this value becomes the modulation value Cmod2 of the subscript two-phase modulation.

[0083] Next, in step S2, the modulation value Cmod1 is compared with the value obtained by taking the modulation value Cmod2 as its absolute value, and if the modulation value Cmod1 is greater, the process proceeds to step S3, where the modulation value Cmod1 of the superscript two-phase modulation is set as the modulation value Cmod of formula (IX), and if the modulation value Cmod1 is equal to or less than the absolute value of the modulation value Cmod2, the process proceeds to step S4, where the modulation value Cmod2 of the subscript two-phase modulation is set as the modulation value Cmod of formula (IX).

[0084] When the modulation value Cmod1 of the superscript two-phase modulation is set to the modulation value Cmod in step S3, the modulation value Cmod1 (Cmod in this case) is added to all the count values ​​Cu1', Cv1', and Cw1' in formula (IX), so the output pulse width command value Cu1, Cv1, or Cw1 of the maximum phase (maximum phase) becomes 1, the upper arm switching element of that phase (maximum phase) is fixed to the ON state, and the lower arm switching element is fixed to the OFF state, and PWM operation is paused. This is superscript two-phase modulation.

[0085] On the other hand, when the modulation value Cmod2 of the subscript two-phase modulation is set to the modulation value Cmod in step S4, the modulation value Cmod2 (Cmod in this case) is added to all the count values ​​Cu1', Cv1', and Cw1' in formula (IX), so the output pulse width command value Cu1, Cv1, or Cw1 of the smallest phase (minimum phase) becomes zero, the lower arm switching element of that phase (minimum phase) is fixed to the ON state, the upper arm switching element is fixed to the OFF state, and PWM operation is paused (subscript two-phase modulation). In this way, with subscript two-phase modulation, by switching between subscript two-phase modulation and superscript two-phase modulation, the number of switching operations of the switching elements is reduced compared to three-phase modulation, and switching losses are significantly reduced.

[0086] (4-4) Command value correction unit 35 The command value correction unit 35 of the command value calculation unit 30 executes command value correction control to apply corrections to the output pulse width command values ​​Cu1, Cv1, and Cw1 of each phase calculated by the line modulation calculation unit 34, which will be described in detail later.

[0087] (4-5) PWM signal generation section 36 The PWM signal generating unit 36 ​​inputs the output pulse width command values ​​Cu1, Cv1, Cw1 calculated by the line modulation calculating unit 34 (the pulse width command values ​​Cu1, Cv1, Cw1 corrected by the command value correcting unit 35), and multiplies them by Cmax (the maximum value of the output pulse width command value) as shown in the following formula (XIII), thereby outputting the pulse width command values ​​Cu, Cv, Cw for each of the UVW phases.

[0088]

number

[0089] Then, by comparing the magnitudes of the pulse width command values ​​Cu, Cv, and Cw of each of the UVW phases with the triangular wave carrier signal cnt (carrier period: 20 kHz in this embodiment), a PWM signal is generated and output as a drive command signal for the U-phase half-bridge circuit 19U, V-phase half-bridge circuit 19V, and W-phase half-bridge circuit 19W of the inverter circuit 28.

[0090] (4-6) Gate driver 37 Based on the PWM signal output from the PWM signal generating unit 36, the gate driver 37 generates gate voltages for the switching elements 18A and 18D of the U-phase half-bridge circuit 19U, gate voltages for the switching elements 18B and 18E of the V-phase half-bridge circuit 19V, and gate voltages for the switching elements 18C and 18F of the W-phase half-bridge circuit 19W.

[0091] Each of the switching elements 18A-18F of the inverter circuit 28 is driven to turn on / off based on the gate voltage output from the gate driver 37. That is, when the gate voltage is in the ON state (a predetermined voltage value), the switching element operates ON, and when the gate voltage is in the OFF state (zero), the switching element operates OFF. If the switching elements 18A-18F are the IGBTs described above, the gate driver 37 is a circuit for applying the gate voltage to the IGBTs based on a PWM signal, and is composed of a photocoupler, a logic IC, a transistor, etc.

[0092] The voltage at the connection point between the upper arm switching element 18A and the lower arm switching element 18D of the U-phase half-bridge circuit 19U is applied (output) to the U-phase armature coil of the motor 8 as a U-phase applied voltage Vu (phase voltage), the voltage at the connection point between the upper arm switching element 18B and the lower arm switching element 18E of the V-phase half-bridge circuit 19V is applied (output) to the V-phase armature coil of the motor 8 as a V-phase applied voltage Vv (phase voltage), and the voltage at the connection point between the upper arm switching element 18C and the lower arm switching element 18F of the W-phase half-bridge circuit 19W is applied (output) to the W-phase armature coil of the motor 8 as a W-phase applied voltage Vw (phase voltage).

[0093] (5) Command value correction control of the command value corrector 35 Next, the command value correction control by the command value corrector 35 in this embodiment will be described with reference to Figures 4 to 10. The following description will be given taking the above-mentioned upper and lower two-phase modulation as an example.

[0094] (5-1) Derivation of modulation values ​​Cmod1 and Cmod2 for two-phase modulation with upper and lower In step S6 of the flowchart in Fig. 4, the line-to-line modulation calculation unit 34 calculates Cmod1 (the modulation value of the superscript two-phase modulation) and Cmod2 (the modulation value of the subscript two-phase modulation) of the upper and lower two-phase modulation according to the flowchart in Fig. 3. Then, the modulation value Cmod1 is compared with the absolute value of the modulation value Cmod2, and if the modulation value Cmod1 is greater, the modulation value Cmod1 of the superscript two-phase modulation is set as the modulation value Cmod, and if the modulation value Cmod1 is equal to or less than the absolute value of the modulation value Cmod2, the modulation value Cmod2 of the subscript two-phase modulation is set as the modulation value Cmod, thereby deriving the modulation value Cmod of formula (IX).

[0095] Next, in step S7, the modulation value Cmod is added to all count values ​​Cu1', Cv1', Cw1' using formula (IX), thereby deriving output pulse width command values ​​Cu1, Cv1, Cw1 for each of the UVW phases. This is what the line modulation calculation unit 34 does in the flowchart of Fig. 4. The subsequent steps S8 and onwards are executed by the command value correction unit 35.

[0096] That is, the command value corrector 35 determines whether the modulation value Cmod2 of the subscript two-phase modulation is set to the modulation value Cmod or whether the modulation value Cmod1 of the superscript two-phase modulation is set to the modulation value Cmod in step S8 of the flowchart in Fig. 4. If the modulation value Cmod2 of the subscript two-phase modulation is set to the modulation value Cmod, the process proceeds to step S9, and if the modulation value Cmod1 of the superscript two-phase modulation is set to the modulation value Cmod, the process proceeds to step S11.

[0097] (5-2) Determination of Dead Zone by Command Value Correction Unit 35 In step S9, the command value corrector 35 determines whether the output pulse width command value for the middle phase is smaller than Cdt / 2 using the following formula (XIV). mid(Cu1, Cv1, Cw1) <Cdt / 2 ···(XIV) In the above formula (XIV), mid (Cu1, Cv1, Cw1) means the output pulse width command value of the phase (middle phase) whose output pulse width command value is middle. Also, Cdt is a value (normalized value) obtained by converting the dead time explained in Fig. 18 into a count value (number of pulses), and in formula (XIV), the output pulse width command value of the middle phase being smaller than Cdt / 2 means that the output pulse width command value of the middle phase falls within the dead zone D1 ranging from 0 to Cdt / 2.

[0098] For example, when the W phase is the minimum phase and the U phase is the intermediate phase, if the U-phase output pulse width command value Cu1 falls within the dead zone D1 in a certain carrier cycle, the answer is YES in step S9 and the process proceeds to step S10. In step S10, command value corrector 35 multiplies the U-phase output pulse width command value Cu1 of the carrier cycle that falls within the dead zone D1 by a multiplier N (multiplier N is an integer of 2 or more. In this embodiment, multiplier N is 2) to calculate a U-phase output pulse width command value Cu1-1 for that carrier cycle, and sets the U-phase output pulse width command value Cu1-2 for the (N-1)th carrier cycle following that carrier cycle, i.e., for one carrier cycle, to zero (0).

[0099] That is, in this case, the command value corrector 35 calculates command values ​​for two carrier cycles in one operation. The U-phase output pulse width command values ​​Cu1-1 and Cu1-2 corrected by the command value corrector 35 are then returned to the line-to-line modulation calculator 34, and are output from the line-to-line modulation calculator 34 to the PWM signal generator 36.

[0100] This is shown in Figure 5. If the U-phase output pulse width command value Cu1 falls within the dead band D1 during the carrier cycle A1 at the left end of Figure 5, the U-phase output pulse width command value for that carrier cycle A1 is doubled to Cu1-1, which deviates from the dead band D1. Therefore, the U-phase output applied voltage Vu' is output during that carrier cycle A1. Meanwhile, the U-phase output pulse width command value Cu1-2 for the following carrier cycle A2 is set to zero. As a result, the U-phase upper arm switching element 18A is fixed to the OFF state and the U-phase lower arm switching element 18D is fixed to the ON state. This results in single-phase modulation during that carrier cycle A2, and no U-phase output applied voltage Vu' is output. This process is repeated thereafter as long as the U-phase output pulse width command value Cu1 falls within the dead band D1.

[0101] On the other hand, if the modulation value Cmod1 of the superscript two-phase modulation is set to the modulation value Cmod in step S8 of the flowchart in FIG. 4, the process proceeds to step S11, where the command value corrector 35 determines whether the output pulse width command value of the middle phase is larger than Cmax-Cdt / 2 using the following formula (XV). mid(Cu1, Cv1, Cw1)>(Cmax-Cdt / 2) ···(XV) Similarly, mid(Cu1, Cv1, Cw1) in the above formula (XV) means the output pulse width command value of the phase (middle phase) whose output pulse width command value is middle. Also, in formula (XV), the output pulse width command value of the middle phase being larger than (Cmax-Cdt / 2) means that the output pulse width command value of the middle phase falls within the dead zone D2, which is between (Cmax-Cdt / 2) and Cmax.

[0102] For example, if the W phase is the maximum phase and the U phase is an intermediate phase and the U phase output pulse width command value Cu1 falls within the dead zone D2 in a certain carrier cycle, the answer is YES in step S11 and the process proceeds to step S12. In step S12, command value corrector 35 multiplies the U phase output pulse width command value Cu1 of the carrier cycle falling within the dead zone D2 by the multiplier N (2 in this embodiment) and subtracts the maximum value Cmax*(N-1) from the multiplier to calculate a U phase output pulse width command value Cu1-1 of that carrier cycle, and sets the U phase output pulse width command value Cu1-2 for the (N-1)th carrier cycle following the carrier cycle, i.e., for one carrier cycle, as the maximum value Cmax.

[0103] In this embodiment, since the multiplier N is set to 2, Cmax*(N-1) in the formula for calculating Cu1-1 in step S12 above becomes Cmax*(2-1), which becomes Cmax in step S12 of the embodiment. That is, in this case as well, the command value corrector 35 calculates and outputs command values ​​for two carrier cycles at a time, and thereafter, if the U-phase output pulse width command value Cu1 falls within the dead zone D2, this process is repeated in sequence. The U-phase output pulse width command values ​​Cu1-1 and Cu1-2 corrected by the command value corrector 35 are similarly returned to the line-to-line modulation calculator 34, and are output from the line-to-line modulation calculator 34 to the PWM signal generator 36. The above is the command value correction control executed by the command value corrector 35 for the output pulse width command value Cu1.

[0104] Here, in the case of the above embodiment, {(Cu1-1)+(Cu1-2)} / 2=Cu1, so it can be seen that by averaging over two carrier periods, it is possible to output an output pulse width command value that is approximately as intended.

[0105] In particular, in the case of subscripted two-phase modulation, the output pulse width command value of the middle phase becomes a value close to zero, but as in the command value correction control described above, in the case of subscripted two-phase modulation, the output pulse width command value of the middle phase that falls within the dead band D1 in the carrier cycle is corrected by multiplying it by the multiplier N, and the output pulse width command value is set to zero in the (N-1) carrier cycles following that carrier cycle, so the output pulse width command value does not fluctuate greatly after correction.

[0106] On the other hand, in the case of superscript two-phase modulation, the output pulse width command value of the middle phase becomes a value close to the maximum value Cmax. However, as in the command value correction control described above, in the case of superscript two-phase modulation, the output pulse width command value of the middle phase that falls within the dead band D2 in a carrier period is multiplied by the multiplier N and corrected by subtracting the maximum value Cmax*(N-1), so that the output pulse width command value is set to the maximum value Cmax in the (N-1) carrier periods following that carrier period. Similarly, the output pulse width command value does not fluctuate greatly after correction.

[0107] The manner in which the command value correction control is performed in the above-described upper and lower two-phase modulation is shown in Figures 6 and 8. In the figures, Cu-1 and Cu-2 are the U-phase output pulse width command values ​​corrected as described above, Cv-1 and Cv-2 are the V-phase output pulse width command values ​​corrected as described above, Cw-1 and Cw-2 are the W-phase output pulse width command values ​​corrected as described above, Vu' is the U-phase output applied voltage, Vv' is the V-phase output applied voltage, and Vw' is the W-phase output applied voltage. Figure 7 is an enlarged view of the dashed-line square X1 in Figure 6, and Figure 9 is an enlarged view of the dashed-line square X2 in Figure 8. Both Figures 7 and 9 show the region in which the U-phase is the middle phase.

[0108] As can be seen from Figures 7 and 9, the middle phase, the U phase, is switched once every two carrier periods. Figure 10 shows the FFT results of the phase currents iu, iv, and iw and the U phase current iu in the case of the two-phase modulation method with upper and lower phases using command value correction control. The command value correction control of the present invention partially utilizes single-phase modulation, and in this embodiment, the multiplier N is set to 2. This partially generates noise at 10 kHz, half the carrier frequency. As a result, the 10 kHz noise component increases slightly.

[0109] On the other hand, it can be seen that the other overall noise components are lower than in the cases of Figures 20, 21, and 23. In other words, command value correction control has made it possible to obtain the effect of single-phase modulation, which can suppress overall noise, while minimizing the increase in the 10 kHz noise component.

[0110] As described above, since the present invention performs two-phase modulation, the number of switching operations of the upper and lower arm switching elements can be reduced compared to three-phase modulation, thereby significantly reducing switching loss. In particular, in the present invention, the command value calculation unit has a command value correction unit, and when a command value of a middle phase, for which the command value is intermediate, falls within a dead zone in a carrier cycle, this command value correction unit performs command value correction control that applies a correction based on multiplying the command value of the middle phase in that carrier cycle by a multiplier N (where N is an integer of 2 or greater) and stops switching in (N-1) other carrier cycles consecutive to the carrier cycle. Therefore, when a command value of a middle phase in two-phase modulation falls within the dead zone, a correction based on multiplying the command value by the multiplier N in that carrier cycle can be applied to cause the command value to deviate from the dead zone.

[0111] This eliminates the inconvenience of being unable to output a command value due to a dead zone as in the past. In particular, since the command value correction control is based on multiplying the command value by the multiplier N, there is an advantage that the control is easier than, for example, when the command value is moved from another carrier cycle.

[0112] On the other hand, in the subsequent (N-1) carrier cycles, the intermediate phase undergoes single-phase modulation, resulting in noise at a frequency 1 / N of the carrier frequency. However, this only occurs when the command value for the intermediate phase falls within the dead zone, so the noise is generated only partially, making it possible to reduce all other noise components.

[0113] As described above, according to the present invention, it is possible to improve the overall noise characteristics through relatively simple control, while reducing losses in the low-speed, high-load range even when the electric compressor is driven by a motor as in the embodiment.

[0114] In this case, in the embodiment, when the command value calculation unit executes subscript two-phase modulation, the command value correction unit performs a correction in the command value correction control by multiplying the command value of the intermediate phase that falls within the dead band by the multiplier N, and sets the command values ​​in the other carrier cycles to zero. Therefore, in the subscript two-phase modulation, the command value can be output approximately as intended without large fluctuations in the command value even after correction.

[0115] Furthermore, when the command value calculation unit executes superscript two-phase modulation, the command value correction unit performs command value correction control by multiplying the command value of the intermediate phase that falls within the dead band by a multiplier N and subtracting the value obtained by multiplying the maximum command value by (N-1), so that the command values ​​in other carrier cycles become the maximum value. Therefore, even in superscript two-phase modulation, the command value does not fluctuate greatly even after correction, and it is possible to output a command value that is approximately as intended. The above is particularly effective in the case of superscript two-phase modulation as in the embodiment.

[0116] (6) Multiplier N in command value correction control In the above embodiment, the multiplier N is 2, but it may be a larger value such as 3 or 4. If the multiplier N is 3, for example, when the U phase enters the dead zone in the middle phase, three output pulse width command values ​​Cu1-1, Cu1-2, and Cu1-3 are calculated. In other words, three carrier cycles are calculated at once.

[0117] In the case of subscript two-phase modulation, the output pulse width command value Cu1-1 of the carrier cycle that first enters the dead band is set to 3*Cu1, and the output pulse width command values ​​Cu1-2 and Cu1-3 of the following two carrier cycles are set to zero. In the case of superscript two-phase modulation, Cu1-1 is set to 3*Cu1-(2*Cmax), and the output pulse width command values ​​Cu1-2 and Cu1-3 of the following two carrier cycles are set to Cmax. In other words, {(Cu1-1)+(Cu1-2)+(Cu1-3)} / 3=Cu1.

[0118] (7) Mixing of multipliers N Furthermore, the multiplier N may be changed to mix different multipliers N. That is, command value correction control that uses both the case where the multiplier N is 2 in the above-described embodiment and the case where the multiplier N is 3, for example, may be mixed. In this way, if the command value corrector 35 mixes command value correction control with a different multiplier N, the noise component at a frequency 1 / N of the carrier frequency is diffused. This produces a diffusion effect in the frequency characteristics of the phase current, and further noise suppression effects can be expected.

[0119] In the above embodiments, subscript two-phase modulation and upper / lower two-phase modulation have been described, but the present invention is also effective when superscript two-phase modulation is performed. In this case, the command value correction control (steps S11 and S12 in FIG. 4) for superscript two-phase modulation during the above-described upper / lower two-phase modulation is executed.

[0120] Furthermore, in the embodiment, the present invention is applied to a power conversion device 1 that controls the drive of the motor 8 of an electric compressor, but the invention is not limited to this in the inventions other than claim 7, and the present invention is effective when various devices are controlled by an inverter circuit. [Explanation of symbols]

[0121] 1 Power conversion device 8 motors 18A~18F Upper and lower arm switching elements 19U U-phase half-bridge circuit 19V V-phase half-bridge circuit 19W W-phase half-bridge circuit 21 Control device 28 Inverter circuit 30 Command value calculation unit 33 Phase voltage command calculation unit 34 Line modulation calculation section 35 Command value correction unit 36 PWM signal generation section 37 Gate Driver

Claims

1. A power conversion device including an inverter circuit that generates a three-phase AC output by switching upper and lower arm switching elements of each phase, and a control device that controls the switching of the upper and lower arm switching elements of each phase by providing a dead zone that ensures a dead time so that the upper and lower arm switching elements of the same phase do not turn on simultaneously, The control device a command value calculation unit that performs two-phase modulation by turning on the lower arm switching element of a phase for which a command value for generating a voltage to be applied to each phase is minimum, thereby stopping switching, or by turning on the upper arm switching element of a phase for which the command value is maximum, thereby stopping switching, The command value calculation unit has a command value correction unit, The command value correction unit When the command value of an intermediate phase for which the command value is intermediate falls within the dead zone in a carrier cycle, a correction is made based on multiplying the command value of the intermediate phase in that carrier cycle by a multiplier N (where N is an integer of 2 or more), and command value correction control is executed to stop switching in (N-1) other carrier cycles consecutive to the carrier cycle.

2. the command value calculation unit performs two-phase modulation by turning on the lower arm switching element of the phase in which the command value is smallest to stop switching, and 2. The power conversion device according to claim 1, wherein the command value correction unit performs a correction by multiplying the command value of the intermediate phase that falls within the dead zone by the multiplier N in the command value correction control, and sets the command value in the other carrier cycle to zero.

3. the command value calculation unit performs two-phase modulation by turning on the upper arm switching element of the phase in which the command value is maximum to stop switching, and 2. The power conversion device according to claim 1, wherein, in the command value correction control, the command value correction unit performs a correction by multiplying the command value of the intermediate phase that falls within the dead zone by the multiplier N and subtracting a value obtained by multiplying the maximum value of the command value by (N-1), thereby setting the command value in the other carrier cycle to the maximum value.

4. The command value calculation unit 4. The power conversion device according to claim 1, wherein the power conversion device switches between two-phase modulation in which the lower arm switching element of the phase for which the command value is smallest is turned on to stop switching, and two-phase modulation in which the upper arm switching element of the phase for which the command value is largest is turned on to stop switching.

5. 4. The power conversion device according to claim 1, wherein the command value corrector performs the command value correction control in which the multiplier N is changed.

6. The command value calculation unit a phase voltage command calculation unit that calculates an applied voltage command value for each phase; a line modulation calculation unit that calculates an output pulse width command value for each phase from an applied voltage command value for each phase; The line modulation calculation unit executes the two-phase modulation, 4. The power conversion device according to claim 1, wherein the command value corrector executes the command value correction control on the output pulse width command values ​​for the respective phases calculated by the line modulation calculator.

7. 4. The power conversion device according to claim 1, wherein a voltage applied to a connection point between the upper and lower arm switching elements of each phase is applied to a motor as the three-phase AC output.

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