Signal input output device

Abstract

To make difference smaller between a voltage outputted from a buffer amplifier and a voltage outputted from an operational amplifier connected to it in a signal input output device including a multiplexer.SOLUTION: A multiplexer 11 includes a plurality of main input parts 21 and a plurality of dummy input parts 22 individually for a plurality of operational amplifiers 12, and an output part 23. Each of the operational amplifiers 12 is connected to corresponding main input part 21 and dummy input part 22 through individual RC filter 31, 32. The output part 23 is connected to a buffer amplifier 13. A state that the output part 23 is connected to the main input part 21 corresponding to a first operational amplifier 12a is changed over to a state that the output part 23 is connected to the dummy input part 22 corresponding to a second operational amplifier 12b, and then, changed over to a state that the output part 23 is connected to the main input part 21 corresponding to the second operational amplifier 12b.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a signal input / output device including a multiplexer. [Background technology]

[0002] In the input signal processing device described in Patent Document 1, a multiplexer and multiple operational amplifiers are connected. The output of the multiplexer outputs a signal input from any of the multiple operational amplifiers. An RC filter (low-pass filter) is connected between each operational amplifier and the multiplexer. In addition, in the input signal processing device described in Patent Document 1, before switching the state in which the output of the multiplexer is connected to one operational amplifier to another operational amplifier, the output of the multiplexer is connected to a chm terminal held at ground potential, thereby forcibly discharging the charge stored in the capacitor on the output side rapidly. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-185322 Summary of the Invention [Problem to be solved by the invention]

[0004] In the input signal processing device of Patent Document 1, the low-pass filter between the operational amplifier and the multiplexer includes a capacitor. This capacitor is charged by the potential output from the operational amplifier. When the output of the multiplexer is connected to the operational amplifier, the charge stored in this capacitor and the charge stored in the output-side capacitor (pattern capacitance) cause a discrepancy between the output potential of the multiplexer and the potential output from the operational amplifier. Furthermore, the greater the difference between the potential of the multiplexer output just before it is connected to the operational amplifier and the potential output from the operational amplifier, the greater this discrepancy becomes.

[0005] On the other hand, as in Patent Document 1, when the output of a multiplexer is connected to the chm terminal held at ground potential and then connected to an operational amplifier, if the potential output from the operational amplifier connected to the output of the multiplexer is high, the difference between the potential of the chm terminal (ground potential) and the potential output from the operational amplifier is large. Therefore, in this case, the difference between the potential of the multiplexer output just before it is connected to the operational amplifier and the potential output from the operational amplifier also becomes large. As a result, in the case of Patent Document 1, when the operational amplifier is connected to the output of the multiplexer, the difference between the potential of the output of the multiplexer and the potential output from the operational amplifier becomes large.

[0006] An object of the present invention is to provide a signal input / output device that can minimize the difference between the potential of the output of a multiplexer when the output of the multiplexer is connected to an operational amplifier and the potential output from this operational amplifier. [Means for solving the problem]

[0007] A signal input / output device according to a first aspect of the present invention comprises a plurality of operational amplifiers, a multiplexer, and a control unit that controls the multiplexer, wherein the multiplexer has a plurality of main input sections provided individually for each of the plurality of operational amplifiers, at least one dummy input section provided individually for at least one of the plurality of operational amplifiers, and an output section selectively connected to either the plurality of main input sections or the at least one dummy input section, wherein the plurality of operational amplifiers include a first operational amplifier and a second operational amplifier separate from the first operational amplifier and connected to the dummy input section, and the control unit controls the multiplexer so as to switch from a state in which the output section is connected to the main input section corresponding to the first operational amplifier to a state in which the output section is connected to the dummy input section corresponding to the second operational amplifier, and then to a state in which the output section is connected to the main input section corresponding to the second operational amplifier.

[0008] Here, consider a case where, unlike the present invention, the multiplexer is controlled so as to switch from a state in which the output section is connected to the main input section corresponding to the first operational amplifier to a state in which the output section is directly connected to the main input section corresponding to the second operational amplifier. When switching in this manner, the difference between the potential output from the output section and the potential output from the second operational amplifier may become large when the output section is connected to the main input section corresponding to the second operational amplifier due to the influence of the charge existing between the operational amplifier and its corresponding main input section and the charge stored in the pattern capacitance of the output section.

[0009] In contrast, by switching the connection destination of the output unit as in the present invention, it is possible to reduce the difference between the potential output from the output unit and the potential output from the second operational amplifier when the output unit is connected to the main input unit corresponding to the second operational amplifier. Note that in the present invention, the first operational amplifier may be an operational amplifier connected to a dummy input unit or may be an operational amplifier not connected to a dummy output unit.

[0010] A signal input / output device according to a second aspect of the present invention comprises a plurality of operational amplifiers, a multiplexer, and a control unit that controls the multiplexer, wherein the multiplexer has a plurality of main input sections provided individually for each of the plurality of operational amplifiers, at least one dummy input section provided individually for at least one of the plurality of operational amplifiers, and an output section selectively connected to either the plurality of main input sections or the at least one dummy input section, and the plurality of operational amplifiers include a third operational amplifier, a fourth operational amplifier separate from the third operational amplifier, and a and a fifth operational amplifier connected to the dummy input section, wherein a difference between the potential output by the fifth operational amplifier and the potential output by the fourth operational amplifier is smaller than a difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, and the control section controls the multiplexer to switch from a state in which the output section is connected to the main input section corresponding to the third operational amplifier to a state in which the output section is connected to the dummy input section corresponding to the fifth operational amplifier, and then to a state in which the output section is connected to the main input section corresponding to the fourth operational amplifier.

[0011] Here, consider a case where, unlike the present invention, the multiplexer is controlled so as to switch from a state in which the output section is connected to the main input section corresponding to the third operational amplifier to a state in which the output section is directly connected to the main input section corresponding to the fourth operational amplifier. In this case, when the output section is connected to the main input section corresponding to the fourth operational amplifier, the difference between the potential output from the output section and the potential output from the fourth operational amplifier may become large.

[0012] In contrast, by switching the connection destination of the output unit as in the present invention, it is possible to reduce the difference between the potential output from the output unit and the potential output from the fourth operational amplifier when the output unit is connected to the main input unit corresponding to the fourth operational amplifier.

[0013] The signal input / output device of the third invention is a signal input / output circuit of the second invention, and includes a plurality of operational amplifiers individually connected to each of the plurality of dummy input sections, and among the plurality of operational amplifiers connected to the dummy input sections, the potential output by the fifth operational amplifier has the smallest difference from the potential output by the fourth operational amplifier.

[0014] According to the present invention, when the output section is connected to the main input section corresponding to the fourth operational amplifier, the difference between the potential output from the output section and the potential output from the fourth operational amplifier can be particularly reduced. [Effects of the Invention]

[0015] In the present invention, when the output section of the multiplexer is connected to the main input section corresponding to the operational amplifier, the difference between the potential output from the output section and the potential output from this operational amplifier can be reduced. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a diagram illustrating a configuration of a signal input / output device according to a first embodiment. [Figure 2] (a) is a diagram for explaining a state in which the output section is connected to a main input section corresponding to a first operational amplifier, (b) is a diagram for explaining a state in which the output section is connected to a dummy input section corresponding to a second operational amplifier, and (c) is a diagram for explaining a state in which the output section is connected to a main input section corresponding to the second operational amplifier. [Figure 3] (a) is a diagram for explaining a state in which there is no dummy input section and the output section is connected to the main input section corresponding to the first operational amplifier, (b) is a diagram for explaining a state in which there is no dummy input section and the output section is connected to the main input section corresponding to the second operational amplifier, and (c) is a diagram for explaining a case in which the output section is connected to the ground terminal before switching from the state (a) to the state (b). [Figure 4] FIG. 10 is a diagram illustrating a configuration of a signal input / output device according to a second embodiment. [Figure 5](a) is a diagram for explaining a state in which the output section is connected to a main input section corresponding to a third operational amplifier, (b) is a diagram for explaining a state in which the output section is connected to a dummy input section corresponding to a fourth operational amplifier, and (c) is a diagram for explaining a state in which the output section is connected to a main input section corresponding to a fifth operational amplifier. [Figure 6] FIG. 10 is a diagram illustrating a configuration of a signal input / output device according to a third embodiment. [Figure 7] 10A and 10B are diagrams for explaining an input section instructing connection of a switching signal and changes in each enable signal in the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0017] [First embodiment] A first preferred embodiment of the present invention will be described with reference to FIG.

[0018] <Configuration of Signal Input / Output Device> The signal input / output device 1 of the first embodiment includes a multiplexer 11, four operational amplifiers 12, a buffer amplifier 13, and a control unit .

[0019] The multiplexer 11 has four main inputs 21, four dummy inputs 22 and an output 23.

[0020] The four main input sections 21 are provided for respective ones of the four operational amplifiers 12. Each main input section 21 is connected to a corresponding operational amplifier 12 via an RC filter 31. The four dummy input sections 22 are provided for respective ones of the four operational amplifiers 12. Each dummy input section 22 is connected to a corresponding operational amplifier 12 via an RC filter 32. Each of the RC filters 31, 32 has a resistor 33 and a capacitor 34, and suppresses noise (high frequency components) input to the corresponding main input section 21 or dummy input section 22.

[0021] Here, if the distance D between the operational amplifier 12 and the corresponding main input section 21 and dummy input section 22 is long (for example, 10 cm or more), noise is likely to enter the main input section 21 and dummy input section 22 via the wiring connecting the operational amplifier 12 and the corresponding main input section 21 and dummy input section 22. Therefore, in the first embodiment, as described above, an RC filter 31 is connected between the operational amplifier 12 and the corresponding main input section 21 to suppress noise input to the main input section 21. In addition, an RC filter 32 is connected between the operational amplifier 12 and the corresponding dummy input section 22 to suppress noise input to the dummy input section 22.

[0022] Here, it is explained that the distance between each operational amplifier 12 and its corresponding main input section 21, and the distance between each operational amplifier 12 and its corresponding dummy input section 22 are the same, but the distance between each operational amplifier 12 and its corresponding main input section 21 and the distance between each operational amplifier 12 and its corresponding dummy input section 22 may be different.

[0023] The output section 23 is connected to the buffer amplifier 13. The output section 23 can be selectively connected to either one of the four main input sections 21 or the four dummy input sections 22. The buffer amplifier 13 is used to transmit the potential output from the output section 23 to an A / D conversion circuit or the like (not shown).

[0024] Resistor 19 in FIG. 1 is a resistor between output section 23 and ground, and serves to prevent output section 23 from being connected to either input section 21 or 22, causing the input of buffer amplifier 13 (op-amp) to enter an open state (resulting in an undefined output voltage from the op-amp). When resistor 19 disconnects output section 23 from either input section 21 or 22, the output voltage of the op-amp becomes 0V. Capacitor 18 in FIG. 1 illustrates the pattern capacitance (parasitic capacitance) between output section 23 and ground, and its capacitance is sufficiently small compared to capacitor 34. For example, the capacitance of capacitor 18 is approximately 1 / 1000 of the capacitance of capacitor 34.

[0025] The control unit 14 outputs a switching signal S to the multiplexer 11 to cause the multiplexer 11 to selectively connect the output unit 23 to one of the four main input units 21 and the four dummy input units 22 .

[0026] In the signal input / output device 1, the four operational amplifiers 12 output potentials V_1, V_2, V_3, and V_4 in order from the top in Fig. 1. In the multiplexer 11, the output section 23 is selectively connected to one of the four main input sections 21 and the four dummy input sections 22. As a result, a potential corresponding to the potential output from the operational amplifier 12 connected to the output section 23 is output from the output section 23.

[0027] <Switching connections in a multiplexer> Next, the switching of connections in the multiplexer 11 will be described with reference to FIGS. 2(a) to 2(c).

[0028] Here, the main input units 21 indicated by INm_M and INm_M+1 in Figures 2(a) to 2(c) are any of the four main input units 21 indicated by INm_1 to INm_4 in Figure 1. More specifically, when INm_M is INm_1, INm_M+1 is INm_2. When INm_M is INm_2, INm_M+1 is INm_3. When INm_M is INm_3, INm_M+1 is INm_4. When INm_M is INm_4, INm_M+1 is INm_1.

[0029] 2(a) to 2(c), the dummy input sections 22 indicated by INd_M and INd_M+1 are any of the four dummy input sections 22 indicated by INd_1 to INd_4 in FIG. 1. More specifically, when INd_M is INd_1, INd_M+1 is INd_2. When INd_M is INd_2, INd_M+1 is INd_3. When INd_M is INd_3, INd_M+1 is INd_4. When INd_M is INd_4, INd_M+1 is INd_1.

[0030] In the first embodiment, a switching signal S is output from the control unit 14 to the multiplexer 11, and as a result, at a certain timing, the output unit 23 of the multiplexer 11 is connected to the main input unit 21 (INm_M) corresponding to the first operational amplifier 12a, which is one of the four operational amplifiers 12, as shown in FIG. 2(a). In this state, a potential corresponding to the potential V_M output from the first operational amplifier 12a is output from the output unit 23. Here, when INm_M is INm_1, V_M is V_1. When INm_M is INm_2, V_M is V_2. When INm_M is INm_3, V_M is V_3. When INm_M is INm_4, V_M is V_4.

[0031] The control unit 14 outputs a switching signal to the multiplexer 11 so as to switch from this state to a state in which the output unit 23 is connected to the dummy input unit 22 (INd_M+1) corresponding to the second operational amplifier 12b, which is different from the first operational amplifier 12a, among the four operational amplifiers 12, as shown in Figure 2(b).

[0032] Thereafter, as shown in FIG. 2(c), the control unit 14 outputs a switching signal to the multiplexer 11 to switch the state in which the output unit 23 is connected to the main input unit 21 (INm_M+1) corresponding to the second operational amplifier 12b. In this state, a potential corresponding to the potential V_M+1 output from the second operational amplifier 12b is output from the output unit 23. Here, when INm_M+1 is INm_1, V_M+1 is V_1. Also, when INm_M+1 is INm_2, V_M+1 is V_2. When INm_M+1 is INm_3, V_M+1 is V_3. When INm_M+1 is INm_4, V_M+1 is V_4.

[0033] Here, a description will be given of the potential output from the output section 23 when the input section 21, 22 connected to the output section 23 in the multiplexer 11 is switched. The potential output from the output section 23 when the output section 23 is connected to either of the input sections 21, 22 in the multiplexer 11 is referred to as V O1In this state, the electrostatic energy Q1 of the capacitor 18 is expressed as follows: B It can be expressed as follows:

number

[0034] When the output terminal 23 is switched from this state to a state in which it is connected to another input terminal 21, 22, the potential output from the operational amplifier 12 corresponding to the input terminal 21, 22 after the switching is V IN Then, the electrostatic energy Q2 of the capacitor 34 corresponding to the input sections 21 and 22 after switching is calculated by setting the capacitance of the capacitor 34 to C A This can be expressed by the following formula:

number

[0035] Therefore, after the switching, the potential output from the output section 23 is set to V O2 Then, the following relationship holds:

number

[0036] From this relationship, V O2 is expressed by the following formula:

number

[0037] As mentioned above, C B is C A Since it is sufficiently small compared to V, from the above equation (4), O2 is V IN Although the potential is close to V IN It can be seen that the potential is shifted from (V O1 2 -V IN 2 ) is larger, V O2 and V INIt can be seen that the difference between V O1 and V IN The greater the difference, the greater the V O2 and V IN It can be seen that the difference becomes larger.

[0038] On the other hand, consider a configuration (Comparative Example 1) in which the multiplexer 11 does not have a dummy input section 22, as shown in Figures 3(a) and 3(b). In this configuration, consider a case in which the output section 23 is switched from a state in which it is connected to the main input section 21 (IN_M) corresponding to the first operational amplifier 12a, as shown in Figure 3(a), to a state in which it is connected to the main input section 21 (IN_M+1) corresponding to the second operational amplifier 12b, as shown in Figure 4(b). In this case, V in the above equation (4) when it is switched to the state shown in Figure 3(b) O1 is a potential close to the potential V_M output from the first operational amplifier 12a. Therefore, when the difference between the potential V_M output from the first operational amplifier 12a and the potential V_M+1 output from the second operational amplifier 12b is large, V O1 (potential close to V_M) and V IN As a result, the difference between the potential V (V_M+1) and the potential V (V_M+1) output from the output section 23 becomes large. O2 and the potential V output from the second operational amplifier 12b. IN The difference becomes larger.

[0039] 3(c), consider a case where the multiplexer 11 is held at ground potential and has a ground terminal 40 connectable to the output unit 23, and is switched from the state of FIG. 3(a) to the state of FIG. 3(c) where the output unit 23 is connected to the ground terminal 40, and then switched to the state of FIG. 3(b) (corresponding to Comparative Example 2 and the prior art described in Patent Document 1). In this case, V in the above equation (4) when switched to the state of FIG. 3(b) O1 becomes 0V. Therefore, V IN When (V_M+1) is high, V O1 (0V) and V IN As a result, the difference between the potential V (V_M+1) and the potential V (V_M+1) output from the output section 23 becomes large.O2 and the potential V output from the second operational amplifier 12b. IN The difference becomes larger.

[0040] In contrast, according to the signal input / output device 1 of the first embodiment of the present invention, in the state of FIG. 2(b), the potential output from the output section 23 may have a large difference from V_M+1, but since the dummy input section 22 is connected to begin with, the output signal (potential output from the output section 23) when the dummy input section 22 is connected need not be used. Then, when the state is subsequently switched to the state of FIG. 2(c), in the above equation (4), V O1 becomes a potential close to V_M+1, and V IN Since V_M+1, V O1 (potential close to V_M+1) and V IN As a result, the difference between the potential V (V_M+1) and the potential V (V_M+1) output from the output section 23 becomes smaller. O2 and the potential V output from the second operational amplifier 12b. IN The difference can be reduced.

[0041] <Effects> According to the first embodiment described above, the output unit 23 is switched from a state in which it is connected to the main input unit 21 corresponding to the first operational amplifier 12a to a state in which it is connected to the dummy input unit 22 corresponding to the second operational amplifier 12b, and then switched to a state in which it is connected to the main input unit 21 corresponding to the second operational amplifier 12b. This makes it possible to reduce the difference between the potential output from the output unit 23 when it is connected to the main input unit 21 and the potential output from the corresponding operational amplifier 12, as described above. Therefore, by acquiring the potential output from the output unit 23 (buffer amplifier 13) at the timing when the output unit 23 is connected to the main input unit 21, it is possible to reduce the difference between the acquired potential and the potential output from the connected operational amplifier 12.

[0042] [Second embodiment] Next, a preferred second embodiment of the present invention will be described with reference to Fig. 4. As shown in Fig. 4, a signal input / output device 100 of the second embodiment has four operational amplifiers 12, as in the first embodiment, whereas a multiplexer 111 has four main input sections 21 and three dummy input sections 22. As in the first embodiment, all four operational amplifiers 12 are connected to the corresponding main input sections 21. However, unlike the first embodiment, of the four operational amplifiers 12, the top three operational amplifiers 12 in the figure are connected to the corresponding dummy input sections 22, but the bottommost operational amplifier 12 in the figure is not connected to the dummy input section 22.

[0043] In the second embodiment, the difference between V_2 and V_4 and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4. Also, the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4.

[0044] In the second embodiment, the control unit 14 switches the state in which the output unit 23 is connected to the main input unit 21 (INm_3) corresponding to the third operational amplifier 12 from the top in FIG. 4 (the “third operational amplifier” of the present invention), as shown in FIG. 5(a), to a state in which the output unit 23 is connected to the dummy input unit 22 (INd_2) corresponding to the second operational amplifier 12 from the top in FIG. 4 (the “fifth operational amplifier” of the present invention), as shown in FIG. 5(b). Then, as shown in FIG. 5(c), the control unit 14 switches the state in which the output unit 23 is connected to the main input unit 21 (INm_4) corresponding to the bottommost operational amplifier 12 in FIG. 4 (the “fourth operational amplifier” of the present invention). The remaining procedures for switching the connections of the main input unit 21 and the dummy input unit 22 are the same as those described in the first embodiment.

[0045] In this way, when switching from the state of FIG. 5(a) to the state of FIG. 5(b) and then to the state of FIG. 5(c), the potential output from the output section 23 in the state of FIG. 5(b) becomes a potential close to V_2. Therefore, when switching to the state of FIG. 5(c), V in the above equation (4) O1On the other hand, unlike this embodiment (second embodiment), when switching directly from the state of FIG. 5(a) to the state of FIG. 5(c), V in the above equation (4) when switching to the state of FIG. O1 As described above, the difference between the potential V_2 and the potential V_4 is smaller than the difference between the potential V_3 and the potential V_4.

[0046] From the above, when switching from the state of FIG. 5(a) to the state of FIG. 5(b) as in the second embodiment and then switching to the state of FIG. 5(c), V in the above equation (4) when switching to the state of FIG. 5(c) is smaller than when switching directly from the state of FIG. 5(a) to the state of FIG. O1 can be set to a potential close to V_4. This makes it possible to reduce the difference between the potential output from the output section 23 in the state of FIG. 5(c) and the potential output from the operational amplifier 12 connected to the output section 23.

[0047] <Effects> In the second embodiment, when the multiple operational amplifiers 12 constituting the signal input / output device include an operational amplifier 12 that is not connected to a dummy input section 22, the switching is performed in the above-described procedure when switching the state in which the output section is connected to the main input section 21 of that operational amplifier 12. As a result, when the output section 23 is switched to a state in which it is connected to the main input section 21 corresponding to the operational amplifier 12 that is not connected to the dummy input section 22, it is possible to reduce the difference between the potential output from the output section 23 and the potential output from that operational amplifier 12.

[0048] In the second embodiment, the difference between V_2 and V_4 and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4, and the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4. In such a case, in the second embodiment, the state of FIG. 5(a) is switched to the state of FIG. 5(b), and then switched to the state of FIG. 5(c). That is, in the second embodiment, among the multiple operational amplifiers 12 connected to the dummy input unit 22, the potential output by the fifth operational amplifier has the smallest difference from the potential V_4 output by the fourth operational amplifier. This makes it possible to particularly reduce the difference between the potential output from the output unit 23 and the potential V_4 output from the fourth operational amplifier 12 when switching to the state of FIG. 5(c).

[0049] In the second embodiment, the third operational amplifier 12 from the top in FIG. 4 is the third operational amplifier, the fourth operational amplifier 12 from the top in FIG. 4 is the fourth operational amplifier, and the fourth operational amplifier 12 from the top in FIG. 4 is the fifth operational amplifier. However, the operational amplifiers 12 serving as the third to fifth operational amplifiers may be different from this.

[0050] [Third embodiment] Next, a third preferred embodiment of the present invention will be described with reference to Fig. 6. In a signal input / output device 200 of the third embodiment, a multiplexer 211 is composed of two ICs 201 and 202.

[0051] Each of ICs 201 and 202 has two main input sections 221, two dummy input sections 222, and an output section 223. The two main input sections 221 of IC 201 are similar to the upper two main input sections 21 of the four main input sections 21 in FIG. 1. The two main input sections 221 of IC 202 are similar to the lower two main input sections 21 of the four main input sections 21 in FIG. 1. The two dummy input sections 222 of IC 201 are similar to the upper two dummy input sections 22 of the four dummy input sections 22 in FIG. 1. The two dummy input sections 222 of IC 202 are similar to the lower two dummy input sections 22 of the four dummy input sections 22 in FIG. 1.

[0052] The output section 223 of IC201 is connected to the buffer amplifier 13 and is selectively connected to either one of the two main input sections 221 and two dummy input sections 222 of IC201. The output section 223 of IC202 is connected to the buffer amplifier 13 and is selectively connected to either one of the two main input sections 221 and two dummy input sections 222 of IC202.

[0053] In the third embodiment, the control unit 14 transmits a switching signal S to the ICs 201 and 202. The switching signal S is a signal that instructs the ICs 201 and 202 to connect the output unit 223 to either one of the two main input units 221 or the two dummy input units 222.

[0054] Moreover, in the third embodiment, the control unit 14 transmits an enable signal ENB1 to the IC 201. The enable signal ENB1 is a signal that switches whether or not to permit the output unit 223 to be selectively connected to either one of the two main input units 221 or the two dummy input units 222 in the IC 201 based on the switching signal S. When the enable signal ENB1 is at a high level (H), the output unit 223 in the IC 201 is selectively connected to either one of the two main input units 221 or the two dummy input units 222 based on the switching signal S. When the enable signal ENB1 is at a low level (L), the output unit 223 in the IC 201 is not connected to either one of the two main input units 221 or the two dummy input units 222, regardless of the switching signal S.

[0055] Moreover, in the third embodiment, the control unit 14 transmits an enable signal ENB2 to the IC 202. The enable signal ENB2 is a signal that switches whether or not to permit the output unit 223 to be selectively connected to either one of the two main input units 221 or the two dummy input units 222 in the IC 202 based on the switching signal S. When the value of the enable signal ENB2 is high level (H), the output unit 223 in the IC 202 is selectively connected to either one of the two main input units 221 or the two dummy input units 222 based on the switching signal S. When the enable signal ENB2 is low level (L), the output unit 223 in the IC 202 is not connected to either one of the two main input units 221 or the two dummy input units 222, regardless of the switching signal S.

[0056] Next, switching of connections in the multiplexer 211 by the switching signal S and the enable signals ENB1 and ENB2 in the third embodiment will be described with reference to FIG.

[0057] 7 indicate whether the switching signal S instructs the output section 223 of ICs 201 and 202 to be connected to one of the two main input sections 221 or the two dummy input sections 222. At each time, one of INd_1, INm_1, INd_2, and INm_2 is at a high level (H) and the remaining three are at a low level (L).

[0058] More specifically, when the switching signal S instructs that the output unit 223 in the ICs 201 and 202 be connected to the upper dummy input unit (INd_1) of the two dummy input units 222 in Fig. 6, INd_1 goes high and INm_1, INd_2, and INm_2 go low in Fig. 7. When the switching signal S instructs that the output unit 223 in the ICs 201 and 202 be connected to the lower main input unit (INm_1) of the two main input units 221 in Fig. 6, INm_1 goes high and INd_1, INd_2, and INm_2 go low in Fig. 7. When the switching signal S instructs that the output section 223 of the ICs 201 and 202 be connected to the lower dummy input section (INd_2) of the two dummy input sections 222 in Fig. 6, INd_2 goes high and INd_1, INm_1, and INm_2 go low in Fig. 7. When the switching signal S instructs that the output section 223 of the ICs 201 and 202 be connected to the lower main input section (INm_2) of the two main input sections 221 in Fig. 6, INm_2 goes high and INd_1, INm_1, and INd_2 go low in Fig. 7.

[0059] ENB1 and ENB2 in FIG. 7 indicate changes in the enable signals ENB1 and ENB2, respectively.

[0060] The changes over time of each signal in Figure 7 will now be described. For example, at time T0, INm_1 is at a high level, INd_1, INd_2, and INm_2 are at a low level, ENB1 is at a high level, and ENB2 is at a low level. As a result, in IC201, the output unit 223 is connected to the main input unit (Nm_1) on the upper side in Figure 6, and in IC202, the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222.

[0061] This state continues until time T1, at which time INm_1 switches to low level and INd_2 switches to high level. As a result, in IC201, the output unit 223 switches to a state connected to the dummy input unit 222 (INd_2) at the bottom of Figure 6. In IC202, the state in which the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222 continues.

[0062] This state continues until time T2, at which time INd_2 switches to low level and INm_2 switches to high level. As a result, in IC201, the output unit 223 switches to a state connected to the main input unit 221 (INm_2) at the bottom of Figure 6. In IC202, the state continues in which the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222.

[0063] This state continues until time T3, at which time ENB1 switches to low level. Immediately thereafter, at time T4, INm_2 switches to low level and INd_1 switches to high level. Immediately thereafter, at time T5, ENB2 switches to high level. Here, the length of the period from time T3 to time T4 and the length of the period from time T4 to time T5 are each, for example, about 100 μs.

[0064] As a result, during the period from time T3 to time T5, in the ICs 201 and 202, the output unit 223 continues to be connected to none of the two main input units 221 or the two dummy input units 222. At time T5, in the IC 202, the output unit 223 switches to a state where it is connected to the dummy input unit 222 (INd_1) shown in the upper part of Fig. 6. In the IC 201, the output unit 223 continues to be connected to none of the two main input units 221 or the two dummy input units 222.

[0065] This state continues until time T6, at which time INd_1 switches to low level and INm_1 switches to high level. As a result, in IC202, the output unit 223 switches to a state connected to the main input unit 221 (INm_1) on the upper side of Figure 6. In IC201, the state in which the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222 continues.

[0066] This state continues until time T7, at which time INm_1 switches to low level and INd_2 switches to high level. As a result, in IC202, the output unit 223 switches to a state connected to the dummy input unit 222 (INd_2) at the bottom of Figure 6. In IC201, the state in which the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222 continues.

[0067] Thereafter, this state continues until time T8, at which time INd_2 switches to low level and INm_2 switches to high level. As a result, in IC202, the output unit 223 switches to a state connected to the main input unit 221 (INm_2) on the lower side of Figure 6. In IC201, the state in which the output unit 223 is not connected to either the two main input units 221 or the two dummy input units 222 continues.

[0068] This state continues until time T9, at which time ENB2 switches to low level. Immediately thereafter, at time T10, INm_2 switches to low level and INd_1 switches to high level. Immediately thereafter, at time T11, ENB1 switches to high level. Here, the length of the period from time T9 to time T10 and the length of the period from time T10 to time T11 are each, for example, about 100 μs.

[0069] As a result, during the period from time T9 to T11, in IC201, 202, the output unit 223 is not connected to any of the two main input units 221 or the two dummy input units 222, and at time T11, in IC201, the output unit 223 is connected to the dummy input unit 222 (INd_1) at the top of Figure 6, and in IC202, the output unit 223 switches to a state where it is not connected to any of the two main input units 221 or the two dummy input units 222.

[0070] This state continues until time T12, at which time INd_1 switches to low level and INm_1 switches to high level. As a result, in IC201, the output unit 223 switches to a state connected to the main input unit 221 (INm_1) on the upper side of FIG. 6. In IC202, the output unit 223 continues to be connected to neither of the two main input units 221 nor the two dummy input units 222. This state is the same as the state at time T0, and thereafter, the connection destination of the output unit 23 in ICs 201 and 202 is repeatedly switched in the same manner as described above.

[0071] <Effects> In the third embodiment, in the multiplexer 211, the output port 223 is switched from a state in which it is connected to the main input port 221 corresponding to a certain operational amplifier 12 to a state in which it is connected to the dummy input port 222 corresponding to another operational amplifier 12. Then, thereafter, the output port 223 is switched to a state in which it is connected to the main input port 221 corresponding to the other operational amplifier 12. As a result, similar to the first embodiment, when the output port 223 is connected to the main input port 221, it is possible to reduce the difference in potential between the output port 223 and the potential output from the connected operational amplifier 12.

[0072] Unlike the present embodiment (third embodiment), consider a case where ENB1 is controlled to switch to a low level and ENB2 is controlled to switch to a high level at time T4. Even if ENB1 and ENB2 are controlled to switch at the same timing, there may be a slight difference between the timing at which ENB1 actually switches to a low level and the timing at which ENB2 actually switches to a high level. This difference causes both ENB1 and ENB2 to temporarily go high, resulting in a short circuit between the dummy input section 222 of IC201 and the dummy input section 222 of IC202 via the output section 223 of IC201 and the output section 223 of IC202. Similarly, unlike the third embodiment, if ENB1 is controlled to switch to high level and ENB2 to switch to low level at time T10, a short circuit will occur between the main input section 221 of IC201 and the main input section 221 of IC202 via the output section 223 of IC201 and the output section 223 of IC202.

[0073] Therefore, in the third embodiment, control is performed such that ENB1 switches to low level at time T3, INm_2 switches to low level at the subsequent time T4, INd_1 switches to high level, and ENB2 switches to high level at the subsequent time T5. Also, control is performed such that ENB2 switches to low level at time T9, INm_2 switches to low level at the subsequent time T10, INd_1 switches to high level, and ENB2 switches to high level at the subsequent time T11. This prevents ENB1 and ENB2 from becoming high level simultaneously, and can prevent a short circuit between the main input sections 221 or the dummy input sections 222 in the multiplexer 11.

[0074] [Variations] The preferred first to third embodiments of the present invention have been described above, but the present invention is not limited to the above-mentioned first to third embodiments, and various modifications are possible within the scope of the claims.

[0075] In the first embodiment, the signal input / output device 1 has four operational amplifiers 12, and the multiplexer 11 has four main input sections 21 and four dummy input sections 22 corresponding to the four operational amplifiers 12, but this is not limited to this. In the first embodiment, the signal input / output device 1 may have two, three, five or more operational amplifiers 12, and the multiplexer 11 may have the same number of main input sections 21 and dummy input sections 22 as the number of operational amplifiers 12 corresponding to the two.

[0076] In the second embodiment, when the difference between V_2 and V_4 and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4, and the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4, the state of FIG. 5(a) is switched to the state of FIG. 5(b), and then to the state of FIG. 5(c), but this is not limiting. In such a case, the state of FIG. 5(a) may be switched to a state in which the output unit 23 is connected to the uppermost dummy input unit 22 in FIG. 4, and then to the state of FIG. 5(c). In this case, the uppermost operational amplifier 12 in FIG. 4 corresponds to the "fifth operational amplifier" of the present invention. In other words, if there are multiple operational amplifiers 12 connected to the dummy input section 22 and the difference between the potential output by the fifth operational amplifier and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, the fifth operational amplifier may be an operational amplifier 12 other than the operational amplifier 12 among these multiple operational amplifiers 12 that has the smallest difference from the potential output by the fourth operational amplifier.

[0077] Furthermore, if there is only one operational amplifier 12 connected to the dummy input section 22, and the difference between the potential output by the operational amplifier and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, the fifth operational amplifier may be this operational amplifier 12.

[0078] In the second embodiment, the signal input / output device 100 has four operational amplifiers 12, and the multiplexer 111 has four main input sections 21, one for each of the four operational amplifiers 12, and three dummy input sections 22, one for each of three of the four operational amplifiers 12. However, this is not limiting. In the second embodiment, the signal input / output device 100 may have three or five or more operational amplifiers 12, and the multiplexer 111 may have the same number of main input sections 21 as the number of operational amplifiers 12. In addition, when the signal input / output device 100 has four or more operational amplifiers 12, some of two or more of the operational amplifiers 12 may not be connected to the dummy input sections 22.

[0079] Furthermore, in the third embodiment, the multiplexer 211 is configured by two ICs 201 and 202, but this is not limiting and the multiplexer 211 may be configured by three or more ICs. [Explanation of symbols]

[0080] 1: Signal input / output device 11: Multiplexer 12: Operational amplifier 12a: 1st operational amplifier 12b: Second operational amplifier 14: Control unit 21: Main input section 22: Dummy input section 32: RC filter 100: Signal input / output device 111: Multiplexer 200: Signal input / output device 201, 202:IC

Claims

1. Multiple operational amplifiers, a multiplexer; a control unit that controls the multiplexer, The multiplexer a plurality of main input sections provided individually for each of the plurality of operational amplifiers; at least one dummy input section provided individually for at least one of the plurality of operational amplifiers; an output section selectively connected to any one of the plurality of main input sections and the at least one dummy input section; The plurality of operational amplifiers include: A first operational amplifier; a second operational amplifier separate from the first operational amplifier and connected to the dummy input section; The control unit A signal input / output device characterized in that the multiplexer is controlled so as to switch from a state in which the output section is connected to the main input section corresponding to the first operational amplifier to a state in which the output section is connected to the dummy input section corresponding to the second operational amplifier, and then to a state in which the output section is connected to the main input section corresponding to the second operational amplifier.

2. Multiple operational amplifiers, a multiplexer; a control unit that controls the multiplexer, The multiplexer a plurality of main input sections provided individually for each of the plurality of operational amplifiers; at least one dummy input section provided individually for at least one of the plurality of operational amplifiers; an output section selectively connected to any one of the plurality of main input sections and the at least one dummy input section; The plurality of operational amplifiers include: A third operational amplifier; and a fourth operational amplifier separate from the third operational amplifier; a fifth operational amplifier separate from the third operational amplifier and connected to the dummy input section; a difference between a potential output by the fifth operational amplifier and a potential output by the fourth operational amplifier is smaller than a difference between a potential output by the third operational amplifier and a potential output by the fourth operational amplifier; The control unit A signal input / output device characterized in that the multiplexer is controlled so as to switch from a state in which the output section is connected to the main input section corresponding to the third operational amplifier to a state in which the output section is connected to the dummy input section corresponding to the fifth operational amplifier, and then to a state in which the output section is connected to the main input section corresponding to the fourth operational amplifier.

3. a plurality of the operational amplifiers individually connected to the plurality of dummy input sections, 3. The signal input / output device according to claim 2, wherein the potential output by the fifth operational amplifier among the plurality of operational amplifiers connected to the dummy input section has a smallest difference from the potential output by the fourth operational amplifier.

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