Information processing device, information processing method, and program

The implementation of a write suppression process based on lookup table usage rate monitoring in NAND flash memory devices reduces maintenance frequency and extends the time before failure by minimizing writes to bad blocks.

JP2025125646APending Publication Date: 2025-08-28OKI ELECTRIC INDUSTRY CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2024021701
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-02-16
Publication Date
2025-08-28

AI Technical Summary

Technical Problem

Existing information processing devices using NAND flash memory face frequent maintenance due to the accumulation of bad blocks, which conventional methods fail to effectively mitigate.

Method used

Implementing a write suppression process based on lookup table usage rate monitoring, suppressing writes to NAND flash memory when the usage rate exceeds a predetermined threshold, and notifying a higher-level device when the spare area is about to be depleted.

Benefits of technology

Reduces the frequency of maintenance and extends the time before device failure by minimizing writes to bad blocks, allowing proactive replacement by the carrier.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025125646000001_ABST
    Figure 2025125646000001_ABST
Patent Text Reader

Abstract

To provide an information processing device, an information processing method, and a program that reduce the maintenance frequency of the information processing device equipped with a NAND flash memory.SOLUTION: In an optical communication system, an information processing device 1 is an ONU (Optical Network Unit) that communicates with an external higher-level device, and includes: a storage unit having at least a NAND flash memory and storing a lookup table in which correspondence information between bad blocks and normal blocks in the NAND flash memory is registered; a calculation unit that calculates a usage rate of the lookup table stored in the memory unit; a determination unit that determines whether or not the usage rate calculated by the calculation unit exceeds a predetermined first threshold; and a processing unit that performs write suppression processing that suppresses writing to the NAND flash memory when the determination unit determines that the usage rate exceeds the first threshold.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to an information processing device equipped with a NAND flash memory, and an information processing method and program for the information processing device. [Background technology]

[0002] An example of an information processing device that communicates with an external higher-level device is an optical network unit (ONU) installed at a user's home in an optical communication system that uses optical access technology to branch a single optical fiber and connect it to the homes of multiple subscribers (hereinafter also referred to as users). Examples of optical communication systems include a Gigabit Ethernet-Passive Optical Network (GE-PON) system and a 10 Gigabit Ethernet-Passive Optical Network (10G-EPON) system. In these optical communication systems, an optical line terminal (OLT), which is a higher-level device of the ONU, is installed in a central office (hereinafter also referred to as a communications station) of a telecommunications carrier. While the ONUs of conventional GE-PON systems used NOR flash memory as nonvolatile memory, the ONUs of 10G-EPON systems, which have been developed in recent years, often use NAND flash memory as large-capacity nonvolatile memory due to the increased flash capacity required for control information, etc.

[0003] Due to its structure, NAND flash memory can be easily increased in capacity compared to NOR flash memory. However, NAND flash memory generates blocks that cannot be written to normally (also called error blocks or bad blocks), and the number of bad blocks increases over time. Therefore, information processing devices (e.g., the ONUs mentioned above) that employ NAND flash memory require measures to prevent device failure due to an excessive number of bad blocks, which was not necessary for NOR flash memory. For example, Patent Document 1 discloses a technology that displays information urging a user to replace a NAND flash memory when it is predicted that the spare area of ​​the NAND flash memory will be depleted, in order to prevent device failure due to an excessive number of bad blocks in an information processing device equipped with NAND flash memory. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-215656 Summary of the Invention [Problem to be solved by the invention]

[0005] In Patent Document 1, information urging the user to replace the NAND flash memory is displayed, which causes the user to notice and contact the telecommunications carrier, allowing the telecommunications carrier to perform maintenance such as replacing the NAND flash memory before the device fails due to an excessive number of bad blocks. However, this does not reduce the frequency of maintenance such as replacement.

[0006] The present invention has been made to solve the above-mentioned problems, and provides an information processing device, an information processing method, and a program that can reduce the frequency of maintenance of an information processing device equipped with a NAND flash memory. [Means for solving the problem]

[0007] The information processing device of the present invention is an information processing device that communicates with an external higher-level device, and has at least a NAND type flash memory, and is equipped with: a memory unit that stores a lookup table in which correspondence information between bad blocks and normal blocks in the NAND type flash memory is registered; a calculation unit that calculates the usage rate of the lookup table stored in the memory unit; a judgment unit that judges whether the usage rate calculated by the calculation unit exceeds a predetermined first threshold; and a processing unit that performs a write suppression process that suppresses writing to the NAND type flash memory when the judgment unit judges that the usage rate exceeds the first threshold.

[0008] The information processing method of the present invention is an information processing method for an information processing device having a NAND type flash memory, which calculates the usage rate of a lookup table in which correspondence information between bad blocks and normal blocks in the NAND type flash memory is registered, determines whether the calculated usage rate exceeds a predetermined first threshold, and performs a write suppression process to suppress writing to the NAND type flash memory if it is determined that the usage rate exceeds the first threshold.

[0009] The program of the present invention causes a computer to function as a calculation unit that calculates the usage rate of a lookup table in which correspondence information between bad blocks and normal blocks in a NAND flash memory is registered, a determination unit that determines whether the usage rate calculated by the calculation unit exceeds a predetermined first threshold, and a processing unit that performs a write suppression process that suppresses writing to the NAND flash memory when the determination unit determines that the usage rate exceeds the first threshold. [Effects of the Invention]

[0010] According to the present invention, when the utilization rate of the lookup table exceeds a first threshold, a write suppression process is performed to reduce the number of writes to blocks in the NAND flash memory. This extends the time until the device fails due to the lookup table exceeding its capacity, i.e., the number of bad blocks exceeding the limit, and reduces the frequency of maintenance of the information processing device before the device fails. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a diagram illustrating a configuration of an optical communication system in which an information processing device according to a first embodiment is used. [Figure 2] FIG. 2 is a diagram illustrating hardware included in the information processing device of FIG. [Figure 3] FIG. 2 is a block diagram showing the functions of the information processing device of FIG. 1. [Figure 4] 1A and 1B are diagrams for explaining the processing performed by the information processing device shown in FIG. 1 in response to a request, where FIG. 1A illustrates the processing performed in response to a setting value acquisition request, FIG. 1B illustrates the processing performed in response to a setting value change request, and FIG. 1C illustrates the processing performed in response to a FW update request. [Figure 5] 2 is a diagram conceptually illustrating the configuration of a NAND flash memory in the information processing device shown in FIG. 1. FIG. [Figure 6] 6 is a diagram showing an example of information stored in a lookup table area shown in FIG. 5. FIG. [Figure 7] 10 is a flowchart of LUT usage rate monitoring performed by the information processing device shown in FIG. [Figure 8] 1A and 1B are diagrams illustrating the processing performed when the information processing device shown in FIG. 1 implements write suppression, where (a) is a diagram illustrating the processing performed in response to a setting value acquisition request, (b) is a diagram illustrating the processing performed in response to a setting value change request, and (c) is a diagram illustrating the processing performed in response to a FW update request. DETAILED DESCRIPTION OF THE INVENTION

[0012] Embodiment 1 In the first embodiment, a case where an information processing device 1 of the present invention is an ONU of an optical communication system 100 will be described.

[0013] (Overview of Optical Communication System 100) 1 is a diagram showing the configuration of an optical communication system 100 using an information processing device 1 according to embodiment 1. In the following, the optical communication system 100 is defined as a 10G-EPON system, the information processing device 1 is defined as a 10G-EPON-ONU (hereinafter simply referred to as ONU) installed in a user's home or the like, and their configurations will be described.

[0014] As shown in Fig. 1, the optical communication system 100 is composed of a communication center terminal device 2 installed in a communication carrier's central office, multiple information processing devices 1 serving as subscriber-side terminal devices, an optical fiber 4, an optical splitter 3 used for optical branching, and the like. The communication center terminal device 2 is a higher-level device that communicates with the information processing device 1 via the optical fiber 4 and the optical splitter 3. Here, since the information processing device 1 is a 10G-EPON-ONU, the communication center terminal device 2 is a 10G-EPON-OLT (hereinafter simply referred to as an OLT). A subscriber's (user's) personal computer 51, a router 52, and the like are connected to the information processing device 1.

[0015] 1 shows two information processing devices 1 installed in the homes of two users, with a personal computer 51 connected to the information processing device 1 in one user's home and a router 52 connected to the information processing device 1 in the other user's home. Although not shown, a plurality of user terminal devices (such as the personal computer 51) can be connected to the information processing device 1 in the other user's home via the router 52.

[0016] (Basic structure of information processing device 1) Fig. 2 is a diagram showing hardware included in the information processing device 1 shown in Fig. 1. The information processing device 1 includes a processor 11, a volatile storage device 12, and a nonvolatile storage device 13.

[0017] The processor 11 controls the entire information processing device 1. For example, the processor 11 is a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), or the like. The processor 11 may be a multiprocessor. The information processing device 1 may have a processing circuit instead of the processor 11. The processing circuit may be a single circuit or a composite circuit.

[0018] The volatile storage device 12 is a main storage device of the information processing device 1. For example, the volatile storage device 12 is a RAM (Random Access Memory). The nonvolatile storage device 13 is an auxiliary storage device of the information processing device 1. For example, the nonvolatile storage device 13 is a flash memory, an HDD (Hard Disk Drive), or an SSD (Solid State Drive). The information processing device 1 has at least a NAND flash memory 130 (see FIG. 5 described later) as the nonvolatile storage device 13.

[0019] (Functions of information processing device 1) Fig. 3 is a block diagram showing functions of the information processing device 1 in Fig. 1. As shown in Fig. 3, the information processing device 1, which is an ONU, includes a control unit 101, a communication unit 102, a storage unit 103, and a UNI (User Network Interface) function unit 104.

[0020] The storage unit 103 may be realized as a storage area secured in the volatile storage device 12 or non-volatile storage device 13 shown in Fig. 2. Some or all of the communication unit 102, control unit 101, and UNI function unit 104 may be realized by a processing circuit. Also, some or all of the communication unit 102, control unit 101, and UNI function unit 104 may be realized as a program module executed by the processor 11. The program executed by the processor 11 is also referred to as a control program. For example, the control program is recorded on a recording medium.

[0021] The storage unit 103 stores various types of information. Specifically, the storage unit 103 stores various setting values ​​of the information processing device 1. The storage unit 103 also stores data received from an external network. The storage unit 103 also stores data received via a user network.

[0022] The communication unit 102 communicates with the communication station terminal device 2 (particularly its OSU (Optical Subscriber Unit)), which is the OLT. The communication unit 102 also converts optical signals received from the communication station terminal device 2 into electrical signals. The communication unit 102 then converts the electrical signals into optical signals and transmits the converted optical signals to the communication station terminal device 2. The UNI function unit 104 communicates with user terminal devices (such as personal computers 51) via the user network.

[0023] The communication unit 102 receives various requests from the station-side terminal device 2, such as a setting value acquisition request, a setting value change request, and a firmware update request (hereinafter referred to as a FW update request). The control unit 101 processes these requests and returns a response to the request to the station-side terminal device 2 via the communication unit 102. The UNI function unit 104 also receives various requests from a user's terminal device (such as a personal computer 51), such as a setting value acquisition request, a setting value change request, and a FW update request. The control unit 101 processes these requests and returns a response to the request to the user's terminal device via the UNI function unit 104.

[0024] Here, the setting value acquisition request is a request to inquire about the setting values ​​set in the information processing device 1. The setting value change request is a request to change the setting values ​​set in the information processing device 1. The FW update request is a request to update the firmware of the information processing device 1.

[0025] The information processing device 1 also has functional units (a calculation unit 101a, a determination unit 101b, and a processing unit 101c) that perform control according to the state of a NAND flash memory 130 (see FIG. 5, which will be described later) provided as the nonvolatile storage device 13. These functional units will be described later.

[0026] 4A and 4B are diagrams for explaining the processing performed by the information processing device 1 shown in Fig. 1 in response to requests, where (a) is a diagram explaining the processing performed in response to a setting value acquisition request, (b) is a diagram explaining the processing performed in response to a setting value change request, and (c) is a diagram explaining the processing performed in response to a firmware update request. Below, the processing performed when the information processing device 1 receives various requests from the communication station side terminal device 2, which is a higher-level device, or the personal computer 51 connected as a lower-level terminal, will be explained using Fig. 4.

[0027] As shown in (a) of Fig. 4, when the information processing device 1 receives a setting value acquisition request, it returns a setting value acquisition response including the requested setting value. Also, as shown in (b) of Fig. 4, when the information processing device 1 receives a setting value change request, it changes the setting value requested to be changed and returns a setting value change response including the result (hereinafter also referred to as the setting value change implementation result). Also, as shown in (c) of Fig. 4, when the information processing device 1 receives a FW update request, it updates the firmware and returns a FW update response including the result (hereinafter also referred to as the FW update implementation result).

[0028] Fig. 5 is a diagram conceptually illustrating the configuration of the NAND flash memory 130 in the information processing device 1 shown in Fig. 1. Fig. 6 is a diagram showing an example of information stored in the lookup table area 131 shown in Fig. 5. Here, the information stored in the lookup table area 131 is a lookup table 131a that manages bad blocks, and Fig. 6 displays the lookup table 131a stored as data in the lookup table area 131 in a format that makes it possible to understand the management contents.

[0029] In ONUs used in the above-mentioned 10G-EPON system, etc., NAND flash memory 130 is often used instead of conventional NOR flash memory due to increased flash capacity for control information, etc. However, there is a concern that bad blocks may occur in the NAND flash memory 130, and an excess number of bad blocks may increase the chance of device failure and maintenance frequency. Before describing the control performed by the information processing device 1 of the present invention to address these concerns, the mechanism by which device failure occurs due to an excess number of bad blocks in a device equipped with NAND flash memory 130 will be described below.

[0030] (Device failure due to excessive number of bad blocks) The NAND flash memory 130 manages data in units of blocks. In the processing for the setting value change request and FW update request shown in (b) and (c) of Figure 4, writing to a block, including erasing the block, is performed. Specifically, when rewriting data, such as changing or updating, in the NAND flash memory 130, the block containing the part to be changed is first temporarily copied to an external location, the original block is then erased, the data is rewritten externally, and the data is written to the newly emptied block. Repeated writing and erasing in this manner can cause degradation, resulting in the generation of blocks that cannot be written to normally. Such blocks in which errors have occurred (bad blocks) are replaced with normal blocks in the spare area.

[0031] Access control to bad blocks is generally performed by referring to a lookup table 131a, which is a management table as shown in Figure 6. When a write to a block fails, the block (bad block) is registered in a lookup table 131a located inside or outside the NAND flash memory 130. The lookup table 131a stores mapping information, i.e., correspondence information between bad blocks and blocks to which data can be written normally (good blocks). Therefore, when a request to access a bad block occurs, the lookup table 131a is referenced and another normal block is accessed, enabling normal data reading and writing. In the example of Figure 6, blocks with addresses 20, 157, and 111 are registered as bad blocks and are reassigned to good blocks with addresses 950, 942, and 980, respectively.

[0032] However, because the number of bad blocks increases over time, if the number of bad blocks exceeds the number that can be managed by the lookup table 131a, the bad blocks cannot be mapped to normal blocks, making normal writing impossible. In this case, a device (such as the information processing device 1 described above) equipped with the NAND flash memory 130 may experience device failure, such as an inability to communicate. Furthermore, because the NAND flash memory 130 is a non-volatile memory, if a device failure occurs, the failure will not be resolved even if the user restarts the device (information processing device 1), and the device failure state will continue. Therefore, if a device failure occurs, maintenance including recovery from the device failure will be required, compared to when the problem was addressed before the device failure, and the maintenance burden will increase.

[0033] In contrast, the conventional information processing device 1 is configured to display information urging the user to replace the NAND flash memory 130 when it is predicted that the spare area of ​​the NAND flash memory 130 will be depleted. This configuration allows the user to contact the carrier before a device failure occurs so that maintenance such as replacement can be performed, thereby preventing the device from actually failing. However, it is difficult to reduce the frequency of maintenance with the conventional information processing device 1.

[0034] Therefore, in the information processing device 1 of the first embodiment, the frequency of maintenance is reduced by performing LUT usage rate monitoring control, which will be described below.

[0035] (LUT usage rate monitoring control) The LUT usage rate monitoring control is configured to start a write suppression process that suppresses writing to the NAND flash memory 130 when the LUT usage rate of the information processing device 1 exceeds a certain value. Here, the LUT usage rate is the usage rate of the lookup table 131a, that is, the ratio of the number of registered bad blocks to the number of bad blocks that can be managed by the lookup table 131a. In other words, the LUT usage rate is the usage rate of blocks in the spare area. Write suppression can be achieved, for example, by restricting some functions or processes to reduce writing opportunities.

[0036] Furthermore, the LUT usage rate monitoring control is configured to notify the optical line terminal device 2 (OLT) of the communication station when it is predicted that the LUT usage rate of the information processing device 1 will further increase and the spare area will be depleted. This notification (hereinafter referred to as OLT notification) is useful for the communication carrier to grasp the status of the information processing device 1 when performing maintenance, etc.

[0037] The LUT usage rate monitoring control will be described in detail below with reference to Fig. 3 and Fig. 6 to Fig. 8. Here, it is defined that the control unit 101 of each information processing device 1 in the optical communication system 100 performs the LUT usage rate monitoring flow.

[0038] The storage unit 103 shown in FIG. 3 stores a lookup table 131a (see FIG. 6). The storage unit 103 also stores a write suppression threshold T1 (e.g., 80%) and an OLT notification threshold T2 (e.g., 85%), which are predetermined thresholds for LUT usage. The write suppression threshold T1 is a LUT usage rate that is smaller than the OLT notification threshold T2, and both the write suppression threshold T1 and the OLT notification threshold T2 are less than 100%. Hereinafter, the write suppression threshold T1 may be referred to as a first threshold, and the OLT notification threshold T2 may be referred to as a second threshold.

[0039] The LUT usage rate monitoring flow is mainly performed by the calculation unit 101a, determination unit 101b, and processing unit 101c of the control unit 101. The calculation unit 101a is a functional unit that calculates the LUT usage rate. The determination unit 101b compares the LUT usage rate with a write suppression threshold T1 to determine whether write suppression is necessary. The determination unit 101b also compares the LUT usage rate with an OLT notification threshold T2 to determine whether OLT notification is necessary, i.e., whether the spare area is about to run out. The processing unit 101c performs processing according to the result of the determination unit 101b. Specifically, the processing unit 101c suppresses writing when the LUT usage rate exceeds the write suppression threshold T1, and performs OLT notification when the LUT usage rate further increases and exceeds the OLT notification threshold T2.

[0040] Fig. 7 is a flowchart of LUT usage rate monitoring performed by the information processing device 1 shown in Fig. 1. As shown in Fig. 7, in the LUT usage rate monitoring flow, the control unit 101 first checks whether write suppression is being performed (step S1). If write suppression is being performed (step S1; YES), that is, if the LUT usage rate has already exceeded the write suppression threshold T1 and write suppression processing has started, the control unit 101 checks whether a notification to the communication station side terminal device 2 (hereinafter referred to as OLT notification) has been performed (step S2). If the OLT notification has been performed (step S2; YES), that is, if the LUT usage rate has already exceeded not only the write suppression threshold T1 but also the OLT notification threshold T2 and that fact has been notified to the communication station side terminal device 2, the control unit 101 ends the LUT usage rate monitoring flow.

[0041] If either the write restriction or the OLT notification has not been implemented, that is, if the write restriction is not being implemented (step S1; NO), or if the write restriction is being implemented (step S1; YES) but the OLT notification has not been implemented (step S2; NO), the control unit 101 checks the LUT usage rate (step S3). Specifically, in step S3, the calculation unit 101a calculates the LUT usage rate.

[0042] After checking the LUT usage rate in step S3, the control unit 101 checks whether write suppression is being implemented (step S4). If write suppression is not being implemented (step S4; NO), the control unit 101 determines whether the LUT usage rate exceeds a write suppression threshold T1 (e.g., 80%) (step S5). If write suppression is not being implemented (step S4; NO) and the LUT usage rate exceeds the write suppression threshold T1 (step S5; YES), the control unit 101 starts write suppression processing to save spare areas (step S6).

[0043] Next, if write suppression is being implemented in step S4 (step S4; YES), if write suppression is not being implemented (step S4; NO) and the LUT usage rate does not exceed the write suppression threshold T1 (step S5; NO), or if the LUT usage rate exceeds the write suppression threshold T1 in step S5 and the write suppression process is started (step S6), the control unit 101 checks whether the OLT notification has been implemented (step S7).

[0044] If the OLT notification has not been performed in step S7 (step S7; NO), the control unit 101 determines whether the LUT usage rate exceeds the OLT notification threshold T2 (e.g., 85% of the LUT) (step S8). If the OLT notification has not been performed (step S7; NO) and the LUT usage rate exceeds the OLT notification threshold T2 (step S8; YES), the control unit 101 performs the OLT notification (step S9). Specifically, in step S9, the communication station side terminal device 2 (OLT), which is the higher-level device, is notified that the spare area of ​​the information processing device 1 is about to be depleted.

[0045] If OLT notification has been performed in step S7 (step S7; YES), if OLT notification has not been performed (step S7; NO) and the LUT usage rate has not exceeded the OLT notification threshold T2 (step S8; NO), or if the LUT usage rate has exceeded the OLT notification threshold T2 in step S8 and OLT notification has been performed (step S9), the control unit 101 waits for a certain period of time (step S10) and repeats the above-mentioned steps S1 to S9.

[0046] Here, we will not mention the method of notifying the communication station side terminal device 2 (OLT), but as an example, it is possible to notify the communication station side terminal device 2 by using an OAM (Operation, Administration and Maintenance) frame, which is often used in the maintenance, monitoring and control of E-PON systems.

[0047] As described above, by monitoring the LUT usage rate in the information processing device 1, processing according to the LUT usage rate of the NAND flash memory 130 is carried out, which leads to a reduction in the maintenance burden.

[0048] 8A and 8B are diagrams illustrating the processing performed by the information processing device 1 shown in FIG. 1 when write suppression is in effect, where (a) illustrates the processing performed in response to a setting value acquisition request, (b) illustrates the processing performed in response to a setting value change request, and (c) illustrates the processing performed in response to a firmware update request. As explained with reference to FIGS. 5 and 6, bad blocks occur due to writing to a block in the NAND flash memory 130. Therefore, in the processing performed in response to a setting value acquisition request that does not require writing to a block, as shown in FIG. 8A, even when write suppression is in effect, the information processing device 1 (ONU) returns a setting value acquisition response that includes the requested setting value, just as in the case of FIG. 4A.

[0049] On the other hand, since processing in response to a setting value change request and processing in response to a FW update request involves writing to blocks in the NAND flash memory 130, these processes that could increase the LUT usage rate are not performed while write suppression is in effect. When write suppression is in effect, as shown in (b) of FIG. 8, upon receiving a setting value change request, the information processing device 1 returns a setting value change failure response to the requestor without changing the setting value, i.e., without changing the setting. Furthermore, when write suppression is in effect, as shown in (c) of FIG. 8, upon receiving a FW update request, the information processing device 1 returns a FW write failure response to the requestor without updating the firmware.

[0050] (Effect of LUT usage rate monitoring control) As described above, in the information processing device 1 (ONU), write suppression is implemented when the LUT usage rate exceeds the write suppression threshold T1. This reduces the opportunities for writing to blocks in the NAND flash memory 130, making it possible to reduce the frequency of maintenance (e.g., replacement of the NAND flash memory 130) compared to conventional methods. Furthermore, although some functions or processes are restricted during the write suppression process, the implementation of the write suppression process extends the period during which the user can continue using the device before maintenance is required. Therefore, for example, the period during which the information processing device 1 cannot be used between the time the user contacts the telecommunications carrier and the time maintenance is performed is shortened.

[0051] The write restriction process does not necessarily disable all processes that involve writing to blocks in the NAND flash memory 130. For example, since the device log is needed to determine the cause of a device failure, the device log may be configured to be able to be written to blocks even during write restriction. The device log is a log of data related to at least one of the operation and status of the information processing device 1.

[0052] As described above, write suppression reduces the number of write opportunities to blocks, but does not completely eliminate writes to blocks, so the number of bad blocks may increase. In other words, write suppression can extend the time until device failure due to LUT capacity exceeding (excessive number of bad blocks) but does not eliminate the chance of device failure. Furthermore, since firmware updates and setting value changes are not performed as described above while write suppression is in effect, firmware updates to address security vulnerabilities, etc., will fail, and the user's desired settings will not be reflected in the information processing device 1.

[0053] Therefore, the information processing device 1 is configured to notify the communication station side terminal device 2 when the LUT usage rate exceeds the OLT notification threshold T2. This allows the telecommunications carrier to know the status of the information processing device 1 (ONU), and by performing maintenance to replace the NAND flash memory 130 or the information processing device 1, the user can resume normal use of the information processing device 1. In this case, the telecommunications carrier can also grasp, through the OLT notification, that the spare area of ​​the NAND flash memory 130 in the information processing device 1 is about to run out, and can therefore take measures such as sending another information processing device 1 to the user for replacement without having to visit the user's home, thereby reducing the maintenance burden.

[0054] However, if the user continues to use the information processing device 1 without taking any action when the spare area of ​​the NAND flash memory 130 is about to run out, the increase in the number of bad blocks will cause the LUT capacity to exceed, resulting in device failure and the user being unable to communicate. If communication is not possible, it will be difficult for the user to contact the telecommunications carrier if the user uses an optical telephone as a landline. Furthermore, with the conventional configuration that only notifies the user when the spare area of ​​the NAND flash memory 130 is about to run out, the telecommunications carrier may not be able to grasp the situation. In such cases, the telecommunications carrier will have to visit the user's home to check the situation or to troubleshoot the device failure.

[0055] In response to this, the information processing device 1 is configured to notify the communication station terminal device 2 before the LUT capacity is exceeded, allowing the communication carrier to grasp the situation and take action such as replacing the information processing device 1 as described above before the device fails.

[0056] (Usage of this embodiment) Although the first embodiment has been described as being applied to an ONU, it can also be applied to other devices that incorporate a NAND flash memory 130 (for example, a home gateway or home router located in a user's home, etc.).

[0057] (effect) As described above, the information processing device 1 according to the first embodiment is an information processing device 1 that communicates with an external higher-level device (communication station terminal device 2). The information processing device 1 includes at least a NAND flash memory 130 and a storage unit 103 that stores a lookup table 131a in which correspondence information between bad blocks and normal blocks in the NAND flash memory 130 is registered. The information processing device 1 also includes a calculation unit 101a that calculates a usage rate of the lookup table 131a stored in the storage unit 103, and a determination unit 101b that determines whether the usage rate calculated by the calculation unit 101a exceeds a predetermined first threshold (write suppression threshold T1). The information processing device 1 also includes a processing unit 101c that performs a write suppression process that suppresses writing to the NAND flash memory 130 when the determination unit 101b determines that the usage rate exceeds the first threshold.

[0058] In this way, when the usage rate of the lookup table 131a exceeds the first threshold (write suppression threshold T1), a write suppression process is performed, reducing the chances of writing to blocks in the NAND flash memory 130. This extends the time until the lookup table 131a exceeds its capacity, i.e., the number of bad blocks exceeds the limit, causing a device failure, and reduces the frequency of maintenance of the information processing device 1.

[0059] The determining unit 101b determines whether the utilization rate calculated by the calculating unit 101a exceeds a predetermined second threshold (OLT notification threshold T2) that is greater than the first threshold. When the determining unit 101b determines that the utilization rate exceeds the second threshold, the processing unit 101c performs notification processing to the higher-level device (communication station side terminal device 2).

[0060] This allows the carrier to grasp the status of the information processing device 1 through notification before the LUT capacity is exceeded, so even if there is no contact from the user, the carrier can take measures such as sending the information processing device 1 to the user for replacement before the device breaks down, which results in a reduction in maintenance burden.

[0061] Furthermore, in the write suppression process, the processing unit 101c allows writing to the device log, but does not change the settings or update the firmware even if a request for changing the settings or updating the firmware (a setting value change request or a FW update request) is received.

[0062] This makes it easier to determine the cause of a device failure even if the device fails while write restriction is being performed.

[0063] Moreover, the information processing method according to the first embodiment is an information processing method of an information processing device 1 having a NAND flash memory 130. The information processing method calculates a usage rate of a lookup table 131a in which correspondence information between bad blocks and normal blocks in the NAND flash memory 130 is registered, and determines whether the calculated usage rate exceeds a predetermined first threshold (write suppression threshold T1). Furthermore, the information processing method performs a write suppression process that suppresses writing to the NAND flash memory 130 when it is determined that the usage rate exceeds the first threshold.

[0064] This reduces the frequency of replacing the NAND flash memory 130 in the information processing device 1 having the NAND flash memory 130.

[0065] Furthermore, the program according to the first embodiment causes a computer to function as a calculation unit 101a that calculates the usage rate of a lookup table 131a in which correspondence information between bad blocks and normal blocks in the NAND flash memory 130 is registered, a determination unit 101b that determines whether the usage rate calculated by the calculation unit 101a exceeds a predetermined first threshold (write suppression threshold T1), and a processing unit 101c that performs a write suppression process that suppresses writing to the NAND flash memory 130 when the determination unit 101b determines that the usage rate exceeds the first threshold.

[0066] The above program can extend the life of the NAND flash memory 130 mounted on the device (information processing device 1). [Explanation of symbols]

[0067] 1 Information processing device, 2 Communication station side terminal device, 3 Optical splitter, 4 Optical fiber, 11 Processor, 12 Volatile storage device, 13 Non-volatile storage device, 51 Personal computer, 52 Router, 100 Optical communication system, 101 Control unit, 101a Calculation unit, 101b Determination unit, 101c Processing unit, 102 Communication unit, 103 Memory unit, 104 UNI function unit, 130 NAND type flash memory, 131 Lookup table area, 131a Lookup table, T1 Write suppression threshold, T2 OLT notification threshold.

Claims

1. An information processing device that communicates with an external higher-level device, a storage unit having at least a NAND flash memory and storing a lookup table in which correspondence information between bad blocks and normal blocks in the NAND flash memory is registered; a calculation unit that calculates a usage rate of the lookup table stored in the storage unit; a determination unit that determines whether the usage rate calculated by the calculation unit exceeds a predetermined first threshold; a processing unit that performs a write suppression process that suppresses writing to the NAND flash memory when the determining unit determines that the usage rate exceeds the first threshold; An information processing device comprising:

2. the determination unit determines whether the usage rate calculated by the calculation unit exceeds a predetermined second threshold value that is greater than the first threshold value; the processing unit performs a notification process to the higher-level device when the determination unit determines that the usage rate exceeds the second threshold. The information processing device according to claim 1 .

3. the processing unit, in the write suppression processing, allows writing to a device log, but does not change the setting or update the firmware even if a request for the setting change or firmware update is received.

3. The information processing device according to claim 1.

4. An information processing method for an information processing device having a NAND flash memory, comprising: Calculating a usage rate of a lookup table in which correspondence information between bad blocks and normal blocks in the NAND flash memory is registered; determining whether the calculated usage rate exceeds a predetermined first threshold; performing a write suppression process for suppressing writing to the NAND flash memory when it is determined that the usage rate exceeds the first threshold value; Information processing methods.

5. Computer, a calculation unit that calculates a usage rate of a lookup table in which correspondence information between bad blocks and normal blocks in a NAND flash memory is registered; a determination unit that determines whether the usage rate calculated by the calculation unit exceeds a predetermined first threshold; a processing unit that performs a write suppression process that suppresses writing to the NAND flash memory when the determining unit determines that the usage rate exceeds the first threshold; A program that functions as a

Citation Information

Patent Citations

  • Information processor, replacement support method and replacement support program for flash memory

    JP2015215656A