Chip type electronic component

Abstract

To provide a chip type electronic component that effectively suppresses the occurrence of cracks originating from the surface of a base.SOLUTION: A chip type electronic component 1 has a base 3 formed by alternately stacking dielectric layers 6 and internal electrodes 4, and a pair of external electrodes 5 provided on respective end faces 3a of the base 3 and electrically connected to the internal electrode 4, and in base 3, the surface roughness Rsm of side surfaces 3b and 3c connecting a pair of end faces 3a is 3.0 μm or more and 7.0 μm or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to chip-type electronic components. [Background technology]

[0002] A known conventional chip-type electronic component includes a ceramic body and a pair of external electrodes provided on each of a pair of end faces of the ceramic body (see, for example, Patent Document 1). Within the body of the chip-type electronic component of Patent Document 1, multiple dielectric layers and multiple internal electrodes are alternately stacked. Ends of the multiple internal electrodes are exposed from the end faces of the body and are electrically connected to the external electrodes.

[0003] When manufacturing chip-type electronic components, a laminate is first formed by alternately stacking ceramic green sheets containing a dielectric material and ceramic green sheets on which internal electrodes have been formed by printing or the like. The laminate is then cut to obtain green chips, which are then fired to obtain an element body. After forming the element body, the end faces of the element body are polished by barrel polishing so that the ends of the internal electrodes are exposed from the end faces of the element body. External electrodes are then formed on the end faces of the element body by plating or the like, thereby obtaining a chip-type electronic component. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 10-163062 Summary of the Invention [Problem to be solved by the invention]

[0005] When the appearance of a chip-type electronic component obtained by the above-described process is observed, cracks may occur in the element body, originating from small chips or the like present on the surface of the element body. From the viewpoint of ensuring sufficient reliability of chip-type electronic components, a technology that can suppress the occurrence of such cracks is desired.

[0006] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a chip-type electronic component that can suitably suppress the occurrence of cracks that originate on the surface of the element body. [Means for solving the problem]

[0007] The gist of the present disclosure is as follows.

[0008] [1] A chip-type electronic component comprising: an element body in which dielectric layers and internal electrodes are alternately laminated; and a pair of external electrodes provided on a pair of end faces of the element body, respectively, and electrically connected to the internal electrodes, wherein the surface roughness RSm of the side connecting the pair of end faces of the element body is 3.0 μm or more and 7.0 μm or less.

[0009] In this chip-type electronic component, the surface roughness RSm of the side surface connecting the pair of end faces of the element body is 3.0 μm or more and 7.0 μm or less. If RSm is less than 3.0 μm, the surface irregularities caused by the roughness tend to be sharp, while if RSm is greater than 7.0 μm, the surface irregularities caused by the roughness tend to be large. By setting RSm to 3.0 μm or more and 7.0 μm or less, both the sharpness and size of the surface irregularities caused by the roughness are mitigated, and the occurrence of cracks originating from the surface of the element body can be suitably suppressed.

[0010] [2] The chip-type electronic component according to [1], wherein the surface roughness RSm of the side surface is 4.0 μm or more and 6.0 μm or less. By RSm satisfying this range, both the sharpness and size of the surface irregularities caused by the roughness are further reduced, and the occurrence of cracks originating from the surface of the element body can be more reliably suppressed.

[0011] [3] The chip-type electronic component according to [1] or [2], wherein the surface roughness Ra of the side surface is 0.075 μm or less. By satisfying this range for Ra, the sharpness of the surface irregularities due to the roughness is further reduced, and the occurrence of cracks originating from the surface of the element body can be more reliably suppressed.

[0012] [4] The chip-type electronic component according to any one of [1] to [3], wherein the surface roughness Ra of the side surface is 0.005 μm or more. By ensuring that Ra satisfies this range, it is possible to prevent the adhesion of the external electrodes to the element body from being hindered.

[0013] [5] The chip-type electronic component according to any one of [1] to [4], wherein the surface of the side surface has a segregation of Si. With this configuration, the segregation of Si can more effectively suppress the occurrence of cracks originating from the surface of the element body. Furthermore, even if a crack originating from the surface of the element body does occur, its progression can be suppressed.

[0014] [6] The chip-type electronic component according to [5], wherein the element body has a capacitance-forming portion where the internal electrodes overlap in the stacking direction and a gap portion where the internal electrodes do not overlap in the stacking direction, and the number of Si segregations per unit area in the gap portion is greater than the number of Si segregations per unit area in the capacitance-forming portion. With this configuration, the presence of many Si segregations in the gap portion of the element body can more effectively suppress the occurrence and progression of cracks originating from the surface of the element body.

[0015] [7] The chip-type electronic component according to [6], wherein the number of the Si segregations per unit area in the gap portion is four or more times greater than the number of the Si segregations per unit area in the capacitance forming portion. In this case, the presence of more Si segregations in the gap portion of the element body can more effectively suppress the occurrence and progression of cracks originating from the surface of the element body. [Effects of the Invention]

[0016] According to the present disclosure, the occurrence of cracks originating from the surface of the element body can be suitably suppressed. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a perspective view showing a chip-type electronic component according to an embodiment of the present disclosure. [Figure 2]FIG. 1 is a schematic vertical cross-sectional view of a chip-type electronic component. [Figure 3] FIG. 1 is a schematic cross-sectional view of a chip-type electronic component. [Figure 4] 1 is a flowchart showing an example of a method for manufacturing a chip-type electronic component. [Figure 5] FIG. 1 is a schematic perspective view showing an example of a crack that can occur in a general chip-type electronic component and originates from the surface of the element body. [Figure 6] FIG. 10(a) is a diagram showing the definition of RSm, and FIG. 10(b) is a diagram showing the definition of Ra. [Figure 7] FIG. 1 is a schematic diagram showing the relationship between RSm and Ra and the surface state of the element body. [Figure 8] FIG. 2 is a schematic diagram showing segregation on the surface of an element body. [Figure 9] 10(a) is a schematic perspective view showing a method for measuring the surface roughness of the side surface of the element body of each sample, and FIG. 10(b) is a diagram showing the results of determining the incidence of cracks originating from the surface of each sample. [Figure 10] FIG. 1(a) is a schematic diagram showing the measurement positions of Si segregation in each sample, and FIG. 1(b) is a diagram showing the results of determining the incidence of cracks originating from the surface relative to the amount of Si segregation present. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, preferred embodiments of a chip-type electronic component according to one aspect of the present disclosure will be described in detail with reference to the drawings.

[0019] FIG. 1 is a perspective view showing a chip-type electronic component according to an embodiment of the present disclosure. FIG. 2 is a schematic longitudinal cross-sectional view thereof, and FIG. 3 is a schematic transverse cross-sectional view thereof. The chip-type electronic component 1 shown in FIGS. 1 to 3 is exemplified by a multilayer ceramic capacitor 2. The multilayer ceramic capacitor 2 is configured to include an element body 3, multiple internal electrodes 4 (see FIGS. 2 and 3), and a pair of external electrodes 5. In the following description, for convenience, a first direction D1, a second direction D2, and a third direction D3 that are orthogonal to each other are defined. The first direction D1 corresponds to the length direction of the element body 3, the second direction D2 corresponds to the width direction of the element body 3, and the third direction D3 corresponds to the height direction of the element body 3.

[0020] The element body 3 has, for example, a rectangular parallelepiped shape. Rectangular parallelepiped shapes include shapes in which corners and ridges are chamfered and shapes in which corners and ridges are rounded. The element body has a pair of end faces 3a, a pair of side faces 3b, and a pair of side faces 3c. In this embodiment, the pair of end faces 3a are faces in the length direction of the element body 3 and face each other in the first direction D1. The pair of side faces 3b and the pair of side faces 3c extend so as to connect the pair of end faces 3a. The pair of side faces 3b are faces in the width direction of the element body 3 and face each other in the second direction D2. The pair of side faces 3c are faces in the height direction of the element body 3 and face each other in the third direction D3.

[0021] The length of the element body 3 is, for example, 0.4 mm or more and 7.5 mm or less. The width of the element body 3 is, for example, 0.2 mm or more and 6.3 mm or less. The height of the element body 3 is, for example, 0.2 mm or more and 2.8 mm or less. As an example, in this embodiment, the length of the element body 3 is 3.2 mm, the width of the element body 3 is 2.5 mm, and the height of the element body 3 is 2.5 mm.

[0022] The element body 3 is configured by stacking multiple dielectric layers 6. In this embodiment, the multiple dielectric layers 6 are stacked in the third direction D3. Each dielectric layer 6 is configured, for example, from a sintered ceramic green sheet. The ceramic green sheet is configured, for example, to contain a dielectric material. Examples of the dielectric material include BaTiO3-based, Ba(Ti,Zr)O3-based, (Ba,Ca)TiO3-based, (Ba,Ca)(Ti,Zr)O3-based, CaZrO3-based, and (Ca,Sr)ZrO3-based dielectric ceramics. In the element body 3, the dielectric layers 6 are integrated to the extent that their boundaries are not visible.

[0023] The internal electrodes 4 are internal conductors arranged within the element body 3. The internal electrodes 4 are alternately stacked with the dielectric layers 6 in the third direction D3. Examples of conductive materials that constitute the internal electrodes 4 include Cu and Ni. The internal electrodes 4 may be configured to contain the same conductive material as the conductive material contained in the external electrodes 5. The internal electrodes 4 may be configured to contain a conductive material different from the conductive material contained in the external electrodes 5. The internal electrodes 4 are configured as sintered bodies of conductive pastes containing the above-mentioned conductive materials.

[0024] 2 and 3, the internal electrode 4 includes an internal electrode 4A extending to one of the pair of end faces 3a and an internal electrode 4B extending to the other of the pair of end faces 3a. The internal electrodes 4A and 4B are alternately arranged in the third direction D3.

[0025] The internal electrode 4A has a main electrode portion 4Aa and an extraction electrode portion 4Ab. When viewed from the third direction D3, the main electrode portion 4Aa has a rectangular shape that is, for example, slightly smaller than the element body 3. The extraction electrode portion 4Ab has a width smaller than that of the main electrode portion 4Aa and extends toward one of the pair of end faces 3a. An end of the extraction electrode portion 4Ab is exposed at one of the pair of end faces 3a and is electrically connected to one of the pair of external electrodes 5.

[0026] The internal electrode 4B has a main electrode portion 4Ba and an extraction electrode portion 4Bb. When viewed from the third direction D3, the main electrode portion 4Ba has, for example, a rectangular shape with the same dimensions as the main electrode portion 4Aa and overlaps with the main electrode portion 4Aa with the dielectric layer 6 sandwiched therebetween. The extraction electrode portion 4Bb has a width smaller than that of the main electrode portion 4Ba and extends toward the other of the pair of end faces 3a. An end of the extraction electrode portion 4Bb is exposed at the other of the pair of end faces 3a and is electrically connected to the other of the pair of external electrodes 5.

[0027] In this embodiment, in the element body 3, the portion where the internal electrodes 4 overlap in the third direction D3 is referred to as the capacitance-forming portion 3A, and the portion where the internal electrodes 4 do not overlap in the third direction D3 is referred to as the gap portion 3B (see FIGS. 2 and 3). The capacitance-forming portion 3A is a portion where the main electrode portion 4Aa of the internal electrode 4A and the main electrode portion 4Ba of the internal electrode 4B are located when viewed from the third direction D3, and is located inside the element body 3. The gap portion 3B is a portion where the main electrode portion 4Aa of the internal electrode 4A and the main electrode portion Ba of the internal electrode 4B are not located when viewed from the third direction, and is located on the surface side of the element body 3 so as to surround the capacitance-forming portion 3A.

[0028] The external electrode 5 is an external conductor disposed outside the element body 3. The external electrode 5 includes an external electrode 5A that covers one of the pair of end faces 3a, and an external electrode 5B that covers the other of the pair of end faces 3a (see FIGS. 2 and 3). A portion of the external electrode 5A may extend from one of the pair of end faces 3a onto each of the pair of side faces 3b and the pair of side faces 3c. Similarly, a portion of the external electrode 5B may extend from the other of the pair of end faces 3a onto each of the pair of side faces 3b and the pair of side faces 3c.

[0029] As shown in Figures 2 and 3, each of the external electrodes 5A and 5B includes a first electrode layer 5a and a second electrode layer 5b. In the example of Figures 2 and 3, in each of the external electrodes 5A and 5B, the portion covering the end face 3a and the portion extending around to the side faces 3b and 3c include the first electrode layer 5a and the second electrode layer 5b. The first electrode layer 5a is the inner layer (on the element body 3 side), and the second electrode layer 5b is the outer layer (on the opposite side from the element body 3). In this embodiment, the second electrode layer 5b constitutes the outermost layer of the external electrode 5.

[0030] The first electrode layer 5a is formed, for example, by baking a conductive paste applied to the surface of the element body 3. The conductive paste includes, for example, a resin, a plurality of glass particles, a plurality of metal particles, and an organic solvent. The resin includes, for example, an acrylic resin or ethyl cellulose. The plurality of metal particles include, for example, Cu particles or Ni particles.

[0031] The second electrode layer 5b is a plating layer formed on the first electrode layer 5a by, for example, a plating method. In this embodiment, the second electrode layer 5b is formed so as to cover the entire first electrode layer 5a. The second electrode layer 5b may be a Ni plating layer. The second electrode layer 5b may include a Ni plating layer and a Sn plating layer formed on the Ni plating layer.

[0032] Next, a method for manufacturing the above-mentioned chip-type electronic component 1 will be described.

[0033] Fig. 4 is a flowchart showing an example of a method for manufacturing the chip-type electronic component 1. As shown in Fig. 4, the method for manufacturing the chip-type electronic component 1 includes a laminating step S01, a firing step S02, a polishing step S03, and an electrode forming step S04.

[0034] The lamination step S01 is a step of forming green chips that will serve as the base of the element body 3. In the lamination step S01, ceramic green sheets that will become the dielectric layers 6, ceramic green sheets on which the patterns of the internal electrodes 4A are printed using a conductive paste, and ceramic green sheets on which the patterns of the internal electrodes 4B are printed using a conductive paste are prepared. Next, these green sheets are laminated in a predetermined order to form a laminate. The formed laminate is cut to obtain green chips that will serve as the base of the element body 3.

[0035] The firing step S02 is a step of firing the green chip to obtain the element body 3. In the firing step S02, the obtained green chip is fired at a predetermined temperature to obtain the element body 3. After the firing step S02, an annealing treatment may be performed to remove residual stress in the element body 3.

[0036] The polishing step S03 is a step of polishing the surface of the element body 3. In the polishing step S03, the surface of the element body 3 is polished by, for example, barrel polishing, to expose the internal electrodes 4 from a pair of end faces 3a of the element body 3. In the polishing step S03, the lead electrode portion 4Ab of the internal electrode 4A is exposed from one of the pair of end faces 3a of the element body 3, and the lead electrode portion 4Bb of the internal electrode 4B is exposed from the other of the pair of end faces 3a of the element body 3.

[0037] In this embodiment, wet barrel polishing is performed as the barrel polishing. In wet barrel polishing, a sealed rotary pot made of a material such as polyethylene is used. A plurality of element bodies 3 are placed in the sealed rotary pot together with a solvent, media, abrasives, etc., and the sealed rotary pot is rotated. This polishes the surfaces of the element bodies 3, exposing the internal electrodes 4 from a pair of end faces 3a of the element bodies 3. In addition, the corners of the element bodies 3 are chamfered, giving the element bodies 3 a rounded shape.

[0038] The electrode formation step S04 is a step of forming external electrodes 5 on the ends of the element body 3. In the electrode formation step S04, a conductive paste containing, for example, a metal powder mainly composed of Cu is prepared. Next, the ends of the element body 3 on the pair of end faces 3a side are each immersed in the conductive paste, and a paste layer is formed on the end. The paste layer is then heat-treated at a predetermined temperature to form a first electrode layer 5a. After the first electrode layer 5a is formed, a Ni plating layer is deposited on the first electrode layer 5a by, for example, a plating method, to form a second electrode layer 5b. Furthermore, if necessary, a Sn plating layer is further formed on the Ni plating layer. This results in the chip-type electronic component 1 shown in FIGS. 1 to 3.

[0039] FIG. 5 is a perspective view schematically showing the appearance of a typical chip-type electronic component 101 obtained by the manufacturing process described above. For convenience, FIG. 5 shows the element body 3 from one of a pair of end faces 3a with the external electrodes 5 removed. When observing the appearance of a typical chip-type electronic component 1 after manufacturing, as shown in FIG. 5, cracks K may have occurred in the element body 3, originating from small chips or the like present on the surface of the element body 3. If such cracks K originating on the surface of the element body 3 progress to the surface or inside of the element body 3, this may lead to a decrease in the reliability of the product.

[0040] To address these issues, in the chip-type electronic component 1, the surface roughnesses RSm and Ra of the side surfaces 3b, 3c of the element body 3 are specified, thereby preventing the presence of starting points for cracks K on the surface of the element body 3 and suppressing the occurrence of cracks K originating from the surface of the element body 3. More specifically, in the chip-type electronic component 1, the surface roughness RSm of the side surfaces 3b, 3c connecting the pair of end faces 3a of the element body 3 is 3.0 μm or more and 7.0 μm or less, and preferably 4.0 μm or more and 6.0 μm or less. Furthermore, in the element body 3, the surface roughness Ra of the side surfaces 3b, 3c connecting the pair of end faces 3a is 0.075 μm or less, and preferably 0.005 μm or more.

[0041] Here, the definitions of surface roughness RSm and surface roughness Ra follow JIS B 0601:2013. As shown in Figure 6(a), surface roughness RSm is a parameter that represents the average length of the profile length over a reference length l. Surface roughness RSm can be calculated using the following formula (1) where XSi is the length of the profile in one section within the reference length l. Furthermore, surface roughness Ra is a parameter that represents the arithmetic mean roughness of the profile over a reference length, as shown in Figure 6(b). Surface roughness Ra can be calculated using the following formula (2) where Z(x) is the height (ordinate value) of the profile at an arbitrary position x.

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[0042] FIG. 7 is a schematic diagram showing the relationship between RSm and Ra and the surface condition of the element body. As shown in FIG. 7, RSm is related to the periodicity of the unevenness on the surface of the element body 3. As RSm decreases, the period of the unevenness tends to shorten and the unevenness tends to become sharper. As RSm increases, the period of the unevenness tends to lengthen and the unevenness tends to become larger. Furthermore, Ra is related to the depth of the unevenness on the surface of the element body 3. As Ra decreases, the depth of the unevenness tends to decrease and the sharpness of the unevenness tends to be reduced. In the chip-type electronic component 1, as shown by the bold frame in FIG. 7, by ensuring RSm on the side surfaces 3b and 3c of the element body 3 within a certain range, and preferably by reducing Ra, both the sharpness and size of the unevenness on the side surfaces 3b and 3c are reduced.

[0043] Furthermore, in the chip-type electronic component 1, as shown in FIG. 8, Si segregation S exists on the surfaces of the side surfaces 3b, 3c of the element body 3. Segregation is a phenomenon in which metal or alloy elements are unevenly distributed due to separation from one phase to another during a phase transition of a substance. The presence of Si segregation S on the surfaces of the side surfaces 3b, 3c of the element body 3 can more effectively suppress the occurrence of cracks K originating from the surface of the element body 3. Furthermore, even if cracks K originating from the surface of the element body 3 do occur, the segregation S serves to suppress the progression of the cracks K.

[0044] In this embodiment, for example, a green chip that serves as the base of the element body 3 is immersed in a solution containing Si before firing, and then fired. As a result, the number of Si segregations S per unit area in the gap portion 3B is greater than the number of Si segregations S per unit area in the capacitance forming portion 3A. The number of Si segregations S per unit area in the gap portion 3B is preferably four or more times greater than the number of Si segregations S per unit area in the capacitance forming portion 3A. There are no particular restrictions on the unit area, and it is sufficient to set a rectangular area of ​​100 μm × 100 μm at any position on the side surfaces 3b and 3c of the element body 3, for example.

[0045] As described above, in the chip-type electronic component 1, the surface roughness RSm of the side surfaces 3b, 3c connecting the pair of end faces 3a in the element body 3 is 3.0 μm or more and 7.0 μm or less. If RSm is less than 3.0 μm, the surface irregularities caused by the roughness tend to be sharp, and if RSm is greater than 7.0 μm, the surface irregularities caused by the roughness tend to be large. By setting RSm to 3.0 μm or more and 7.0 μm or less, both the sharpness and size of the surface irregularities caused by the roughness are reduced, and the occurrence of cracks K originating from the surface of the element body 3 can be suitably suppressed.

[0046] In this embodiment, the surface roughness RSm of the side surfaces 3b, 3c is 4.0 μm or more and 6.0 μm or less. When RSm satisfies this range, both the sharpness and size of the surface irregularities due to the roughness are further reduced, and the occurrence of cracks originating from the surface of the element body 3 can be more reliably suppressed.

[0047] In this embodiment, the surface roughness Ra of the side surfaces 3b, 3c is 0.075 μm or less. When Ra satisfies this range, the sharpness of the surface irregularities due to the roughness is further reduced, and the occurrence of cracks K originating from the surface of the element body 3 can be more reliably suppressed. Furthermore, in this embodiment, the surface roughness Ra of the side surfaces 3b, 3c is 0.005 μm or more. When Ra satisfies this range, it is possible to suppress the adhesion of the external electrodes 5 to the element body 3 from being hindered.

[0048] In this embodiment, Si segregation S exists on the surfaces of the side faces 3b and 3c. With this configuration, the Si segregation S can more effectively suppress the occurrence of cracks K originating from the surface of the element body 3. Furthermore, even if a crack K originating from the surface of the element body 3 does occur, its progression can be suppressed.

[0049] In this embodiment, the number of Si segregations S per unit area in the gap portion 3B is greater than the number of Si segregations S per unit area in the capacitance forming portion 3A. Preferably, the number of Si segregations S per unit area in the gap portion 3B is four or more times greater than the number of Si segregations S per unit area in the capacitance forming portion 3A. With this configuration, the presence of many Si segregations in the gap portion 3B of the element body 3 can more effectively suppress the occurrence and progression of cracks K originating from the surface of the element body 3.

[0050] [Example] Hereinafter, examples of the present disclosure will be described.

[0051] First, as shown in FIG. 9(a), element samples with different surface roughnesses RSm and Ra were prepared, and the surface roughness of the side surface (the surface corresponding to side surface 3b) of each sample was measured. A laser microscope was used to measure the surface roughness RSm and Ra. The measurement range was a rectangular area of ​​500 μm × 500 μm on the side surface of the element, and the measurement direction was aligned with the stacking direction of the dielectric layers in the element. The measured RSm values ​​for the samples were seven: 1.5 μm, 3.2 μm, 4.3 μm, 5.1 μm, 6.7 μm, and 8.3 μm. The measured Ra values ​​for the samples were six: 0.002 μm, 0.008 μm, 0.027 μm, 0.046 μm, 0.068 μm, and 0.074 μm.

[0052] Next, the appearance of each sample was observed using a stereomicroscope to check for the presence or absence of cracks. For samples in which cracks were confirmed, the crack surface was peeled off and observed in detail to identify the origin of the cracks, and the cracks were classified into cracks that originated on the surface of the element body and cracks that originated elsewhere than the surface of the element body. The occurrence rate of cracks originating on the surface of the element body was then calculated based on the number of samples in which cracks originated on the surface of the element body out of 100 samples in which cracks occurred.

[0053] Figure 9(b) shows the results of the evaluation of the incidence of cracks originating from the surface of the element body for each sample. In Figure 9(b), the incidence of cracks originating from the surface of the element body was evaluated as "A" if it was between 0% and 30%, "B" if it was between 30% and 70%, and "C" if it was between 70% and 100%.

[0054] From the results shown in Figure 9(b), for each sample with a surface roughness RSm of 3.0 μm or more and 7.0 μm or less, the incidence of cracks originating from the surface of the element body was judged to be "A" or "B," confirming that the incidence of cracks originating from the surface of the element body was lower than for each sample with a surface roughness RSm of less than 3.0 μm or more and more than 7.0 μm. Among each sample with a surface roughness RSm of 3.0 μm or more and 7.0 μm or less, in the range where the surface roughness Ra was 0.005 μm or more and 0.075 μm or less (the bold framed area in Figure 9(b)), the incidence of cracks originating from the surface of the element body was judged to be almost "A," confirming that the incidence of cracks originating from the surface of the element body was further reduced.

[0055] Next, we evaluated the relationship between the amount of Si segregation on the surface of the element and the incidence of cracks originating from the surface of the element. For this evaluation, green chips, which serve as the base material for the element, were immersed in a solution containing Si before firing, and then fired to form multiple element samples. To measure the amount of Si segregation, the element of each sample was polished from one end face to the other to near the center so that the cross section of the capacitance-forming area was exposed.

[0056] The polished sample was observed using an electron probe microanalyzer on the cross section A of the capacitor formation area and the surface B of the gap area, as shown in Figure 10(a). The areas where the intensity of the characteristic X-rays obtained by the electron probe microanalyzer exceeded the average value + 5σ (σ is the standard deviation) were determined to be the locations where Si segregation existed. The measurement range was a rectangular area of ​​100 μm × 100 μm in both the capacitor formation area and the gap area.

[0057] When the number of Si segregations present within the measurement range in the capacitance-forming portion and the gap portion of one of the above samples was measured, it was found that there were 7.8 particles in the capacitance-forming portion and 46.9 particles in the gap portion. Therefore, as described above, it was confirmed that by immersing the green chip, which is the base material of the element body, in a solution containing Si before firing and then firing it, it is possible to make the number of Si segregations present per unit area in the gap portion greater than the number of Si segregations present per unit area in the capacitance-forming portion.

[0058] Figure 10(b) shows the results of assessing the incidence of cracks originating from the surface versus the amount of Si segregation present. For a sample with RSm of 4.3 μm and Ra of 0.074 μm, the ratio of the amount of Si segregation present in the gap to the capacitance-forming portion was varied, and the incidence of cracks originating from the surface of the element body for each ratio was calculated. In Figure 10(b), cases where the incidence of cracks originating from the surface of the element body was less than 30% were assessed as "A," cases where it was 30% or more but less than 70% were assessed as "B," and cases where it was 70% or more were assessed as "C."

[0059] As shown in Figure 10(b), when the ratio of the amount of Si segregation in the gap portion to the capacitance-forming portion is 1, the occurrence rate of cracks originating from the surface of the element body is judged to be "C", whereas when the ratio is 2 to 7, the occurrence rate of cracks originating from the surface of the element body is judged to be "A" or "B". Furthermore, when the ratio is 4 or more, the occurrence rate of cracks originating from the surface of the element body is judged to be "A" in all cases. From these results, it was confirmed that the occurrence of cracks originating from the surface of the element body can be effectively suppressed by making the number of Si segregations per unit area in the gap portion larger than the number of Si segregations per unit area in the capacitance-forming portion, preferably by making it 4 times or more. [Explanation of symbols]

[0060] 1...chip-type electronic component, 2...multilayer chip capacitor (chip-type electronic component), 3...element body, 3A...capacitance forming portion, 3B...gap portion, 3a...end face, 3b, 3c...side face, 4 (4A, 4B)...internal electrode, 5 (5A, 5B)...external electrode, 6...dielectric layer, S...segregation

Claims

1. an element body in which dielectric layers and internal electrodes are alternately laminated; a pair of external electrodes provided on a pair of end surfaces of the element body, respectively, and electrically connected to the internal electrodes; A chip-type electronic component, wherein the surface roughness RSm of the side surface connecting the pair of end faces of the element body is 3.0 μm or more and 7.0 μm or less.

2. 2. The chip-type electronic component according to claim 1, wherein the surface roughness RSm of the side surface is 4.0 [mu]m or more and 6.0 [mu]m or less.

3. 2. The chip-type electronic component according to claim 1, wherein the surface roughness Ra of said side surface is 0.075 [mu]m or less.

4. 2. The chip-type electronic component according to claim 1, wherein the surface roughness Ra of the side surface is 0.005 [mu]m or more.

5. 5. The chip-type electronic component according to claim 1, wherein a segregation of Si exists on the surface of the side surface.

6. the element body has a capacitance forming portion where the internal electrodes overlap in the stacking direction, and a gap portion where the internal electrodes do not overlap in the stacking direction, 6. The chip-type electronic component according to claim 5, wherein the number of said Si segregations per unit area in said gap portion is greater than the number of said Si segregations per unit area in said capacitance forming portion.

7. 7. The chip-type electronic component according to claim 6, wherein the number of said Si segregations per unit area in said gap portion is four times or more larger than the number of said Si segregations per unit area in said capacitance forming portion.

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