Single-phase three wire inverter

Abstract

To achieve zero voltage control with a smaller number of auxiliary switch circuits than before.SOLUTION: An inverter P includes: a power converter 1 that performs power conversion between DC and AC; an auxiliary switch 2 in which a first auxiliary switching element Qs1, a second auxiliary switching element Qs2, and an auxiliary coil Ls are provided in series between a first AC line AL1 and a second AC line AL2; a first reactor Lu provided between the first AC line AL1 and a third AC line AL3; a second reactor Lw provided between the second AC line AL2 and a fourth AC line AL4; and a controller 6. The controller 6 performs zero voltage control of the first auxiliary switching element Qs1 and the second auxiliary switching element Qs2 based on a first reactor current ILU and a second reactor current ILW.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a single-phase three-wire inverter, and more particularly to a single-phase three-wire resonant snubber inverter. [Background technology]

[0002] To reduce inverter losses and noise, a technique is known in which a zero-voltage switching inverter using an auxiliary switch is realized by a resonant snubber inverter.

[0003] For example, Patent Document 1 discloses a configuration including an auxiliary switch control circuit that selects between a first resonant current path consisting of an auxiliary capacitor, two auxiliary switches, and a resonant reactor, and a second resonant current path consisting of an auxiliary capacitor, two auxiliary switches, and a resonant reactor, in order to perform zero-volt switching stably.

[0004] Furthermore, Patent Document 2 discloses a technique in which an auxiliary resonant circuit including a plurality of auxiliary switch circuits is provided in a Δ-type resonant snubber inverter, and switching control is performed to satisfy the zero-voltage switching condition. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-219311 [Non-patent literature]

[0006] [Non-Patent Document 1] Shinichi Hoshi and Kuniomi Oguchi: "Auxiliary Switch Control Method for Three-Phase PWM Resonant Snubber Inverter", Transactions of the Institute of Electrical Engineers of Japan, Vol. 124, No. 4, 2004, pp. 343-351 Summary of the Invention [Problem to be solved by the invention]

[0007] By the way, zero-volt switching using auxiliary switches requires instantaneous reactor current information. In the case of a single-phase two-wire inverter, the reactor currents of the two phases are the same, so control is possible using a single set of auxiliary switches.

[0008] On the other hand, in a single-phase three-wire zero-volt switching inverter, the reactor current differs for each phase, so as shown in Patent Document 1 and Non-Patent Document 1, multiple sets of auxiliary switches corresponding to the power conversion unit are required, which results in a problem of an increased number of mounted components.

[0009] In view of the above problems, an object of the present invention is to realize zero voltage control (zero volt switching) in a single-phase three-wire inverter device by making the auxiliary switch smaller than conventional switches. [Means for solving the problem]

[0010] A single-phase three-wire inverter according to a first aspect of the present invention includes: a power conversion unit that is provided between first and second DC lines and first and second AC lines and converts power between DC and AC; an auxiliary switch that is provided between the first and second AC lines and includes a first auxiliary switching element, a second auxiliary switching element, and an auxiliary coil connected in series; a first reactor that is provided between the first and third AC lines; a second reactor that is provided between the second and fourth AC lines; a first current measurement unit that measures a first reactor current of the first reactor; a second current measurement unit that measures a second reactor current of the second reactor; and a control unit that performs zero voltage control of the first auxiliary switching element and the second auxiliary switching element based on the first reactor current and the second reactor current.

[0011] As described above, in this aspect, an auxiliary switch having a first auxiliary switching element, a second auxiliary switching element, and an auxiliary coil connected in series is provided between the first AC line and the second AC line, and zero voltage control of the first auxiliary switching element and the second auxiliary switching element is performed based on the first reactor current and the second reactor current. In this way, zero voltage control is achieved using an auxiliary switch circuit that is smaller than conventional ones. [Effects of the Invention]

[0012] According to the present invention, in a single-phase three-wire inverter, zero voltage control is realized using an auxiliary switch that is smaller than conventional switches. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a circuit diagram showing an example of the configuration of an inverter device according to an embodiment of the present invention; [Figure 2] Flowchart showing the operation of the control unit [Figure 3] FIG. 10 is a diagram showing an example of a control waveform of an auxiliary switch circuit. [Figure 4] FIG. 10 is a diagram showing an example of a control waveform of an auxiliary switch circuit. [Figure 5] Circuit diagram showing another example of the configuration of the auxiliary switch circuit [Figure 6A] Circuit diagram showing another example of the configuration of the auxiliary switch circuit [Figure 6B] Circuit diagram showing another example of the configuration of the auxiliary switch circuit DETAILED DESCRIPTION OF THE INVENTION

[0014] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the accompanying drawings. The following description of the preferred embodiments is merely exemplary in nature and is not intended to limit the present invention, its scope of application, or its uses.

[0015] In this embodiment, from the viewpoint of reducing losses and noise in the inverter device, a zero-voltage switching inverter using an auxiliary switch is realized by a resonant snubber inverter (RSI). More specifically, this embodiment is characterized in that zero-voltage control (zero-voltage switching) is realized in a single-phase three-wire inverter device by an auxiliary switch that is smaller than conventional ones.

[0016] 1 is a circuit diagram showing an example of the configuration of a single-phase three-wire inverter device according to an embodiment. The inverter P includes a power conversion unit 1, an auxiliary switch 2, a filter 3, a current measurement unit 5, and a control unit 6.

[0017] -Power conversion section- The power conversion unit 1 is provided between a first DC line DL1 connected to the DC+ terminal and a second DC line DL2 connected to the DC- terminal, and a first AC line AL1 and a second AC line AL2, and converts power between DC and AC. For example, an input capacitor (not shown) is connected to the DC+ terminal and the DC- terminal.

[0018] The power conversion unit 1 includes four semiconductor switches Q1 to Q4 configured in an H-bridge configuration. The semiconductor switches Q1 to Q4 perform switching operations in response to a PWM signal from the control unit 6. Specifically, the semiconductor switch Q1 (corresponding to a first switching element) and the semiconductor switch Q2 (corresponding to a second switching element) are connected in series between a first DC line DL1 and a second DC line DL2. A connection line N1 connecting the semiconductor switch Q1 and the semiconductor switch Q2 to each other is connected to the first AC line AL1.

[0019] A semiconductor switch Q3 (corresponding to a third switching element) and a semiconductor switch Q4 (corresponding to a fourth switching element) are provided in series between the first DC line DL1 and the second DC line DL2. A connection line N2 connecting the semiconductor switch Q3 and the semiconductor switch Q4 to each other is connected to the second AC line AL2.

[0020] -Auxiliary switch- The auxiliary switch 2 includes a first auxiliary semiconductor switch Qs1, a second auxiliary semiconductor switch Qs2, and an auxiliary coil Ls. The first auxiliary semiconductor switch Qs1, the second auxiliary semiconductor switch Qs2, and the auxiliary coil Ls are connected in series between the first AC line AL1 and the second AC line AL2. The first auxiliary semiconductor switch Qs1, the second auxiliary semiconductor switch Qs2, and the auxiliary coil Ls only need to be connected in series with each other, and the order in which they are connected is not particularly limited. FIG. 5 shows a configuration example of the auxiliary switch 2. That is, the auxiliary switch 2 of FIG. 1 may be replaced with any of the auxiliary switches 2 of FIGS. 5(a) to 5(f). In the auxiliary switches 2 of FIGS. 5(a) to 5(f), the order in which the first auxiliary semiconductor switch Qs1, the second auxiliary semiconductor switch Qs2, and the auxiliary coil Ls are connected between the first AC line AL1 and the second AC line AL2 is different from each other.

[0021] In Patent Document 1 and Non-Patent Document 1, the connection node connecting the auxiliary switches corresponding to the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 of the present disclosure is connected to the V phase (corresponding to the N phase of the present disclosure). In contrast, in the auxiliary switch 2 of the present embodiment, the connection node connecting the first auxiliary semiconductor switch Qs1, the second auxiliary semiconductor switch Qs2, and the auxiliary coil Ls is not connected to the ground line GL (corresponding to the N phase or O phase) connected to the GND terminal.

[0022] -filter- The filter 3 includes a first reactor Lu, a second reactor Lw, a first capacitor C1, and a second capacitor C2.

[0023] The first reactor Lu is provided between the first AC line AL1 and the third AC line AL3. The second reactor Lw is provided between the second AC line AL2 and the fourth AC line AL4. The first capacitor C1 is provided between the third AC line AL3 and the ground line GL. The second capacitor C2 is provided between the ground line GL and the fourth AC line AL4. L1-phase or U-phase power is transmitted to the third AC line AL3, and L2-phase or W-phase power is transmitted to the fourth AC line AL4. For example, the third AC line AL3, the fourth AC line AL4, and the ground line GL are connected to an EMI filter (not shown).

[0024] -Current measurement section- The current measuring unit 5 measures the reactor current of the first reactor Lu (hereinafter referred to as the “first reactor current I Lu A first current measuring unit 51 measures the reactor current of the second reactor Lw (hereinafter referred to as the "second reactor current I"). Lw The first current measuring unit 51 and the second current measuring unit 52 can be implemented by various sensors or devices that measure reactor current. For example, the first current measuring unit 51 and the second current measuring unit 52 can be implemented by current sensors. Any type of current sensor can be used as long as it can convert the current into a minute signal that can be passed to the control unit. For example, a shunt resistance type or magnetic type current sensor can be used.

[0025] -Control Unit- The control unit 6 has a function of controlling the overall operation of the single-phase three-wire inverter. Here, the control operation related to the technology of the present disclosure among the operations and processes of the control unit 6 will be mainly described.

[0026] The operation of the control unit 6 is mainly realized by a computer (including an MCU (Micro Controller Unit)) executing a program. In other words, the computer has, as its main hardware configuration, a processor that executes a program stored in an internal or external storage unit (not shown).

[0027] The processor here can be of any type as long as it can realize functions by executing a program. For example, a processor may be composed of multiple electronic circuits such as a semiconductor integrated circuit (LSI (Large Scale Integrated Circuit), PLD (Programmable Logic Device), etc.). The processor may be integrated on a single chip or may be separated into multiple chips. In the case of multiple chips, they may be integrated into a single device or may be provided in separate devices.

[0028] The storage unit in which the program is stored is a non-transitory storage device such as a computer-readable ROM (Read Only Memory), and more specifically, a storage device such as a semiconductor memory. The program may be stored in the storage unit in advance, or may be supplied to the storage unit via the Internet or the like.

[0029] As mentioned above, in general, in zero voltage control, information on the instantaneous current of the reactor that constitutes the filter is required to control the auxiliary switches. In the case of a single-phase three-wire system, the reactor currents of the L1 phase and the L2 phase are different, so in conventional technologies (for example, Patent Document 1 or Non-Patent Document 1), multiple sets of auxiliary switches are required, which poses a problem of increasing the number of mounted components.

[0030] Therefore, in the present disclosure, the configuration of the auxiliary switch 2 is simplified, and the first reactor current I Lu and the second reactor current I Lw Based on this, the first auxiliary semiconductor switch Qs1 or the second auxiliary semiconductor switch Qs2 is subjected to zero voltage control. Here, zero voltage control (zero volt switching) refers to control that suppresses switching loss when the semiconductor switches Q1 to Q4 that make up the power conversion unit 1 are turned on by setting the voltage to "0 (zero)" when the semiconductor switches Q1 to Q4 are turned on.

[0031] Specifically, the control unit 6 turns on and off the first auxiliary semiconductor switch Qs1 in accordance with the timing of the zero voltage control of the semiconductor switches Q1 and Q3, and turns on and off the second auxiliary semiconductor switch Qs2 in accordance with the timing of the zero voltage control of the semiconductor switches Q2 and Q4.

[0032] More specifically, for example, the control unit 6 may turn on the first auxiliary semiconductor switch Qs1 at the start of the zero voltage control of one of the semiconductor switches Q1 and Q3, and turn off the first auxiliary semiconductor switch Qs1 at the end of the zero voltage control of the other switch. Similarly, the control unit 6 may turn on the second auxiliary semiconductor switch Qs2 at the start of the zero voltage control of one of the semiconductor switches Q2 and Q4, and turn off the second auxiliary semiconductor switch Qs2 at the end of the zero voltage control of the other switch.

[0033] Furthermore, for example, the control unit 6 may turn on and off the first auxiliary semiconductor switch Qs1 based on the logical sum of the timing of the zero voltage control of the semiconductor switch Q1 and the timing of the zero voltage control of the semiconductor switch Q3. Similarly, the control unit 6 may turn on and off the second auxiliary semiconductor switch Qs2 based on the logical sum of the timing of the zero voltage control of the semiconductor switch Q2 and the timing of the zero voltage control of the semiconductor switch Q4.

[0034] For example, the first reactor current I measured by the first current measuring unit 51 Lu and the second reactor current I measured by the second current measuring unit 52. Lw From this, the ON widths of the virtual auxiliary switches Qi1 to Qi4 corresponding to the four semiconductor switches Q1 to Q4 are calculated, and the ON widths of the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 are set based on the ON widths of the virtual auxiliary switches Qi1 to Qi4.

[0035] Furthermore, the control unit 6 transmits PWM signals to the semiconductor switches Q1 to Q4 of the power conversion unit 1 to perform PWM control.

[0036] A specific control flow of the control unit 6 will be described below with reference to the flowchart of FIG. 2 and the waveform diagrams of FIGS.

[0037] (Steps S11 and S12) In step S11, the control unit 6 calculates the first reactor current I measured by the first current measuring unit 51. Lu In the next step S12, the control unit 6 acquires a measurement value of the first reactor current I Lu From the above, the on-time T of the virtual auxiliary switch Qi1 corresponding to the semiconductor switch Q1 is s1_u and the on-time T of the virtual auxiliary switch Qi2 corresponding to the semiconductor switch Q2. s2_u Calculate.

[0038] Specific examples are shown below.

[0039] First, calculate the reactor current I when the semiconductor switch Q1 turns off using the following equation (1): Lu1n+1 Similarly, using equation (2), the reactor current I when the semiconductor switch Q2 is turned off is calculated. Lu2n+1 Ask for.

[0040]

number

number

[0041] Here, Duty_u is the modulation factor of the L1 phase (U phase), V DC is the bus voltage, Luw is the total inductance of the first reactor Lu and the second reactor Lw, F PWM is the PWM frequency (carrier frequency) of inverter P.

[0042] Next, the current values ​​required for zero voltage control of the semiconductor switches Q1 and Q2 are calculated using the following equations (3) and (4). Ls1_uis the current required for zero voltage control when the semiconductor switch Q1 is turned on. Ls2_u is the current required for zero voltage control when the semiconductor switch Q2 is turned on.

[0043] Then, the current value I required for zero voltage control Ls1_u ,I Ls2_u and the inductance L of the auxiliary coil Ls s From the on-width T of the virtual auxiliary switch Qi1 s1_u and the on-width T of the virtual auxiliary switch Qi2 s2_u is calculated (Equation (5) and Equation (6)).

[0044]

number

[0045]

number

[0046]

number

[0047]

number

[0048] Here, Ires is the current value required for zero voltage control, Ismax is the upper limit maximum current, and Td is the dead time.

[0049] (Steps S21 and S22) In step S21, the control unit 6 calculates the second reactor current I measured by the first current measuring unit 51. Lw In the next step S22, the control unit 6 acquires the measurement value of the second reactor current I Lw From the above, the on-time T of the virtual auxiliary switch Qi3 corresponding to the semiconductor switch Q3 s1_wand the on-time T of the virtual auxiliary switch Qi4 corresponding to the semiconductor switch Q4. s2_w Calculate.

[0050] Specific examples are shown below.

[0051] First, use the following equation (7) to calculate the reactor current I when the semiconductor switch Q3 is turned off. Lw3n+1 Similarly, using equation (8), the reactor current I when the semiconductor switch Q4 is turned off is calculated. Lw4n+1 Ask for.

[0052]

number

[0053]

number

[0054] Here, Duty_w is the modulation rate of the L2 phase (W phase).

[0055] Next, the current values ​​required for zero voltage control of the semiconductor switches Q3 and Q4 are calculated using the following equations (9) and (10). Ls1_w is the current required for zero voltage control when the semiconductor switch Q3 is turned on. Ls2_w is the current required for zero voltage control when the semiconductor switch Q4 is turned on.

[0056] Then, the current value I required for zero voltage control Ls1_w ,I Ls2_w and the inductance L of the auxiliary coil Ls s From the on-width T of the virtual auxiliary switch Qi3 S1_w and the on-width T of the virtual auxiliary switch Qi4 S2_w is calculated (Equation (11) and Equation (12)).

[0057]

number

[0058]

number

[0059]

number

[0060]

number

[0061] Here, similarly to the above-mentioned equations (3) to (6), Ires is the current value required for zero voltage control, Ismax is the upper limit maximum current, and Td is the dead time.

[0062] (Step S3) In step S3, the control unit 6 determines the ON width T s1 and the on-time T of the second auxiliary semiconductor switch Qs2 s2 Set.

[0063] For example, the control unit 6 determines the ON width T S1_u and the on-width T of the virtual auxiliary switch Qi3 S1_w The logical sum of these is used as the ON width of the first auxiliary semiconductor switch Qs1 (see equation (13)).

[0064]

number

[0065] Here, for example, the on-width T of the virtual auxiliary switch Qi1 S1_u and the on-width T of the virtual auxiliary switch Qi3 S1_w When logically ORed with T S1_u and T S1_wIf a short-term low transition occurs between these two points, the first auxiliary semiconductor switch Qs1 is turned on and off so as to fill the low transition period, i.e., so as to maintain the high state during this period (see FIG. 3). An example of a specific method is illustrated in the following steps S4 and S5.

[0066] Similarly, the on-width of the virtual auxiliary switch Qi2 and the on-width of the virtual auxiliary switch Qi4 are calculated, and the on-width T s2_u and the on-width T of the virtual auxiliary switch Qi4 S2_w The ON time T of the second auxiliary semiconductor switch Qs2 is calculated by taking the logical OR of s2 Let's say.

[0067]

number

[0068] Here, for example, the on-width T of the virtual auxiliary switch Qi2 S2_u and the on-width T of the virtual auxiliary switch Qi4 S2_w When logically ORed with T S2_u and T S2_w If a short-term low transition occurs between these two points, the second auxiliary semiconductor switch Qs2 is turned on and off so as to fill the low transition period, i.e., so as to maintain the high state during this period (see FIG. 3). An example of a specific method is illustrated in the following steps S4 and S5.

[0069] (Steps S4 and S5) After step S3, the control unit 6 generates PWM signals for the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 (step S4), and outputs the PWM signals to the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 (step S5).

[0070] In this embodiment, as shown in Fig. 4, PWM output signals based on triangular wave modulation are used for the semiconductor switches Q1 to Q4, and PWM output signals based on a sawtooth wave are used for the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2.

[0071] In FIG. 4, the semiconductor switch Q1 and the semiconductor switch Q2 are connected to a predetermined value C A The on / off of the semiconductor switch Q1 and the on / off of the semiconductor switch Q2 are in an inverse relationship. Similarly, the semiconductor switches Q3 and Q4 are turned on / off by a predetermined value C B (C B <C A ) is turned on and off by counting up or down. The on and off of semiconductor switch Q3 and the on and off of semiconductor switch Q4 are in an inverse relationship.

[0072] A method for generating the PWM signals of the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 will be described below.

[0073] First, the period setting P of the first auxiliary semiconductor switch Qs1 and the second auxiliary semiconductor switch Qs2 s can be calculated using the following equation (15).

[0074]

number

[0075] Here, Fclk is the frequency of the base clock.

[0076] The first auxiliary semiconductor switch Qs1 is turned on at a predetermined value C A1 When counting up, it turns on and reaches a predetermined value C B1 The second auxiliary semiconductor switch Qs2 is turned off by counting up the predetermined value C A2 When counting up, it turns on and reaches a predetermined value C B2 It is turned off by counting up the specified value CA1 , C B1 , C A2 , C B2 is calculated, for example, by the following formulas (16) to (23).

[0077] Specifically, when Duty_u > Duty_w, a predetermined value C A1 , C B1 , C A2 , C B2 is calculated, for example, by the following formulas (16) to (19).

[0078] [Number]

[0079] [Number]

[0080] [Number]

[0081] [Number]

[0082] Also, when Duty_u < Duty_w, a predetermined value C A1 , C B1 , C A2 , C[[ID=B2]] B2 is calculated, for example, by the following formulas (20) to (23).

[0083] [Number]

[0084] [Number]<000045B>

[0085] [Number]

[0086]

number

[0087] According to the present embodiment, the auxiliary switch 2, which includes the first auxiliary semiconductor switch Qs1, the second auxiliary semiconductor switch Qs2, and the auxiliary coil Ls connected in series, is provided between the first AC line AL1 and the second AC line AL2, and the first reactor current I Lu and the second reactor current I Lw More specifically, the control unit 6 turns on and off the first auxiliary semiconductor switch Qs1 in accordance with the timing of the zero voltage control of the semiconductor switches Q1 and Q3, and turns on and off the second auxiliary semiconductor switch Qs2 in accordance with the timing of the zero voltage control of the semiconductor switches Q2 and Q4.

[0088] With the above configuration, zero voltage control is possible with one pair of auxiliary semiconductor switches (first auxiliary semiconductor switch Qs1 and second auxiliary semiconductor switch Qs2) even in a single-phase three-wire system, making it possible to reduce losses and noise in the inverter P.

[0089] As described above, the embodiments have been described as examples of the technology disclosed in this application. However, the technology in this disclosure is not limited to these, and can be applied to embodiments in which appropriate modifications, substitutions, additions, omissions, etc. are made. Furthermore, it is also possible to combine the components described in the above embodiments to create new embodiments.

[0090] For example, from the viewpoint of stable operation of the inverter P, the auxiliary switch 2 may be provided with a clamp diode.

[0091] 6A and 6B (hereinafter collectively referred to as FIG. 6) (a) to (f) show examples in which a clamp diode is provided in the auxiliary switch 2. FIGS. 6(a) to (f) show examples in which a clamp diode is provided in the configurations of FIGS. 5(a) to (f), respectively.

[0092] Specifically, in Fig. 6(a), clamp diodes connected to the DC- and DC+ terminals are provided between the auxiliary coil Ls and the first auxiliary semiconductor switch Qs1 of the auxiliary switch 2 in Fig. 5(a). Similarly, in Fig. 6(b), clamp diodes connected to the DC- and DC+ terminals are provided between the auxiliary coil Ls and the first auxiliary semiconductor switch Qs1 of the auxiliary switch 2 in Fig. 5(b). In Fig. 6(c), clamp diodes connected to the DC- and DC+ terminals are provided between the second auxiliary semiconductor switch Qs2 and the auxiliary coil Ls of the auxiliary switch 2 in Fig. 5(c). In Fig. 6(d), clamp diodes connected to the DC- and DC+ terminals are provided between the first auxiliary semiconductor switch Qs1 and the auxiliary coil Ls of the auxiliary switch 2 in Fig. 5(d). In Fig. 6(e), clamp diodes connected to the DC+ terminal are provided between the first auxiliary semiconductor switch Qs1 and the auxiliary coil Ls of the auxiliary switch 2 in Fig. 5(e) and between the auxiliary coil Ls and the second auxiliary semiconductor switch Qs2. In Fig. 6(f), clamp diodes connected to the DC- terminal are provided between the second auxiliary semiconductor switch Qs2 and the auxiliary coil Ls of the auxiliary switch 2 in Fig. 5(f) and between the auxiliary coil Ls and the first auxiliary semiconductor switch Qs1.

[0093] As described above, by providing the clamp diode in the auxiliary switch 2, it is possible to prevent a high voltage from being applied to the auxiliary switch 2. [Industrial Applicability]

[0094] INDUSTRIAL APPLICABILITY The present invention is extremely useful in a single-phase three-wire inverter because it enables zero voltage control of a set of auxiliary semiconductor switches, thereby enabling reduction in inverter loss and noise. [Explanation of symbols]

[0095] P inverter device 1 Power conversion section 2 Auxiliary Switch 51 1st current measurement section 52 2nd current measurement section 6 Control Unit AL1 1st AC line AL2 2nd AC line AL3 3rd AC line AN4 4th AC line DL1 1st DC line DL2 2nd DC line Ls auxiliary coil Lu 1st reactor Lw Second reactor Q1 Semiconductor switch (first switching element) Q2 Semiconductor switch (second switching element) Q3 Semiconductor switch (third switching element) Q4 Semiconductor switch (fourth switching element) Qs1 First auxiliary switching element Qs2 Second auxiliary switching element

Claims

1. A single-phase three-wire inverter, a power conversion unit provided between the first and second DC lines and the first and second AC lines, and configured to convert power between DC and AC; an auxiliary switch including a first auxiliary switching element, a second auxiliary switching element, and an auxiliary coil connected in series between the first AC line and the second AC line; a first reactor provided between the first AC line and the third AC line; a second reactor provided between the second AC line and the fourth AC line; a first current measuring unit that measures a first reactor current of the first reactor; a second current measuring unit that measures a second reactor current of the second reactor; a control unit that performs zero voltage control of the first auxiliary switching element and the second auxiliary switching element based on the first reactor current and the second reactor current, A single-phase three-wire inverter.

2. 2. The single-phase three-wire inverter according to claim 1, The power conversion unit first and second switching elements that are provided in series between the first DC line and the second DC line, and a connection line connecting the first and second switching elements is connected to the first AC line; third and fourth switching elements that are provided in series between the first DC line and the second DC line, and a connection line connecting the third and fourth switching elements is connected to the second AC line; the control unit turns on and off the first auxiliary switching element in accordance with timing of zero voltage control of the first switching element and the third switching element, and turns on and off the second auxiliary switching element in accordance with timing of zero voltage control of the second switching element and the fourth switching element. A single-phase three-wire inverter.

3. 3. The single-phase three-wire inverter according to claim 2, The control unit turning on the first auxiliary switching element at a timing when zero voltage control of one of the first switching element and the third switching element starts, and turning off the first auxiliary switching element at a timing when zero voltage control of the other switching element ends; turning on the second auxiliary switching element at a timing when zero voltage control of one of the second switching element and the fourth switching element starts, and turning off the second auxiliary switching element at a timing when zero voltage control of the other switching element ends; A single-phase three-wire inverter.

4. 3. The single-phase three-wire inverter according to claim 2, The control unit turning on and off the first auxiliary switching element based on a logical sum of a timing of zero voltage control of the first switching element and a timing of zero voltage control of the third switching element; turning on and off the second auxiliary switching element based on a logical sum of the timing of the zero voltage control of the second switching element and the timing of the zero voltage control of the fourth switching element; A single-phase three-wire inverter.

5. 5. The single-phase three-wire inverter according to claim 1, In the auxiliary switch, a clamp diode is connected to one or more connection nodes that mutually connect the first auxiliary switching element, the second auxiliary switching element, and the auxiliary coil. A single-phase three-wire inverter.

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