Surface processing method for silicon in silicon structure, and method of manufacturing silicon structure

Abstract

To provide a surface processing method for silicon capable of realizing a three-dimensional shape, in which an angle of a side face is closer to perpendicular, by etching by making possible vertical deep-digging of silicon in the etching.SOLUTION: A surface processing method for silicon includes: a silicide layer forming step S101 of forming a silicide layer 17 by performing silicide formation upon a surface of silicon 11; and an etching step S107 of performing dry etching upon the silicon 11 using the silicide layer 17 as a mask.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a method for treating the surface of silicon in a silicon structure, and a method for manufacturing a silicon structure. [Background technology]

[0002] The Bosch process is a method for manufacturing silicon structures with high-aspect-ratio uneven structures on silicon substrates. The Bosch process is an etching method that alternates between etching mode and passivation mode. In etching mode, isotropic etching is performed primarily using sulfur hexafluoride (SF6). In passivation mode, Teflon-based gases, such as octafluorocyclobutane (C4F8), are used to protect the sidewalls of the holes. By alternating between etching mode and passivation mode, silicon structures with high-aspect-ratio uneven structures can be manufactured.

[0003] Patent Document 1 describes an invention for a silicon surface treatment method (silicon substrate manufacturing method) that includes a repeated process of: an isotropic etching process for isotropically etching a silicon substrate; a protective film deposition process for depositing a protective film on the inner wall of the etched portion; and a bottom etching process for etching the protective film while applying a negative bias voltage to the silicon substrate.

[0004] In the invention of the silicon surface treatment method described in Patent Document 1, an etching gas containing at least one gas selected from CF4 gas, NF4 gas, F2 gas, and COF2 gas is used in the bottom etching process. Such etching gases are characterized by their ability to easily discharge. This makes it possible to suppress excessive ion generation due to plasma generation. As a result, by setting the bias voltage to an appropriate value, it is possible to accelerate an appropriate amount of ions in an appropriate direction and cause them to enter vertical holes in the silicon substrate, thereby forming highly vertical hole structures or pillar structures. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-013821 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the silicon surface treatment method described in Patent Document 1 does not specify any mask material when etching silicon. Conventionally, when silicon oxide is used as the mask material, there is a problem that the selectivity ratio (hereinafter sometimes simply referred to as "selectivity"), which is the ratio of the etching rate of the mask to the etching rate of the film to be etched, is about 100:1, which is not sufficiently large. Furthermore, when silicon oxide is used as the mask and the top layer of conductive silicon is used as the conductive layer, there is also a problem that the silicon oxide used as the mask must be removed.

[0007] Metallic materials can also be used as the mask material. Using a metallic material as a mask increases the etching selectivity. However, when using a metallic material as a mask, there is a restriction that the mask patterning is limited to wet etching. Furthermore, if the metallic material used as the mask is left on the upper layer of the etched film after etching, internal stress remains, which is an issue that makes it unsuitable for application to the manufacture of silicon structures.

[0008] The present invention aims to solve the above problems and to provide a silicon surface treatment method and a silicon structure manufacturing method that use a material that can achieve a high selectivity as a mask, thereby enabling vertical deep etching of silicon and realizing a three-dimensional shape in which the angle of the side surfaces formed by etching is closer to vertical. [Means for solving the problem]

[0009] [1] The method for treating the silicon surface in the silicon structure of this application example includes a silicide layer forming step of silicidating the surface of the silicon to form a silicide layer, and an etching step of dry-etching the silicon using the silicide layer as a mask.

[0010] [2] In the silicon surface treatment method of this application example, in the silicide layer formation step, the metal that forms silicide with the silicon is preferably one or more metals selected from nickel, cobalt, titanium, copper, gold, and molybdenum.

[0011] [3] In the silicon surface treatment method of this application example, the silicide layer formation step preferably includes the steps of: forming a film containing one or more materials selected from silicon oxide and inorganic compounds that prevent the formation of the silicide layer in an area of ​​the silicon surface where the silicide layer is not to be formed; and forming a metal layer in an area of ​​the silicon surface where the film is not formed.

[0012] [4] In the silicon surface treatment method of this application example, the silicon is preferably a silicon film formed above a support substrate.

[0013] [5] In the silicon surface treatment method of this application example, the silicon is preferably single crystal silicon or polycrystalline silicon.

[0014] [6] The method for manufacturing a silicon structure according to this application example includes a silicide layer forming step of silicidating a surface of silicon to form a silicide layer, and an etching step of dry-etching the silicon using the silicide layer as a mask. [Effects of the Invention]

[0015] The silicon surface treatment method and silicon structure manufacturing method of the present invention include a silicide layer formation step of silicidating the silicon surface to form a silicide layer, and an etching step of dry-etching the silicon using the silicide layer as a mask. The etching rate of silicide is higher than the etching rate of silicon, which is the film to be etched, by 1:500 (=silicide:silicon) or more. Therefore, by using the silicide layer as a mask when etching silicon, a high selectivity can be achieved.

[0016] According to the present invention, it is possible to provide a silicon surface treatment method and a silicon structure manufacturing method that use a silicide layer as a mask to enable vertical deep etching of silicon, and that can realize a three-dimensional shape in which the angle of the side surface formed by etching is closer to vertical. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a diagram showing an example of a silicon structure 1 that has been surface-treated by the silicon surface treatment method according to the first embodiment. [Figure 2] FIG. 2 is a flow chart for explaining the silicon surface treatment method according to the first embodiment. [Figure 3] FIG. 3 is a diagram for explaining the silicon surface treatment method according to the first embodiment. [Figure 4] FIG. 4 is a diagram for explaining the silicon surface treatment method according to the second embodiment. [Figure 5] 1 is a scanning electron microscope (SEM) photograph of the surface after deep silicon processing in an example. DETAILED DESCRIPTION OF THE INVENTION

[0018] The following describes a method for treating silicon surfaces in a silicon structure and a method for manufacturing a silicon structure according to the present invention. The embodiments described below do not limit the scope of the invention. Furthermore, not all of the elements and combinations thereof described in the embodiments are necessarily essential to the present invention.

[0019] 1. Silicon structure FIG. 1 is a diagram showing an example of a silicon structure 1 that has been surface-treated by the silicon surface treatment method according to the first embodiment. The silicon structure 1 includes a silicon substrate 11 and a three-dimensional shape 11a formed by removing a predetermined region of the silicon substrate 11 by etching.

[0020] The three-dimensional shape 11a is formed by dry etching the silicon substrate 11 using the silicide layer 17 formed in a predetermined region on the silicon substrate 11 as a mask. The height of the three-dimensional shape 11a is determined appropriately depending on the intended use of the silicon structure 1 and is not particularly limited. For example, the height of the three-dimensional shape 11a is preferably 1 μm or more, and more preferably 10 μm or more. Furthermore, the height of the three-dimensional shape 11a is preferably 500 μm or less.

[0021] The angle of the side surface of the three-dimensional shape 11a relative to the surface of the silicon substrate 11 is not particularly limited, but is preferably closer to perpendicular. By configuring the angle of the side surface of the three-dimensional shape 11a relative to the surface of the silicon substrate 11 at an angle closer to perpendicular, a thin and tall three-dimensional shape 11a can be formed.

[0022] 1 shows an example of the silicon structure 1, and the silicon structure 1 is not limited to the three-dimensional shape shown in Fig. 1. The silicon structure 1 can include all silicon structures 1 that can be manufactured by applying a silicon surface treatment method for a silicon structure or a silicon structure manufacturing method, which will be described below.

[0023] Examples of three-dimensional shapes that can be included in the silicon structure 1 include a pillar-like or bank-like shape formed by etching the periphery while leaving a portion of the silicon, and a hole-like or groove-like shape formed by etching a portion of the silicon. Another example of the silicon structure 1 also includes a structure in which a portion of the three-dimensional shape is disposed away from the substrate, such as a cantilever. Furthermore, the three-dimensional shape included in the silicon structure 1 may include a film or layer made of a material other than silicon.

[0024] The silicon structure 1 may have an electronic circuit formed on a part of the substrate, that is, the silicon structure 1 may be a MEMS (Micro Electro Mechanical System) including a three-dimensional shape and an electronic circuit.

[0025] 2. Silicon surface treatment method (1) 2-1. Overall structure A description will be given of a method for treating the surface of silicon in a silicon structure according to embodiment 1. In the following description, the "method for treating the surface of silicon in a silicon structure" may be simply referred to as the "method for treating the surface of silicon."

[0026] Fig. 2 is a flow diagram shown for explaining the silicon surface treatment method according to embodiment 1. Fig. 3 is a diagram shown for explaining the silicon surface treatment method according to embodiment 1.

[0027] As shown in FIG. 2, the silicon surface treatment method includes a silicide layer formation step S101 of silicidating the surface of silicon (silicon substrate 11) to form a silicide layer 17, and an etching step S107 of dry-etching the silicon (silicon substrate 11) using the silicide layer 17 as a mask.

[0028] In the silicon surface treatment method according to the embodiment 1, silicon to be surface-treated can be used without any particular limitation as long as the surface treatment method according to the embodiment can be applied. That is, the shape, size, crystal type, etc. of the silicon to be used are not important.

[0029] As the type of crystal, single crystal silicon, polycrystalline silicon, and non-crystalline (amorphous) silicon can be suitably used. Among them, it is preferable to use single crystal silicon or polycrystalline silicon as silicon. By using single crystal silicon or polycrystalline silicon as silicon, it is possible to obtain a silicon structure 1 having excellent mechanical strength.

[0030] In the following description of the silicon surface treatment method according to the first embodiment, an example will be described in which a silicon substrate 11 made of single crystal silicon is used as the silicon.

[0031] 2-2. Silicide layer formation process The silicide layer forming step S101 is a step of silicidating the surface of the silicon substrate 11 to form a silicide layer 17 on a part of the surface of the silicon substrate 11 (see FIGS. 3(a) to 3(d)).

[0032] The silicide layer forming step S101 includes a metal layer forming step S103 for forming a metal layer 16 on the surface of the silicon substrate 11, and an annealing step S104 for annealing the silicon substrate 11 on which the metal layer 16 has been formed. The silicide layer forming step S101 may also include, as optional steps, a step of forming a thin film 14 that prevents the formation of a silicide layer 17 on a part of the surface of the silicon substrate 11 (hereinafter, sometimes referred to as a "thin film forming step S102"), and a metal removing step S105 for removing metal remaining on the silicon substrate 11 after annealing.

[0033] The thin film forming step S102 is a step of forming a thin film 14 that prevents the formation of a silicide layer 17 in a region on the surface of the silicon substrate 11 where the silicide layer 17 is not to be formed (a region where the formation of the silicide layer 17 is not required).

[0034] Here, the thin film 14 (hereinafter sometimes simply referred to as "thin film 14") that prevents the formation of the silicide layer 17 refers to a thin film 14 that prevents the formation of the silicide layer 17 on the surface of the silicon substrate 11 when a thin film 14 is formed on the surface of the silicon substrate 11, and a metal layer 16 containing a metal that forms a silicide with silicon is further formed on the thin film 14, and then heat treatment (annealing) is performed. Examples of the thin film 14 include thin films containing one or more substances selected from silicon oxides and inorganic compounds.

[0035] In the thin film formation step S102, a thin film 14 that prevents the formation of a silicide layer 17 is formed over the entire surface of the silicon substrate 11 (see FIG. 3(a)). Next, a resist film (not shown) is applied onto the thin film 14, and the resist film is patterned by a photo process to obtain a patterned resist pattern. Furthermore, the thin film 14 is etched using the resist pattern as a mask to obtain a patterned thin film 14a (see FIG. 3(b)).

[0036] By forming the patterned thin film 14a on the surface of the silicon substrate 11, the silicide layer 17 can be selectively formed in the region on the surface of the silicon substrate 11 where the silicide layer 17 needs to be formed.

[0037] The metal layer forming step S103 is a step of forming a metal layer 16 on the surface of the silicon substrate 11 (see FIG. 3(c)). The metal layer 16 can be formed on the surface of the silicon substrate 11 by a known method such as sputtering.

[0038] There are no particular limitations on the metal used for the metal layer 16, as long as it is a metal that can form a silicide with silicon. Examples of metals that can be used for the metal layer 16 include one or more metals selected from nickel, cobalt, titanium, copper, gold, and molybdenum.

[0039] The region where the metal layer 16 is formed is at least a region where the silicide layer 17 is to be formed on the surface of the silicon substrate 11. In the above-described thin film forming step S102, when the thin film 14a is formed on a region on the surface of the silicon substrate 11 where the silicide layer 17 is not to be formed, the metal layer 16 may be formed on both the region where the silicide layer 17 is to be formed and the region where the thin film 14a is formed.

[0040] The annealing step S104 is a step of subjecting the silicon substrate 11 on which the metal layer 16 has been formed to a heat treatment to silicide the region of the surface of the silicon substrate 11 to be silicided, thereby forming a silicide layer 17 (see FIG. 3(d)). The heat treatment conditions in the annealing step S104 can be determined appropriately taking into consideration the type of metal contained in the metal layer 16 and the melting point of silicon, and can be, for example, a temperature range of 100°C to 700°C.

[0041] In the annealing step S104, the surface of the silicon substrate 11 that is in contact with the metal layer 16 is silicided to form a silicide layer 17. Note that in the portion of the surface of the silicon substrate 11 where the metal layer 16 is formed via the thin film 14a, the thin film 14a prevents the formation of the silicide layer 17, so the surface of the silicon substrate 11 is not silicided and the silicide layer 17 is not formed.

[0042] The metal removal step S105 is a step of removing by etching the metal that was not converted into a silicide in the annealing step S104 and remains on the upper surface of the silicide layer 17, and the metal that remains on the upper surface of the thin film 14a. The etching is performed by wet etching using an acid such as a mixed acid to remove the unreacted metal and the like remaining on the upper surface of the silicide layer 17. Furthermore, by removing the thin film 14a, the silicon substrate 11 having the silicide layer 17 formed in a predetermined region on its surface can be obtained (see FIG. 3(e)).

[0043] 2-3. Etching process The etching step S107 is a step of etching the silicon substrate 11 using the silicide layer 17 as a mask. The etching is performed by dry etching. After the metal removing step S105 is completed, the silicon substrate 11 has the silicide layer 17 formed as a mask in a predetermined region on its surface. In the etching step S107, the silicon substrate 11 is etched using the silicide layer 17 as a mask (see FIG. 3(f)).

[0044] A known dry etching method can be applied for the etching. By using the silicide layer 17 as a mask, vertical deep trench processing of silicon can be performed. When vertical deep trench processing of silicon is performed by etching, it is preferable to use a method in which the silicon substrate 11 is cooled to a low temperature and / or a method called the Bosch process.

[0045] In the silicon surface treatment method, the etching rate of the silicon substrate 11, which is the film to be etched, is higher than the etching rate of the silicide layer 17. Therefore, by using the silicide layer 17 as a mask, a high selectivity can be achieved. The selectivity when etching the silicon substrate 11 using the silicide layer 17 as a mask is about 1:500, although it depends on the etching conditions.

[0046] According to the silicon surface treatment method of the first embodiment, a high selectivity can be achieved by performing dry etching using the silicide layer 17 as a mask. This enables vertical deep etching of silicon. Furthermore, the angle of the side surface of the three-dimensional shape formed by etching can be made closer to perpendicular to the substrate plane.

[0047] Furthermore, the silicide layer 17 used as a mask in the silicon surface treatment method contains a large amount of silicon. Therefore, it is not necessary to remove the silicide layer 17 in the subsequent process. In other words, the silicide layer 17 can be left as a part of the silicon structure 1.

[0048] Furthermore, the silicide layer 17 has a lower resistance than the silicon substrate 11. Therefore, by etching the silicon substrate 11 using the silicide layer 17 as a mask, the silicon structure 1 can be etched and its resistance reduced at the same time.

[0049] 3. Surface treatment method for silicon in silicon structures (2) 3-1. Overall structure Next, a description will be given of a method for treating the surface of silicon in the silicon structure according to embodiment 2. Fig. 4 is a diagram shown for explaining the method for treating the surface of silicon in the silicon structure according to embodiment 2.

[0050] In each of Figures 4(a) to 4(h), the upper figures are views of the silicon structure in the middle of processing or after completion as seen from above, and the lower figures are views of the silicon structure in the middle of processing or after completion as seen from the front.

[0051] The silicon surface treatment method according to embodiment 2 is different from the silicon surface treatment method according to embodiment 1 in the type of substrate to be surface treated and the three-dimensional shape obtained by the silicon surface treatment, but is otherwise the same as the silicon surface treatment method according to embodiment 1.

[0052] Therefore, the explanation of the silicon surface treatment method according to embodiment 2 will focus on the differences from the explanation of the silicon surface treatment method according to embodiment 1, and overlapping parts will be omitted as appropriate.

[0053] In the silicon surface treatment method according to the second embodiment, the silicon to be surface treated is a silicon film 13 formed above a silicon substrate 11, which is a support substrate. Here, "formed above the silicon substrate 11" means that the silicon film 13 to be surface treated is stacked above the silicon substrate 11 via a film made of a material other than silicon. Here, the film made of a material other than silicon interposed between the silicon substrate 11 and the silicon film 13 is not limited to a single film, and multiple films may be interposed. Furthermore, the silicon constituting the silicon film 13 can be used without any particular limitations on the type of crystal or film thickness.

[0054] In the surface treatment method according to the second embodiment, the silicon film 13 to be surface treated is formed above the silicon substrate 11 via an insulating film 12 such as silicon oxide. Since the silicon film 13 is formed above the silicon substrate 11 via the insulating film 12, the insulating film 12 can be used to separate the silicon substrate 11 and the silicon film 13 when manufacturing the silicon structure 1.

[0055] Furthermore, in the etching step S107, when dry etching the silicon film 13, the etching is performed under conditions where the etching rate for the insulating film 12 is sufficiently smaller than the etching rate for the silicon film 13, so that the insulating film 12 can be used as an etching stop layer.

[0056] In a preferred embodiment, an SOI (Silicon on Insulator) substrate 10 in which the silicon substrate 11, insulating film 12, and silicon film 13 are integrally formed can be used as the silicon substrate 11, insulating film 12, and silicon film 13. The SOI substrate 10 is a substrate having a structure in which the insulating film 12 is inserted between the silicon substrate 11 and the silicon film 13, as shown in FIG. 4. A commercially available SOI substrate can also be used as the SOI substrate 10.

[0057] The silicon surface treatment method according to the second embodiment includes a silicide layer forming step S101 of silicidating the surface of silicon (silicon film 13) to form a silicide layer 17, and an etching step S107 of dry-etching the silicon (silicon film 13) using the silicide layer 17 as a mask (see FIG. 2).

[0058] 3-2. Silicide layer formation process The silicide layer forming step S101 includes a thin film forming step S102 of forming a thin film 14 that prevents the formation of a silicide layer 17 on the surface of the silicon film 13, a metal layer forming step S103 of forming a metal layer 16, and an annealing step S104 of annealing the silicon substrate 11 on which the metal layer 16 has been formed. The silicide layer forming step S101 also includes an optional metal removing step S105 of removing metal remaining on the silicon substrate 11 after the annealing step S104 (see FIG. 2).

[0059] In the silicon surface treatment method, a silicon structure (MEMS mirror) having a three-dimensional shape as shown in FIG. 4(h) is manufactured by surface treatment of silicon.

[0060] In the surface treatment of silicon, a silicide layer 17 is formed as a mask in the region where etching is not performed by vertical deep etching of silicon. On the other hand, the silicide layer 17 is not formed in the region where etching is performed (see FIG. 4(f)). Furthermore, a thin film 14a is formed in the region where the silicide layer 17 is not formed, and a thin film 14a is formed in the region where the silicide layer 17 is formed (see FIG. 4(b)).

[0061] Specifically, the region where the silicon film 13 is exposed in the upper diagram of FIG. 4(b), i.e., the region that will become the mirror portion (reference numeral omitted) located in the center of the substrate, the beam portions (reference numeral omitted) extending left and right from the mirror portion, and the support portions (reference numeral omitted) located on the left and right sides of the substrate that support the mirror portion and the beam portion when the silicon structure 1 is completed, is a region that is not etched by the vertical deep excavation processing of silicon.

[0062] The thin film 14a is not formed in the region where the silicon is not subjected to vertical deep trench processing. By not forming the thin film 14a on the silicon film 13, the silicide layer 17 can be formed on the silicon film 13 by performing the subsequent metal layer forming step S103 and annealing step S104 (see FIG. 4(f)).

[0063] 3-3. Etching process The etching step S107 is a step of etching the silicon film 13 using the silicide layer 17 as a mask. The etching is performed by dry etching (see FIG. 4(f)).

[0064] A known dry etching method can be applied for the etching. By using the silicide layer 17 as a mask, vertical deep trench processing of silicon can be performed. When vertical deep trench processing of silicon is performed by etching, it is preferable to apply a method called the Bosch process.

[0065] In the etching step S107, after performing vertical deep etching of the silicon, the central portion of the silicon substrate 11, which is the support substrate, is removed by etching (see FIG. 4(g)). The etching can be performed by a known method. Furthermore, the insulating film 12 is also removed by etching in the same manner (see FIG. 4(h)).

[0066] By carrying out the steps including the silicon surface treatment method according to the second embodiment described above, a silicon structure (MEMS mirror) can be manufactured.

[0067] According to the silicon surface treatment method of the second embodiment, a high etching selectivity can be achieved by dry etching the silicon film 13 using the silicide layer 17 as a mask. This enables vertical deep etching of silicon. Furthermore, the angle of the side surface of the three-dimensional shape formed by etching can be made closer to perpendicular to the substrate plane.

[0068] In the silicon surface treatment method according to the second embodiment, the silicide layer 17 used as a mask contains a large amount of silicon. Therefore, it is not necessary to remove the silicide layer 17 in the subsequent steps. In other words, the silicide layer 17 can be left as a part of the silicon structure 1.

[0069] Furthermore, the silicide layer 17 has a lower resistance than the silicon film 13. Therefore, by etching the silicon film 13 using the silicide layer 17 as a mask, the silicon structure 1 can be etched and its resistance reduced at the same time.

[0070] Furthermore, the silicon film 13 is a silicon film 13 formed above the silicon substrate 11 (FIG. 4(a)). Therefore, by selecting an appropriate film as a film to be interposed between the silicon substrate 11 and the silicon film 13, it is possible to selectively perform surface treatment only on the silicon film 13 formed above the silicon substrate 11.

[0071] 4. Method for Manufacturing Silicon Structure (Embodiment 3) Next, a method for manufacturing the silicon structure will be described.

[0072] The method for manufacturing a silicon structure is a method for manufacturing a silicon structure 1 by applying the above-described silicon surface treatment method to silicon. Hereinafter, the method for manufacturing a silicon structure will be described with reference to FIGS. 1 to 4.

[0073] The method for manufacturing the silicon structure includes a silicide layer forming step S101 of silicidating the surface of silicon (silicon substrate 11 or silicon film 13) to form a silicide layer 17, and an etching step S107 of dry-etching the silicon (silicon substrate 11 or silicon film 13) using the silicide layer 17 as a mask.

[0074] The silicide layer forming step S101 and the etching step S107 in the silicon structure manufacturing method of the embodiment 3 are substantially the same as the surface treatment method of the embodiment 1 or the silicon surface treatment method of the embodiment 2. Therefore, the description of the silicide layer forming step S101 and the etching step S107 in the silicon structure manufacturing method of the embodiment 3 will be omitted.

[0075] In the method for manufacturing the silicon structure, a step for fabricating other structures that constitute the silicon structure 1 can be incorporated as part of the silicide layer forming step S101 and / or the etching step S107, or before or after the silicide layer forming step S101 and / or the etching step S107.

[0076] According to the method for manufacturing a silicon structure of the third embodiment, a high etching selectivity can be achieved by dry etching the silicon substrate 11 or the silicon film 13 using the silicide layer 17 as a mask. This enables vertical deep etching of silicon. Furthermore, the angle of the side surface of the three-dimensional shape formed by etching can be made closer to perpendicular to the substrate plane.

[0077] 5. Working Example 5.1. Nickel silicide layer formation A silicon substrate (100 surface) with a silicon oxide film formed on its surface was used as the substrate for forming the silicide pattern. A positive photoresist was used to pattern the silicon oxide film, and part of the silicon oxide film was removed by wet etching or dry etching.

[0078] Next, after removing the resist pattern, a nickel thin film of approximately 100 nm was formed using a sputtering device. After film formation, a heat treatment was performed in a high vacuum atmosphere to form a silicide layer. After the substrate was cooled, unreacted nickel was removed using an acid-based etching solution.

[0079] Finally, the silicon oxide film used for forming the silicide pattern was removed with buffered hydrofluoric acid to prepare a substrate for silicon direct deep trench processing.

[0080] 5.2. Vertical deep trenching of silicon An ICP dry etching system was used for vertical deep silicon trenching. The silicon vertical deep trenching process was the so-called Bosch process, which alternates between etching and sidewall protection passivation processes. SF6 gas was used for the etching process, and C4F8 gas was used for the passivation process, resulting in a 50μm vertical deep silicon trenching process.

[0081] 5.3.Evaluation of the surface condition after deep etching of silicon The surface of the silicide mask after deep etching of silicon and the etched side surface were observed using a scanning electron microscope.

[0082] Figure 5 is a scanning electron microscope photograph of the surface after deep etching of silicon in the example. Figure 5(a) confirms that the silicon was etched uniformly and the silicide surface was flat.

[0083] 5.4. Evaluation of silicide mask selectivity A strip of bare silicon wafer was attached to a part of the wafer on which the silicide pattern was formed, thereby forming a non-etched area, and the resulting step was measured as the etching depth.

[0084] As a result of the measurement, the etching depth of the silicon after the above processing was about 53 μm, and the etching depth of the silicide layer was about 120 nm, which revealed that the selectivity of the silicide layer was about 440. [Explanation of symbols]

[0085] 1... silicon structure, 10... SOI substrate, 11... silicon substrate, 11a... three-dimensional shape, 12... insulating film, 13... silicon film, 14, 14a... thin film (preventing formation of silicide layer), 16... metal layer, 17... silicide layer

Claims

1. a silicide layer forming step of silicidating the surface of silicon to form a silicide layer; an etching step of dry-etching the silicon using the silicide layer as a mask.

2. 2. The silicon surface treatment method according to claim 1, a silicide layer forming step of forming a silicide layer on the silicon substrate, the silicide layer being formed on the silicon substrate by a metal selected from the group consisting of nickel, cobalt, titanium, copper, gold, and molybdenum;

3. 2. The silicon surface treatment method according to claim 1, The silicide layer forming step includes the steps of: forming a film containing one or more materials selected from silicon oxide and inorganic compounds that prevent the formation of the silicide layer in an area of ​​the silicon surface where the silicide layer is not to be formed; and forming a metal layer in the area of ​​the silicon surface where the film is not formed.

4. 2. The silicon surface treatment method according to claim 1, The silicon surface treatment method is characterized in that the silicon is a silicon film formed above a support substrate.

5. 5. The silicon surface treatment method according to claim 1, further comprising: The silicon surface treatment method is characterized in that the silicon is single crystal silicon or polycrystalline silicon.

6. a silicide layer forming step of silicidating the surface of silicon to form a silicide layer; and an etching step of dry-etching the silicon using the silicide layer as a mask.

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