Semiconductor device and power conversion apparatus

Abstract

To provide a semiconductor device that can suppress corrosion of a bonding pad.SOLUTION: A semiconductor device 10 comprises: a substrate 1; an aluminum wiring region 2 formed in a part of a surface of the substrate 1; an aluminum bonding pad 3 connected to the wiring region 2; an aluminum wiring region 4 which has a potential different from that of the wiring region 2 and is formed in a part of the surface of the substrate 1; a path outside region 5 made of aluminum, the path outside region 5 being connected to the wiring region 2 and being disposed at a position closer to the wiring region 4 than the bonding pad 3 outside of a path in which a current 90 to be used for the semiconductor device 10 flows; and a semiconductor protective film which covers the wiring region 2 and the wiring region 4 and which exposes the bonding pad 3 and the path outside region 5.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a power conversion device. [Background technology]

[0002] Patent Document 1 describes a semiconductor device characterized in that "among the power supply wiring of the semiconductor device, the negative electrode wiring has a plurality of bonding pads." [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 58-93244 Summary of the Invention [Problem to be solved by the invention]

[0004] The technology described in Patent Document 1 is a technology for selectively suppressing corrosion of aluminum electrodes with negative potential. Corrosion occurs due to moisture that has infiltrated from the outside. However, although corrosion occurs more slowly on bonding pads located far from positive potential wiring, corrosion of the bonding pads is unavoidable, and a technology for more effectively corroding bonding pads is needed. The problem to be solved by the present disclosure is to provide a semiconductor device and a power conversion device that can suppress corrosion of bonding pads. [Means for solving the problem]

[0005] The semiconductor device of the present disclosure is a semiconductor device comprising: a substrate; a first wiring region made of aluminum formed on a portion of the surface of the substrate; an aluminum bonding pad connected to the first wiring region; a second wiring region made of aluminum formed on a portion of the surface of the substrate and having a different potential from that of the first wiring region; an aluminum out-of-path region connected to at least one of the first wiring region or the bonding pad, located outside a path through which a current used in the semiconductor device flows and closer to the second wiring region than the bonding pad; and a semiconductor protective film covering the first wiring region and the second wiring region and exposing the bonding pad and the out-of-path region. Other solutions will be described later in the description of the invention. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a semiconductor device and a power conversion device that can suppress corrosion of bonding pads. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 2 is a top view of the semiconductor device of the present disclosure, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 4] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 5] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 6] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 7] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. [Figure 8] FIG. 10 is a top view of a semiconductor device according to another embodiment, showing a state in which a semiconductor protective film and a sealing resin have been removed. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, modes for carrying out the present disclosure (hereinafter referred to as "embodiments") will be described with reference to the drawings. In the following description of one embodiment, other embodiments applicable to the one embodiment will also be described as appropriate. The present disclosure is not limited to the one embodiment described below, and different embodiments can be combined with each other or modified as desired without significantly impairing the effects of the present disclosure. Furthermore, the same components will be given the same reference numerals, and redundant descriptions will be omitted. Furthermore, components having the same functions will be given the same names. The contents shown are merely schematic, and for convenience of illustration, changes may be made from the actual configuration within the scope of not significantly impairing the effects of the present disclosure, and some components may be omitted or modified between drawings. Furthermore, the same embodiment does not necessarily have to include all of the configurations.

[0009] FIG. 1 is a top view of a semiconductor device 10 according to the present disclosure, showing a state in which a protective film 6 (semiconductor protective film) and a sealing resin 7 (both shown in FIG. 2) have been removed. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. The semiconductor device 10 according to the present disclosure is, for example, a power semiconductor element such as a high-voltage IC. Furthermore, a power conversion device 100 according to the present disclosure includes the semiconductor device 10 according to the present disclosure. The power conversion device 100 is, for example, an inverter, a converter, or the like.

[0010] The semiconductor device 10 includes a substrate 1, a wiring region 2, a bonding pad 3, a wiring region 4, an out-of-path region 5 (first out-of-path region), a protective film 6, and a sealing resin 7. In the semiconductor device 10 of Fig. 1, corrosion of the bonding pad 3 is suppressed, thereby providing a highly reliable semiconductor device 10 and a power conversion device 100.

[0011] The substrate 1 is a semiconductor substrate such as a silicon substrate. A wiring region 2, a bonding pad 3, a wiring region 4, an off-path region 5, a protective film 6, and a sealing resin 7 are supported on the substrate 1 via an insulating film 12 such as a silicon oxide film formed on the surface of the substrate 1. The insulating film 12 is a part of the substrate 1. Therefore, the surface of the insulating film 12 can also be said to be the surface of the substrate 1.

[0012] The wiring region 2 (first wiring region) is a region formed on a part of the surface of the substrate 1. One end of the wiring region 2 is connected to the bonding pad 3, and the other end is connected to a semiconductor element (not shown) mounted on the semiconductor device 10. One end of the wiring region 2 is bent along the edge 11 of the substrate 1 to the side opposite to the side where the wiring region 4 is arranged, and the wiring region 2 is connected to the bonding pad 3. A current 90 used in the semiconductor device 10 flows through the wiring region 2. Therefore, the wiring region 2 is a path for the current 90.

[0013] The wiring region 2 is made of aluminum. The aluminum mentioned here simply contains aluminum as a primary component, and may be pure aluminum or an aluminum alloy. The primary component is the component that is most prevalent among the components constituting the wiring region 2. The wiring region 2, the bonding pads 3 and 8 described below, the wiring region 4, and the off-path region 5 are all conductive. In the example of the present disclosure, the wiring region 2 is formed of, for example, an Al-Si alloy or an Al-Si-Cu alloy. The wiring region 2 can be formed on the substrate 1 by, for example, mask-evaporating the material that constitutes the wiring region 2, or by patterning the material by etching and removing the portions other than the wiring region 2 after evaporation. The bonding pads 3 and 8 described below, the wiring region 4, and the off-path region 5 can all be formed using the same method as the wiring region 2.

[0014] The wiring region 2 can be formed in the shape of, for example, a strip or a band.

[0015] The bonding pad 3 is an area connected to the wiring area 2. A wire 31 connected to an external device (not shown), such as an external power supply, is bonded to the bonding pad 3. As described above, in the example of the present disclosure, corrosion of the bonding pad 3 is suppressed. This makes it possible to suppress a decrease in reliability due to poor conductivity between the wire 31 and the bonding pad 3 over a long period of time.

[0016] The bonding pad 3 is made of aluminum. The constituent material of the bonding pad 3 may be the same as or different from that of the wiring region 2. If different, the bonding pad 3 only needs to be made of aluminum (which is usually conductive), and the definition of aluminum can be applied to the explanation of the wiring region 2.

[0017] The bonding pad 3 is, for example, rectangular, but may also be circular, elliptical, or triangular.

[0018] Wiring region 4 has a different potential from wiring region 2 and is an aluminum region formed on part of the surface of substrate 1. Like wiring region 2, current 90 flows through wiring region 4, so wiring region 4 is also a path for current 90. Wiring region 4 is the same as wiring region 2 except that it has a different potential from wiring region 2, and the description of wiring region 2 can be applied in the same way. Wiring region 4 faces wiring region 2 and is arranged parallel to wiring region 2.

[0019] In the illustrated example, the potential of the wiring region 4 is lower than that of the wiring region 2, for example, lower than that of the wiring region 2 and is either a positive potential, ground (potential 0), or a negative potential. Therefore, the potential of the wiring region 2 is higher than the potential of the wiring region 4. By doing so, it is possible to suppress corrosion caused by anions 91 that corrode the aluminum bonding pad 3, as will be described in detail later.

[0020] The current 90 flows through the wiring area 2 via the wire 31 and the bonding pad 3. The current 90 is supplied to the semiconductor element connected to the wiring area 2, and further flows to an external device (not shown) via the wiring area 4 connected to the semiconductor element, the bonding pad 8, and the wire 81.

[0021] The bonding pad 8 is an aluminum region connected to the wiring region 4. A wire 81 is bonded to the bonding pad 8. The bonding pad 8 is the same as the bonding pad 3 except that it has a different potential, and the description of the bonding pad 3 can be similarly applied.

[0022] The off-path region 5 is a region connected to at least one of the wiring region 2 and the bonding pad 3. In the illustrated example, the off-path region 5 is directly connected to the wiring region 2. The off-path region 5 is arranged in an island shape by being spaced apart from the wiring region 2. The off-path region 5 is electrically connected to the wiring region 2 through a connection region 51 made of, for example, conductive aluminum. Therefore, the potential of the off-path region 5 is the same as the potential of the wiring region 2. The connection region 51 is covered with a protective film 6 (silicon nitride, etc.), but the off-path region 5 is not covered with the protective film 6 and is exposed to a sealing resin 7 (epoxy resin, etc.) arranged above the protective film 6.

[0023] The off-path area 5 is made of aluminum. The constituent material of the off-path area 5 may be the same as or different from that of the wiring area 2. If different, the off-path area 5 may be made of, for example, conductive aluminum, and the definition of "made of aluminum" can be applied to the explanation of the wiring area 2.

[0024] The off-path region 5 is disposed outside the path through which the current 90 used in the semiconductor device 10 flows. That is, the off-path region 5 is a dead end region from the perspective of the current 90 flowing through the wiring region 2, and the current 90 does not actively flow through it. However, there is a possibility that a portion of the current 90 branches off and a weak current flows through the off-path region 5. Therefore, it is not the case that no current flows through the off-path region 5. However, as described above, the off-path region 5 is connected to the wiring region 2 by the connection region 51, and therefore the potential of the wiring region 2 and the potential of the off-path region 5 are the same.

[0025] The off-path region 5 is located closer to the wiring region 4 than the bonding pads 3. To explain this point with reference to FIG. 2 , the protective film 6 (semiconductor protective film), which is an insulating film, is arranged to cover almost the entire substrate 1. However, the protective film 6 is arranged to expose the bonding pads 3 and 8 and the off-path region 5 from the protective film 6. That is, the protective film 6 covers the wiring region 2, the wiring region 4, and the connection region 51, while exposing the bonding pads 3 and 8 and the off-path region 5. Specifically, the protective film 6 is uniformly arranged along the surface of the substrate 1, and openings are formed above the bonding pads 3 and 8 and the off-path region 5. Therefore, the bonding pads 3 and 8, the off-path region 5, and the connection region 51 come into contact with the sealing resin 7, but the wiring regions 2 and 4 do not come into contact with the sealing resin 7.

[0026] The wiring region 2 has a relatively high potential, and the wiring region 4 has a relatively low potential. Therefore, a potential difference occurs between the wiring region 2 and the wiring region 4. As a result, negatively charged anions 91 easily reach the wiring region 2 and the bonding pad 3, which have a relatively high potential. In particular, since a wire 31 is connected to the bonding pad 3, the aluminum (element, alloy, etc.) that constitutes the bonding pad 3 is exposed. On the other hand, the wiring region 2 is covered with the protective film 6. Therefore, anions 91 present in the environment of the bonding pad 3 (e.g., the sealing resin 7) are particularly likely to concentrate on the bonding pad 3. Even if the sealing resin 7 is not disposed above the protective film 6, aluminum corrosion will similarly progress if anions 91 that cause aluminum corrosion are present in the environment (e.g., the atmosphere).

[0027] Therefore, in the example of the present disclosure, as described above, an off-path region 5 having the same potential as the wiring region 2 is provided at a location closer to the wiring region 4 than the bonding pad 3. The off-path region 5, like the bonding pad 3, is exposed to the environment (e.g., the sealing resin 7). For this reason, of the bonding pad 3 and the off-path region 5, which have the same potential, the anions 91 tend to gather in the off-path region 5 that is closest to the wiring region 4. On the other hand, the anions 91 tend not to gather in the bonding pad 3, which is farther away. This makes it possible to actively induce corrosion in the off-path region 5 while more effectively suppressing corrosion in the bonding pad 3.

[0028] In this way, instead of suppressing corrosion in the bonding pad 3, corrosion is promoted in the out-of-path region 5. Therefore, the area of ​​the out-of-path region 5 is larger than the area of ​​the bonding pad 3. In this way, it is possible to prevent the out-of-path region 5 from being completely corroded, and the corrosion suppression effect on the bonding pad 3 that accompanies the preferential corrosion of the out-of-path region 5 can be maintained for a long period of time.

[0029] When the sealing resin 7 is disposed above the protective film 6 as in the example of the present disclosure, the negatively charged anions 91 that cause corrosion of aluminum include, for example, chloride ions (Cl) in the sealing resin 7.- The anions 91 are ions that are intentionally present in the environment of the sealing resin 7 or the like, or ions that have come to be present unintentionally.

[0030] The protective film 6 is disposed so as to cover the end of the off-path area 5. Therefore, the entire off-path area 5 is not exposed from the protective film 6. By doing so, even if the exposed portion is completely corroded, the end of the off-path area 5 located directly below the protective film 6 will be further corroded, and therefore the influence of corrosion on the connection area 51 and the wiring area 2 (both made of aluminum) connected to the off-path area 5 can be suppressed.

[0031] The off-path region 5 is arranged in the vicinity of the bonding pad 3. "Very close" here refers to the distance within which anions 91 present in the environment (such as the sealing resin 7) can reach the bonding pad 3 when the semiconductor device 10 is in use. Arranged in the vicinity means that the off-path region 5 is arranged within that distance from the bonding pad 3. Arranging the off-path region 5 in the vicinity allows the off-path region 5 to be closer to the bonding pad 3, making it easier for anions 91 present around the bonding pad 3 to be collected in the off-path region 5.

[0032] The heights of the bonding pads 3, 8 and the off-path region 5 (length in the vertical direction from the surface of the substrate 1) are, for example, the same, but the off-path region 5 may be taller. In addition, the area and height of the connection region 51 are not particularly limited as long as they can electrically connect the wiring region 2 and the off-path region 5.

[0033] The off-path region 5 is disposed between the wiring region 2 and the wiring region 4. By disposing it in this position, the wiring region 2 can be disposed between the bonding pad 3 and the off-path region 5, and the distance between the bonding pad 3 and the off-path region 5 can be increased. This makes it possible to prevent anions 91 that gather in the off-path region 5 from unintentionally reaching the bonding pad 3, and to more effectively prevent unexpected corrosion of the bonding pad 3.

[0034] 3 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 have been removed. In the embodiment of FIG. 3, the off-path region 5 is disposed on the opposite side of the wiring region 2 (first wiring region) from the side on which the wiring region 4 (second wiring region) is disposed. By disposing it in this position, the off-path region 5 can be brought closer to the bonding pad 3, and anions 91 present around the bonding pad 3 can be easily collected in the off-path region 5.

[0035] Note that either the location of the off-path area 5 shown in FIGS. 1 and 2 or the location of the off-path area 5 shown in FIG. 3 can be selected depending on the layout on the substrate 1, for example.

[0036] FIG. 4 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 have been removed. In the embodiment of FIG. 4, multiple off-path regions 5 are arranged. Specifically, in addition to the positions shown in FIG. 1 above, off-path regions 5 are also arranged near bonding pads 32 located away from the edge 11 of the substrate 1. The "neighborhood" here is synonymous with the "neighborhood" described with reference to FIGS. 1 and 2 above. A wire 33 is connected to the bonding pad 32, for example, by soldering, and the bonding pad 32 is connected to the wiring region 2. A current 90 flows through the bonding pads 3, 32.

[0037] In this way, by arranging a plurality of off-path regions 5, anions 91 in the environment can be collected in a plurality of off-path regions 5. This prevents the anions 91 from concentrating in one off-path region 5 and completely corroding that one off-path region 5. Therefore, the reliability of the semiconductor device 10 can be maintained for a long period of time.

[0038] 5 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 are removed. In the embodiment of FIG. 5, the out-of-path region 5 is disposed in at least a part of the periphery of the bonding pad 3 so as to surround the bonding pad 3.

[0039] When sealing resin 7 is disposed to seal at least bonding pad 3, anions 91 tend to gather at bonding pad 3 from the sides of bonding pad 3. Therefore, by disposing sealing resin 7 at least partially around bonding pad 3 so as to surround bonding pad 3, it is possible to prevent anions 91 from reaching bonding pad 3 from the sides.

[0040] In the illustrated example, the bonding pads 3 are arranged on the edge 11 of the substrate 1. The off-path area 5 has an L-shape. The off-path area 5 is preferably arranged between the bonding pads 3 and the wiring area 4.

[0041] It is expected that the volume of the sealing resin 7 is small on the edge 11 side of the substrate 1 as viewed from the bonding pad 3, and that the amount of anions 91 present is also relatively small. On the other hand, it is expected that the volume of the sealing resin 7 is relatively large on the opposite side of the edge 11 of the substrate 1 as viewed from the bonding pad 3 (the central side of the substrate 1), and that the amount of anions 91 present is also relatively large. Therefore, as viewed from the bonding pad 3, the out-of-path region 5 is not arranged on the edge 11 side of the substrate 1, but is arranged on the opposite side of the edge 11 of the substrate 1. This makes it possible to prevent anions 91 moving from the central side of the substrate 1 from reaching the bonding pad 3.

[0042] Furthermore, in the bonding pad 3, the anions 91 tend to gather on the side of the wiring region 4 because it is relatively close to the wiring region 4. On the other hand, the anions 91 do not tend to gather on the side opposite to the side where the wiring region 4 is arranged because it is relatively far from the wiring region 4. Therefore, as viewed from the bonding pad 3, the off-path region 5 is not arranged on the side far from the wiring region 4, but is arranged on the side close to the wiring region 4. This makes it easier for the anions 91 to gather in the off-path region 5 that is closer to the wiring region 4.

[0043] 6 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 have been removed. In the embodiment of FIG. 6, the off-path region 5 is directly connected to the bonding pad 3. Furthermore, multiple off-path regions 5 are connected to one bonding pad 3. The multiple off-path regions 5 include an off-path region 5 arranged along one of the sides forming the bonding pad 3 that is closer to the wiring region 4, and an off-path region 5 extending from the one off-path region 5 toward the bonding pad 3.

[0044] 6, similarly to the embodiment of FIG. 5, the off-path region 5 is arranged in at least a portion of the periphery of the bonding pad 3 so as to surround the bonding pad 3. In other words, the L-shaped off-path region 5 shown in FIG. 5 is divided into multiple regions at the corners of the L. The off-path region 5 to be arranged is made up of multiple off-path regions 5. In this way, even if, for example, there is an obstacle near the bonding pad 3 and the off-path regions 5 cannot be arranged contiguously, the multiple off-path regions 5 can be arranged while avoiding the obstacle.

[0045] FIG. 7 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 have been removed. In the embodiment of FIG. 7, the semiconductor device 10 further includes a wiring region 21 (third wiring region) and an off-path region 53 (second off-path region). The wiring region 21 has a different potential from the wiring regions 2 and 4, and is an aluminum region formed on a part of the surface of the substrate 1. The term "made of aluminum" here has the same meaning as the aluminum described above with reference to FIGS. 1 and 2. The wiring region 21 is configured in, for example, a strip or band shape. In the example of the present disclosure, among the wiring regions 21, 2, and 4, the wiring region 21 has the highest potential, followed by the wiring region 2, and finally the wiring region 4 has the lowest potential.

[0046] The off-path region 53 is an aluminum region located closer to the wiring region 4 than the bonding pad 34. "Aluminum" here has the same meaning as the aluminum described above with reference to FIGS. 1 and 2. The bonding pad 34 is connected to one end of the wiring region 21. The off-path region 53 is connected to the wiring region 21 through the connection region 54, and is located outside the path through which the current 90 used in the semiconductor device 10 flows. The bonding pad 34 and the off-path region 53 are exposed (bare) from the protective film 6, similar to the bonding pad 3 and the off-path region 5. A wire 35 is connected to the bonding pad 34.

[0047] When viewed from the wiring region 4, which has the lowest potential, the wiring regions 21 and 2 are both at a relatively high potential. For this reason, corrosion due to anions 91 may occur in the bonding pads 34 and 3 connected to the wiring regions 21 and 2. Furthermore, when viewed from the wiring region 2, which has a potential between the potential of the wiring region 21 and the potential of the wiring region 4, the wiring region 21 is at a relatively high potential. For these reasons, corrosion due to anions 91 may particularly occur in the bonding pad 34 connected to the wiring region 21. Therefore, by providing an off-path region 5 for each of the wiring regions 2 and 21, corrosion in the bonding pads 34 and 3 can be suppressed.

[0048] In addition, when multiple wiring regions with different potentials are provided, it is not necessary to provide the off-path region 5 in all of the wiring regions. That is, among the multiple wiring regions, corrosion is likely to occur in the bonding pad 34 connected to the wiring region 21 with the highest potential in the example of Figure 7. Therefore, it is preferable to arrange the off-path region 53 at least near the bonding pad 34.

[0049] Furthermore, when off-path areas 53, 5 are connected to the respective wiring areas 21, 2, the area of ​​the off-path area 53 can be made larger than the area of ​​the off-path area 5, from the viewpoint that corrosion progresses particularly in the off-path area 53. However, the area of ​​the off-path area 53 and the area of ​​the off-path area 5 may be the same.

[0050] 8 is a top view of a semiconductor device 10 according to another embodiment, showing a state in which the protective film 6 and the sealing resin 7 have been removed. In the example of FIG. 8, the out-of-path area 5 is connected to the wiring area 4 as well as the wiring area 2. However, in the example of FIG. 8, the out-of-path area 5 does not need to be provided on the wiring area 2 side, and may be provided only in the wiring area 4. In the example of FIG. 8, corrosion of at least the aluminum bonding pads 8 is suppressed.

[0051] The semiconductor device 10 shown in FIG. 8 includes a substrate 1, an aluminum wiring region 4 (first wiring region) formed on a portion of the surface of the substrate 1, and an aluminum bonding pad 8 connected to the wiring region 4. The semiconductor device 10 also includes an aluminum wiring region 2 (second wiring region) formed on a portion of the surface of the substrate 1 and having a different potential from that of the wiring region 4. In the example of FIG. 8, the potential of the wiring region 4 is lower than that of the wiring region 2. The semiconductor device 10 also includes an off-path region 55. The off-path region 55 is an aluminum region connected to at least one of the wiring region 4 or the bonding pad 8, and is located outside the path through which the current 90 flows, closer to the wiring region 2 than the bonding pad 8. In the example of FIG. 8, the off-path region 55 is connected to the wiring region 4 via a connection region 56. The above descriptions of the off-path region 5 and the connection region 51 can be similarly applied to the off-path region 55 and the connection region 56, except that they are located in different locations.

[0052] In addition to anions 91, ions that cause aluminum corrosion also include cations 92 such as protons. Like anions 91, cations 92 are present in the environment of bonding pad 8 and out-of-path region 53, such as sealing resin 7. Therefore, similar to the corrosion of bonding pad 3, which has a relatively high potential, caused by anions 91, corrosion of bonding pad 8, which has a relatively low potential, caused by cations 92 can also occur. Therefore, by arranging out-of-path region 55 near bonding pad 8, corrosion of aluminum bonding pad 8 can be suppressed.

[0053] The off-path area 55 is preferably disposed near the bonding pad 8. The term "near" here is synonymous with "near" in the description of the location of the off-path area 5 above. Both the bonding pad 8 and the off-path area 55 are made of aluminum. The term "made of aluminum" here is synonymous with "made of aluminum" in the description of the bonding pad 3 and the off-path area 5 above.

[0054] 8 further includes an aluminum bonding pad 3 (second bonding pad) connected to the wiring region 2 (second wiring region). The semiconductor device 10 also includes an off-path region 5 (second off-path region) connected to at least one of the wiring region 2 or the bonding pad 3, and located outside the path and closer to the wiring region 4 than the bonding pad 3. In the example of FIG. 8, the off-path region 5 is connected to the wiring region 2. Therefore, in the example of FIG. 8, the off-path region 5 is connected to the wiring region 2, which has a relatively high potential, and the off-path region 55 is connected to the wiring region 4, which has a relatively low potential. This makes it possible to suppress corrosion of both the aluminum bonding pads 3 and 8. [Explanation of symbols]

[0055] 1 board 10 Semiconductor devices 100 Power conversion device 11. Edge 12 insulating film 2 Wiring area (1st wiring area, 2nd wiring area) 21 Wiring area (3rd wiring area) 3 Bonding pad (first bonding pad) 31 Wire 32 Bonding Pads 33 Wire 34 Bonding Pad 4 Wiring area (2nd wiring area, 1st wiring area) 5 Off-path area (first off-path area) 51 Connection Area 53 Off-path area (second off-path area) 54 Connection Area 55 Off-path area 56 Connection Area 6 Protective film (semiconductor protective film) 7 Sealing resin 8 Bonding pad (second bonding pad) 81 Wire 90 current 91 Anions 92 cations

Claims

1. A semiconductor device, A substrate; a first wiring region made of aluminum formed on a portion of the surface of the substrate; an aluminum bonding pad connected to the first wiring region; a second wiring region made of aluminum and formed on a portion of the surface of the substrate, the second wiring region having a different potential from the first wiring region; an aluminum out-path region connected to at least one of the first wiring region and the bonding pad, outside a path through which a current used in the semiconductor device flows, and located closer to the second wiring region than the bonding pad; a semiconductor protection film covering the first wiring region and the second wiring region and exposing the bonding pad and the out-of-path region. A semiconductor device characterized by:

2. The off-path area is disposed between the first wiring area and the second wiring area.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

3. The off-path area is arranged on the opposite side to the arrangement side of the second wiring area when viewed from the first wiring area.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

4. The out-path region is disposed at least partially around the bonding pad so as to surround the bonding pad.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

5. a third wiring region made of aluminum and formed on a part of the surface of the substrate, the third wiring region having a potential different from that of the first wiring region and the second wiring region; a second out-of-path area made of aluminum, connected to the third wiring area, outside a path through which a current used in the semiconductor device flows, and located closer to the second wiring area than the bonding pad; Equipped with 2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

6. a second bonding pad made of aluminum connected to the second wiring region; a second off-path area connected to at least one of the second wiring area and the second bonding pad, and disposed outside the path and closer to the first wiring area than the second bonding pad; Equipped with 2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

7. The potential of the first wiring region is higher than the potential of the second wiring region.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

8. The potential of the first wiring region is lower than the potential of the second wiring region.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

9. The area of ​​the out-of-path region is larger than the area of ​​the bonding pad.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

10. The out-of-path region is disposed adjacent to the bonding pad.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

11. A plurality of the off-path areas are arranged.

2. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer.

12. A semiconductor device according to claim 1 is provided. A power conversion device characterized by:

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