Power supply device, semiconductor device, power supply system equipped with this, and vehicle equipped with this

Abstract

To solve a problem related to an operating voltage range of a power supply device.SOLUTION: A power supply device X comprises an output transistor N1 connected between an application terminal of an input voltage Vb and an application terminal of an output voltage Vout, and a feedback control circuit 2 configured to linearly control a drive signal G1 for the output transistor N1. The feedback control circuit 2 includes an output stage 5 configured to generate the drive signal G1 by receiving a power supply voltage Vcp different from the input voltage Vb. The power supply voltage Vcp is higher than the output voltage Vout by at least on-threshold voltage of the output transistor N1.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The invention disclosed in this specification relates to a power supply device, a semiconductor device, a power supply system including the same, and a vehicle including the same. [Background technology]

[0002] Conventionally, linear power supplies (series regulators such as LDO [low drop out] regulators) have been used as power supply means (power supply units) for various devices.

[0003] As an example of the related prior art, Patent Document 1 can be mentioned. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2018-112963

[0005] [overview] The power supply means as described above leaves room for further consideration regarding the range of voltage input from the power supply.

[0006] The power supply device disclosed in this specification includes an output transistor and a feedback control circuit. The output transistor is an N-channel or NPN type and is connected between an input voltage application terminal and an output voltage application terminal. The feedback control circuit is configured to linearly control a drive signal for the output transistor so as to reduce a difference voltage between a reference voltage and a feedback voltage corresponding to the output voltage. The feedback control circuit includes an output stage configured to receive a power supply voltage different from the input voltage and generate the drive signal. The power supply voltage is higher than the output voltage by at least the on-threshold voltage of the output transistor.

[0007] The semiconductor device disclosed in this specification is an integrated power supply device having the above-described configuration.

[0008] The present specification discloses a power supply system including the semiconductor device having the above-described configuration, a boost circuit, and an input voltage generating circuit. The boost circuit is configured to boost an input voltage to generate a power supply voltage and supply the power supply voltage to a feedback control circuit. The input voltage generating circuit generates an input voltage and supplies the input voltage to the boost circuit and an input terminal.

[0009] The vehicle disclosed in this specification is equipped with a power supply system having the above-described configuration. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram showing the configuration of a power supply device Y of the comparative example. [Figure 2] FIG. 2 is a diagram showing the internal configuration of the power supply device Y in detail. [Figure 3] FIG. 3 is a diagram showing another aspect of the power supply device Y of the comparative example. [Figure 4] FIG. 4 is a block diagram showing the configuration of the power supply device X of the present disclosure. [Figure 5] FIG. 5 is a diagram showing the internal configuration of the power supply device X in detail. [Figure 6] FIG. 6 is a diagram showing a modified example of the power supply device X of the present disclosure. [Figure 7] FIG. 7 is a diagram showing a vehicle 55X equipped with a power supply device X.

[0011] [Detailed explanation] <Regarding power supply device Y as a comparative example> First, power supply device Y will be described as a comparative example of power supply device X of the present disclosure. Next, the problems with the comparative example will be described, followed by a description of power supply device X of the present disclosure.

[0012] Fig. 1 is a block diagram showing the configuration of a power supply Y of a comparative example. As shown in Fig. 1, the power supply Y is connected to a power supply 100. The power supply 100 generates an input voltage Vb and inputs it to the power supply Y. The power supply Y is a regulator (more specifically, a linear regulator) that steps down the input voltage Vb to generate an output voltage Vout.

[0013] The power supply Y has an input terminal Ti and an output terminal To. The input terminal Ti is connected to the power supply 100. The input terminal Ti receives an input voltage Vb from the power supply 100. The output terminal To is connected to a load (not shown). The output terminal To outputs an output voltage Vout generated by the internal configuration of the power supply Y (details of which will be described later).

[0014] Next, a description will be given of the internal configuration of the power supply device Y. The power supply device Y includes an output transistor N1 and a feedback control circuit 2.

[0015] The output transistor N1 is an N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The output transistor N1 is connected between the input terminal Ti and the output terminal To. Specifically, the drain terminal of the output transistor N1 is connected to the input terminal Ti. The source terminal of the output transistor N1 is connected to the output terminal To.

[0016] An input voltage Vb is input to the drain terminal of the output transistor N1. A drive signal G1 (details will be described later) is input to the gate terminal of the output transistor N1. The output transistor N1 is turned on / off in response to the drive signal G1.

[0017] The feedback control circuit 2 includes a voltage dividing circuit 3, a reference voltage generating circuit 4, and an amplifier 5.

[0018] The voltage divider circuit 3 divides the output voltage Vout to output a feedback voltage Vfb. Specifically, the voltage divider circuit 3 includes a resistor R1 and a resistor R2. One end of the resistor R1 is connected to the output terminal To. The other end of the resistor R1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the ground terminal. A feedback voltage Vfb (=Vout×{R2 / (R1+R2)}) is generated at the connection node between the resistors R1 and R2.

[0019] The reference voltage generating circuit 4 generates a predetermined reference voltage Vref.

[0020] The non-inverting input terminal (+) of the amplifier 5 is connected to the reference voltage generating circuit 4. The inverting input terminal (-) of the amplifier 5 is connected to the connection node between the resistors R1 and R2. The output terminal of the amplifier 5 is connected to the gate terminal of the output transistor N1. The positive power supply terminal of the amplifier 5 is connected to the input terminal Ti as well as the drain terminal of the output transistor N1. The negative power supply terminal of the amplifier 5 is connected to the ground terminal GND.

[0021] The amplifier 5 receives an input voltage Vb from the positive power supply terminal and outputs a drive signal G1 from the output terminal according to the difference voltage between the reference voltage Vref and the feedback voltage Vfb. The amplifier 5 controls the drive signal G1 so that the difference voltage between the reference voltage Vref and the feedback voltage Vfb becomes small (=imaginary short).

[0022] Fig. 2 is a diagram showing in detail the internal configuration of power supply device Y. As shown in Fig. 2, amplifier 5 includes transistors N2, N3, N4, N5 and transistors P1 and P2. Transistors N2 to N5 are N-channel MOSFETs. Transistors P1 and P2 are P-channel MOSFETs.

[0023] The gate terminal of transistor N2 is connected to the connection node. The source terminal of transistor N2, together with the source terminal of transistor N3, is connected to the output terminal of constant current source 110. The drain terminal of transistor N2 is connected to the source terminal of transistor N4. The drain terminal of transistor N3 is connected to the source terminal of transistor N5.

[0024] A feedback voltage Vfb is input to the gate terminal of transistor N2. When the voltage value of the feedback voltage Vfb is less than the on-threshold voltage of transistor N2, transistor N2 is off. When the voltage value of the feedback voltage Vfb is equal to or greater than the on-threshold voltage of transistor N2, transistor N2 is on. A reference voltage Vref is input to the gate terminal of transistor N3. The voltage value of the reference voltage Vref is set to be higher than the on-threshold voltage of transistor N3.

[0025] The constant current source 110 generates the constant current Iref by adding the currents flowing through the transistors N2 and N3 together. In other words, the current flowing through the transistor N3 is the constant current Iref minus the current flowing through the transistor N2. That is, when the transistor N2 is off, the current flowing through the transistor N2 is zero, and the entire constant current Iref flows through the transistor N3. When the transistor N2 is on, as the voltage value of the feedback voltage Vfb increases, the current value of the current flowing through the transistor N2 also increases, and conversely, the current flowing through the transistor N3 decreases.

[0026] The source terminal of transistor N4 is connected to the drain terminal of transistor N2. The drain terminal of transistor N4, together with the drain terminal of transistor P2, is connected to the gate terminal of output transistor N1. The source terminal of transistor N5 is connected to the drain terminal of transistor N3. The drain terminal of transistor N5, together with the drain terminal of transistor P1, is connected to the gate terminals of transistors P1 and P2.

[0027] A predetermined control signal S1 is input to the gate terminal of each of transistors N4 and N5. Basically, a high-level control signal S1 is input to the gate terminal of each of transistors N4 and N5, turning them on. Transistor N4 clamps the voltage at the drain terminal of transistor N2 to a predetermined voltage value (specifically, the voltage value of the control signal S1 minus the gate-source voltage of transistor N4). Transistor N5 clamps the voltage at the drain terminal of transistor N3 to a predetermined voltage value (specifically, the voltage value of the control signal S1 minus the gate-source voltage of transistor N5).

[0028] The transistors P1 and P2 form a current mirror, with the source terminals of the transistors P1 and P2 connected to the input terminal Ti.

[0029] The current flowing through the transistor N3 is mirrored as the current flowing through the transistor P2 by the current mirror formed by the transistors P1 and P2.

[0030] The gate terminal of the output transistor N1 is connected to the drain terminal of the transistor P2, the drain terminal of the transistor N2, and the first terminal of the capacitor C1. The second terminal of the capacitor C2 is connected to the gate terminal of the transistor N2 and to the connection node between the resistors R1 and R2.

[0031] With the above configuration, the drive signal G1 is controlled so that the feedback voltage Vfb approaches the reference voltage Vref.

[0032] <Considerations about operating voltage> The power supply Y operates by controlling the drive of the output transistor N1 so that the output voltage Vout reaches a target voltage value (hereinafter simply referred to as the "target voltage value"). Therefore, at least the target voltage value must be applied to the source terminal of the output transistor N1. To drive the output transistor N1, the gate-source voltage of the output transistor N1 must exceed the on-threshold voltage of the output transistor N1. In other words, the drive signal G1 must be able to rise to a value higher than the target voltage value by at least the on-threshold voltage of the output transistor N1.

[0033] Here, the positive power supply terminal of amplifier 5 (= the source terminals of transistors P1 and P2) is connected to input terminal Ti, along with the source terminal of output transistor N1. That is, input voltage Vb is input to the source terminal of output transistor N1 and the positive power supply terminal of amplifier 5. For this reason, the voltage value of input voltage Vb must be higher than the target voltage value by at least the on-threshold voltage of output transistor N1 (more precisely, the sum of the on-threshold voltage of output transistor N1 and the input-output saturation voltage of transistor P2). This input-output saturation voltage is the drain-source voltage of transistor P2 in a saturated state.

[0034] This problem will be explained with a specific example as follows. Suppose the target voltage is 2V, the on-threshold voltage of the output transistor N1 is 1V, and the input-output saturation voltage of the transistor P2 is 0.3V. In this case, the input voltage Vb must be higher than the target voltage of 2V for the output voltage Vout by at least the sum of the on-threshold voltage of 1V and the input-output saturation voltage of 0.3V (=1.3V). Therefore, the voltage value of the input voltage Vb in this case must be at least 3.3V or higher. In other words, if the voltage value of the input voltage Vb is less than 3.3V, it is not possible to generate an output voltage Vout of 2V.

[0035] Therefore, the input voltage Vb has a relatively high lower limit as an operating voltage for normal operation of the power supply device Y. In other words, the range of the operating voltage of the power supply device Y becomes relatively narrow.

[0036] Suppose we replace output transistor N1 with output transistor P3, a P-channel MOSFET, as shown in Figure 3 to lower the lower limit of input voltage Vb. In this case, we can lower the input voltage Vb to a value equal to the target voltage. However, when power supply Y starts up, a potential difference may occur between the gate and source of output transistor P3, causing the output transistor P3 to turn on unintentionally, resulting in a rush current flowing from output terminal To to the load. Therefore, we need to take measures against the rush current, such as inserting capacitor C2 between the application terminal of output voltage Vout and the load to smooth the output. Thus, using output transistor P3, a P-channel MOSFET, may result in an increase in the number of components and an increase in circuit area.

[0037] In response to the above problems, the power supply device X of the present disclosure is capable of setting a relatively low lower limit for the operating voltage while suppressing an increase in the number of components and an increase in the circuit area. The power supply device X according to the embodiment of the present disclosure will be described in detail below. Note that the power supply device X according to the embodiment of the present disclosure includes components in common with the previously described power supply device Y. For this reason, the same reference numerals are used to designate the common components, and descriptions thereof will be omitted.

[0038] <Regarding the power supply device X according to the present disclosure> Fig. 4 is a block diagram showing the configuration of a power supply device X of the present disclosure. As shown in Fig. 1, the power supply device X is connected to a power supply 100 (input voltage generation circuit) and a boost circuit 6 to form a power supply system 50X. The power supply 100 generates an input voltage Vb and inputs it to both the boost circuit 6 and the power supply device X. The boost circuit 6 is a regulator that boosts the input voltage Vb to generate a power supply voltage Vcp. The power supply device X is a regulator that generates an output voltage Vout based on the input voltage Vb and the power supply voltage Vcp.

[0039] The power supply voltage Vcp is higher than the output voltage Vout (=the target voltage value mentioned above) by at least the on-threshold voltage of the output transistor N1 (more precisely, the sum of the on-threshold voltage of the output transistor N1 and the input-output saturation voltage of the transistor P2). For example, the power supply voltage Vcp is higher than the input voltage Vb by at least the on-threshold voltage of the output transistor N1 (more precisely, the sum of the on-threshold voltage of the output transistor N1 and the input-output saturation voltage of the transistor P2). Details will be described later.

[0040] The power supply device X is a semiconductor device formed by integrating its internal configuration. The power supply device X has a plurality of terminals (here, a first input terminal Ti1 (first external terminal), a second input terminal Ti2 (second external terminal), and an output terminal To) for establishing input / output with the outside. The first input terminal Ti1 is connected to a power supply 100. The second input terminal Ti2 is connected to a boost circuit 6.

[0041] The first input terminal Ti1 receives an input voltage Vb from the power supply 100. The second input terminal Ti2 receives a power supply voltage Vcp from the boost circuit 6. The output terminal To outputs an output voltage Vout generated by the internal configuration of the power supply device X (details of which will be described later).

[0042] Next, a detailed description will be given of the internal configuration of the power supply device X. The power supply device X includes an output transistor N1 and a feedback control circuit 2.

[0043] The drain terminal of the output transistor N1 is connected to the first input terminal Ti1, the source terminal of the output transistor N1 is connected to the output terminal To, and the input voltage Vb is input to the drain terminal of the output transistor N1.

[0044] The feedback control circuit 2 includes a voltage divider circuit 3, a reference voltage generating circuit 4, and an amplifier 5 (output stage). A second input terminal Ti2 is connected to the positive power supply terminal of the amplifier 5. A ground terminal GND is connected to the negative power supply terminal of the amplifier 5. A power supply voltage Vcp is input to the positive power supply terminal of the amplifier 5.

[0045] FIG. 5 is a diagram showing in detail the internal configuration of the power supply device X. As shown in FIG. 5, the source terminals of the transistors P1 and P2 are connected to the second input terminal Ti2. The source terminals of the transistors P1 and P2 receive the power supply voltage Vcp. The drain terminal of the output transistor N1 is connected to the first input terminal Ti1. The source terminal of the output transistor N1 receives the input voltage Vb.

[0046] As described above, the power supply device X has a first input terminal Ti1 and a second input terminal Ti2 as separate external terminals. The drain terminal of the output transistor N1 is connected to the first input terminal Ti1 and receives the input voltage Vb, while the positive power supply terminal of the amplifier 5 is connected to the second input terminal Ti2 and receives the power supply voltage Vcp. The power supply voltage Vcp is higher than the output voltage Vout (the target voltage value mentioned above) by at least the on-threshold voltage of the output transistor N1 (more strictly, by the sum of the on-threshold voltage of the output transistor N1 and the input-output saturation voltage of the transistor P2).

[0047] Even if the voltage value of the input voltage Vb is equal to or greater than the target voltage value but is lower than the sum of the target voltage value, the on-threshold voltage of the output transistor N1, and the input-output saturation voltage of the transistor P2, it is possible to generate an output voltage Vout equal to the target voltage value. That is, it is possible to lower the lower limit of the input voltage Vb as the operating voltage of the power supply X to a value equal to the target voltage value. In other words, it is possible to make the range of operating voltages of the power supply X relatively wide.

[0048] Furthermore, output transistor N1 is an N-channel MOSFET. Therefore, power supply X is less susceptible to inrush current compared to power supply Y mentioned above (which uses a P-channel output transistor P3 and is prone to inrush current due to the potential difference that occurs at startup). This makes it possible to omit output smoothing capacitor C2 (see Figure 3) and other measures to prevent inrush current, thereby preventing an increase in the number of components and circuit area.

[0049] As described above, the voltages at the drain terminals of transistors N2 and N3 are clamped to the on-threshold voltages of transistors N4 and N5 by transistors N4 and N5, which prevents overvoltages exceeding the breakdown voltages of the drain terminals of transistors N2 and N3 and the gate terminal of transistor N1 from being applied.

[0050] <Modification> The present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present invention. For example, as shown in FIG. 6, the power supply device X may be configured to include a current limiting circuit 7.

[0051] The current limiting circuit 7 is connected between the drain terminal of the output transistor N1 and the first input terminal Ti1. The current limiting circuit 7 limits the current flowing from the first input terminal Ti1 to the output transistor N1 to a predetermined current value or less. The current limiting circuit 7 includes a resistor R3. The resistor R3 is connected between the first input terminal Ti1 and the output transistor N1.

[0052] The current flowing from the first input terminal Ti1 to the output transistor N1 decreases in accordance with the resistance value of the resistor R3.

[0053] Furthermore, when a configuration including resistor R3 is adopted as the current limiting circuit 7, it may be understood that resistor R3 functions alone as a current limiting element, or that an RC filter (low-pass filter) for current limiting is formed by the source-substrate capacitance or gate-source capacitance of the output transistor N1 and resistor R3.

[0054] Furthermore, for example, the current limiting circuit 7 may include a MOSFET instead of the resistor R3. In this case, the current flowing from the first input terminal Ti1 to the output transistor N1 is limited by the resistance value of the on-resistance of the MOSFET.

[0055] 6, the power supply device X may be configured to include a first clamp circuit 8. The first clamp circuit 8 is connected between the gate terminal of the output transistor N1 and the ground terminal GND. The first clamp circuit 8 is configured to clamp the voltage value of the drive signal G1 to a predetermined voltage value under predetermined conditions.

[0056] Suppose that the input voltage Vb input from the power supply 100 is momentarily interrupted and then immediately restored to a steep rise. At this time, the drive signal G1 becomes excessive, and the output voltage Vout attempts to rise above the target voltage value. The first clamp circuit 8 clamps the voltage value of the drive signal G1 to a predetermined value (=clamp voltage), thereby preventing the output voltage Vout from rising.

[0057] 6, the power supply device X may be configured to include a second clamp circuit 9. The second clamp circuit 9 is connected between the gate terminal of the output transistor N1 and the source terminal of the output transistor N1. Under predetermined conditions, the second clamp circuit 9 clamps the potential difference between the gate terminal and the source terminal of the output transistor N1 to within a predetermined value. The second clamp circuit 9 may be configured to include, for example, a diode.

[0058] Specifically, when the input voltage Vb rises sharply at the start of the power supply X, the gate-source voltage of the output transistor N1 rises due to the parasitic capacitance of the output transistor N1, causing a current (rush current) to flow from the first input terminal Ti1 to the output terminal To. The second clamp circuit 9 clamps the potential difference between the gate and source terminals of the output transistor N1 so that it does not exceed the forward voltage of the diode included in the second clamp circuit 9, thereby preventing the rush current from flowing.

[0059] 6, the power supply system 50X may include a capacitor C2. One end of the capacitor C2 is connected to the output terminal To of the power supply device X, and the other end is connected to the ground terminal GND. The capacitor C2 smoothes the output voltage Vout.

[0060] In the power supply device X according to the above embodiment, the output transistor N1 is an N-channel MOSFET, but it may be an NPN bipolar transistor instead. In this case, the collector of the bipolar transistor is connected to the first input terminal Ti1, the base is connected to the output terminal of the amplifier 5, and the emitter is connected to the output terminal To.

[0061] In addition, in the above embodiments, the ground potential (potential based on the ground terminal GND) is used as the reference, but this is not limiting. For example, instead of the ground terminal GND as the reference, a predetermined negative voltage may be used as the reference.

[0062] Also, transistors N4 and N5 can be omitted. In this case, the drain terminal of transistor N2 is connected to the gate terminal of output transistor N1 and the drain terminal of transistor P2. In this case, the drain terminal of transistor N3 is connected to the drain terminal of transistor P1 and the gate terminals of transistors P1 and P2. If the withstand voltage of transistors N2 and N3 is relatively high, the circuit area can be reduced by omitting transistors N4 and N5.

[0063] <Using power supply X> 7 is a diagram showing an example of use of power supply device X. Power supply device X and power supply system 50X of the present disclosure can be suitably used in vehicle 55X (more specifically, a power supply device or motor drive device for on-board equipment mounted in vehicle 55X, etc.). Vehicle 55X includes not only engine vehicles but also electric vehicles (battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs / PHVs), or xEVs such as fuel cell electric vehicles (FCEVs / FCVs)).

[0064] <Additional Notes> The power supply device (X) disclosed in the specification comprises an N-channel or NPN output transistor (N1) connected between an application terminal of an input voltage (Vb) and an application terminal of an output voltage (Vout), and a feedback control circuit (2) configured to linearly control a drive signal (G1) of the output transistor (N1) so as to reduce the difference voltage between a reference voltage (Vref) and a feedback voltage (Vfb) corresponding to the output voltage (Vout), the feedback control circuit (2) including an output stage (5) configured to receive a power supply voltage (Vcp) different from the input voltage (Vb) and generate the drive signal (G1), and the power supply voltage (Vcp) is configured to be higher than the output voltage (Vout) by at least the on-threshold voltage of the output transistor (N1) (first configuration).

[0065] The power supply device (X) according to the first configuration may be configured to include a boost circuit (6) configured to boost the input voltage (Vb) to generate a power supply voltage (Vcp) and supply the power supply voltage (Vcp) to the feedback control circuit (2) (second configuration).

[0066] The power supply device (X) according to the first or second configuration may be configured to include a first external terminal (Ti1) that accepts input of an input voltage (Vb), and a second external terminal (Ti2) that accepts input of a power supply voltage (Vcp) separately from the first external terminal (Ti1) (third configuration).

[0067] The power supply device (X) according to the third configuration may be configured to include a current limiting circuit (7) connected between the first external terminal (Ti1) and the output transistor (N1) to limit the current flowing through the output transistor (N1) (fourth configuration).

[0068] In the power supply device (X) according to the fourth configuration, the current limiting circuit (7) may be configured to include at least one of a resistive element (R3) and a P-channel transistor (fifth configuration).

[0069] The power supply device (X) according to any one of the first to fifth configurations may be configured to include a clamp circuit (8) configured to limit the drive signal (G1) to a clamp voltage or less (sixth configuration).

[0070] The power supply device (X) according to any one of the first to sixth configurations may be configured to include a phase compensation circuit (C2) connected between the application terminal of the output voltage (Vout) and the ground terminal, and configured to compensate for the phase between the reference voltage (Vref) and the feedback voltage (Vfb) (seventh configuration).

[0071] The semiconductor device disclosed in the specification is configured so as to integrate the power supply device (X) according to the third configuration (eighth configuration).

[0072] The power supply system (50X) disclosed in the specification includes a semiconductor device according to the eighth configuration, a boost circuit (6) configured to boost an input voltage (Vb) to generate a power supply voltage (Vcp) and supply the power supply voltage (Vcp) to a feedback control circuit (2), and an input voltage generating circuit (100) that generates the input voltage (Vb) and supplies the input voltage (Vb) to each of the boost circuit (6) and a first external terminal (Ti1) (ninth configuration).

[0073] The present invention relates to a vehicle (55X) equipped with a power supply system (50X) according to a ninth aspect (tenth aspect). [Explanation of symbols]

[0074] 2 Feedback control circuit 3 Voltage divider circuit 4. Reference voltage generation circuit 5 Amplifier 6 Boost circuit 7 Current limiting circuit 8 First clamp circuit 9 Second clamp circuit 50X Power System 55X vehicle 100 power supply 110 Constant current source C1, C2 capacitors G1 drive signal GND grounding end Iref constant current N1 output transistor N2 and N3 transistors n1 connection node P1 and P2 transistors P3 output transistor R1~R3 ​​resistance S1 control signal Ti input terminal Ti1 First input terminal Ti2 Second input terminal To output terminal Vb Input voltage Vcp power supply voltage Vfb Feedback voltage Vout Output voltage Vref Reference voltage X Power supply Y Power supply

Claims

1. an N-channel or NPN output transistor connected between an input voltage application terminal and an output voltage application terminal; a feedback control circuit configured to linearly control a drive signal of the output transistor so that a difference voltage between a reference voltage and a feedback voltage according to the output voltage becomes small; Equipped with the feedback control circuit includes an output stage configured to receive a power supply voltage different from the input voltage and generate the drive signal; The power supply voltage is higher than the output voltage by at least an on-threshold voltage of the output transistor.

2. 2. The power supply device according to claim 1, further comprising a boost circuit configured to boost the input voltage to generate the power supply voltage and to supply the power supply voltage to the feedback control circuit.

3. a first external terminal that receives the input of the input voltage; a second external terminal that receives the power supply voltage separately from the first external terminal; 10. The power supply device of claim 1, comprising:

4. 4. The power supply device according to claim 3, further comprising a current limiting circuit connected between the first external terminal and the output transistor to limit a current flowing through the output transistor.

5. 5. The power supply device according to claim 4, wherein the current limiting circuit includes at least one of a resistive element and a P-channel transistor.

6. The power supply of claim 1 , further comprising a clamp circuit configured to limit the drive signal to a value below a clamp voltage.

7. 2. The power supply device according to claim 1, further comprising a phase compensation circuit connected between an application terminal of the output voltage and a ground terminal, the phase compensation circuit being configured to compensate for the phase of the reference voltage and the feedback voltage.

8. A semiconductor device in which the power supply device according to claim 3 is integrated.

9. a semiconductor device according to claim 8; a boost circuit configured to boost the input voltage to generate the power supply voltage and provide the power supply voltage to the feedback control circuit; an input voltage generating circuit that generates the input voltage and supplies the input voltage to the boost circuit and the first external terminal; A power supply system with

10. A vehicle comprising the power supply system according to claim 9.

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