Electronic load device for power supply circuit

Abstract

To provide an electronic load device provided with both high-speed response and stability.SOLUTION: An output terminal OUT is connected to an output line of a power supply circuit 4 to be tested. An output transistor 102 has a drain connected to the output terminal OUT. A sense resistor Rs is connected between a source of the output transistor 102 and a ground. A waveform generator 110 generates a control signal VCTRL. A feedback circuit 120 is Kelvin-connected to the source of the output transistor 102 and controls a gate voltage of the output transistor 102 so that a feedback signal VFB generated at a note of a connection destination is brought closer to the control signal VCTRL. The output transistor 102 is a fourth terminal device having a source Kelvin terminal, and the feedback circuit 120 is connected so that a voltage of the source Kelvin terminal is received as the feedback signal VFB.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to an electronic load device. [Background technology]

[0002] During the design stage of power supply circuits such as DC / DC converters and linear regulators, there are cases where it is necessary to verify the circuit by operating it under conditions close to those of the actual equipment. In such cases, an electronic load is used.

[0003] The electronic load includes an output transistor connected between the output line of the power supply circuit and ground, and sinks the drain current that flows when the output transistor is turned on as a load current from the power supply circuit. The load current generated by the electronic load depends on the gate voltage of the output transistor, and the waveform of the load current can be freely set according to the operation of the actual load. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2004-310609

[0005] [overview] The present disclosure has been made in light of the above circumstances, and one exemplary purpose of an embodiment thereof is to provide an electronic load device that achieves both high-speed response and stability.

[0006] One aspect of the present disclosure relates to an electronic load connected to a power supply circuit, the electronic load including: an output terminal to be connected to an output line of a power supply circuit under test; an output transistor having a drain connected to the output terminal; a sense resistor connected between the source of the output transistor and ground; a waveform generator that generates a control signal; and a feedback circuit that is Kelvin-connected to the source of the output transistor and controls the gate voltage of the output transistor so that a feedback signal generated at a connected node approaches a target level according to the control signal.

[0007] Any combination of the above components, or mutual substitution of the components or expressions of the present disclosure between methods, devices, systems, etc., are also valid aspects of the present invention. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram of a test system equipped with a feedback type electronic load. [Figure 2] FIG. 2 is a waveform diagram showing the measurement results of the step response of the electronic load device of FIG. [Figure 3] FIG. 3 is a circuit diagram of the electronic load device according to the first embodiment. [Figure 4] FIG. 4 is a waveform diagram showing the measurement results of the response characteristics of the electronic load device of FIG. [Figure 5] FIG. 5 is a waveform diagram showing the response characteristics of the electronic load device. [Figure 6] FIG. 6 is a circuit diagram of an electronic load according to an embodiment. [Figure 7] FIG. 7 is a diagram showing an example of a specific implementation of the electronic load device of FIG. [Figure 8] FIG. 8 is a circuit diagram of an electronic load according to an embodiment. [Figure 9] FIG. 9 is a circuit diagram of an electronic load according to an embodiment. [Figure 10] FIG. 10 is a circuit diagram of an electronic load device according to the second embodiment. [Figure 11] FIG. 11 is a circuit diagram showing a specific example of the configuration of the electronic load device of FIG. [Figure 12] FIG. 12 is a waveform diagram showing the measurement results of the response characteristics of the electronic load device of FIG.

[0009] [Detailed explanation] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure will be provided. This summary is intended to provide a basic understanding of one or more embodiments as a prelude to the detailed description that follows, and is not intended to limit the scope of the invention or disclosure. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0010] This summary is not an exhaustive overview of all possible embodiments, nor is it intended to identify key elements of all embodiments or delineate the scope of some or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later.

[0011] An electronic load device according to one embodiment includes an output terminal to be connected to the output line of a power supply circuit under test, an output transistor having a drain connected to the output terminal, a sense resistor connected between the source of the output transistor and ground, a waveform generator that generates a control signal, and a feedback circuit that is Kelvin-connected to the source of the output transistor and controls the gate voltage of the output transistor so that a feedback signal generated at a connected node approaches a target level corresponding to the control signal.

[0012] With this configuration, a zero point can be formed by utilizing the parasitic inductance of the electrical connection means between the Kelvin connection destination node on the source side of the output transistor and the sense resistor (also called a shunt resistor), and by canceling out the pole, both stability and high speed can be achieved.

[0013] In one embodiment, the output transistor may be a four-terminal device having a source Kelvin terminal, and the feedback circuit may be connected to receive the voltage at the source Kelvin terminal as a feedback signal.

[0014] In one embodiment, the output transistor may be a three-terminal device housed in a small outline transistor (SOT) or transistor outline (TO) package. The sense resistor may be connected to a position relatively closer to the tip of the source terminal of the output transistor, and the feedback circuit may be connected to receive a voltage at a position relatively closer to the base of the source terminal of the output transistor as a feedback signal.

[0015] In one embodiment, the feedback circuit may include a differential element in the feedback path.

[0016] In one embodiment, the feedback circuit may include a sense amplifier that amplifies the feedback signal, an output voltage of the sense amplifier, and an error amplifier that receives the control signal.

[0017] In one embodiment, the error amplifier may include a first operational amplifier having a non-inverting input terminal grounded, a first capacitor connected between the output terminal and the inverting input terminal of the first operational amplifier, a first resistor having a first terminal receiving a control signal and a second terminal connected to the inverting input terminal of the first operational amplifier, and a second resistor connected between the inverting input terminal of the first operational amplifier and the output of the sense amplifier.

[0018] In one embodiment, the error amplifier may further include a differentiation circuit that differentiates the feedback signal. Adding the differentiation circuit can eliminate resonance factors caused by the parasitic inductance of the wiring and the gate-source capacitance Cgs of the MOS transistor, enabling even faster response. The secondary pole can be cancelled, enabling even faster response.

[0019] In one embodiment, the differentiating circuit may include a resistor and a capacitor connected in series and disposed in parallel with the second resistor between the inverting input terminal of the first operational amplifier and the output of the sense amplifier.

[0020] In one embodiment, the error amplifier may include a first operational amplifier having a non-inverting input terminal grounded, a first capacitor connected between the output terminal and the inverting input terminal of the first operational amplifier, a first resistor connected between the inverting input terminal of the first operational amplifier and the output of the sense amplifier, and a differentiating circuit provided in parallel with the first resistor between the inverting input terminal of the first operational amplifier and the output of the sense amplifier, the differentiating circuit including a second resistor and a second capacitor connected in series.

[0021] In one embodiment, the sense amplifier may include a second operational amplifier, a third resistor having a first terminal Kelvin-connected to the source of the output transistor and a second terminal connected to the non-inverting input terminal of the second operational amplifier, a fourth resistor having a first terminal connected to the output terminal of the second operational amplifier and a second terminal connected to the non-inverting input terminal of the second operational amplifier, a fifth resistor having a first terminal connected to ground and a second terminal connected to the inverting input terminal of the second operational amplifier, and a sixth resistor having a first terminal connected to ground and a second terminal connected to the inverting input terminal of the second operational amplifier.

[0022] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be designated by the same reference numerals, and redundant descriptions will be omitted where appropriate. Furthermore, the embodiments are merely examples and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0023] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0024] Similarly, "a state in which component C is provided between component A and component B" includes not only cases in which components A and C, or components B and C, are directly connected, but also cases in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the functions or effects achieved by their combination.

[0025] The present embodiment relates to an electronic load device that is connected to the output of a power supply circuit and sinks a controllable load current.

[0026] Electronic loads can be divided into feedforward and feedback types. The feedforward type controls the gate voltage of the output transistor in an open loop to control the drain current. The feedforward type provides fast response, but is affected by variations in the output transistor's characteristics and temperature dependency, resulting in an unstable drain current, and calibration is required for each test to ensure accurate testing. Additionally, selecting an output transistor with a large gate capacitance, i.e., a high rated current, is difficult because ringing occurs due to the gate-drain capacitance Cgd and wiring inductance L. To prevent ringing, the current slew rate must be reduced, making it difficult to design for use with large-capacity power supply circuits.

[0027] The feedback type has high tracking ability to the target current and high resistance to disturbances. Therefore, the drain current is stable against variations in the output transistor characteristics and temperature changes. In addition, it can mitigate resonance caused by the gate-source capacitance Cgs and wiring inductance, allowing the selection of devices with large gate capacitance as the output transistor while maintaining a high slew rate, making it possible to design a device suitable for large-capacity power supply circuits.

[0028] The following describes problems that occur in feedback type electronic load devices.

[0029] 1 is a circuit diagram of a test system 2 equipped with a feedback type electronic load 100R. The test system 2 includes a power supply circuit 4 to be tested and the electronic load 100R. The power supply circuit 4 is a DC / DC converter, a linear regulator, a charge pump circuit, or the like.

[0030] The output terminal OUT of the electronic load 100R is connected to the output line of the power supply circuit 4, and outputs a waveform-controllable load current I LOAD Sinks the load current I LOAD represents the current (power supply current) that flows through a load circuit to which the power supply circuit 4 is connected in an actual application.

[0031] The electronic load 100R includes an output transistor 102, a sense resistor Rs, a waveform generator 110, and a feedback circuit 120R. The output transistor 102 is a MOS transistor, and its drain is connected to the output terminal OUT. The sense resistor Rs is connected between the source of the output transistor 102 and the ground. The sense resistor Rs has a resistance to a load current I LOAD A voltage drop proportional to

[0032] The waveform generator 110 generates a load current I LOAD The control signal V CTRL The type of waveform, frequency, etc. of the signal are determined based on the load to which the power supply circuit 4 is connected in an actual application.

[0033] The feedback circuit 120R generates a feedback signal V corresponding to the voltage drop across the sense resistor Rs. FB The feedback circuit 120R receives the feedback signal V FB is the control signal V CTRL The gate voltage Vg of the output transistor 102 is controlled so as to match the

[0034] The feedback type electronic load 100R in Fig. 1 has the following problem. Parasitic inductances (indicated by L in the figure) of wiring on the board, package leads (terminals), bonding wires, etc., cause a feedback capacitance (Miller capacitance) C between the gate and drain of the output transistor 102. rss This LC resonant circuit is formed together with the resistor R. The LC resonant frequency f is expressed by equation (1). Rg is the output resistance of the operational amplifier 120R, a parasitic resistance included in the board, or a resistance as a component. f=1 / 2π√(R g ·g m C rss L) …(1)

[0035] Feedback capacitance C rss If a secondary pole due to the parasitic inductance L occurs around 1 MHz to 5 MHz, the system becomes unstable and high-speed response becomes difficult.

[0036] Figure 2 is a waveform diagram showing the measurement results of the step response of the electronic load 100R in Figure 1. Figure 2 shows the voltage waveform at the output terminal and the load current waveform. Due to the influence of the secondary pole, ringing is observed in the current waveform in response to a step input.

[0037] The following describes an electronic load device 100 that achieves both system stability and high-speed response.

[0038] (Embodiment 1) 3 is a circuit diagram of the electronic load device 100 according to the first embodiment. The electronic load device 100 includes an output transistor 102, a sense resistor Rs, a waveform generator 110, and a feedback circuit 120. The output transistor 102 is a MOS transistor and is configured with discrete elements. The drain of the output transistor 102 is connected to the output terminal OUT. The sense resistor Rs is connected between the source of the output transistor 102 and the ground. The sense resistor Rs has a resistance to a load current I LOAD A voltage drop proportional to

[0039] The waveform generator 110 generates a control signal V CTRLThe feedback circuit 120 is Kelvin connected to the source of the output transistor 102. The feedback circuit 120 generates a feedback signal V FB The control signal V CTRL The gate voltage Vg of the output transistor 102 is controlled so as to approach a target level according to the input voltage V. The gate resistance Rg can be the output resistance of the operational amplifier 120R, a parasitic resistance included in the substrate, or a resistance as a component.

[0040] The above is the configuration of the electronic load device 100 according to the first embodiment. In this electronic load device 100, a parasitic inductor Ls, such as a lead terminal (electrode) of the output transistor 102 and an internal bonding wire, exists between the Kelvin connection node ks and the source terminal S to which the sense resistor Rs is connected. The feedback signal V FB is fed back to the feedback circuit 120 without passing through the parasitic inductor Ls.

[0041] According to this electronic load device 100, the parasitic inductor Ls of the output transistor 102, which is a discrete element, is used to ZERO This zero point f ZERO By optimizing and canceling the pole in equation (1), high-speed response can be improved. f ZERO =Rs / 2πLs …(2)

[0042] Fig. 4 is a waveform diagram showing the measurement results of the response characteristics of the electronic load 100 of Fig. 3. Like Fig. 2, Fig. 4 shows the voltage waveform at the output terminal and the load current waveform. It can be seen that the ringing seen in Fig. 2 is suppressed by adding a zero point.

[0043] 5 is a waveform diagram showing the response characteristics of the electronic load 100. A simulation was performed by changing the inductance of the parasitic inductor Ls to 1 nH, 5 nH, 20 nH, and 100 nH. In the simulation, the control signal VCTRL A step waveform is input as follows. Good characteristics are obtained in the range of Ls = 5 to 10 nH.

[0044] The advantages of the electronic load device 100 become clear when compared with the comparative technology. In the comparative technology, an inductor element (component) connected in series with the sense resistor Rs is used instead of the parasitic inductor Ls to obtain the zero point f ZERO In the case of an electronic load, the load current I LOAD The inductance required to create a zero point at an appropriate position is several nH (for example, 5 nH to 10 nH), but there are almost no chip components that can tolerate a current of several tens of amperes, so a large air-core coil must be selected. This creates a major obstacle to miniaturizing the electronic load 100 and increases costs.

[0045] In contrast, in this embodiment, the parasitic inductor Ls of the output transistor 102 is used, so a large inductor element is not required, and the electronic load 100 can be made smaller and less expensive.

[0046] Next, a specific implementation example of the electronic load device 100 according to the first embodiment will be described.

[0047] 6 is a circuit diagram of an electronic load 100A according to one embodiment. The output transistor 102A is a four-terminal device having a drain terminal D, a source terminal S, a gate terminal G, and a source Kelvin terminal KS. The feedback circuit 120A converts the voltage at the source Kelvin terminal KS into a feedback signal V FB The parasitic inductance Ls in Figure 6 can be understood as a series connection of the inductance of the bonding wire inside the package and the inductance of the source terminal (lead).

[0048] 7 is a diagram showing an example of a specific implementation of the electronic load device 100A of FIG. 6. The output transistor 102A is a four-terminal device housed in a TO (Transistor Outline) type package. The feedback circuit 120A converts the voltage generated at the source Kelvin terminal KS into a feedback signal V FB The output transistor 102A may be housed in a small outline transistor (SOT) package.

[0049] 8 is a circuit diagram of an electronic load 100B according to one embodiment. In this embodiment, the output transistor 102B is a three-terminal device having a drain terminal D, a source terminal S, and a gate terminal G, and is housed in a SOT-based package. The output transistor 102B may also be housed in a TO-based package.

[0050] The sense resistor Rs is connected to a position P1 on the relatively tip side of the source terminal (lead) 103 of the output transistor 102B. The feedback circuit 120B converts the voltage at a position P2 on the relatively base side of the source terminal 103 of the output transistor 102B into a feedback signal V FB In the second embodiment, the portion of the source terminal (lead) 103 between positions P1 and P2 can be used as a parasitic inductance Ls.

[0051] Next, an example of the configuration of the feedback circuit 120 will be described.

[0052] 9 is a circuit diagram of an electronic load 100C according to an embodiment of the present invention. The feedback circuit 120C includes a sense amplifier 122 and an error amplifier .

[0053] The error amplifier 124 outputs the current sense signal V CS is the control signal V CTRL The target level V is determined by REFThe error amplifier 124 generates a gate voltage Vg of the output transistor 102 so that the gate voltage Vg approaches the error amplifier 124. The error amplifier 124 includes a first operational amplifier OA21, a first resistor R21, a second resistor R22, and a first capacitor C21.

[0054] The non-inverting input terminal of the first operational amplifier OA21 is grounded. The first capacitor C21 is connected between the output terminal and the inverting input terminal of the first operational amplifier OA21. The first resistor R21 has one end connected to a control signal V CTRL The other end of the second resistor R22 is connected between the inverting input terminal of the first operational amplifier OA21 and the output of the sense amplifier 122.

[0055] The sense amplifier 122 is a differential amplifier including a second operational amplifier OA11 and a third resistor R11, a fourth resistor R12, a fifth resistor R13, and a sixth resistor R14, and receives a feedback signal V FB is amplified to generate the current sense signal V CS Generate.

[0056] A first terminal of the third resistor R11 is Kelvin-connected to the source of the output transistor 102, and a second terminal of the fourth resistor R12 is connected to the output terminal of the second operational amplifier OA11, and a second terminal of the fourth resistor R12 is connected to the non-inverting input terminal of the second operational amplifier OA11. A first terminal of the fifth resistor R13 is connected to ground, and a second terminal of the fifth resistor R13 is connected to the inverting input terminal of the second operational amplifier OA11. A first terminal of the sixth resistor R14 is connected to ground, and a second terminal of the sixth resistor R14 is connected to the inverting input terminal of the second operational amplifier OA11.

[0057] The configuration of the feedback circuit 120C is not limited to that shown in FIG. FB If the voltage level is relatively high, the sense amplifier 122 may be omitted.

[0058] (Embodiment 2) 10 is a circuit diagram of an electronic load device 100D according to the second embodiment. The feedback circuit 120D includes an error detection element 126, an amplification element 127, and a differentiation element 128. The differentiation element 128 detects the feedback signal V FB The error detection element 126 is provided in the path (feedback path) of the feedback signal V FB and its differential signal V FB ' and the control signal V CTRL The amplifier element 127 amplifies the error err to generate the gate voltage Vg of the output transistor 102.

[0059] Fig. 11 is a circuit diagram showing a specific example of the configuration of the electronic load device 100D of Fig. 10. The feedback circuit 120D includes a sense amplifier 122 and an error amplifier 124D. The configuration of the sense amplifier 122 is the same as that of Fig. 9.

[0060] The error amplifier 124D includes a differentiation circuit 129 that corresponds to the differentiation element 128 in Fig. 10. The differentiation circuit 129 is a series connection circuit of a resistor R23 and a capacitor C22.

[0061] According to the electronic load 100D of the second embodiment, another zero point is added by the differential element 128. This zero point cancels out the secondary pole, thereby achieving an even faster response.

[0062] Fig. 12 is a waveform diagram showing the measurement results of the response characteristics of the electronic load device 100D of Fig. 10. In the first embodiment, slight ringing remains in the current waveform as shown in Fig. 4. In contrast, in the second embodiment, as shown in Fig. 12, the ringing in the current waveform can be further suppressed.

[0063] The embodiments described using specific terms merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted in the embodiments as long as they do not deviate from the spirit of the present invention as defined in the claims.

[0064] (Addendum) The present specification discloses the following techniques.

[0065] (Item 1) an output terminal to be connected to the output line of the power supply circuit under test; an output transistor having a drain connected to the output terminal; a sense resistor connected between the source of the output transistor and ground; a waveform generator for generating a control signal; a feedback circuit that is Kelvin-connected to the source of the output transistor and controls the gate voltage of the output transistor so that a feedback signal generated at a connected node approaches a target level corresponding to a control signal; An electronic load device comprising:

[0066] (Item 2) Item 1. The electronic load device of item 1, wherein the output transistor is a four-terminal device having a source Kelvin terminal, and the feedback circuit is connected to receive the voltage of the source Kelvin terminal as the feedback signal.

[0067] (Item 3) Item 1: An electronic load device according to item 1, wherein the output transistor is a three-terminal device housed in a small outline transistor (SOT) or transistor outline (TO) package, the sense resistor is connected to a position relatively closer to the tip of the source terminal of the output transistor, and the feedback circuit is connected to receive the voltage at a position relatively closer to the base of the source terminal of the output transistor as the feedback signal.

[0068] (Item 4) 4. The electronic load device according to any one of items 1 to 3, wherein the feedback circuit includes a differential element in a feedback path.

[0069] (Item 5) The feedback circuit comprises: a sense amplifier for amplifying the feedback signal; an error amplifier that receives the output voltage of the sense amplifier and the control signal; 5. The electronic load device according to any one of items 1 to 4, comprising:

[0070] (Item 6) The error amplifier a first operational amplifier whose non-inverting input terminal is grounded; a first capacitor connected between the output terminal and the inverting input terminal of the first operational amplifier; a first resistor having a first terminal receiving the control signal and a second terminal connected to the inverting input terminal of the first operational amplifier; a second resistor connected between the inverting input terminal of the first operational amplifier and the output of the sense amplifier; Item 6. The electronic load device according to item 5, comprising:

[0071] (Item 7) 7. The electronic load device according to claim 6, wherein the error amplifier further includes a differentiation circuit that differentiates the feedback signal.

[0072] (Item 8) 8. The electronic load device according to item 7, wherein the differentiating circuit is arranged in parallel with the second resistor between the inverting input terminal of the first operational amplifier and the output of the sense amplifier, and includes a resistor and a capacitor connected in series.

[0073] (Item 9) The sense amplifier An operational amplifier and a third resistor having a first terminal Kelvin-connected to the source of the output transistor and a second terminal connected to the non-inverting input terminal of the operational amplifier; a fourth resistor having a first end connected to the output terminal of the operational amplifier and a second end connected to the non-inverting input terminal of the operational amplifier; a fifth resistor having a first end connected to the ground and a second end connected to the inverting input terminal of the operational amplifier; a sixth resistor having a first end connected to the ground and a second end connected to the inverting input terminal of the operational amplifier; 9. The electronic load device according to any one of items 5 to 8, comprising: [Explanation of symbols]

[0074] 100 Electronic load device 102 Output transistor 2 Test System 4 Power circuit Rs Sense resistor 110 Waveform Generator 120 Feedback Circuit 122 Sense Amplifier OA11 2nd operational amplifier R11 3rd resistor R12 4th resistor R13 5th Resistance R14 6th Resistance 124 Error Amplifier OA21 1st operational amplifier R21 1st resistor R22 2nd resistor C21 First capacitor 128 Differential Elements

Claims

1. an output terminal to be connected to the output line of the power supply circuit under test; an output transistor having a drain connected to the output terminal; a sense resistor connected between the source of the output transistor and ground; a waveform generator for generating a control signal; a feedback circuit that is Kelvin-connected to the source of the output transistor and controls the gate voltage of the output transistor so that a feedback signal generated at a connected node approaches a target level corresponding to a control signal; An electronic load device comprising:

2. 2. The electronic load of claim 1, wherein the output transistor is a four-terminal device having a source Kelvin terminal, and the feedback circuit is connected to receive the voltage at the source Kelvin terminal as the feedback signal.

3. 2. The electronic load device of claim 1, wherein the output transistor is a three-terminal device housed in a SOT (Small Outline Transistor) or TO (Transistor Outline) package, the sense resistor is connected to a position relatively closer to the tip of the source terminal of the output transistor, and the feedback circuit is connected to receive a voltage at a position relatively closer to the base of the source terminal of the output transistor as the feedback signal.

4. 4. The electronic load according to claim 1, wherein the feedback circuit includes a differential element in a feedback path.

5. The feedback circuit comprises: a sense amplifier for amplifying the feedback signal; an error amplifier that receives the output voltage of the sense amplifier and the control signal; The electronic load device according to claim 1 , further comprising:

6. The error amplifier a first operational amplifier having a non-inverting input terminal grounded; a first capacitor connected between the output terminal and the inverting input terminal of the first operational amplifier; a first resistor having a first end receiving the control signal and a second end connected to the inverting input terminal of the first operational amplifier; a second resistor connected between the inverting input terminal of the first operational amplifier and the output of the sense amplifier; The electronic load of claim 5 , comprising:

7. 7. The electronic load according to claim 6, wherein the error amplifier further includes a differentiating circuit that differentiates the feedback signal.

8. 8. The electronic load device according to claim 7, wherein the differentiating circuit is provided between the inverting input terminal of the first operational amplifier and the output of the sense amplifier, in parallel with the second resistor, and includes a resistor and a capacitor connected in series.

9. The sense amplifier A second operational amplifier; a third resistor having a first terminal Kelvin-connected to the source of the output transistor and a second terminal connected to the non-inverting input terminal of the second operational amplifier; a fourth resistor having a first end connected to the output terminal of the second operational amplifier and a second end connected to the non-inverting input terminal of the second operational amplifier; a fifth resistor having a first end connected to the ground and a second end connected to the inverting input terminal of the second operational amplifier; a sixth resistor having a first end connected to the ground and a second end connected to the inverting input terminal of the second operational amplifier; The electronic load of claim 5 , comprising:

Images