Information processing apparatus and information processing program
By using dual write areas in non-volatile memory to write and then erase log information, the device ensures that error logs are reliably stored, addressing the issue of power loss during erasure operations.
Patent Information
- Application Number
- JP2024039309
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-13
- Publication Date
- 2025-09-29
AI Technical Summary
Information processing devices face the challenge of losing log information related to errors when power is turned off during an erasure operation, preventing the log information from being saved in non-volatile memory.
The device employs two write areas in the non-volatile memory, allowing log information to be written to one area and then erased from the other, ensuring that log information is stored even if power is lost during the erasure process.
This configuration significantly increases the probability of log information being stored in non-volatile memory, ensuring that error logs are retained despite power interruptions.
Smart Images

Figure 2025140125000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an information processing device and an information processing program. [Background technology]
[0002] Patent Document 1 discloses a data processing device having a flash EEPROM capable of erasing data in block units and executing a program stored in the flash EEPROM, characterized in that the data processing device is equipped with: means for duplicating various control information for specifying functions to be executed by the data processing device, and writing the same control information to a first and second erase block of the flash EEPROM; and means for determining which control information of the first or second erase block to use as valid information and reading the control information of the valid block. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 8-30515 Summary of the Invention [Problem to be solved by the invention]
[0004] An example of an information processing device is one that includes a processor and a non-volatile memory having a write area where information can be written and erased, and in which information can be written to the write area after the information written to the write area is erased, and in the event of an error occurring in a functional module, the processor erases the information written to the write area and then writes log information related to the error to the write area.
[0005] In this information processing device, if the power supply to the information processing device is turned off during an erasure operation that erases information written in the write area, the device cannot proceed to a write operation that writes log information related to the error to the write area, and therefore the log information related to the error may not be saved in non-volatile memory.
[0006] The present disclosure aims to increase the probability that log information related to an error will be stored in non-volatile memory when an error occurs in a functional module, compared to when a processor erases the information written to the write area and then writes the log information related to the error to the write area. [Means for solving the problem]
[0007] A first aspect includes a processor and a non-volatile memory having a first write area and a second write area in which information can be written and erased, and in which information can be written to each of the first write area and the second write area after the information written to each of the first write area and the second write area is erased, and when an error occurs in a functional module, the processor executes a write process to write log information related to the error to one of the first write area and the second write area, and then erases the log information written to the other of the first write area and the second write area.
[0008] In the second aspect, in the first aspect, when the error occurs and the erasure of the log information in the first write area has been completed, the processor writes the log information related to the error to the first write area, and then executes the write process to erase the log information written to the second write area.
[0009] In a third aspect, in the second aspect, when the error occurs, if the erasure of log information in the first write area has not been completed, if the erasure of log information in the second write area has been completed, the processor writes the log information related to the error to the second write area and then executes the write process to erase the log information written in the first write area.
[0010] In a fourth aspect, in the third aspect, when the error occurs and the erasure of log information has not been completed in the first write area and the second write area, the processor erases the log information written in one of the first write area and the second write area, then writes log information related to the error in that one area, and then executes the write process to erase the log information written in the other of the first write area and the second write area.
[0011] In a fifth aspect, in the first aspect, when the error occurs, after executing the write process, the processor executes a resolution process to resolve the error based on the log information written to one of the devices, and erases the log information written to the other device if the erasure of the log information has not been completed.
[0012] In a sixth aspect, in the fifth aspect, when the error occurs, if the writing of the log information has not been completed in the first write area and the second write area, the processor does not execute the resolution process, and if the erasure of the log information written in one of the first write area and the second write area has not been completed, the processor erases the log information.
[0013] In a seventh aspect, in the fifth aspect, each of the first write area and the second write area has a first log area into which resolution log information used in the resolution process is written, and a second log area into which other log information is written, and when the error occurs, the processor writes the resolution log information to one of the first log areas, then writes the other log information to one of the second log areas, and then erases the log information written to the other.
[0014] An eighth aspect is an information processing program for causing a computer having a first write area and a second write area in which information can be written and erased, and a non-volatile memory in which information can be written to each of the first write area and the second write area after information written to each of the first write area and the second write area is erased, to execute a write process in which, when an error occurs in a functional module, log information related to the error is written to one of the first write area and the second write area, and then the log information written to the other of the first write area and the second write area is erased. [Effects of the Invention]
[0015] According to the configuration of the first aspect, when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written to the write area and then writes the log information related to the error to the write area.
[0016] According to the configuration of the second aspect, when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written to the first write area and then writes the log information related to the error to the first write area.
[0017] According to the configuration of the third aspect, when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written to the second write area and then writes the log information related to the error to the second write area.
[0018] According to the configuration of the fourth aspect, the probability that log information related to an error will be stored in non-volatile memory is increased compared to when the processor terminates processing without erasing the log information written to the other of the first write area and the second write area.
[0019] According to the configuration of the fifth aspect, when the processor has not completed erasing the log information written to the other of the first write area and the second write area, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor terminates processing without erasing the log information.
[0020] According to the configuration of the sixth aspect, when the processor has not completed erasing the log information written to one of the first write area and the second write area, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor terminates processing without erasing the log information.
[0021] According to the configuration of the seventh aspect, when an error occurs in a functional module, the probability that the resolution log information will be stored in non-volatile memory is increased compared to when the processor writes the resolution log information to either the first write area or the second write area without distinguishing between the resolution log information and other log information.
[0022] According to the configuration of the eighth aspect, when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the information written in one of the first write area and the second write area is erased and then a process is performed to write the log information related to the error to the one of the first write area and the second write area. [Brief explanation of the drawings]
[0023] [Figure 1] 1 is a block diagram illustrating an example of an information processing system according to an embodiment of the present invention. [Figure 2] 1 is a block diagram illustrating an example of a flash memory according to an embodiment of the present invention. [Figure 3] FIG. 2 is an explanatory diagram for explaining status information in the flash memory according to the embodiment. [Figure 4] FIG. 2 is a block diagram showing an example of a functional configuration of a control device according to the present embodiment. [Figure 5] 10 is a flowchart showing an example of the flow of a writing process executed in the control device according to the present embodiment. [Figure 6] 10 is a flowchart showing an example of the flow of a resolution process executed in the control device according to the present embodiment. [Figure 7] FIG. 10 is a diagram illustrating a period during which the resolution process cannot be executed when the image forming apparatus is powered off. [Figure 8] 10 is a flowchart showing an example of the flow of a modified example of a writing process executed in the control device according to the embodiment. [Figure 9] FIG. 10 is a block diagram showing an example of a flash memory according to a modified example. [Figure 10] FIG. 10 is a diagram showing a period during which the resolution process cannot be executed when the image forming apparatus is powered off in a modified example. DETAILED DESCRIPTION OF THE INVENTION
[0024] An example of an embodiment of the present invention will be described below with reference to the drawings.
[0025] <Information Processing System 10> An information processing system 10 according to this embodiment will be described below. Fig. 1 is a block diagram showing an information processing system 10 according to this embodiment.
[0026] The information processing system 10 includes an image forming apparatus 12 and a terminal apparatus 14. As shown in Fig. 1, the image forming apparatus 12 and the terminal apparatus 14 are connected by a communication line 13. The communication line 13 is, for example, a wired or wireless communication line. Specifically, the communication line 13 can be, for example, various networks such as a LAN (Local Area Network) or the Internet.
[0027] The terminal device 14 is capable of issuing execution instructions to the image forming device 12 via the communication line 13 to cause the image forming device 12 to execute various functions.
[0028] <Image forming device 12> The image forming device 12 is a device that forms an image. As an example, the image forming device 12 is a multifunction peripheral that can perform functions such as copying, printing, and scanning. As shown in FIG. 1 , the image forming device 12 includes, as an example, a control device 20, an image reading unit 16, an image forming unit 17, and a user interface 18. The image reading unit 16, the image forming unit 17, and the user interface 18 are examples of functional modules, and constitute a functional module M1 in the image forming device 12.
[0029] The image reading unit 16 is a component (e.g., a scanner) that reads an image of a document. The image reading unit 16 optically reads the image of the document and converts it into a digital signal to generate image data. Note that the image includes text.
[0030] The image forming unit 17 is a component that forms an image on a recording medium such as paper. The image forming unit 17 forms an image on the recording medium by, for example, an electrophotographic method that performs the steps of charging, exposing, developing, transferring, and fixing. Note that the image forming unit 17 may also form an image on the recording medium by another method such as an inkjet method.
[0031] The user interface 18 functions as an input unit through which instructions are input by the user, and also functions as a notification unit that notifies the user of presentation information to be presented.
[0032] The notification unit may be, for example, a display unit that displays the presentation information to notify the user of the presentation information. The display unit may be, for example, a liquid crystal display or an organic EL (Electro Luminescence) display.
[0033] The input unit may be, for example, a resistive or capacitive touch panel integrated with the display unit. The input unit may be configured with input keys (e.g., a keyboard and operation buttons) that are operated by a user. User instructions include instructions to cause the image forming apparatus 12 to perform functions such as copying, printing, and scanning.
[0034] <Control device 20> The control device 20 is an example of an information processing device, and is a device that controls each part of the image forming device 12. The control device 20 has the functions of a computer, and as shown in Fig. 1, has a main CPU (Central Processing Unit) 21, a ROM (Read Only Memory) 22, a RAM (Random Access Memory) 23, an error monitoring CPU 25, a flash memory 26, a communication interface 28, an image reading control unit 36, an image forming control unit 37, and a user interface control unit 38.
[0035] The main CPU 21 , ROM 22 , RAM 23 , error monitoring CPU 25 , flash memory 26 , communication interface 28 , image reading control unit 36 , image formation control unit 37 , and user interface control unit 38 are interconnected by a bus 29 .
[0036] The communication interface 28 is a connection unit for communicating with other devices such as the terminal device 14. Specifically, the communication interface 28 communicates with other devices through the communication line 13 using at least one of a wired and a wireless connection.
[0037] The image reading control unit 36 is a control unit (controller) that controls the operation of the image reading unit 16. The image forming control unit 37 is a control unit (controller) that controls the operation of the image forming unit 17. The user interface control unit 38 is a control unit (controller) that controls the operation of the user interface 18. The image reading control unit 36, the image forming control unit 37, and the user interface control unit 38 are examples of functional modules, and constitute a functional module M1 in the image forming apparatus 12.
[0038] The main CPU 21 and the error monitoring CPU 25 are each a central processing unit that executes various programs including an information processing program. The main CPU 21 is a processor that performs the main part of the control device 20 and controls each part of the image forming device 12.
[0039] The error monitoring CPU 25 is a sub-CPU that takes charge of secondary functions in the control device 20, and is a processor that operates when an error occurs in the functional module M1.
[0040] The ROM 22 stores various programs including an information processing program and various data. The RAM 23 temporarily stores programs or data as a working area. The information processing program may be stored in a storage device provided separately from the ROM 22.
[0041] 2, the flash memory 26 has a first write area 61 and a second write area 62 in which information (including error log information and status information, which will be described later) can be written and erased. After the information written in each of the first write area 61 and the second write area 62 is erased, the flash memory 26 becomes able to write information to each of the first write area 61 and the second write area 62. Therefore, in the flash memory 26, when writing information to the first write area 61 and the second write area 62 in which information has been written, it is necessary to erase the information that has already been written.
[0042] In addition, the flash memory 26 is set in a state where information is erased from the first write area 61 in advance, for example.
[0043] The area size of each of the first write area 61 and the second write area 62 is, for example, one block (64 KB) for a total of two blocks (128 KB). Note that the above area sizes are just an example, and various sizes can be adopted as the area size depending on the amount of information to be written, etc.
[0044] The first write area 61 and the second write area 62 each have a status area 61A, 62A to which status information indicating the processing status in the flash memory 26 is written, and a log area 61B, 62B to which error log information is written. The error log information is log information related to an error that has occurred in the functional module M1.
[0045] In each of the first write area 61 and the second write area 62, for example, the first four bytes are used as status areas 61A and 62A, and the remaining areas are used as log areas 61B and 62B.
[0046] Status areas 61A and 62A store status information indicating the processing status of erasure and writing in flash memory 26. Specifically, as shown in Fig. 3, status information indicating four processing states, "erasure complete," "writing start," "writing complete," and "erasure start," is stored. The status information is used to record the processing status in case the power to image forming apparatus 12, including control device 20, is turned off during processing.
[0047] The setting values (values of "0" or "1") in the status areas 61A, 62A are defined as shown in FIG. 3, for example, and the value of each bit is updated by the error monitoring CPU 25 depending on the processing status of the flash memory 26.
[0048] 3 are merely examples, and other setting values may be used. However, when information is erased from the first write area 61 and the second write area 62, the value of each bit becomes "1" and can only be updated to "0", so the setting values must take this into consideration.
[0049] Furthermore, the operation of erasing information in the flash memory 26 is performed separately for the first write area 61 and the second write area 62. When an erasure operation is performed on the first write area 61, the status information in the status area 61A and the error log information in the log area 61B are erased. When an erasure operation is performed on the second write area 62, the status information in the status area 62A and the error log information in the log area 62B are erased.
[0050] In the control device 20, the error monitoring CPU 25 reads various programs, including an information processing program, from the ROM 22 and executes the programs using the RAM 23 as a work area. The error monitoring CPU 25 executes the information processing program to realize various functions. Below, we will explain the functional configuration realized by the cooperation of the error monitoring CPU 25 as a hardware resource and the information processing program as a software resource. Figure 4 is a block diagram showing an example of the functional configuration of the control device 20 according to this embodiment.
[0051] In the control device 20, the error monitoring CPU 25 executes an information processing program to function as a detection unit 41, a write processing unit 42, and a resolution processing unit 43, as shown in FIG.
[0052] The detection unit 41 is a functional unit that detects an error in the functional module M1 in the image forming device 12. As described above, the functional module M1 corresponds to, for example, the image reading unit 16, the image forming unit 17, the user interface 18, the image reading control unit 36, the image forming control unit 37, and the user interface control unit 38.
[0053] The write processing unit 42 is a functional unit that executes a write process. When an error occurs in the functional module M1, the write processing unit 42 executes a write process to write error log information to one of the first write area 61 and the second write area 62 of the flash memory 26, and then erases the error log information written in the other of the first write area 61 and the second write area 62.
[0054] Specifically, when an error occurs in the functional module M1 and the erasure of the error log information in the first write area 61 has been completed, the write processing unit 42 writes the error log information to the first write area 61 and then erases the error log information written in the second write area 62.
[0055] Furthermore, when an error occurs in the functional module M1, if the erasure of the error log information in the first write area 61 has not been completed, the write processing unit 42 writes the error log information to the second write area 62 and then erases the error log information written in the first write area 61 if the erasure of the error log information in the second write area 62 has been completed.
[0056] Furthermore, if an error occurs in the functional module M1 and the erasure of the error log information has not been completed in the first write area 61 and the second write area 62, the write processing unit 42 erases the error log information written in one of the first write area 61 and the second write area 62, then writes the error log information to that one, and then erases the error log information written in the other of the first write area 61 and the second write area 62.
[0057] The resolution processing unit 43 is a functional unit that executes a resolution process to resolve an error. When an error occurs in the functional module M1, the resolution processing unit 43 executes a resolution process to resolve the error based on the error log information written in one of the first write area 61 and the second write area 62 after the write processing unit 42 executes the write process, and erases the error log information written in the other of the first write area 61 and the second write area 62 if the erasure of the error log information has not been completed.
[0058] When an error occurs in the functional module M1, the resolution processing unit 43 does not execute the resolution processing if the writing of the error log information has not been completed in the first write area 61 and the second write area 62, and erases the error log information if the erasure of the error log information written in either the first write area 61 or the second write area 62 has not been completed.
[0059] In this manner, in this embodiment, the error monitoring CPU 25 functions as an example of a processor that executes the write process and the resolution process.
[0060] <Error handling according to this embodiment> Next, an example of a specific flow of error processing according to this embodiment will be described.
[0061] Error processing is processing executed by the error monitoring CPU 25 when an error occurs in the functional module M1 in the image forming device 12. Specifically, the error processing is processing including a write processing and a resolution processing. Specific flows of the write processing and the resolution processing will be described below.
[0062] <Write process> The write process is a process for writing error log information to the flash memory 26. Fig. 5 is a flowchart showing an example of the flow of the write process executed by the control device 20.
[0063] This process is performed by the error monitoring CPU 25 reading and executing an information processing program from the ROM 22. As an example, this process is started when the error monitoring CPU 25 detects an error in the functional module M1.
[0064] 5, when this process starts, the error monitoring CPU 25 first determines whether the first write area 61 is in an erased state in which the error log information has been erased (step S101). Specifically, the error monitoring CPU 25 determines whether the first write area 61 is in an erased state based on the status information written in the status area 61A. That is, the error monitoring CPU 25 determines that the first write area 61 is in an erased state if information indicating a state of "erasure completed" is written as the status information, and determines that the first write area 61 is not in an erased state if information indicating a state other than "erasure completed" is written.
[0065] If the error monitoring CPU 25 determines that the first write area 61 is in an erased state (step S101: YES), it proceeds to step S102, and if it determines that the first write area 61 is not in an erased state (step S101: NO), it proceeds to step S110.
[0066] In step S102, the error monitoring CPU 25 updates the status information in the first write area 61 to information indicating "writing started." Next, the error monitoring CPU 25 writes error log information to the first write area 61 (step S103), and updates the status information in the first write area 61 to information indicating "writing completed" (step S104).
[0067] Next, the error monitoring CPU 25 updates the status information of the second write area 62 to information indicating "erasure started" (step S105), erases the error log information of the second write area 62 (step S106), updates the status information of the second write area 62 to information indicating "erasure completed" (step S107), and terminates this processing.
[0068] In step S110, the error monitoring CPU 25 determines whether the second write area 62 is in an erased state in which the error log information has been erased. Specifically, the error monitoring CPU 25 determines whether the second write area 62 is in an erased state based on the status information written in the status area 62A. That is, the error monitoring CPU 25 determines that the second write area 62 is in an erased state if information indicating an "erasure completed" state is written as the status information, and determines that the second write area 62 is not in an erased state if information indicating a state other than "erasure completed" is written.
[0069] If the error monitoring CPU 25 determines that the second write area 62 is in an erased state (step S110: YES), it proceeds to step S112, and if it determines that the second write area 62 is not in an erased state (step S110: NO), it proceeds to step S120.
[0070] In step S112, the error monitoring CPU 25 updates the status information in the second write area 62 to information indicating "writing started." Next, the error monitoring CPU 25 writes error log information to the second write area 62 (step S113), and updates the status information in the second write area 62 to information indicating "writing completed" (step S114).
[0071] Next, the error monitoring CPU 25 updates the status information in the first write area 61 to information indicating "erasure started" (step S115), erases the error log information in the first write area 61 (step S116), updates the status information in the first write area 61 to information indicating "erasure completed" (step S117), and terminates this process.
[0072] In step S120, the error monitoring CPU 25 updates the status information in the second write area 62 to information indicating "erasure started." Next, the error monitoring CPU 25 erases the error log information in the second write area 62 (step S121), updates the status information in the second write area 62 to information indicating "erasure completed" (step S122), and proceeds to step S112.
[0073] <Resolution process> The resolution process is a process for resolving an error. Fig. 6 is a flowchart showing an example of the flow of the resolution process executed by the control device 20. Note that this process allows the image forming device 12 to recover from the error, so this process can also be called recovery processing.
[0074] This process is performed by the error monitoring CPU 25 reading and executing an information processing program from the ROM 22. As an example, this process is started after the error monitoring CPU 25 has executed the write process.
[0075] 6, when starting this process, the error monitoring CPU 25 first determines whether the first write area 61 is in a write state in which error log information has been written (step S201). Specifically, the error monitoring CPU 25 determines whether the first write area 61 is in a write state based on the status information written in the status area 61A. That is, the error monitoring CPU 25 determines that the first write area 61 is in a write state when information indicating a "write complete" state has been written as the status information, and determines that the first write area 61 is not in a write state when information indicating a state other than "write complete" has been written.
[0076] If the error monitoring CPU 25 determines that the first write area 61 is in a write state (step S201: YES), it proceeds to step S202, and if it determines that the first write area 61 is not in a write state (step S201: NO), it proceeds to step S210.
[0077] In step S202, the error monitoring CPU 25 executes a resolution process based on the error log information written to the first write area 61. In the resolution process, a so-called fallback (degenerate operation) is executed. Specifically, in this embodiment, the resolution process is executed by restarting the image forming apparatus 12 while stopping at least some of the functions of the functional module M1 in which the error occurred.
[0078] Next, the error monitoring CPU 25 determines whether the second write area 62 is in an erased state in which the error log information has been erased (step S203). Specifically, the error monitoring CPU 25 determines whether the second write area 62 is in an erased state based on the status information written in the status area 62A. That is, the error monitoring CPU 25 determines that the second write area 62 is in an erased state when information indicating a state of "erasure completed" is written as the status information, and determines that the second write area 62 is not in an erased state when information indicating a state other than "erasure completed" is written.
[0079] If the error monitoring CPU 25 determines that the second write area 62 is in an erased state (step S203: YES), it terminates this processing, and if it determines that the second write area 62 is not in an erased state (step S203: NO), it proceeds to step S204.
[0080] In step S204, the error monitoring CPU 25 updates the status information in the second write area 62 to information indicating "erasure started." Next, the error monitoring CPU 25 erases the error log information in the second write area 62 (step S205), updates the status information in the second write area 62 to information indicating "erasure completed" (step S206), and ends this process.
[0081] In step S210, the error monitoring CPU 25 determines whether the second write area 62 is in a write state in which error log information has been written. Specifically, the error monitoring CPU 25 determines whether the second write area 62 is in a write state based on the status information written in the status area 62A. That is, the error monitoring CPU 25 determines that the second write area 62 is in a write state when information indicating a "write completed" state has been written as the status information, and determines that the second write area 62 is not in a write state when information indicating a state other than "write completed" has been written.
[0082] If the error monitoring CPU 25 determines that the second write area 62 is in a write state (step S210: YES), it proceeds to step S212, and if it determines that the second write area 62 is not in a write state (step S210: NO), it proceeds to step S213.
[0083] In step S212, the error monitoring CPU 25 executes a resolution process based on the error log information written to the second write area 62. In the resolution process, a so-called fallback (degenerate operation) is executed. Specifically, in this embodiment, the resolution process is executed by restarting the image forming apparatus 12 while stopping at least some of the functions of the functional module M1 in which the error occurred.
[0084] Next, the error monitoring CPU 25 determines whether the first write area 61 is in an erased state in which the error log information has been erased (step S213). Specifically, the error monitoring CPU 25 determines whether the first write area 61 is in an erased state based on the status information written in the status area 61A. That is, the error monitoring CPU 25 determines that the first write area 61 is in an erased state when information indicating a state of "erasure completed" is written as the status information, and determines that the first write area 61 is not in an erased state when information indicating a state other than "erasure completed" is written.
[0085] If the error monitoring CPU 25 determines that the first write area 61 is in an erased state (step S213: YES), it terminates this process, and if it determines that the first write area 61 is not in an erased state (step S213: NO), it proceeds to step S214.
[0086] In step S214, the error monitoring CPU 25 updates the status information in the first write area 61 to information indicating "erasure started." Next, the error monitoring CPU 25 erases the error log information in the first write area 61 (step S215), updates the status information in the first write area 61 to information indicating "erasure completed" (step S216), and ends this process.
[0087] <Actions according to this embodiment> Next, the operation of this embodiment will be described.
[0088] In this embodiment, when an error occurs in the functional module M1, the error monitoring CPU 25 writes the error log information to one of the first write area 61 and the second write area 62 of the flash memory 26 (steps S102 to S104 or steps S112 to S114), and then executes a write process to erase the error log information written to the other of the first write area 61 and the second write area 62 (steps S105 to S107 or steps S115 to S117).
[0089] Here, the write process may be a process (hereinafter referred to as process A) in which information written in the write area of the flash memory 26 is first erased, and then error log information is written in the write area.
[0090] In process A, if the power supply of the image forming device 12 is turned off during the erasure operation for erasing the information written in the write area, the error log information may not be saved in the flash memory 26 because the image forming device 12 cannot proceed to the write operation for writing the error log information in the write area.
[0091] 7A, in process A, if the power supply of image forming apparatus 12 is turned off during the erase operation and write operation, the error log information is not stored in flash memory 26, and the resolution process for resolving the error based on the error log information cannot be executed. That is, in process A, if the power supply of image forming apparatus 12 is turned off, the period during which the resolution process cannot be executed is during the erase operation and write operation.
[0092] In contrast, in the write process of this embodiment, as described above, the error log information is written to one of the first write area 61 and the second write area 62 of the flash memory 26, and then the error log information written to the other of the first write area 61 and the second write area 62 is erased.Therefore, even if the power of the image forming device 12 is turned off during the erasure operation, the error log information remains stored in the flash memory 26.
[0093] 7B, when the image forming apparatus 12 is turned off, the only period during which the resolution process cannot be executed is during the write operation. Therefore, according to this embodiment, the probability that the error log information will be stored in the flash memory 26 is increased compared to process A.
[0094] If a large amount of information has been written to the flash memory 26, the operation period of the erase operation becomes longer, and for example, the ratio of the operation period of the erase operation to the operation period of the write operation may become 9:1. In this case, the effect of increasing the probability that error log information will be stored in the flash memory 26 is particularly significant.
[0095] In addition, in this embodiment, if the erasure of the error log information in the first write area 61 has been completed (step S101: YES), the error monitoring CPU 25 writes the error log information to the first write area 61 (steps S102 to S104) and then erases the error log information written to the second write area 62 (steps S105 to S107).
[0096] Therefore, when an error occurs in functional module M1, the probability that the error log information will be stored in flash memory 26 is increased compared to when error monitoring CPU 25 erases the information written in first write area 61 and then writes the error log information to first write area 61.
[0097] In addition, in this embodiment, when an error occurs in the functional module M1, if the erasure of the error log information in the first write area 61 has not been completed (step S101: NO), or if the erasure of the error log information in the second write area 62 has been completed (step S110: YES), the error monitoring CPU 25 writes the error log information to the second write area 62 (steps S112 to S114) and then erases the error log information written in the first write area 61 (steps S115 to S117).
[0098] Therefore, when an error occurs in the functional module M1, the probability that the error log information will be stored in the flash memory 26 is increased compared to when the error monitoring CPU 25 erases the information written in the second write area 62 and then writes the error log information to the second write area 62.
[0099] Furthermore, in this embodiment, when an error occurs in the functional module M1 and the erasure of the error log information has not been completed in the first write area 61 and the second write area 62 (step S110: NO), the error monitoring CPU 25 erases the error log information written in the second write area 62 (steps S120 to S122), then writes the error log information related to the error in the second write area 62 (steps S112 to S114), and then erases the error log information written in the first write area 61 (steps S115 to S117).
[0100] Therefore, compared to when the error monitoring CPU 25 terminates processing without erasing the error log information written in the first write area 61, the probability that the error log information will be stored in the flash memory 26 is increased because the error log information can be written when the next error occurs.
[0101] In addition, in this embodiment, when an error occurs in the functional module M1, after executing the write process, the error monitoring CPU 25 executes a resolution process to resolve the error based on the error log information written to one of the first write area 61 and the second write area 62 (step S202 or step S212), and if the erasure of the error log information written to the other of the first write area 61 and the second write area 62 has not been completed (step S203: NO or step S213: NO), it erases the error log information (steps S204 to S206 or steps S214 to S216).
[0102] Therefore, when the error monitoring CPU 25 has not completed erasing the error log information written to the other of the first write area 61 and the second write area 62, the probability that the error log information will be stored in the flash memory 26 is increased because the error log information can be written when the next error occurs, compared to when the error monitoring CPU 25 terminates processing without erasing the error log information.
[0103] Furthermore, in this embodiment, when an error occurs in the functional module M1, if the writing of the error log information in the first write area 61 and the second write area 62 has not been completed (step S210: NO), the error monitoring CPU 25 does not execute a resolution process, and if the erasure of the error log information written in the first write area 61 has not been completed (step S213: NO), the error monitoring CPU 25 erases the error log information (steps S214 to S216).
[0104] Therefore, when the error monitoring CPU 25 has not yet completed erasing the error log information written to the first write area 61, the probability that the error log information will be stored in the flash memory 26 is increased because the error log information can be written when the next error occurs, compared to when the error monitoring CPU 25 terminates processing without erasing the error log information.
[0105] <Modification of the writing process> As shown in FIG. 8, the error monitoring CPU 25 may execute steps S130 to S132 instead of steps S120 to S122.
[0106] If the error monitoring CPU 25 determines that the second write area 62 is not in the erased state (step S110: NO), then in step S130, it updates the status information of the first write area 61 to information indicating "erasure started." Next, the error monitoring CPU 25 erases the error log information of the first write area 61 (step S131), updates the status information of the first write area 61 to information indicating "erasure completed" (step S132), and proceeds to step S102.
[0107] <Modification of the cancellation process> When it is determined that the second write area 62 is not in the erased state (step S203: NO), the error monitoring CPU 25 may execute steps S214 to S216 instead of steps S204 to S206.
[0108] Furthermore, when it is determined that the first write area 61 is not in the erased state (step S213: NO), the error monitoring CPU 25 may execute steps S204 to S206 instead of steps S214 to S216.
[0109] <Modification of flash memory 26> 9, each of the first write area 61 and the second write area 62 of the flash memory 26 may have a first log area 61C, 62C to which resolution log information used in the resolution process is written, and a second log area 61D, 62D to which other log information is written. Specifically, the first write area 61 has a first log area 61C and a second log area 61D instead of the log area 61B. The second write area 62 has a first log area 62C and a second log area 62D instead of the log area 62B.
[0110] In this case, when an error occurs in the functional module M1, the error monitoring CPU 25 writes resolution log information to one of the first write area 61 and the second write area 62, the first log area 61C, 62C, in the write process, then writes other log information to the other of the second log areas 61D, 62D, and then erases the log information written to the other of the first write area 61 and the second write area 62.
[0111] In this modified example, even if the image forming apparatus 12 is powered off during the write operation of writing other log information to the second log areas 61D and 62D, the resolution log information remains saved in the flash memory 26.
[0112] 10, when the image forming apparatus 12 is powered off, the only time the resolution process cannot be executed is when the resolution log information is being written. Therefore, according to this modification, when an error occurs in the functional module M1, the probability that the resolution log information will be stored in the flash memory 26 is increased compared to when the error monitoring CPU 25 writes the resolution log information to either the first write area 61 or the second write area 62 without distinguishing between the resolution log information and other log information.
[0113] In the above-described embodiment, the first write area 61 and the second write area 62 are provided in the flash memory 26, but this is not limiting. For example, the first write area 61 and the second write area 62 may be provided in different flash memories.
[0114] Furthermore, the flash memory 26 may have a variable write area for writing log information depending on the type of error in the functional module M1, or the write area may be divided.
[0115] The write area may also be divided for one or more functional modules M1. In this case, the functional module M1 can be configured to write log information to the write area in descending order of priority for executing the resolution process. This increases the probability that log information will be stored in the flash memory 26 in descending order of priority.
[0116] <Other variations> In the present embodiment, the control device 20 has been described as an example of an information processing device, but the image forming device 12 may also be understood as an example of an information processing device.
[0117] Furthermore, in the present embodiment, the error monitoring CPU 25 functions as an example of a processor that executes the write process and the resolution process, but the main CPU 21 and other CPUs may also function as examples of such processors.
[0118] Furthermore, in the above embodiments, the term "processor" refers to a processor in a broad sense, and includes general-purpose processors (e.g., the aforementioned CPU, etc.) and dedicated processors (e.g., GPU: Graphics Processing Unit, ASIC: Application Specific Integrated Circuit, FPGA: Field Programmable Gate Array, programmable logic device, etc.).
[0119] Furthermore, the operations of the processors in the above embodiments may not only be performed by a single processor, but may also be performed by multiple processors located at physically separate locations working together. Furthermore, the order of the operations of the processors is not limited to the order described in the above embodiments, and may be changed as appropriate.
[0120] Furthermore, in this embodiment, the information processing system 10 is not limited to being configured by multiple devices, but may be configured by a single device. That is, the "system" in this embodiment may be configured by multiple devices or may be configured by a single device.
[0121] The present invention is not limited to the above-described embodiment, and various modifications, changes, and improvements are possible without departing from the spirit of the present invention. For example, the above-described modified examples may be appropriately combined to form a configuration.
[0122] <Additional Notes> (((1))) a processor; a nonvolatile memory having a first write area and a second write area in which information can be written and erased, and in which information can be written to each of the first write area and the second write area after the information written to each of the first write area and the second write area is erased; Equipped with The processor: If an error occurs in a function module, After writing the log information relating to the error into one of the first write area and the second write area, a write process is executed to erase the log information written into the other of the first write area and the second write area. Information processing device.
[0123] (((2))) The processor: When the error occurs and erasure of the log information in the first write area is completed, the log information relating to the error is written in the first write area, and then the write process is executed to erase the log information written in the second write area. The information processing device according to (((1))).
[0124] (((3))) The processor: When the error occurs and erasure of the log information in the first write area is not completed, if erasure of the log information in the second write area is completed, the log information relating to the error is written in the second write area, and then the write process is executed to erase the log information written in the first write area. The information processing device according to (((2))).
[0125] (((4))) The processor: When the error occurs and erasure of the log information in the first write area and the second write area is not completed, the log information written in one of the first write area and the second write area is erased, and then the log information relating to the error is written in the one of the first write area and the second write area, and then the write process is executed to erase the log information written in the other of the first write area and the second write area. The information processing device according to (((3))).
[0126] (((5))) The processor: When the error occurs, after the write process is executed, a resolution process is executed to resolve the error based on the log information written in the one of the two devices; If the erasure of the log information written to the other device is not completed, the log information is erased. The information processing device according to any one of (((1))) to (((4))).
[0127] (((6))) The processor: When the error occurs, if the writing of the log information in the first write area and the second write area is not completed, the error resolution process is not executed, If the erasure of the log information written in one of the first write area and the second write area is not completed, the log information is erased. The information processing device according to (((5))).
[0128] (((7))) Each of the first write area and the second write area is a first log area in which resolution log information used in the resolution process is written, and a second log area in which other log information is written, The processor: When the error occurs, the log information for resolution is written to the first log area of one of the devices, and then the other log information is written to the second log area of one of the devices, and then the log information written to the other device is erased. The information processing device according to (((5))) or (((6))).
[0129] (((8))) a nonvolatile memory having a first write area and a second write area in which information can be written and erased, and in which information can be written to each of the first write area and the second write area after the information written to each of the first write area and the second write area is erased; For a computer comprising: and when an error occurs in a functional module, executing a write process for writing log information relating to the error into one of the first write area and the second write area and then erasing the log information written into the other of the first write area and the second write area. Information processing program.
[0130] According to the configuration (((1))), when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written in the write area and then writes the log information related to the error to the write area.
[0131] According to the configuration (((2))), when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written in the first write area and then writes the log information related to the error to the first write area.
[0132] According to the configuration (((3))), when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor erases the information written in the second write area and then writes the log information related to the error to the second write area.
[0133] According to the configuration (((4))), the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the processor terminates processing without erasing the log information written to the other of the first write area and the second write area.
[0134] According to the configuration (((5))), when the processor has not completed erasing the log information written to the other of the first write area and the second write area, the probability that the log information relating to the error will be stored in the non-volatile memory is increased compared to when the processor terminates processing without erasing the log information.
[0135] According to the configuration (((6))), when the processor has not completed erasing the log information written to either the first write area or the second write area, the probability that the log information relating to the error will be stored in the non-volatile memory is increased compared to when the processor terminates processing without erasing the log information.
[0136] According to the configuration (((7))), when an error occurs in a functional module, the probability that the resolution log information will be stored in the non-volatile memory is increased compared to when the processor writes the resolution log information to either the first write area or the second write area without distinguishing between the resolution log information and other log information.
[0137] According to the configuration (((8))), when an error occurs in a functional module, the probability that the log information related to the error will be stored in the non-volatile memory is increased compared to when the information written in one of the first write area and the second write area is erased and then a process is executed to write the log information related to the error to the one of the first write area and the second write area. [Explanation of symbols]
[0138] 16 Image reading unit (an example of a functional module) 17 Image forming unit (an example of a functional module) 18 User Interface (Example of a Functional Module) 20 Control device (an example of an information processing device) 25 Error monitoring CPU (an example of a processor) 26 Flash memory (an example of non-volatile memory) 36 Image reading control unit (an example of a functional module) 37 Image formation control unit (an example of a functional module) 38 User interface control unit (an example of a functional module) 61 First write area 61C First Log Area 61D Second Log Area 62 Second write area 62C First log area 62D Second log area
Claims
1. a processor; a nonvolatile memory having a first write area and a second write area in which information can be written and erased, and in which information can be written to each of the first write area and the second write area after the information written to each of the first write area and the second write area is erased; Equipped with The processor: If an error occurs in a function module, After writing the log information relating to the error into one of the first write area and the second write area, a write process is executed to erase the log information written into the other of the first write area and the second write area. Information processing device.
2. The processor: When the error occurs and erasure of the log information in the first write area is completed, the log information relating to the error is written in the first write area, and then the write process is executed to erase the log information written in the second write area. The information processing device according to claim 1 .
3. The processor: When the error occurs and erasure of the log information in the first write area is not completed, if erasure of the log information in the second write area is completed, the log information relating to the error is written in the second write area, and then the write process is executed to erase the log information written in the first write area. The information processing device according to claim 2 .
4. The processor: When the error occurs and erasure of the log information in the first write area and the second write area is not completed, the log information written in one of the first write area and the second write area is erased, and then the log information relating to the error is written in the one of the first write area and the second write area, and then the write process is executed to erase the log information written in the other of the first write area and the second write area. The information processing device according to claim 3 .
5. The processor: When the error occurs, after the write process is executed, a resolution process is executed to resolve the error based on the log information written in the one of the two devices; If the erasure of the log information written to the other device is not completed, the log information is erased. The information processing device according to claim 1 .
6. The processor: When the error occurs, if the writing of the log information in the first write area and the second write area is not completed, the error resolution process is not executed, If the erasure of the log information written in one of the first write area and the second write area is not completed, the log information is erased. The information processing device according to claim 5 .
7. Each of the first write area and the second write area is a first log area in which resolution log information used in the resolution process is written, and a second log area in which other log information is written, The processor: When the error occurs, the log information for resolution is written to the first log area of one of the devices, and then the other log information is written to the second log area of one of the devices, and then the log information written to the other device is erased. The information processing device according to claim 5 .
8. a nonvolatile memory having a first write area and a second write area in which information can be written and erased, and in which information can be written to each of the first write area and the second write area after the information written to each of the first write area and the second write area is erased; For a computer comprising: and when an error occurs in a functional module, executing a write process for writing log information relating to the error into one of the first write area and the second write area and then erasing the log information written into the other of the first write area and the second write area. Information processing program.
Citation Information
Patent Citations
Data processor using flash eeprom
JP1996030515A