Semiconductor integrated circuit

Abstract

To provide a semiconductor integrated circuit capable of suppressing signal degradation.SOLUTION: The semiconductor integrated circuit includes a plurality of circuit blocks, a plurality of branch paths that diverge from a single path and each pass through at least one of the plurality of circuit blocks, a detection circuit that detects variations in power supply voltage applied to each of the plurality of circuit blocks, and a control circuit that selects, from among the plurality of branch paths, the branch path that passes through the circuit block with the smallest variation in power supply voltage.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor integrated circuit. [Background technology]

[0002] Conventionally, there are semiconductor integrated circuits formed by integrating semiconductor elements such as transistors on a substrate. For example, Patent Document 1 describes an example of such a semiconductor integrated circuit, a semiconductor device that suppresses changes in driving capability due to changes in temperature or voltage. This semiconductor device includes a detection circuit that outputs a predetermined signal in response to temperature or voltage, a plurality of output circuits each having different characteristics, and a switching circuit that generates a signal for switching the output circuit in response to the output signal of the detection circuit.

[0003] Patent Document 2 describes a semiconductor integrated circuit that can avoid malfunctions caused by undesired voltage drops after semiconductor chip manufacturing. This semiconductor integrated circuit includes multiple circuit blocks, first and second power supply wiring that supplies power to the multiple circuit blocks, and switching means that can change the power supply from the first power supply wiring to the power supply from the second power supply wiring. When a voltage drop occurs in a circuit block, the semiconductor integrated circuit changes the power supply from the first power supply wiring to the power supply from the second power supply wiring. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 7-249739 [Patent Document 2] Patent No. 4364556 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the semiconductor device of Patent Document 1 and the semiconductor integrated circuit of Patent Document 2, when power supply noise occurs due to voltage fluctuations in the power supply, this power supply noise may degrade signals.

[0006] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a semiconductor integrated circuit capable of suppressing signal degradation. [Means for solving the problem]

[0007] According to one disclosure of this specification, there is provided a semiconductor integrated circuit including a plurality of circuit blocks, a plurality of branch paths branching from a single path and each passing through at least one of the plurality of circuit blocks, a detection circuit that detects fluctuations in power supply voltage applied to each of the plurality of circuit blocks, and a control circuit that selects, from the plurality of branch paths, the branch path that passes through the circuit block with the smallest fluctuation in the power supply voltage. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a semiconductor integrated circuit that can suppress signal degradation. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a block diagram of a semiconductor integrated circuit according to a first embodiment. [Figure 2] FIG. 2 is a circuit diagram of a detection circuit according to the first embodiment. [Figure 3] FIG. 4 is a diagram showing an example of voltage values ​​applied to each circuit block according to the first embodiment. [Figure 4] 4 is a flowchart showing the operation of the semiconductor integrated circuit according to the first embodiment. [Figure 5] FIG. 10 is a block diagram of a semiconductor integrated circuit according to a second embodiment. [Figure 6] FIG. 10 is a circuit diagram of a gating circuit according to a second embodiment. [Figure 7] 10 is a flowchart showing the operation of the semiconductor integrated circuit according to the second embodiment. [Figure 8] FIG. 10 is a block diagram of a device according to a third embodiment. [Figure 9] FIG. 10 is a block diagram of a device according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] [First embodiment] FIG. 1 is a block diagram of a semiconductor integrated circuit according to this embodiment.

[0011] In FIG. 1, the semiconductor integrated circuit 1 includes a substrate 10, a plurality of circuit blocks B1 to B5, a path L, a signal output circuit 20, a plurality of detection circuits 30, a control circuit 40, a switching circuit 50, a signal input circuit 60, and power supplies 81 to 83.

[0012] The substrate 10 is preferably made of a semiconductor material such as silicon, but may be made of an insulating material such as glass. The signal output circuit 20 can output digital signals such as clock signals and video signals, but may also output analog signals.

[0013] Circuit blocks B1 to B5 are circuits that process signals output from signal output circuit 20, and each may be composed of various semiconductor elements. Circuit blocks B1 to B5 are divided by circuit function and arranged on substrate 10. Circuit blocks B1 to B3 are further grouped together and arranged as circuit block group B0. Power supply voltage is supplied to circuit block group B0, circuit blocks B4, and B5 from independent power sources via power supply wiring. Power is supplied to circuit blocks B1 to B3 of circuit block group B0 from power supply 81, power is supplied to circuit block B4 from power supply 82, and power is supplied to circuit block B5 from power supply 83. This configuration makes circuit block group B0 and circuit blocks B4 and B5 less susceptible to fluctuations in power supply voltage.

[0014] The circuit blocks B1 to B3 are arranged closer to the signal output circuit 20 than the circuit blocks B4 and B5, i.e., upstream of the branch paths L1 to L3. The circuit blocks B1 to B3 are arranged side by side in an intersecting direction that intersects with the direction in which the branch paths L1 to L3 extend. The circuit blocks B4 and B5 are arranged closer to the signal input circuit 60 than the circuit blocks B1 to B3, i.e., downstream of the branch paths L1 and L3.

[0015] The branch paths L1, L2, and L3 and the single paths La and Lb are made of a conductive material such as aluminum or copper. The single path La is connected to the output node of the signal output circuit 20, and this path La branches into three branch paths L1 to L3 at a branch point G. The branch path L1 extends to the switching circuit 50 via circuit blocks B1 and B4. The branch path L2 extends to the switching circuit 50 via circuit block B2, and the branch path L3 extends to the switching circuit 50 via circuit blocks B3 and B5.

[0016] The single path Lb has one end connected to the switching circuit 50 and the other end connected to the signal input circuit 60. The path Lb transmits the signal output from the switching circuit 50 to the signal input circuit 60.

[0017] The detection circuit 30 can detect fluctuations in the power supply voltage of each of the circuit blocks B1 to B5, for example, voltage drops. The detection circuit 30 can include a comparator that compares with a threshold voltage (reference voltage), as will be described later.

[0018] Based on the detection signal from the detection circuit 30, the control circuit 40 selects, from among the multiple branch paths L1 to L3, a branch path that passes through a circuit block with the smallest fluctuation in power supply voltage (amount of drop in power supply voltage), and outputs a selection signal indicating the selection result to the switching circuit 50. The control circuit 40 outputs a switching signal Sg to a resistance switching circuit R1, which will be described later, and the control circuit 40 can detect the threshold voltage when the detection signal is inverted as the power supply voltage.

[0019] The switching circuit 50 electrically connects one of the branch paths L1 to L3 to the signal input circuit 60 via a path Lb based on a selection signal from the control circuit 40. The switching circuit 50 does not electrically connect the branch path that is not selected from the signal input circuit 60. The signal output from the signal output circuit 20 is output to the signal input circuit 60 via the selected branch path.

[0020] The signal input circuit 60 is a circuit that receives the signal output from the signal output circuit 20. The signal input circuit 60 is electrically connected to the signal output circuit 20 via a branch path selected by the switching circuit 50.

[0021] FIG. 2 shows an example of a detection circuit 30. The detection circuit 30 includes a comparator 31, a resistor switching circuit R1, and a resistor R2. The comparator 31 is composed of a differential amplifier circuit or the like, and the non-inverting input terminal of the comparator 31 is connected to a power supply line W2. The power supply line W2 represents a power supply line included in each of the above-mentioned circuit blocks B, and the power supply voltage of the power supply line W2 may fluctuate depending on the operation of the circuit block B. The inverting input terminal of the comparator 31 is connected to the power supply line W1 via a resistor switching circuit R1. A reference power supply voltage is applied to the power supply line W1. For example, the power supply voltage of the power supply line W1 may be the same as the power supply voltage of the power supply line W2. In this case, the power supply lines W1 and W2 may be supplied with a power supply voltage from a common power source. However, it is desirable to arrange the power supply lines W1 and W2 separately from each other so that the power supply voltage of the power supply line W1 is not affected by fluctuations in the power supply voltage of the power supply line W2.

[0022] The resistance switching circuit R1 includes a plurality of resistance elements and a multiplexer that switches among the plurality of resistance elements. The multiplexer can change the resistance value of the resistance switching circuit R1 by switching among the resistance elements in response to a switching signal Sg output from the control circuit 40. A voltage divided by the resistance switching circuit R1 and resistor R2 is applied to the inverting input terminal of the comparator 31 as a threshold voltage. The greater the number of resistance value steps that can be changed in the resistance switching circuit R1, the more accurately the threshold voltage can be detected.

[0023] The comparator 31 compares the threshold voltage with the power supply voltage and outputs a high-level or low-level signal to the control circuit 40. If the power supply voltage is equal to or greater than the threshold voltage (power supply voltage ≥ threshold voltage), the comparator 31 outputs a high-level signal. On the other hand, if the power supply voltage is lower than the threshold voltage (power supply voltage < threshold voltage), the comparator 31 outputs a low-level signal. The initial value of the threshold voltage is set to 0.8 V, for example. If the power supply voltage of a selected branch path becomes lower than the threshold voltage of 0.8 V, the control circuit 40 can start a selection operation. The control circuit 40 detects the threshold voltage when the output signal is inverted as the power supply voltage by changing the threshold voltage from a minimum value to a maximum value.

[0024] Next, the operation of the semiconductor integrated circuit 1 will be described. Fig. 3 shows the power supply voltages detected in the circuit blocks B1 to B5 of the semiconductor integrated circuit 1 according to this embodiment for each of the branch paths L1 to L3. For example, Fig. 3 shows the power supply voltages of the circuit blocks B1 and B4 in the branch path L1, the circuit block B2 in the branch path L2, and the circuit blocks B3 and B5 in the branch path L3. The threshold voltage shown in the upper part of Fig. 3 indicates the initial value (0.8V) of the threshold voltage of the detection circuit 30. As will be described later, the initial value of the threshold voltage can be used to determine whether or not a power supply voltage drop has occurred prior to detecting the power supply voltage.

[0025] 4 is a flowchart showing the operation of the semiconductor integrated circuit 1 according to this embodiment. The operation of the semiconductor integrated circuit 1 will be described below with reference to FIG.

[0026] Assume that the control circuit 40 selects the branch path L1 when the semiconductor integrated circuit 1 starts operating. First, in step S1, the detection circuit 30 compares the power supply voltage of either one of the circuit blocks B1 or B4 in the selected branch path L1 with the initial threshold voltage (0.8V). If the power supply voltages of all the circuit blocks B1 and B4 in the selected branch path L1 are equal to or higher than the initial threshold voltage (NO in step S2), the control circuit 40 continues to select the branch path L1 (steps S1 to S2). On the other hand, if the power supply voltage of either one of the circuit blocks B1 or B4 in the selected branch path L1 becomes lower than the initial threshold voltage (YES in step S2), the semiconductor integrated circuit 1 executes the selection process from step S3 onward. For example, in FIG. 3, the power supply voltage (0.9V) of the circuit block B1 is equal to or higher than the initial threshold voltage (0.8V), but the power supply voltage (0.7V) of the circuit block B4 is lower than the initial threshold voltage (0.8V). In this way, when the power supply voltage in any of the multiple circuit blocks B1, B4 in one branch path L1 falls below the threshold, the control circuit 40 determines that a fluctuation in the power supply voltage has occurred in the branch path L1 and starts a selection operation.

[0027] In step S3, the control circuit 40 compares the power supply voltage and the initial value of the threshold voltage for each of the other branch paths L2 and L3. That is, the control circuit 40 compares the power supply voltage and the initial value of the threshold voltage for each of the circuit blocks B2 of branch path L2 and B3 and B5 of branch path L3. If the power supply voltages for all branch paths L1 to L3 are lower than the initial value of the threshold voltage (YES in step S4), the control circuit 40 selects the branch path with the smallest fluctuation in power supply voltage among all branch paths, including the selected branch path L1 (step S5). Here, the power supply voltage can be detected by the detection circuit 30 varying the threshold voltage from a minimum value to a maximum value. That is, the control circuit 40 can detect the threshold voltage when the output signal of the comparator 31 is inverted as the power supply voltage.

[0028] On the other hand, if there is a branch path whose power supply voltage is equal to or greater than the initial threshold voltage (NO in step S4), the control circuit 40 performs the following process. That is, the control circuit 40 selects the branch path with the smallest fluctuation in power supply voltage from among the other branch paths, excluding the selected branch path L1 and branch paths whose power supply voltage is lower than the initial threshold voltage (step S6). For example, as shown in FIG. 3, in branch path L3, the power supply voltage (0.9 V) of circuit block B3 is equal to or greater than the initial threshold voltage (0.8 V), but is lower than the power supply voltage (0.65 V) of circuit block B5 (0.8 V). Therefore, excluding branch path L3 and the selected branch path L1, the branch path with the smallest fluctuation in power supply voltage is selected. In this case, the only branch path excluding branch paths L1 and L3 is branch path L2, so branch path L2 is selected.

[0029] Next, the control circuit 40 outputs route information indicating the selected branch route to the switching circuit 50 (step S7). Here, the control circuit 40 outputs route information indicating the selected branch route L2 to the switching circuit 50.

[0030] Next, the switching circuit 50 selects a branch path based on the path information (step S8). Here, the switching circuit 50 switches the branch path from the currently selected branch path L1 to branch path L2, and the signal is output to the signal input circuit 60 via branch path L2. Thereafter, the semiconductor integrated circuit 1 returns to the processing of step S1, and repeatedly executes the processing of steps S1 to S8. Note that the loop of steps S1 to S8 may be executed continuously, or may be executed at predetermined intervals.

[0031] As described above, according to the semiconductor integrated circuit of this embodiment, when a fluctuation in the power supply voltage occurs in a circuit block, signal degradation caused by the fluctuation in the power supply voltage can be suppressed by selecting a branch path that minimizes the fluctuation in the power supply voltage.

[0032] Furthermore, according to this embodiment, the control circuit 40 selects a branch path based on the largest power supply voltage fluctuation among multiple circuit blocks through which the branch path passes. For example, if a power supply voltage fluctuation occurs in only one of the multiple circuit blocks on a branch path, noise may be introduced into other circuit blocks via the signal path. Therefore, by focusing on the largest power supply voltage fluctuation in the branch path, it is possible to select a branch path that effectively suppresses noise generation.

[0033] Furthermore, according to the semiconductor integrated circuit 1, the control circuit 40 continues to select the selected branch path if the power supply voltage of the circuit block of the selected branch path is equal to or higher than a predetermined threshold voltage. For example, even if the power supply voltage fluctuation of another branch path is smaller than the power supply voltage fluctuation of the selected branch path, the control circuit 40 does not perform processing to change the selection, thereby reducing the power and time required to detect the power supply voltage.

[0034] [Second embodiment] Next, a semiconductor integrated circuit 1A according to a second embodiment will be described. FIG. 5 is a block diagram showing an example of the configuration of the semiconductor integrated circuit 1A according to this embodiment. The semiconductor integrated circuit 1A according to this embodiment differs from the semiconductor integrated circuit 1 according to the first embodiment in that it includes a gating circuit that blocks signal paths that are not selected. In this embodiment, the same components as those in the semiconductor integrated circuit 1 according to the first embodiment are denoted by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0035] The gating circuits 70 are located upstream of the branch paths L1 to L3, i.e., between the branch point G and the input points of the circuit blocks B1 to B3. The gating circuits 70 block branch paths other than the selected branch path. The gating circuits 70 block signal input to the circuit blocks B1 to B3 in the non-selected signal paths, thereby effectively reducing power consumption.

[0036] FIG. 6 is a diagram showing an example of a gating circuit 70. Here, the gating circuit 70 represents a circuit that gates a digital signal such as a clock signal. The gating circuit 70 includes a latch circuit 71 and an AND circuit 72. The latch circuit 71 is a D-type latch circuit and includes an input terminal CK, an input terminal D, and an output terminal Q. The input terminal CK receives a clock signal CLK from the signal output circuit 20, and the input terminal D receives an enable signal D1 from the control circuit 40. The output terminal Q is connected to one input terminal of an AND circuit 72, and the clock signal CLK is input to the other input terminal of the AND circuit 72. The output terminal of the AND circuit 72 is connected to one of the branch paths L1 to L3.

[0037] When the clock signal CLK is at a high level, the latch circuit 71 outputs the input enable signal D1 to the AND circuit 72, and when the clock signal CLK is at a low level, the latch circuit 71 maintains the output of the previous enable signal D1. The AND circuit 72 outputs the logical product of the signal output from the latch circuit 71 and the clock signal CLK. For example, when the enable signal D1 is at a high level, the AND circuit 72 outputs the clock signal CLK to the circuit blocks B1 to B3, and when the enable signal D1 is at a low level, the AND circuit 72 does not output the clock signal CLK to the circuit blocks B1 to B3. The latch circuit 71 can selectively make the branch paths L1 to L3 conductive or cut off in response to the enable signal D1 from the control circuit 40.

[0038] 7 is a flowchart showing an example of the operation of the semiconductor integrated circuit 1A according to this embodiment. The following mainly describes the operation that differs from the first embodiment.

[0039] Assume that the control circuit 40 selects branch path L1 when the semiconductor integrated circuit 1A starts operating. At this time, the control circuit 40 outputs a high-level enable signal D1 only to the gating circuit 70 of branch path L1, causing the gating circuit 70 of branch path L1 to be in a conductive state. The control circuit 40 outputs a low-level enable signal D1 to the gating circuits 70 of the other branch paths L2 and L3, causing the gating circuits 70 of branch paths L2 and L3 to be in a cut-off state.

[0040] The processing from steps S1 to S8 is the same as steps S1 to S8 in the first embodiment. In steps S1 to S8, it is assumed that branch path L2, which has the smallest fluctuation in power supply voltage, is selected from among branch paths L1 to L3. In step S9 after step S8, the control circuit 40 turns on the gating circuit 70 of branch path L2 and turns off the gating circuits 70 of the other branch paths L1 and L3. This renders the circuit blocks B1, B3, B4, and B5 in the unselected branch paths L1 and L3 inactive, thereby reducing power consumption.

[0041] [Third embodiment] A device according to a third embodiment of the present invention will be described with reference to Fig. 8. Fig. 8 is a block diagram of the device according to this embodiment.

[0042] The photoelectric conversion devices including the semiconductor integrated circuits 1 and 1A described in the first and second embodiments can be applied to various imaging systems. Examples of applicable imaging systems include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, and observation satellites. Camera modules equipped with optical devices corresponding to lenses and imaging devices are also included in imaging systems. Figure 8 illustrates a block diagram of a digital still camera as an example of such systems.

[0043] 8 includes an imaging device 201, a lens 202 that forms an optical image of a subject on the imaging device 201, an aperture 204 that adjusts the amount of light passing through the lens 202, and a barrier 206 that protects the lens 202. The lens 202 and the aperture 204 form an optical system that focuses light on the imaging device 201. The imaging device 201 is a photoelectric conversion device that includes the semiconductor integrated circuits 1 and 1A described in any of the first and second embodiments, and converts the optical image formed by the lens 202 into image data.

[0044] The imaging system 200 also includes a signal processing unit 208 that processes an output signal output from the imaging device 201. The signal processing unit 208 generates image data from a digital signal output by the imaging device 201. The signal processing unit 208 also performs various corrections and compressions as necessary and outputs the image data. The imaging device 201 may include an AD conversion unit that generates a digital signal to be processed by the signal processing unit 208. The AD conversion unit may be formed in a semiconductor layer (semiconductor substrate) on which a photoelectric conversion unit of the imaging device 201 is formed, or may be formed on a semiconductor substrate different from the semiconductor layer on which the photoelectric conversion unit of the imaging device 201 is formed. The signal processing unit 208 may also be formed on the same semiconductor substrate as the imaging device 201.

[0045] The imaging system 200 further includes a memory unit 210 for temporarily storing image data, and an external interface unit (external I / F unit) 212 for communicating with an external computer or the like. The imaging system 200 also includes a recording medium 214 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 216 for recording or reading out data from the recording medium 214. The recording medium 214 may be built into the imaging system 200 or may be removable.

[0046] The imaging system 200 further includes an overall control / calculation unit 218 that performs various calculations and controls the entire digital still camera, a timing generation unit 220 that outputs various timing signals to the imaging device 201 and the signal processing unit 208, and mechanical devices. Here, timing signals and the like may be input from outside, and the imaging system 200 only needs to include at least the imaging device 201 and the signal processing unit 208 that processes the output signal output from the imaging device 201.

[0047] The imaging device 201 outputs an imaging signal to a signal processing unit 208. The signal processing unit 208 performs predetermined signal processing on the imaging signal output from the imaging device 201 and outputs image data. The signal processing unit 208 generates an image using the imaging signal. The mechanical device is a movable part (e.g., a robot arm) that operates in response to a signal from the photoelectric conversion device.

[0048] As described above, according to this embodiment, it is possible to realize an imaging system that applies a photoelectric conversion device including the semiconductor integrated circuits 1 and 1A according to the first and second embodiments.

[0049] [Fourth embodiment] A device according to a fourth embodiment of the present invention will be described with reference to Fig. 9. Fig. 9 is a block diagram of the device according to this embodiment.

[0050] FIG. 9A shows an example of an imaging system related to an in-vehicle camera. The imaging system 300 includes an imaging device 310. The imaging device 310 is a photoelectric conversion device including the semiconductor integrated circuit 1 or 1A described in any one of the first and second embodiments. The imaging system 300 includes an image processing unit 312 that performs image processing on multiple pieces of image data acquired by the imaging device 310, and a parallax acquisition unit 314 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the imaging system 300. The imaging system 300 also includes a distance acquisition unit 316 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 318 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 314 and the distance acquisition unit 316 are examples of distance information acquisition means that acquire information about the distance to the object. That is, the distance information includes information about the parallax, the defocus amount, the distance to the object, etc. The collision determination unit 318 may determine the possibility of a collision using any of this distance information. The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination thereof.

[0051] The imaging system 300 is connected to a vehicle information acquisition device 320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The imaging system 300 is also connected to a control ECU 330, which is a control device that outputs a control signal to generate a braking force on the vehicle based on the determination result of a collision determination unit 318. The imaging system 300 is also connected to an alarm device 340 that issues an alarm to the driver based on the determination result of the collision determination unit 318. For example, if the determination result of the collision determination unit 318 indicates a high possibility of a collision, the control ECU 330 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 340 warns the user by sounding an alarm, displaying alarm information on a screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0052] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the imaging system 300. Fig. 9(b) shows an imaging system for imaging the area in front of the vehicle (imaging range 350). The vehicle information acquisition device 320 sends instructions to the imaging system 300 or the imaging device 310. This configuration can further improve the accuracy of distance measurement.

[0053] Although the above describes an example of control to prevent collision with other vehicles, the system can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from a lane, etc. Furthermore, the imaging system is not limited to vehicles such as the subject vehicle, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the imaging system can be applied not only to moving bodies but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0054] [Modified embodiment] The present invention is not limited to the above-described embodiments and can be modified in various ways. For example, an example in which part of the configuration of one embodiment is added to another embodiment, or an example in which part of the configuration of another embodiment is replaced with another embodiment, is also an embodiment of the present invention.

[0055] Although the example in which the plurality of branch paths L1 to L3 branch into three from the signal output circuit 20 has been described, the present invention is not limited to this and may branch into two or four or more.

[0056] Although an example has been described in which each circuit block B is supplied with power from a separate power supply, this is not limiting, and for example, power may be supplied from a common power supply.

[0057] Although the gating circuit 70 has been described as including the latch circuit 71 and the AND circuit 72, the present invention is not limited to this and the circuit configuration is not limited as long as it can conduct or cut off the output of the clock signal CLK.

[0058] Although the example in which the control circuit 40 determines the branch path based on the voltage drop has been described, the present invention is not limited to this, and the control circuit 40 may determine the branch path based on the voltage fluctuation including the voltage rise.

[0059] The disclosure of the above embodiment includes the following configurations. (Configuration 1) a plurality of circuit blocks; a plurality of branch paths branching from a single path and each of which passes through at least one of the plurality of circuit blocks; a detection circuit that detects fluctuations in a power supply voltage applied to each of the plurality of circuit blocks; a control circuit that selects, from the plurality of branch paths, the branch path that passes through the circuit block with the smallest fluctuation in the power supply voltage. (Configuration 2) 2. The semiconductor integrated circuit according to configuration 1, further comprising a gating circuit provided in each of the plurality of branch paths, for blocking the other branch paths other than the selected branch path. (Configuration 3) 3. The semiconductor integrated circuit according to configuration 2, wherein the plurality of gating circuits are located between the branch points at which the plurality of branch paths branch and the circuit block. (Configuration 4) 4. The semiconductor integrated circuit according to configuration 2 or 3, wherein the gating circuit blocks the clock signal passing through the other branch path. (Configuration 5) The gating circuit a latch circuit that latches an enable signal in response to the clock signal; 5. The semiconductor integrated circuit according to any one of configurations 2 to 4, further comprising: an AND circuit that outputs a logical product of the signal output from the latch circuit and the clock signal. (Configuration 6) one branch path passes through a plurality of the circuit blocks, 6. The semiconductor integrated circuit according to any one of configurations 1 to 5, wherein the control circuit selects the branch path based on a fluctuation in the power supply voltage of a circuit block having the largest fluctuation in the power supply voltage among the plurality of circuit blocks in the one branch path. (Configuration 7) 7. The semiconductor integrated circuit according to any one of configurations 1 to 6, wherein the fluctuation in the power supply voltage is an amount of drop in the power supply voltage. (Configuration 8) 8. The semiconductor integrated circuit according to any one of configurations 1 to 7, wherein the control circuit continues selecting the selected branch path when the power supply voltage of the circuit block through which the selected branch path passes is equal to or higher than a predetermined threshold voltage, and executes a process of selecting another branch path other than the branch path currently being selected when the power supply voltage of the circuit block through which the selected branch path passes is lower than the threshold voltage. (Configuration 9) 9. The semiconductor integrated circuit according to configuration 8, wherein the threshold voltage is variable. (Configuration 10) 10. The semiconductor integrated circuit according to any one of configurations 1 to 9, wherein a power supply that applies the power supply voltage differs for each of the circuit blocks. (Configuration 11) the detection circuit includes a comparator having a first input terminal and a second input terminal, and a switching circuit capable of switching a reference voltage; the reference voltage is applied to the first input terminal; 11. The semiconductor integrated circuit according to any one of configurations 1 to 10, wherein the power supply voltage is applied to the second input terminal. (Configuration 12) 12. The semiconductor integrated circuit according to any one of configurations 1 to 11, wherein the detection circuit and the control circuit operate continuously. (Configuration 13) 12. The semiconductor integrated circuit according to any one of configurations 1 to 11, wherein the detection circuit and the control circuit operate at predetermined intervals. (Configuration 14) a photoelectric conversion device including the semiconductor integrated circuit according to any one of structures 1 to 13; an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device. (Configuration 15) 15. The device according to claim 14, wherein the processing device acquires distance information from the photoelectric conversion device to the subject. [Explanation of symbols]

[0060] 1, 1A...Semiconductor integrated circuit 20...Signal output circuit 30...Detection circuit 40...Control circuit 50...Switching circuit 60...Signal input circuit 70...Gating circuit 81, 82, 83…Power supply 31...Comparator B1~B5...Circuit blocks G...Branch La...single path L1~L3...branching route R1...Switching circuit R2…Resistor

Claims

1. a plurality of circuit blocks; a plurality of branch paths branching from a single path and each passing through at least one of the plurality of circuit blocks; a detection circuit that detects fluctuations in a power supply voltage applied to each of the plurality of circuit blocks; a control circuit that selects, from the plurality of branch paths, the branch path that passes through the circuit block with the smallest fluctuation in the power supply voltage.

2. 2. The semiconductor integrated circuit according to claim 1, further comprising a gating circuit provided in each of the plurality of branch paths, for blocking the other branch paths other than the selected branch path.

3. 3. The semiconductor integrated circuit according to claim 2, wherein the plurality of gating circuits are located between the branch points where the plurality of branch paths branch and the circuit block.

4. 3. The semiconductor integrated circuit according to claim 2, wherein the gating circuit blocks the clock signal passing through the other branch path.

5. The gating circuit a latch circuit that latches an enable signal in response to the clock signal; 5. The semiconductor integrated circuit according to claim 4, further comprising an AND circuit that outputs a logical product of the signal output from said latch circuit and said clock signal.

6. one branch path passes through a plurality of the circuit blocks, 2. The semiconductor integrated circuit according to claim 1, wherein the control circuit selects the branch path based on a fluctuation in the power supply voltage of a circuit block having the largest fluctuation in the power supply voltage among the plurality of circuit blocks in the one branch path.

7. 2. The semiconductor integrated circuit according to claim 1, wherein the fluctuation in the power supply voltage is a drop in the power supply voltage.

8. 8. The semiconductor integrated circuit according to claim 7, wherein the control circuit continues to select the selected branch path when the power supply voltage of the circuit block through which the selected branch path passes is equal to or higher than a predetermined threshold voltage, and performs a process of selecting another branch path other than the branch path currently being selected when the power supply voltage of the circuit block through which the selected branch path passes is lower than the threshold voltage.

9. 9. The semiconductor integrated circuit according to claim 8, wherein the threshold voltage is variable.

10. 2. The semiconductor integrated circuit according to claim 1, wherein a power supply that applies the power supply voltage differs for each of the circuit blocks.

11. the detection circuit includes a comparator having a first input terminal and a second input terminal, and a switching circuit capable of switching a reference voltage; the reference voltage is applied to the first input terminal; 2. The semiconductor integrated circuit according to claim 1, wherein the power supply voltage is applied to the second input terminal.

12. 2. The semiconductor integrated circuit according to claim 1, wherein the detection circuit and the control circuit operate continuously.

13. 2. The semiconductor integrated circuit according to claim 1, wherein the detection circuit and the control circuit operate at predetermined intervals.

14. A photoelectric conversion device including the semiconductor integrated circuit according to any one of claims 1 to 13; an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device.

15. The device according to claim 14 , wherein the processing device acquires distance information from the photoelectric conversion device to a subject.

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