Circuit board

Abstract

To enable a high density wiring structure even when connecting electronic components on a circuit board to a signal line pair with a broadside coupling structure.SOLUTION: A circuit board includes first and second signal lines 3a, 3b in a broadside coupling configuration arranged on two or more inner layers, and third and fourth signal lines 4a, 4b formed on surfaces 10a, 10b of the circuit board, respectively. The first and third signal lines 3a, 4a and the second and fourth signal lines 3b, 4b are connected between layers via first via pairs 11a, 12a and second via pairs 11b, 12b, respectively. The first signal line 3a, the second signal line, the third signal line, the fourth signal line, the first via pairs 11a, 12a and the first via pairs 11b, 12b are arranged point-symmetrically with respect to a central axis C. The third and fourth signal lines 4a, 4b have electrode patterns 13a, 14a and electrode patterns 13b, 14b carrying electronic components, respectively.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a circuit board that enables a high density wiring structure even when electronic components are connected on the circuit board to a signal line pair having a broadside coupling structure. [Background technology]

[0002] In recent years, signal transmission speeds have increased, and GHz-band signals are now being used for such signal transmission. When designing circuit boards equipped with transmission lines for transmitting such high-speed signals, differential wiring signal transmission, which has high common-mode noise resistance, is useful and widely used. For example, differential wiring signal transmission is used in circuit boards such as switch devices in optical communication devices equipped with optical transceivers, as described in Patent Document 1.

[0003] A differential signal is ideally characterized by the fact that data with a 180-degree phase difference or reversed polarity are transmitted over two transmission paths, canceling out common-mode noise. In differential transmission, signals with a 180-degree phase difference or reversed polarity are transmitted over two signal paths. However, if there is a difference in the signal path length, even if the signals are synchronized at the transmitting end, there will be a difference in the arrival timing of the positive and negative data at the receiving end, resulting in an increase in common-mode components and a deterioration in signal quality. Therefore, adjusting the skew (phase difference) between the positive and negative signals is important in differential wiring. Differential signal structures include strip, microstrip, and broadside coupling. Patent Document 2 uses a strip structure. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-027147 [Patent Document 2] Japanese Patent Publication No. 2022-007340 Summary of the Invention [Problem to be solved by the invention]

[0005] In differential transmission using striplines, the signal line pair spreads out in the surface direction of the circuit board, which increases the area of ​​the circuit board in the surface direction. In addition, when the signal line pair is bent and wired, the transmission path lengths differ, which causes skew. To prevent this skew, it is necessary to provide a redundant line on the side of the shorter signal line.

[0006] On the other hand, if the signal line pair is configured with a broadside coupling structure, skew does not occur even if the signal line is bent, and only one signal line occupies the surface area of ​​the circuit board, allowing for a high-density wiring structure.

[0007] Here, when electronic components such as AC coupling capacitors for DC blocking are connected to each signal line of a signal line pair having a broadside coupling structure on one side of the circuit board, the area occupied by the two electronic components on the circuit board is large, just like a signal line pair having a stripline structure, which hinders the high density of the wiring structure.

[0008] The present invention has been made in consideration of the above, and aims to provide a circuit board that enables a high-density wiring structure even when electronic components are connected on the circuit board to a signal line pair having a broadside coupling structure. [Means for solving the problem]

[0009] In order to solve the above-mentioned problems and achieve the object, a circuit board according to the present invention is a circuit board on which a transmission line made up of a signal line pair is formed, the signal line pair having a first signal line and a second signal line in a broadside coupling configuration arranged on at least two or more inner layers, a third signal line corresponding to a discontinuous portion of the first signal line and formed on one surface of the circuit board, and a fourth signal line corresponding to a discontinuous portion of the second signal line and formed on the other surface of the circuit board, the first signal line, the second signal line, and the fourth signal line are connected between layers via a first via pair and the second via pair, respectively; the first signal line, the second signal line, the third signal line, the fourth signal line, the first via pair, and the second via pair are arranged to be point-symmetrical with respect to a central axis where a thickness central plane where the thickness of the circuit board is halved intersects with a via central plane where the distance between each via pair is equal; and the third signal line and the fourth signal line have electrode patterns on which electronic components are mounted.

[0010] In addition, in the circuit board according to the present invention, the first signal line and the second signal line are formed in the same layer with the discontinuous portion interposed therebetween.

[0011] In addition, in the circuit board according to the present invention, the first signal line and the second signal line are formed on different layers with the discontinuous portion interposed therebetween.

[0012] Furthermore, a circuit board according to the present invention is a circuit board on which a transmission line consisting of a signal line pair is formed, the signal line pair having a first signal line and a second signal line of a broadside coupling configuration arranged on at least two or more inner layers, the first signal line and the second signal line having a first electrode pattern and a second electrode pattern carrying electronic components, respectively, the first electrode pattern being formed in a cavity structure formed from one surface of the circuit board, and the second electrode pattern being formed in a cavity structure formed from the other surface of the circuit board. [Effects of the Invention]

[0013] According to the present invention, even when electronic components are connected on a circuit board to a signal line pair having a broadside coupling structure, it is possible to achieve a high density wiring structure. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a plan view of an optical communication device equipped with a switch device using a circuit board according to an embodiment of the present invention. [Figure 2] FIG. 2 is a plan view of the switch device. [Figure 3] FIG. 3 is a diagram showing the wiring structure of a signal line pair on a circuit board. [Figure 4] FIG. 4 is a diagram showing a wiring structure in which a signal line pair has a broadside coupling structure and two AC coupling capacitors are arranged on one surface. [Figure 5] FIG. 5 is a diagram comparing the wiring structure shown in FIG. 3 with the wiring structure shown in FIG. [Figure 6] FIG. 6 is a diagram showing a wiring structure of a signal line pair of a circuit board according to the first modification. [Figure 7] FIG. 7 is a cross-sectional view showing the wiring structure of a signal line pair of a circuit board according to the second modification. [Figure 8]FIG. 8 is a cross-sectional view showing a wiring structure in which the cavity shown in FIG. 7 is filled. [Figure 9] FIG. 9 is a perspective view showing the configuration of the optical transceiver. [Figure 10] FIG. 10 is a cross-sectional view of the optical transceiver shown in FIG. 9 taken along line AA. DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0016] <Overall structure> Fig. 1 is a plan view of an optical communication device 200 equipped with a switch device 100 using a circuit board 1 according to an embodiment of the present invention. As shown in Fig. 1, the optical communication device 200 includes a motherboard 201, an IC 202, and a plurality of switch devices 100. In addition to these, the optical communication device 200 may also include a power supply module, a cooling fan, and the like (none of which are shown).

[0017] The motherboard 201 has a substantially constant thickness in the Z direction and extends in a direction intersecting the Z direction. The motherboard 201 is formed with a surface 201a and a surface 201b. The surface 201a faces the Z direction and intersects with the Z direction. The surface 201b faces in the opposite direction to the Z direction on the opposite side to the surface 201a and intersects with the Z direction.

[0018] The plurality of switch devices 100 are mounted on the surface 201a, and the IC 202 is mounted on the surface 201b. The IC 202 may also be mounted on the surface 201a.

[0019] The IC 202 controls the operation of the multiple switch devices 100 and transmits communication signals between the multiple switch devices 100. The IC 202 is an example of a signal processing circuit.

[0020] Conductors (not shown) of the motherboard 201 and conductors (not shown) of the switch device 100 are electrically connected via conductors such as connectors or solder bumps.

[0021] Fig. 2 is a plan view of the switch device 100. As shown in Fig. 2, the switch device 100 includes a daughter board 10, a plurality of optical transceivers 30, a switch ASIC (application specific integrated circuit) 20, and a plurality of AC coupling capacitors 2. The optical transceiver 30, the switch ASIC 20, and the plurality of AC coupling capacitors 2 are examples of electronic components. The switch device 100 also includes a board assembly configuration including the daughter board 10 and the electronic components.

[0022] The daughter board 10 has a square (quadrilateral) shape. The daughter board 10 has a plate-like shape that intersects the Z direction and extends perpendicularly. The daughter board 10 has a surface 10a facing the Z direction and a surface 10b opposite to the surface 10a and facing the opposite direction of the Z direction. The surfaces 10a and 10b intersect the Z direction and extend perpendicularly. The daughter board 10 is, for example, a multilayer printed wiring board and is an example of a circuit board 1. The surface 10a is an example of one surface 1a of the circuit board 1, and the surface 10b is an example of the other surface 1b opposite to the surface 1a.

[0023] The optical transceivers 30 are arranged along each of the four sides 10c of the daughter board 10. An optical fiber (not shown) extends from each optical transceiver 30. The optical fiber may extend from the optical transceiver 30 substantially along the Z direction, or may extend substantially along a direction intersecting the Z direction.

[0024] The optical transceiver 30 is mounted on a surface 10a of the daughter board 10. The optical transceiver 30 is attached to and detached from a socket (not shown) in a direction intersecting the Z direction, for example, but is not limited to this.

[0025] The switch ASIC 20 is flip-chip mounted on the surface 10a at a position away from each of the sides 10c of the daughter board 10, e.g., approximately in the center of the daughter board 10 in this embodiment. The switch ASIC 20 controls the operation of each optical transceiver 30 and transmits communication signals between the optical transceivers 30. The switch ASIC 20 is an example of a semiconductor integrated circuit and may also be referred to as a signal processing IC. The switch ASIC 20 may be mounted on the daughter board 10 using a method other than flip-chip mounting.

[0026] The optical transceivers 30 and the switch ASIC 20 are connected by a plurality of signal line pairs 3. For example, 16 pairs of signal line pairs 3 for transmitting and receiving are connected between one optical transceiver 30 and the switch ASIC 20, resulting in high-density wiring on the daughter board 10. The signal line pairs 3 are, for example, high-speed transmission lines of differential signal line pairs, and each signal line is arranged on at least two or more inner layers of the daughter board 10, forming a broadside coupling configuration. AC coupling capacitors 2 (2a, 2b) are connected to each of the signal lines of the signal line pairs 3. The AC coupling capacitor 2a arranged on one signal line (e.g., a positive-phase signal line) is connected on the surface 10a, and the AC coupling capacitor 2b arranged on the other signal line (e.g., a negative-phase signal line) is connected on the surface 10b.

[0027] <Wiring structure> FIG. 3 illustrates the wiring structure of a signal line pair on a circuit board 1. FIG. 3(a) illustrates a cross-sectional view of the circuit board 1, and FIG. 3(b) illustrates a plan view of the circuit board 1. As illustrated in FIG. 3, the signal line pair 3 includes a first signal line 3a and a second signal line 3b arranged in a broadside coupling configuration on at least two or more inner layers. The first signal line 3a is, for example, a positive-phase signal line, and the second signal line 3b is a negative-phase signal line. The signal line pair 3 also includes a third signal line 4a formed on one surface 10a, which is the upper surface of the circuit board 1, corresponding to the discontinuous portion 3c of the first signal line 3a, and a fourth signal line 4b formed on the other surface 10b, which is the back surface of the circuit board 1, corresponding to the discontinuous portion 3d of the second signal line 3b. The third signal line 4a includes electrode patterns 13a and 14a carrying an AC coupling capacitor 2a, which is an electronic component, and the AC coupling capacitor 2a. The fourth signal line 4b includes electrode patterns 13b and 14b on which an AC coupling capacitor 2b, an electronic component, is mounted, and the AC coupling capacitor 2b. First vias 11a and 12a (a first via pair) are formed between the first signal line 3a and the third signal line 4a. Second vias 11b and 12b (a second via pair) are formed between the first signal line 3a and the fourth signal line 4b.

[0028] The first signal line 3a is connected in the order of the first via 11a, electrode pattern 13a, AC coupling capacitor 2a, electrode pattern 14a, and first via 12a. The second signal line 3b is connected in the order of the second via 11b, electrode pattern 13b, AC coupling capacitor 2b, electrode pattern 14b, and second via 12b. The daughter board 10 has insulating layers formed on a first layer L1 to a fifth layer L5. The electrode patterns 13a and 14a are formed on the upper surface of the first layer L1. The first signal line 3a is formed on the upper surface of the third layer L3, and the second signal line 3b is formed on the upper surface of the fourth layer L4. The electrode patterns 13b and 14b are formed on the lower surface of the fifth layer L5. The first signal line 3a and the third signal line 4a are connected between layers via a first via pair. The second signal line 3b and the fourth signal line 4b are connected to each other through a second via pair. Grounds Ga1 and Ga2 are formed on the top surface of the second layer L2, and grounds Gb1 and Gb2 are formed on the top surface of the fourth layer L4, covering the first signal line 3a and the second signal line 3b from above and below to form a broadside coupling structure.

[0029] As a result, the first signal line 3a, the second signal line 3b, the third signal line 4a, and the fourth signal line 4b are arranged so as to be point-symmetrical with respect to the central axis C where the thickness center plane S1, where the thickness of the circuit board 1 is half, intersects with the via center plane S2, where the distance between each via pair (between the first vias 11a and 12a, and between the second vias 11b and 12b) is equal.

[0030] The total length of the first signal line 3a, the length of the first via pair, the length of the third signal line 4a, the length of the second signal line 3b, the length of the second via pair, and the length of the fourth signal line 4b are approximately equal, so that skew can be almost eliminated. The skew may be within the tolerance according to the signal frequency, taking into consideration manufacturing errors and the like.

[0031] As a result, the AC coupling capacitors 2a and 2b overlap in the Z direction, and as shown in FIG. 3(b), in a plan view of the circuit board 1, the area occupied by one AC coupling capacitor is reduced. This reduces the spread of the AC coupling capacitor in the Y direction, narrows the gap between the multiple signal line pairs 3, and enables a high-density wiring structure.

[0032] 4 is a diagram showing a wiring structure in which the signal line pair has a broadside coupling structure and two AC coupling capacitors 2a and 2b are arranged on one surface 10a. In FIG. 4, the signal line corresponding to the first signal line 3a is signal line 103a, and the signal line corresponding to the second signal line 3b is signal line 103b. In FIG. 4, since the two AC coupling capacitors 2a and 2b are arranged on the same surface 10a, the wiring layers of the signal lines 103a and 103b are swapped via the two AC coupling capacitors 2a and 2b.

[0033] As shown in FIG. 4, when two AC coupling capacitors 2a and 2b are arranged on one surface 10a, even in a broadside coupling structure, the area occupied by the AC coupling capacitors 2a and 2b increases in plan view in the Z direction, resulting in a wider gap between multiple signal line pairs, which hinders high-density wiring.

[0034] Here, for example, in the case of a multilayer structure in which the dielectric constant of circuit board 1 is about 3 to 4, the minimum width of the signal line pattern L is usually designed to be 54 μm, the minimum spacing between the signal line patterns S is 84 μm, the size of AC coupling capacitors 2a, 2b is 0.2 mm × 0.4 mm, and the spacing between AC coupling capacitors 2a, 2b is 0.4 mm.

[0035] In this case, the area required to mount the two AC coupling capacitors 2a and 2b is about eight times the area of ​​the AC coupling capacitors. In contrast, in this embodiment, the area required is reduced to about four times the area of ​​the AC coupling capacitors, resulting in a high-density wiring structure.

[0036] Fig. 5 is a diagram comparing the wiring structure shown in Fig. 3 with the wiring structure shown in Fig. 4. Fig. 5(a) is a plan view of the wiring structure shown in Fig. 3, and Fig. 5(b) is a plan view of the wiring structure shown in Fig. 4. As described above, in the wiring structure shown in Fig. 4, two AC coupling capacitors 2a, 2b are arranged in parallel on one surface 10a, which increases the area occupied by the AC coupling capacitors and expands in the Y direction, thereby expanding the gap between the signal line pairs and hindering high-density wiring. However, in this embodiment shown in Fig. 5(a), the area occupied by the two AC coupling capacitors 2q, 2b is the same as the area occupied by one AC coupling capacitor 2a, which reduces the expansion in the Y direction and enables high-density wiring.

[0037] <Variation 1> 6A and 6B are diagrams showing the wiring structure of a signal line pair of a circuit board 1 according to Modification 1. Fig. 6A shows a cross-sectional view of the circuit board 1 of Modification 1, and Fig. 6B shows a plan view of the circuit board 1 of Modification 1. In the above embodiment, the first signal line 3a is arranged on the same layer with a discontinuous portion 3c interposed therebetween, and the second signal line 3b is arranged on the same layer with a discontinuous portion 3d interposed therebetween. However, in Modification 1, the first signal line 23a corresponding to the first signal line 3a is arranged on a different layer with a discontinuous portion interposed therebetween, and the second signal line 23b corresponding to the second signal line 3b is arranged on a different layer with a discontinuous portion interposed therebetween.

[0038] The circuit board 1 of Modification 1 has a multilayer structure having eight insulating layers consisting of a first layer L11 to an eighth layer L18. The first signal line 23a1 extending in the -X direction is disposed on the upper surface of the third layer L13, the second signal line 23b1 extending in the -X direction is disposed on the upper surface of the fourth layer L14, the first signal line 23a2 extending in the X direction is disposed on the upper surface of the sixth layer L16, and the second signal line 23b2 extending in the X direction is disposed on the upper surface of the seventh layer. A ground G2a1 is formed on the upper surface of the second layer L2, and a ground G2b1 is formed on the upper surface of the fourth layer L14, thereby forming a broadside coupling structure by covering the first signal line 23a1 and the second signal line 23b1 from above and below. In addition, a ground G2a2 is formed on the top surface of the fifth layer L5, and a ground G2b2 is formed on the top surface of the eighth layer L18, covering the first signal line 23a2 and the second signal line 23b2 from above and below to form a broadside coupling structure.

[0039] The -X-direction electrode pattern 13a carrying the AC coupling capacitor 2a and the first signal line 23a1 are connected to each other via a first via 21a, and the X-direction electrode pattern 14a and the first signal line 23a2 are connected to each other via a first via 22a that is longer than the first via 21a. The X-direction electrode pattern 13b carrying the AC coupling capacitor 2b and the second signal line 23b1 are connected to each other via a second via 21b, and the X-direction electrode pattern 14b and the second signal line 23b2 are connected to each other via a second via 22b that is shorter than the second via 22b. The first via 21a and the second via 22b have the same length, and the first via 22a and the second via 21b have the same length. The electrode patterns 13a and 14a and the AC coupling capacitor 2a form a third signal line 24a, and the electrode patterns 13b and 14b and the AC coupling capacitor 2b form a fourth signal line 24b.

[0040] That is, while the wiring structure of the embodiment is symmetrical with respect to the central plane S1, in the wiring structure of the first modification example, the first signal line 23a (23a1, 23a2), the second signal line 23b (23b1, 23b2), the third signal line 24a, and the fourth signal line 24b are point-symmetrical with respect to the central axis C.

[0041] In the first modification, even if the layer of the first signal line 23a is changed via the third signal line 24a and the layer of the second signal line 23b is changed via the fourth signal line 24b, the point-symmetric structure described above can eliminate skew between the first signal line 23a and the second signal line 23b, and moreover, can achieve high density wiring structure, as in the embodiment.

[0042] <Variation 2> 7 is a cross-sectional view showing the wiring structure of the signal line pairs of the circuit board 1 according to Modification 2. In the above embodiment, the AC coupling capacitors 2a and 2b mounted on the surfaces 10a and 10b are interlayer-connected to the first signal line 3a and the second signal line 3b by the first via pair and the second via pair, respectively, but in Modification 2, the first via pair and the second via pair are not used, and the AC coupling capacitors 2a and 2b are directly mounted on the electrode patterns 13a, 14a, 13b, 14b formed on the first signal line 3a and the second signal line 3b, respectively.

[0043] Therefore, a cavity 28a in which the AC coupling capacitor 2a is disposed is formed on the surface 10a side, and a cavity 8b in which the AC coupling capacitor 2b is disposed is formed on the surface 10b side. The first signal line 3a and the second signal line 3b are exposed at the bottoms of the cavities 28a and 28b, respectively. Electrode patterns 13a, 14a, 13b, and 14b are formed on the first signal line 3a and the second signal line 3b, and the AC coupling capacitors 2a and 2b are mounted thereon, respectively. A discontinuous portion is formed between the first signal lines 3a1 and 3a2, and a discontinuous portion is formed between the second signal lines 3b1 and 3b2.

[0044] That is, in this second modification, the signal line pair has a first signal line 23a and a second signal line 23b in a broadside coupling configuration arranged on at least two or more inner layers, the first signal line 23a and the second signal line 23b have first electrode patterns 13a, 14a and second electrode patterns 13b, 14b carrying AC coupling capacitors 2a, 2b, respectively, the first electrode patterns 13a, 14a are formed in a cavity 28a formed from one surface 10a of the circuit board, and the second electrode patterns 13b, 14b are formed in a cavity 28b formed from the other surface 10b of the circuit board.

[0045] In this modified example 2, as in the embodiment, the AC coupling capacitors 2a and 2b overlap in the Z direction, and when viewed in plan on the circuit board 1, the area occupied by the AC coupling capacitors 2a and 2b is smaller than that occupied by a single AC coupling capacitor. This reduces the spread of the AC coupling capacitors in the Y direction, narrows the gap between the multiple signal line pairs 3, and enables a high-density wiring structure.

[0046] As shown in FIG. 8, after the AC coupling capacitors 2a and 2b are mounted in the cavities 28a and 28b, the cavities 28a and 28b may be filled with an insulating material to form a buried structure.

[0047] In the above embodiment and modified examples, the daughter board 10 is described as the circuit board 1, but it can also be applied to other circuit boards. For example, the substrate of an interposer in the optical transceiver 30 can also be applied as the circuit board 1.

[0048] Fig. 9 is a perspective view showing the configuration of optical transceiver 30. Fig. 10 is a cross-sectional view of optical transceiver 30 shown in Fig. 9 taken along line AA. As shown in Figs. 9 and 10, optical transceiver 30 has a substrate 33 serving as circuit board 1 sandwiched in the Z direction between upper body 31B and lower body 31A, and fixed with fasteners 36 such as screws.

[0049] The optical fiber 32 extends in the Z direction from the optical transceiver 30. Lens assemblies 37 are attached to the connector 34 adjacent to each other in the -Z direction. The lens assemblies 37 have a lens array, such as a collimating lens array or a focusing lens array, attached to a holder. The positioning pins 35 position the connector 34 and the lens assembly 37 in a direction intersecting the Z direction.

[0050] A through hole 33BB is formed in the approximate center of the upper body 31B, and the connector 34 and at least a part of the lens assembly 37 are housed therein.

[0051] The substrate 33 is, for example, a substrate similar to the circuit board 1. The substrate 33 has a surface 33a in the +Z direction and a surface 33b in the −Z direction.

[0052] An optical element 301, an electronic component 302, and the like are mounted on the surface 33a. The optical element 301 is, for example, a light receiving unit such as a photodiode array, or a light emitting unit such as a VCSEL array. The optical element 301 is an example of an active optical component. The electronic component 302 is, for example, an IC that operates in response to the light receiving unit or the light emitting unit. On the other hand, the surface 33b faces the socket 52.

[0053] Furthermore, a recess recessed in the +Z direction is provided in the portion of upper body 31B facing surface 33a to ensure a mounting area for optical element 301 and electronic component 302. As a result, an accommodation chamber R for components such as optical element 301 and electronic component 302 is formed between substrate 33 and upper body 33B.

[0054] The electronic components 302 generate heat in response to their operation, and the heat dissipation material 303 dissipates the heat generated by the electronic components 302 to the upper body 31B side.

[0055] A through-hole 33AA is formed in the lower body 31A. A socket 52 passes through the through-hole 33AA. The socket 52 has an insulator 52a and multiple connection conductors 52b. The insulator 52a supports the multiple connection conductors 52b. Each connection conductor 52b passes through the socket 52 in the Z direction and electrically connects the conductors of the substrate 33 and the conductors of the daughter board 10. The connection conductors 52b can be configured as contact terminals having elastically expandable pins extending in the Z direction. In this configuration, the conductors of the electronic component 302 are electrically connected to the conductors of the switch ASIC 20 via the conductors of the substrate 33 of the optical transceiver 30, the connection conductors 52b, and the conductors of the daughter board 10. The provision of socket 52 has the advantage of making it easier to establish a configuration that ensures the required positioning accuracy between the conductors of substrate 33 of detachable optical transceiver 30 and the conductors of daughter board 10, compared to, for example, providing an electrical interface directly on daughter board 10. Furthermore, by configuring connection conductor 52b as a contact terminal with an extendable pin, it becomes easier to ensure the required surface pressure and required contact area between the conductors of substrate 33 and connection conductor 52b, and between the conductors of daughter board 10 and connection conductor 52b, and this has the advantage of being able to suppress an increase in contact resistance.

[0056] Here, the substrate 33 can have a wiring structure similar to that of the daughter board 10 of the above-described embodiment and modified example.

[0057] The electronic components are not limited to AC coupling capacitors, but may also be resistors for impedance adjustment or drivers for signal amplification, etc. The impedance of differential signal wiring is usually set to, for example, 100Ω or 90Ω.

[0058] Furthermore, ground planes are formed on the upper surface 10a and the lower surface 10b on which the first signal line and the second signal line are formed.

[0059] Although the present invention has been described above with reference to the embodiments and modifications thereof, the present invention is not limited to the descriptions and drawings that form part of the disclosure of the present invention. In other words, all other embodiments, examples, and operational techniques that are made by those skilled in the art based on the present embodiments are included in the scope of the present invention. [Explanation of symbols]

[0060] 1 circuit board 1a,1b,10a,10b,33a,33b,201a,201b side 2, 2a, 2b AC coupling capacitors 3 signal line pairs 3a, 3a1, 3a2, 23a, 23a1, 23a2, 103a First signal line 3b, 3b1, 3b2, 23b, 23b1, 23b2, 103b Second signal line 3c,3d discontinuous part 4a, 24a Third signal line 4b,24b 4th signal line 10 Daughterboard 11a, 12a, 21a, 22a First via 11b, 12b, 21b, 22b Second via 10c side 13a, 13b, 14a, Electrode patterns 20 Switch ASIC 28a, 28b Cavity 30 Optical Transceiver 31A Lower Body 31B upper body 32 Optical Fiber 33AA,33BB through hole 33 PCB 34 Connector 35 Locating pin 36 Fixtures 37 Lens Assembly 52 sockets 52a Insulator 52b Connecting conductor 100 Switching Device 200 Optical communication device 201 Motherboard 301 Optical Elements 302 Electronic Components 303 Heat dissipation material C center axis R Containment Room S1 center plane S2 via center plane

Claims

1. A circuit board on which a transmission line consisting of a signal line pair is formed, The signal line pair is a first signal line and a second signal line in a broadside coupling configuration arranged on at least two or more inner layers; a third signal line formed on one surface of the circuit board corresponding to the discontinuous portion of the first signal line; a fourth signal line formed on the other surface of the circuit board corresponding to the discontinuous portion of the second signal line; and the first signal line and the third signal line, and the second signal line and the fourth signal line are inter-layer connected via a first via pair and a second via pair, respectively; the first signal line, the second signal line, the third signal line, the fourth signal line, the first via pair, and the second via pair are arranged to be point-symmetrical with respect to a central axis where a thickness center plane where the thickness of the circuit board is halved intersects with a via center plane where the distance between each via pair is equal; The circuit board according to claim 1, wherein the third signal line and the fourth signal line have electrode patterns on which electronic components are mounted.

2. 2. The circuit board according to claim 1, wherein the first signal line and the second signal line are formed on the same layer via the discontinuous portion.

3. 2. The circuit board according to claim 1, wherein the first signal line and the second signal line are formed on different layers via the discontinuous portion.

4. A circuit board on which a transmission line consisting of a signal line pair is formed, the signal line pair includes a first signal line and a second signal line arranged in at least two inner layers and having a broadside coupling configuration; the first signal line and the second signal line have a first electrode pattern and a second electrode pattern, respectively, on which electronic components are mounted; the first electrode pattern is formed in a cavity structure formed on one surface of the circuit board; The circuit board according to claim 1, wherein the second electrode pattern is formed in a cavity structure formed from the other surface of the circuit board.

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