Control method for converter

Abstract

To provide a control circuit that performs switching control of a converter to improve the tracking performance relative to a command pulse waveform.SOLUTION: A control circuit 301 has an operation unit 11 that generates a drive signal SD such that the deviation between a command value of a command signal SS, which is a pulse waveform at a certain time, and an output value of a converter 100 becomes small, and a signal output unit 12 that inputs the drive signal SD to the converter 100. The operation unit 11 calculates a differential waveform by differentiating the rising portion of the command signal SS waveform twice, adds the differential waveform to the rising portion of the command signal SS waveform to form a new command signal SSN, and generates the drive signal SD on the basis of the new command signal SSN.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a method for controlling a converter including an inverter. [Background technology]

[0002] FIG. 1 is a diagram illustrating a typical feedback control for controlling a converter 100 (see, for example, Patent Document 1). A control circuit 300 compares a command signal (reference voltage) SS from a user with a detected value (output voltage, output current, or output power) SC of the converter 100, amplifies the deviation, and outputs it as a drive signal SD to control the switching of the converter 100. Patent Document 1 discloses a power supply device using a magnetic field generating coil of a magnetic resonance imaging device (MRI) as a load. The power supply device includes a current detection means for detecting the current flowing through the magnetic field generating coil, and a control circuit that receives a current command value from a sequencer of the MRI device and the detected current value, and controls an inverter using pulse width modulation (PWM) to reduce the difference between the two to zero.

[0003] Converter output forms are broadly classified into DC (direct current), AC (sine wave), and pulse output (AC or DC). In recent years, the number of "pulse output" converters has increased due to the concept of energy conservation. For example, Patent Document 1 discloses the following: To speed up MRI imaging, power supplies are required to supply large currents to the magnetic field generating coils with short rise and fall times, and the complexity of the inverter structure required to meet this requirement is becoming an issue. The power supply device of Patent Document 1 solves the problem by modularizing the inverter into two sets of semiconductor switching elements and two sets of clamp diodes and combining the modules to simplify the structure.

[0004] The pulse output from the converter requires a pulse waveform with a steep rise that raises the voltage (current) value (target value) commanded by the command signal. The characteristics of the pulse output are determined primarily by the tracking ability of the three points shown in Figure 2(A). The waveform of the pulse output from the converter is referred to as the "actual output waveform." (1) Linearity and precision The ability to continuously output the target value, or the ability to output the target value without offset (2) Overshoot When the target value is reached, the voltage (current) value rises above the target value (3) Delay time The time from receiving a command signal to actually outputting a pulse [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 5216260 Summary of the Invention [Problem to be solved by the invention]

[0006] Of the three characteristics above, characteristic (1) linearity is the most important parameter because it affects the performance of products that use pulse output from the converter (such as fine processing of semiconductors and generation of accurate diagnostic images).

[0007] Here, if the feedback gain value of the control circuit is increased to improve the linearity characteristics, the control system becomes unstable, so it is necessary to increase the integral time. However, if the integral time is increased, the overshoot voltage (current) increases, causing a deterioration in the overshoot characteristics of characteristic (2). In other words, there is a trade-off between characteristics (1) and (2).

[0008] Furthermore, to improve the overshoot characteristic (2), it is effective to smooth the pulse waveform of the command signal (hereinafter, the pulse waveform of the command signal will be referred to as the "command pulse waveform") so as to eliminate discontinuities, as shown in FIG. 2(B), and generate a drive signal to follow this smoothed waveform (hereinafter, the smoothed waveform will be referred to as the "smoothed waveform"). Specifically, a calculation unit in the control circuit 300 generates the smoothed waveform, and the control circuit 300 outputs the drive signal SD based on the smoothed waveform. However, since the smoothed waveform has a delay with respect to the command pulse waveform (see FIG. 2(B) for the definition of "delay"), the rise of the pulse output is delayed, resulting in an increase in the delay time of characteristic (3). In other words, characteristics (2) and (3) also have a trade-off relationship. The "discontinuous point" of a pulse waveform means the following: If a command pulse waveform, which is an ideal waveform having two values, low potential and high potential, is composed of a low potential period, a high potential period, a rising period in which the low potential transitions to a high potential, and a falling period in which the high potential transitions to a low potential, the junction point between the low potential period and the rising period, and the junction point between the rising period and the high potential period are defined as "discontinuous points."

[0009] When the converter outputs pulses, there is a trade-off between characteristics (1) and (2) and between characteristics (2) and (3), making it difficult to improve the ability to follow the command pulse waveform.

[0010] SUMMARY OF THE INVENTION In order to solve the above problems, an object of the present invention is to provide a control circuit that controls the switching of a converter so as to improve the ability to follow a command pulse waveform. [Means for solving the problem]

[0011] In order to achieve the above object, the control circuit according to the present invention does not use a blunted waveform, but adds a waveform obtained by differentiating the command pulse waveform twice to the original command pulse waveform.

[0012] Specifically, the control circuit according to the present invention is a control circuit that controls a converter that includes one or more switch elements and converts power from an input side to an output side by driving the switch elements with a drive signal, a calculation unit that generates the drive signal so as to reduce a deviation between a command value of a command signal having a pulse waveform at a certain time and an output value of the converter; a signal output unit that inputs the drive signal to the converter, The calculation unit differentiates twice the rising portion of the waveform of the command signal to calculate a differentiated waveform, adds the differentiated waveform to the rising portion of the waveform of the command signal to create a new command signal, and generates the drive signal based on the new command signal.

[0013] This control circuit does not use a blunted waveform, which reduces delay time. Furthermore, this control circuit achieves a steep rise in the pulse output by correcting the rising portion of the command pulse waveform and the portion where it reaches the target value, thereby improving overshoot. In this way, this control circuit can improve both overshoot and delay time, which were previously a trade-off.

[0014] Therefore, the control circuit according to the present invention can provide a control circuit that controls the switching of the converter so as to improve the ability to follow the command pulse waveform.

[0015] Furthermore, the calculation unit of the control circuit according to the present invention is characterized in that it generates the drive signal that increases the switching frequency of the switch element set in the converter, and samples the output values ​​by performing time-interleaved operation on a plurality of AD converters.

[0016] By increasing the speed of switching control and shortening the sampling interval, the feedback loop can be made faster, improving both linearity and overshoot, which were a trade-off.However, since it is difficult to shorten the sampling interval of an AD converter, a shorter sampling interval can be achieved by connecting multiple AD converters in parallel and using time-interleaved operation.

[0017] The above inventions can be combined as much as possible. [Effects of the Invention]

[0018] The present invention can provide a control circuit that controls the switching of a converter so as to improve the ability to follow a command pulse waveform. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a diagram illustrating a general feedback control for controlling a converter. [Figure 2] 1A is a diagram illustrating three characteristics required for converter control, and FIG. 1B is a diagram illustrating the occurrence of delay time. [Figure 3] FIG. 1 illustrates a control circuit and a controlled converter according to the present invention. [Figure 4] 4A and 4B are diagrams illustrating a control method of the control circuit according to the present invention. [Figure 5] FIG. 10 is a diagram illustrating a rising portion of a waveform. [Figure 6] 10A and 10B are diagrams illustrating the effects of a control circuit according to the present invention. [Figure 7] FIG. 1 illustrates a control circuit and a controlled converter according to the present invention. [Figure 8] 1A is a diagram illustrating a signal receiving section of a control circuit according to the present invention, and FIG. 1B is a diagram illustrating time interleaving. [Figure 9] 1A is a diagram illustrating a method for realizing a high-speed feedback loop, and FIG. 1B is a diagram illustrating the effect of a control circuit according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0020] The following description of the preferred embodiments of the present invention will be given with reference to the accompanying drawings. The preferred embodiments described below are examples of the present invention, and the present invention is not limited to the preferred embodiments. In this specification and the drawings, components having the same reference numerals are intended to represent the same components.

[0021] (Embodiment 1) FIG. 3 is a diagram illustrating a control circuit 301 according to this embodiment and a converter 100 controlled by the control circuit 301. As shown in FIG. Converter 100 includes one or more switch elements, and turns on or off the switch elements with a drive signal SD to convert the voltage, current, or power from an input power source into a desired voltage, current, or power and output it to a load. Converter 100 may be a DC / DC converter, an AC / DC converter, or an inverter, and may be either an isolated or non-isolated type.

[0022] The control circuit 301 is a control circuit that controls the converter 100. a calculation unit (11) that generates a drive signal (SD) so as to reduce the deviation between a command value of a command signal (SS) having a pulse waveform at a certain time and an output value of the converter (100) (a detection value (SC) obtained by detecting the output value of the converter (100) by a detector (18)); a signal output unit 12 that inputs a drive signal SD to the converter 100; The calculation unit 11 calculates a differential waveform by differentiating twice the rising portion of the waveform of the command signal SS, and generates a waveform obtained by adding the differential waveform to the rising portion of the waveform of the command signal SS as a new command signal SS N and a new command signal SS N The drive signal SD is generated based on the

[0023] 2(A) and 2(B), there is a trade-off between characteristics (2) and (3), so shortening the delay time to bring the actual output waveform closer to the command pulse waveform results in an increase in the overshoot value. The control circuit 301 addresses this trade-off by correcting the command pulse waveform using the process shown in FIG. 4(A). (Step 1) Receive a command signal SS (command pulse waveform) from the user. (Step 2) The command pulse waveform is differentiated twice (generation of a twice-differentiated waveform). (Step 3) Command pulse waveform and double differential waveform are added to obtain corrected command signal SS N Generate.

[0024] Furthermore, the calculation unit 11 calculates a new command signal waveform SS as shown in FIG. 4(B). N The falling edge of the signal is differentiated twice to calculate the differential waveform, and a new command signal SS N The waveform obtained by adding the differential waveform to the falling edge of the waveform of is further added to a new command signal SS 2N Since undershoot occurs at the falling edge of the command signal SS (command pulse waveform), the control circuit 301 addresses this trade-off by correcting the command pulse waveform in the process of FIG. (Step 4) Command signal SS from the user (command signal SS generated in step 3) N (It's okay.) received. (Step 5) Command signal (SS or SS N ) waveform is differentiated twice (generating a twice-differentiated waveform). (Step 6) Command signal (SS or SS N ) and the twice-differential waveform are added to obtain the corrected command signal SS 2N Generate.

[0025] The "rising portion of the waveform of the command signal SS" is portion 61 in Fig. 5, for example, from any point 62 in the low potential period 60a to any point 63 in the high potential period 60b. The "falling portion of the waveform of the command signal SS" is portion 64 in Fig. 5, for example, from any point 63 in the high potential period 60b to any point 62 in the low potential period 60a.

[0026] FIG. 6 is a diagram illustrating the effect of the control circuit 301. FIG. 6 shows simulated waveforms under the same output conditions (same converter, same command pulse waveform) for the control circuit 300 (comparison example; control using a blunted waveform) and the control circuit 301 (example; control using the above-mentioned second-order differential waveform). In both the comparison example and example, (A) shows the actual output waveform (horizontal axis is time, vertical axis is current [200 A / div]), and (B) shows the overshoot value (horizontal axis is time, vertical axis is current [20 A / div]). The command signal has a target current of 600 A. The overshoot value is the output current of the actual output waveform minus the command value. Ideally, the overshoot value should be zero. The reason the overshoot value is negative is due to the delay of the blunted waveform and the second-order differential waveform. The overshoot value is 3.6 A (0.6%) in the comparative example and 2.9 A (0.5%) in the working example. On the other hand, the delay time is 25 μs in the comparative example and 9 μs in the working example, which is improved by the control circuit 301. In other words, the control circuit 301 can eliminate the trade-off between the characteristics (2) and (3) and improve the ability to follow the command pulse waveform.

[0027] (Embodiment 2) In the first embodiment, the trade-off relationship between characteristics (2) and (3) was resolved, but the trade-off relationship between characteristics (1) and (2) remains. In this embodiment, a configuration for resolving the trade-off relationship between characteristics (1) and (2) will be described.

[0028] Fig. 7 is a diagram illustrating a control circuit 302 of this embodiment and a converter 100 controlled by the control circuit 302. The control circuit 302 further includes a signal receiving unit 13 in addition to the control circuit 301 of Fig. 3. Fig. 8(A) is a diagram illustrating the signal receiving unit 13. The converter 100 is the same as that described in Fig. 3.

[0029] The calculation unit 11 generates a drive signal SD that increases the switching frequency of the switch element set in the converter 100. The signal receiving unit 13 includes a calculator 17 that samples the detection value SC by time-interleaving a plurality of AD converters 15-n (n is a natural number). The calculator 17 is a field programmable gate array (FPGA) or a complex programmable logic device (CPLD).

[0030] To improve characteristics (1) and (2), it is effective to speed up the feedback loop. There are two methods for speeding up the feedback loop, as shown in Figure 9(A). ·Method α The linearity of characteristic (1) can be improved by increasing the switching frequency of converter 100. For example, if the normal switching frequency of converter 100 is 100 kHz, it should be doubled to 200 kHz. The normal switching frequency is determined by the converter structure, losses, etc., but is usually around 10 kHz to 500 kHz. Increasing the switching frequency reduces the ripple component described in Figure 9(B). Therefore, if you want to reduce the ripple component appearing in the actual output waveform of the current converter 100 to 1 / m, you should multiply the switching frequency currently set in converter 100 by m. ·Method β When the switching frequency is increased, the sampling interval of the detection value SC of the actual output waveform must also be shortened. The speed of the calculation process can be increased by changing the calculator 17 from a microcomputer to an FPGA or CPLD. However, since the processing speed of the AD converter cannot keep up with the sampling interval, the detection value SC cannot be input to the calculator 17 in real time, and it may not be possible to speed up the feedback loop.

[0031] Therefore, the signal receiving unit 13 arranges multiple AD converters (ADC15-1 to n) in parallel as shown in FIG. 8(A) and performs time-interleaved operation as shown in FIG. 8(B) (detection value SC is AD-converted by shifting the phase (timing) of the sampling point 71 of each AD converter). By performing time-interleaved operation on multiple AD converters, the apparent processing speed of the AD converters increases, enabling high-speed calculation processing. In the case of FIG. 8(B), the AD conversion processing speed of the detection value SC becomes m times faster.

[0032] FIG. 13 is a diagram illustrating the effect of the control circuit 302, showing actual output waveforms under control by the control circuit 300 (comparative example) and the control circuit 302 (embodiment) under the same output conditions (same converter, same command pulse waveform). FIG. 9(B)(I) shows the actual output waveform, and FIGS. 9(B)(II) and (III) show enlarged views of portion 81. FIG. 9(B)(II) shows the comparative example, showing ripple components with a sampling time of 10 μs (100 kHz), while FIG. 9(B)(III) shows the embodiment, showing ripple components with a sampling time of 1.2 μs (833 kHz). In FIGS. 9(B)(II) and (III), the horizontal axis represents time, and the vertical axis represents current [250 mA / div].

[0033] The ripple component is approximately 0.5 A in the comparative example and approximately 0.1 A in the working example. By using the control circuit 302, the ripple component can be reduced to approximately 1 / 5, improving linearity. Furthermore, by reducing the ripple component, the amount of overshoot can also be reduced. The details are as follows: The calculation unit 11 performs PID control, and when the ripple component contained in the output waveform is large (FIG. 9(B)(II)), it is necessary to increase the effect of integral control (I) to stabilize the control, resulting in overshoot. On the other hand, when the ripple component contained in the output waveform is small (FIG. 9(B)(III)), the effect of integral control (I) can be reduced, making the overshoot smaller than in the case of FIG. 9(B)(II). In other words, the control circuit 302 can eliminate the trade-off between the characteristics (1) and (2) and improve the ability to follow the command pulse waveform. [Explanation of symbols]

[0034] 11: Arithmetic section 12: Signal output section 13: Signal receiving unit 15, 15-1, 15-2, ..., 15-n: AD converter 17: Arithmetic unit 60a: Low potential period 60b: High potential period 61: Rising part 62, 63: Any time 71: Sampling point 81: Enlarged section 100: Converter 300-302: Control circuit

Claims

1. A control circuit for controlling a converter that includes one or more switch elements and converts power from an input side to an output side by driving the switch elements with a drive signal, a calculation unit that generates the drive signal so as to reduce a deviation between a command value of a command signal having a pulse waveform at a certain time and an output value of the converter; a signal output unit that inputs the drive signal to the converter, the calculation unit calculates a differentiated waveform by differentiating twice a rising portion of the waveform of the command signal, adds the differentiated waveform to the rising portion of the waveform of the command signal, and sets the waveform obtained by adding the differentiated waveform to the rising portion of the waveform of the command signal as a new command signal, and generates the drive signal based on the new command signal.

2. 2. The control circuit according to claim 1, wherein the calculation unit calculates a differentiated waveform by differentiating twice a falling portion of the waveform of the command signal, and adds the differentiated waveform to the falling portion of the waveform of the command signal to obtain the new command signal.

3. The calculation unit generating the drive signal to increase the switching frequency of the switch element set in the converter; and Sampling the output values ​​by time-interleaving a plurality of AD converters.

3. The control circuit according to claim 1 or 2, wherein:

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