Manufacturing method of silicon wafer

The Czochralski process with controlled thermal processing and BMD precipitation effectively addresses afterimage and white scratch defects in silicon wafers by uniformly forming BMDs to getter metal impurities and reduce oxygen concentration, improving imaging element performance.

JP2025150532APending Publication Date: 2025-10-09GLOBALWAFERS JAPAN
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Patent Information

Application Number
JP2024051446
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-27
Publication Date
2025-10-09

AI Technical Summary

Technical Problem

Conventional methods for manufacturing silicon wafers used in imaging elements face issues with afterimage degradation and white scratch defects due to oxygen and metal impurities, which are challenging to address without increasing manufacturing costs.

Method used

A method involving the Czochralski process to grow silicon wafers with specific oxygen and nitrogen concentrations, followed by rapid thermal processing and surface layer removal, along with controlled cooling and BMD precipitation heat treatment, to uniformly form bulk micro defects (BMDs) that getter metal impurities and reduce oxygen concentration.

Benefits of technology

The method improves afterimage characteristics and suppresses white scratch defects by uniformly forming BMDs in the radial direction, enhancing the silicon wafer's performance in imaging devices.

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Abstract

To provide a manufacturing method of a silicon wafer capable of improving afterimage characteristic degradation and white defect defects when the silicon wafer is used for an imaging device.SOLUTION: A manufacturing method of a silicon wafer, includes: a step of growing a silicon single crystal having an oxygen concentration of 5×1017 atoms / cm3 or more and 9×1017 atoms / cm3 or less and a void defect density of 1×108 defects / cm3 or less by a Czochralski method; a step of cutting out a silicon wafer from the silicon single crystal; a rapid heat treatment step of setting a maximum temperature of the silicon wafer to 1275°C or more and 1350°C or less in an oxygen-containing atmosphere, a holding time at the maximum temperature to 1 second or more and 30 seconds or less, and a cooling rate from the maximum temperature to 1000°C to 75°C / sec or more and 150°C / sec or less; and a surface layer removing step of removing a surface layer of the silicon wafer by 0.2 μm or more after the rapid heat treatment step.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a silicon wafer, and more particularly to a method for manufacturing a silicon wafer that can improve degradation of afterimage characteristics and white defects when used for an imaging element. [Background technology]

[0002] Silicon wafers used as substrates for semiconductor devices are required to not only eliminate defects in the surface layer but also to have mechanical strength and gettering ability to capture metal impurities in order to improve device quality. To meet these requirements, efforts have been made to create oxygen precipitates called BMDs (Bulk Micro Defects) inside the wafer.

[0003] For example, in a heat treatment method for silicon wafers disclosed in Patent Document 1 (JP 2015-204326 A), rapid thermal processing (hereinafter referred to as RTP) is performed on silicon wafers at 1300°C or higher to eliminate void defects and minute oxygen precipitate nuclei formed during crystal growth while leaving atomic vacancies (hereinafter referred to as vacancies), which are point defects, in the silicon wafer bulk. This allows vacancy-induced BMDs to form in the wafer during subsequent heat treatment.

[0004] Furthermore, Patent Document 2 (JP 2010-267846 A) proposes a technology for forming BMDs in the wafer bulk by subjecting a silicon wafer consisting of a defect-free region (a region where no voids are detected) to RTP at a maximum temperature of 1250°C for 10 seconds. When using defect-free crystals, there is no need to eliminate void defects, so there is no problem even if the maximum RTP temperature is as low as 1250°C. In addition, Patent Document 2 proposes that the oxygen concentration be set at 8×10 to promote BMD formation. 17 atoms / cm 3 That's all.

[0005] In recent years, silicon wafers, which have excellent mechanical strength and gettering ability, have been widely used as imaging elements in imaging devices, such as CMOS image sensors. However, conventional imaging devices have a problem in that image quality deteriorates due to the generation of afterimages. One cause of afterimages is the presence of oxygen in silicon. Patent Document 3 (JP 2007-251074 A) relates to solid-state imaging devices and describes that the lower the oxygen concentration in a semiconductor substrate, the less afterimages there are.

[0006] Another issue with image sensors is that the number of defects known as white scratches appears as noise in the dark output characteristics of the image sensor. This is primarily caused by metal contamination. When metal impurities are present in the photodiode of an image sensor, they form deep levels in the silicon band gap and trap carriers. One effective way to reduce the number of white scratches is to form BMDs within the wafer and have the BMDs getter metal impurities that have been mixed into the wafer, as disclosed in Patent Document 1, for example.

[0007] In response to the issues with the imaging elements described above, Patent Document 4 (JP 2019-79834 A) proposes a process of forming a silicon epitaxial layer on a silicon substrate, and then removing the native oxide film on the surface of the formed silicon epitaxial layer, followed by a process of performing RTA treatment to reduce degradation of image retention characteristics and white defects. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-204326 [Patent Document 2] Japanese Patent Application Laid-Open No. 2010-267846 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-251074 [Patent Document 4] Japanese Patent Application Publication No. 2019-79834 Summary of the Invention [Problem to be solved by the invention]

[0009] However, the process of forming an epitaxial layer on a silicon wafer requires special equipment and precise control of operating conditions, which may increase the cost of manufacturing silicon wafers.

[0010] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a silicon wafer that can improve degradation of afterimage characteristics and white scratch defects when used for an imaging element. [Means for solving the problem]

[0011] The present invention provides a method for producing a silicon wafer, which is made to solve the above problems, by using the Czochralski method to produce a silicon wafer having an oxygen concentration of 5×10 17 atoms / cm 3 Over 9 x 10 17 atoms / cm 3 Below 1×10 8 pieces / cm 3 a step of growing a silicon single crystal having a temperature of 1275°C or higher and 1350°C or lower, a step of cutting silicon wafers from the silicon single crystal, a step of rapid thermal processing of the silicon wafer in an oxygen-containing atmosphere, the maximum temperature being 1275°C or higher and 1350°C or lower, the holding time at the maximum temperature being 1 second or higher and 30 seconds or lower, and the cooling rate from the maximum temperature to 1000°C being 75°C / second or higher and 150°C / second or lower, and a step of removing a surface layer of the silicon wafer by 0.2 μm or more after the rapid thermal processing step.

[0012] The average size of the void defects is preferably less than 45 nm in diameter in terms of a sphere. The diameter in terms of a sphere is calculated by the formula: defect volume = sphere volume ((4πr 3 ) / 3) is taken as r × 2. It is also preferable that the oxygen partial pressure in the rapid thermal processing step is 5% or less. In the step of growing the silicon single crystal, the nitrogen concentration of the silicon single crystal is 1×10 13 atoms / cm 3 More than 1×10 15 atoms / cm 3 It is preferable that: In the step of growing the silicon single crystal, it is preferable that the cooling time from 1150°C to 1050°C after pulling the single crystal is 50 minutes or less, and the cooling time from 800°C to 400°C is 30 minutes or more. Furthermore, in the step of slicing silicon wafers from the silicon single crystal, it is preferable that the silicon wafers contain one or more of a V-rich region (a region having defects formed by agglomeration of vacancies caused by a shortage of silicon atoms), a DSOD region (a region where DSOP, which is a minute COP having a size of about 10 to 20 nm, may occur), an OSF region (a region where oxygen-induced defects called OSFs (oxidation-induced stacking faults) and their nuclei exist at high density), and an Nv region (a neutral region where vacancies predominate over interstitial silicon point defects). Furthermore, it is preferable to provide a BMD precipitation heat treatment process after the surface layer removal process, and to set the in-plane uniformity (Std. / Ave.) of BMD density to 10% or less. The in-plane uniformity (Std. / Ave.) has a standard deviation Std. ( / cm 3 ) is the average value Ave.( / cm 3 ) and multiplied by 100 (%). The silicon wafer is also suitable for use in imaging devices.

[0013] According to this manufacturing method, the oxygen concentration of the silicon single crystal from which the silicon wafer is cut is set to 5×10 17 atoms / cm 3 Over 9 x 10 17 atoms / cm 3 Below, the density of void defects is 1×10 8 pieces / cm 3By setting the conditions as follows, the oxygen concentration in the surface layer of the sliced ​​silicon wafer can be reduced, and BMD formed in the wafer bulk can be uniformly formed in the radial direction, thereby improving degradation of afterimage characteristics. Furthermore, the formed BMD can getter heavy metals and suppress the occurrence of white scratches when the silicon wafer is used in an imaging device. [Effects of the Invention]

[0014] According to the present invention, it is possible to provide a method for producing a silicon wafer that can improve degradation of afterimage characteristics and white flaw defects when used for an imaging element. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a flow chart showing the flow of the method for producing a silicon wafer according to the present invention. [Figure 2] FIG. 2 is a cross-sectional view of a single crystal pulling apparatus used to grow a silicon single crystal, which is applied to the silicon wafer manufacturing method of FIG. [Figure 3] FIG. 3 is a cross-sectional view showing one embodiment of a rapid temperature ramping and cooling heat treatment apparatus (RTP apparatus) to which the silicon wafer manufacturing method of the present invention is applied. [Figure 4] FIG. 4 is a graph showing the results of Experiment 1. [Figure 5] FIG. 5 is a graph showing the results of Experiment 2. [Figure 6] FIG. 6 is a graph showing the results of Experiment 3. DETAILED DESCRIPTION OF THE INVENTION

[0016] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will now be described with reference to the accompanying drawings. The method for producing a silicon wafer of the present invention is particularly suitable for use as an imaging device. 1 is a flow chart showing the flow of the method for producing a silicon wafer of the present invention. As shown in FIG. 1, the method for producing a silicon wafer of the present invention begins with annealing a silicon wafer at an oxygen concentration of 5×10 17atoms / cm 3 Over 9 x 10 17 atoms / cm 3 Below 1×10 8 pieces / cm 3 The following silicon single crystal is grown by the Czochralski method (step S1).

[0017] Next, silicon wafers are cut from the grown silicon single crystal (step S2), and then subjected to a rapid thermal processing (RTP) process in an oxygen-containing atmosphere, with a maximum temperature of 1275°C to 1350°C, a holding time at the maximum temperature of 1 second to 30 seconds, and a cooling rate from the maximum temperature to 1000°C of 75°C / second to 150°C / second (step S3).

[0018] After the rapid thermal processing step, a surface layer removal step is performed to remove the surface layer of the silicon wafer by 0.2 μm or more (step S4). Furthermore, after step S4, it is preferable to perform a BMD precipitation heat treatment (step S5).

[0019] Next, the processing contents of each main step will be described in detail. First, in step S1, a silicon single crystal is grown by the Czochralski method (CZ method). Figure 2 is a cross-sectional view showing a part of a single crystal pulling apparatus. In growing silicon single crystals by the CZ method, a quartz crucible 51 placed in a chamber 50 as shown in FIG. 2 is filled with polysilicon as a raw material, and the polysilicon is heated and melted by a heater 52 provided around the quartz crucible 51 to form a silicon melt M. After the silicon melt M is formed, a seed crystal (seed) P attached to a seed chuck is immersed in the silicon melt M, and the seed chuck is pulled up while rotating the seed chuck and the quartz crucible 51 in the same direction or in opposite directions.

[0020] Before the start of pulling, after the temperature of the silicon melt M has stabilized, the seed crystal P is brought into contact with the silicon melt M to perform necking, which melts the tip of the seed crystal P. Necking is an essential process for removing dislocations that occur in the silicon single crystal due to thermal shock caused by contact between the seed crystal P and the silicon melt M. This necking forms a neck portion P1, which must have a diameter of 3 to 4 mm and a length of at least 30 mm.

[0021] In addition, the processes after the start of pulling include, after necking is completed, a shoulder C1 formation process to expand the crystal to the diameter of the straight body (for example, a diameter of 300 mm), a straight body C2 formation process to grow the single crystal that will become the product, and a tail (not shown) formation process to gradually reduce the diameter of the single crystal after the straight body formation process.

[0022] At this time, the oxygen concentration of the silicon single crystal to be grown is 5×10 17 atoms / cm 3 Over 9 x 10 17 atoms / cm 3 or less (more preferably, 8 × 10 17 atoms / cm 3 void defect density is 1×10 8 pieces / cm 3 The oxygen concentration in the silicon melt M is adjusted to the following:

[0023] The oxygen concentration of the silicon single crystal is 9×10 17 atoms / cm 3 By setting the oxygen concentration in the surface layer of the silicon wafer to the following value, it is possible to reduce the oxygen concentration in the surface layer of the silicon wafer and improve the degradation of the afterimage characteristics. On the other hand, in order to precipitate BMDs in the BMD precipitation heat treatment in step S5, a certain oxygen concentration is required. In the present invention, the oxygen concentration of the silicon wafer is set to 5×10 17 atoms / cm 3 It must be at least 5 x 10 17 atoms / cm 3 If it is less than this, it becomes difficult to precipitate BMD.

[0024] Furthermore, for image retention characteristics, uniformity of oxygen concentration in the wafer radial direction is important, and at the same time, BMD formed in the wafer bulk must be uniformly formed in the radial direction, and BMD density can be used as an index. During the heat treatment process of the device, interstitial oxygen can be released from the BMD (composition is SiO2) of the silicon wafer and diffuse into the photodiode. If the BMD is non-uniform in the radial direction, the amount of interstitial oxygen will also be non-uniform in the radial direction, which is presumed to result in a deterioration of image lag characteristics.

[0025] BMDs in silicon wafers that have undergone RTP are formed due to vacancies, but when void defects (vacancy aggregates) disappear during RTP, the vacancies are released. Therefore, in areas where many void defects exist (mainly the center of the wafer), the concentration of vacancies remaining in the wafer increases, causing the BMDs that are formed to be non-uniform in the radial direction. For this reason, the density of void defects is set to 1×10 during silicon single crystal growth to a level that prevents the BMDs that are formed from being non-uniform in the radial direction. 8 pieces / cm 3 The following needs to be controlled:

[0026] Furthermore, to ensure BMD formation during RTP, void defects must be of a size that disappears during RTP (less than 45 nm, preferably less than 41 nm, and more preferably less than 35 nm). The reason for setting the size of void defects to a size that disappears during RTP is that void defects are made up of aggregates of vacancies, and their elimination during RTP increases the vacancy concentration in the wafer. In other words, this increases the number of vacancies that contribute to BMD formation during RTP, which is advantageous for BMD formation.

[0027] The nitrogen concentration of the silicon single crystal is 1×10 13 atoms / cm 3 More than 1×10 15 atoms / cm 3 It is preferable that: In crystal growth, nitrogen doping can reduce the size of void defects, so the nitrogen concentration is set to 1×1013 atoms / cm 3 It is important to do the above. Nitrogen pairs with vacancies, so there are 1×10 13 atoms / cm 3 If nitrogen is present in the alloy, the vacancy concentration after RTP increases, promoting BMD precipitation. 15 atoms / cm 3 If the concentration exceeds this, nitrogen aggregates may form and may not dissolve in the RTP.

[0028] After the crystal is pulled, it is preferable that the cooling time from 1150° C. to 1050° C. is 50 minutes or less, and the cooling time from 800° C. to 400° C. is 30 minutes or more. Controlling voids and oxygen precipitates is important during crystal growth before slicing into silicon wafers. In particular, since voids and oxygen precipitates are generated based on vacancies and dissolved oxygen during the cooling process of crystal growth, the conditions of the cooling process are important. In the cooling process after pulling up a crystal using the CZ method, shortening the exposure time around 1100°C and lengthening the exposure time around 650°C can reduce the density of void defects to 1×10 8 pieces / cm 3 By setting the temperature range to 45 nm or less, the average size of void defects can be reduced to less than 45 nm, and the formation of oxygen precipitates can be promoted. The exposure time for each temperature range in the cooling step can be set arbitrarily within the range of conditions.

[0029] In step S2 of slicing the grown silicon single crystal to form silicon wafers, it is preferable to use a silicon single crystal from a V-rich region, a DSOD region, an OSF region, or an Nv region. This is because, in order to increase the vacancy concentration, a crystal region closer to V-rich is more desirable than a neutral crystal region in which void defects are completely undetectable.

[0030] In the RTP step S3, the formed silicon wafer is subjected to a predetermined heat treatment using, for example, a rapid temperature rise / fall heat treatment apparatus (RTP apparatus) shown in FIG. 3, the RTP apparatus 1 includes a chamber (reaction tube) 20 having an atmospheric gas inlet 20a and an atmospheric gas outlet 20b, a plurality of lamps 30 spaced apart above the chamber 20, and a substrate support 40 that supports a silicon wafer W in a reaction space 25 within the chamber 20. Although not shown, the RTP apparatus 1 also includes a rotation means that rotates the silicon wafer W around its central axis at a predetermined speed.

[0031] The substrate support unit 40 includes a ring 10 that supports the outer periphery of the silicon wafer W, and a stage 40a that supports the ring 10. The chamber 20 is made of, for example, quartz. The lamps 30 are made of, for example, halogen lamps. The stage 40a is made of, for example, quartz. This RTP apparatus 1 can uniformly heat and process the entire silicon wafer W with a temperature increase / decrease gradient of 10°C / sec or more and 180°C / sec or less.

[0032] The temperature control within the reaction space 25 in the RTP device 1 is performed by measuring the average temperature at multiple points (e.g., nine points) within the substrate surface in the radial direction of the lower part of the silicon wafer W using multiple radiation thermometers embedded in the stage 40a of the substrate support part 40, and controlling the multiple halogen lamps 30 (such as individually controlling the ON / OFF of each lamp and controlling the emission intensity of the emitted light) based on the measured temperature.

[0033] In the RTP apparatus 1 configured as above, first, the silicon wafer W is placed and fixed on the ring 10. This ring 10 is then fixed to the top of the stage 40a installed in the reaction space 25 under an oxidizing atmosphere so that the top surface of the silicon wafer W is approximately parallel to the stage 40a.

[0034] Furthermore, a process gas is introduced through the atmospheric gas inlet 20a, and the gas in the reaction space 25 is exhausted through the atmospheric gas outlet 20b, forming a predetermined airflow above the silicon wafer W. Here, the oxygen partial pressure in the reaction space 25 is preferably set to 5% or less. Next, the halogen lamps 30 arranged in an equal arrangement are individually controlled by feedback from the surface temperature of the silicon wafer W to rapidly heat the silicon wafer W while controlling the surface temperature of the silicon wafer W, thereby performing a heat treatment on the silicon wafer W.

[0035] Specifically, rapid heat treatment is performed in an oxygen-containing atmosphere (preferably, an oxygen partial pressure of 5% or less), with a maximum temperature of 1275°C or higher and 1350°C or lower, a holding time at the maximum temperature of 1 second or higher and 30 seconds or lower, and a cooling rate from the maximum temperature to 1000°C of 75°C / second or higher and 150°C / second or lower. These heat treatment conditions are RTP conditions that eliminate void defects and leave vacancies. By performing RTP in this manner, it is possible to obtain silicon wafers with low oxygen concentration and low BMD density, but with heavy metal gettering capabilities. In other words, heavy metals are gettered by BMD, and the occurrence of white scratches can be suppressed when the silicon wafer is used in an image sensor.

[0036] The holding time at the maximum temperature can be adjusted according to the average size of voids in the wafer, and is at least 1 second, preferably 5 seconds or more. If the holding time at the maximum temperature exceeds 30 seconds, the throughput will be long and there is a risk of metal contamination, so it must be set arbitrarily to 30 seconds or less. The oxygen partial pressure in the reaction space 25 is set to 5% or less because the residual vacancy concentration in the wafer depends on the oxygen partial pressure of the RTP. That is, the lower the oxygen partial pressure, the less interstitial silicon is generated, which increases the residual vacancy concentration and promotes BMD precipitation. On the other hand, the reduced interstitial silicon generation makes it difficult to eliminate void defects, so there is a trade-off.

[0037] In step S4, after RTP, the surface layer of the silicon wafer is removed by at least 0.2 μm using a polishing device. During RTP, the oxygen concentration becomes supersaturated within the wafer surface layer of 0.2 μm, and void defects do not disappear. Therefore, they must be removed by polishing or other methods.

[0038] In step S5, a BMD precipitation heat treatment is performed. This BMD precipitation heat treatment can be performed under any of the conventional heat treatment conditions for precipitating BMDs, or can be performed as a heat treatment process (device heat treatment) used in manufacturing semiconductor devices such as image sensors. In one embodiment of the present invention, the BMD precipitation heat treatment is performed in an Ar atmosphere at a temperature increase rate of 5°C / min at 1000°C for 2 hours. This results in an in-plane uniformity (Std. / Ave.) of BMD density of 10% or less, and the BMDs formed due to residual vacancies after RTP are uniform in the wafer radial direction, resulting in uniform image lag characteristics in the wafer radial direction.

[0039] As described above, according to the embodiment of the present invention, the oxygen concentration of the silicon single crystal from which the silicon wafer is cut is set to 5×10 17 atoms / cm 3 Over 9x10 17 atoms / cm 3 Below, the density of void defects is 1×10 8 pieces / cm 3 By setting the conditions as follows, the oxygen concentration in the surface layer of the sliced ​​silicon wafer can be reduced, and BMD formed in the wafer bulk can be uniformly formed in the radial direction, thereby improving degradation of afterimage characteristics. Furthermore, the formed BMD can getter heavy metals and suppress the occurrence of white scratches when the silicon wafer is used in an imaging device. [Example]

[0040] The silicon wafer manufacturing method according to the present invention will be further described based on examples. In these examples, the following experiments were carried out based on the above-described embodiment.

[0041] (Experiment 1) In Experiment 1, the relationship between the processing temperature and time for reducing the number of residual voids in a wafer by RTP to the criterion of 100 voids / wf. or less was examined. The cooling rate from the maximum temperature of RTP to 1000°C was 100°C / s, and the nitrogen concentration in the wafer was 1×10 14 atoms / cm3 It was decided. The oxygen concentration in the wafer is 7×10 17 atoms / cm 3 The void defect density at the center of the wafer, where the void defects are most prevalent, is approximately 1×10 8 pieces / cm 3 The wafers used were controlled to have average void sizes (equivalent spherical diameters) of 43.7 nm, 42.2 nm, 40.5 nm, 34.7 nm, and 31.9 nm. These void defects were evaluated using an IR tomography LST2500HD (manufactured by Semilab Japan).

[0042] Using the above wafers, we evaluated the annihilation of void defects by RTP. The graph in Figure 4 shows the evaluation results of the number of remaining void defects after RTP at 1275°C in an atmosphere with a 100% oxygen partial pressure. To evaluate the number of residual void defects, the wafer surface layer after RTP was polished away by approximately 1 μm, and the number of LPDs 19 nm or larger was measured using a Surfscan SP5 (KLA-Tencor). The detected LPDs were then observed with an SEM to determine whether they were voids or not. The graph in Figure 4 shows that, when the criterion for determining residual voids is set at 100 / wf or less, the criterion can be met when the average size of void defects is 42.2 nm or less and the holding time at 1275°C is between 1 and 30 seconds.

[0043] (Experiment 2) In Experiment 2, the number of residual void defects was evaluated after RTP at 1350°C in an atmosphere with an oxygen partial pressure of 1%. Other conditions were the same as in Experiment 1. The results of Experiment 2 are shown in the graph in Figure 5. Compared to Experiment 1, the conditions for Experiment 2 were such that the oxygen partial pressure was lowered to increase the residual vacancy concentration and promote BMD precipitation. Therefore, the oxygen partial pressure conditions make it difficult for void defects to disappear, but the void defect elimination effect was improved by increasing the RTP heat treatment temperature. As shown in the graphs of Figures 4 and 5, the criteria were met when the average void size was 43.7 nm or less and the holding time at 1350°C was between 1 second and 30 seconds.

[0044] (Experiment 3) In experiment 3, the BMD density distribution in the wafer radial direction was evaluated when BMDs were precipitated after RTP. 17 atoms / cm 3 , nitrogen concentration is 1×10 14 atoms / cm 3 and the void defect density is 5×10 7 pieces / cm 3 (Example 1), 1 × 10 8 pieces / cm 3 (Example 2), 6 × 10 8 pieces / cm 3 Using the wafer of (Comparative Example 1), the RTP conditions were 1350°C for 20 seconds, a cooling rate of 100°C / sec, and an oxygen partial pressure of 1% (argon gas 99%), and the wafer surface layer after RTP was polished and removed by approximately 1 μm.

[0045] The BMD precipitation heat treatment was carried out in an argon gas atmosphere, with the temperature rising at 5° C. / min and held at 1000° C. for 2 hours. The BMD density was inspected and evaluated using an IR tomography LST2500HD (manufactured by Nippon Semilab Co., Ltd.). The graph in Figure 6 shows the BMD density distribution as a result of Experiment 3. When the in-plane uniformity of BMD density (Std. / Ave.) was set to 10% or less as the criterion, the void defect density was 5×10 7 pieces / cm 3 In the case of (Example 1), the in-plane uniformity of BMD density was 5.7%, 1 × 10 8 pieces / cm 3 In the case of Example 2, the in-plane uniformity of BMD density was 5.2%, and each wafer cleared the criteria, but the void defect density was 6×10 8 pieces / cm 3 In the case of (Comparative Example 1), the in-plane uniformity of the BMD density was 11.2%, and the wafer did not meet the evaluation criteria.

[0046] Void defect density 6×10 8 pieces / cm 3The reason for the poor BMD in-plane uniformity of this wafer is that the residual vacancy concentration rises partially as voids near the wafer center disappear during RTP. If the residual vacancy concentration rises near the center, where the void defect density is high, and the BMD in-plane uniformity exceeds 10%, as mentioned above, when interstitial oxygen is released from the BMD during the device manufacturing process, the amount of interstitial oxygen that can diffuse into the photodiode becomes non-uniform in the radial direction, which causes non-uniformity in the radial image lag characteristics. [Explanation of symbols]

[0047] 1 RTP device 20 chamber (furnace) 25 Reaction Space 30 halogen lamp 40 Substrate support 40a Stage 50 Chambers C Silicon single crystal M Silicon melt W Silicon wafer

Claims

1. By the Czochralski method, the oxygen concentration is 5 × 10 17 atoms / cm 3 9 x 10 or more 17 atoms / cm 3 Below 1×10 8 pieces / cm 3 A step of growing a silicon single crystal, cutting silicon wafers from the silicon single crystal; a rapid thermal treatment step for the silicon wafer in an oxygen-containing atmosphere, the maximum temperature being 1275°C or higher and 1350°C or lower, the holding time at the maximum temperature being 1 second or higher and 30 seconds or lower, and the cooling rate from the maximum temperature to 1000°C being 75°C / second or higher and 150°C / second or lower; a surface layer removing step of removing a surface layer of the silicon wafer by 0.2 μm or more after the rapid thermal processing step; A method for manufacturing a silicon wafer, comprising:

2. 2. The method for producing a silicon wafer according to claim 1, wherein the average size of the void defects is less than 45 nm in diameter in terms of a sphere.

3. 2. The method for producing a silicon wafer according to claim 1, wherein the partial pressure of oxygen in the rapid thermal processing step is set to 5% or less.

4. In the step of growing the silicon single crystal, The nitrogen concentration of the silicon single crystal is 1×10 13 atoms / cm 3 1x10 or more 15 atoms / cm 3 2. The method for producing a silicon wafer according to claim 1, wherein the following is true:

5. In the step of growing the silicon single crystal, 2. The method for producing a silicon wafer according to claim 1, wherein the cooling time from 1150°C to 1050°C after pulling the single crystal is set to 50 minutes or less, and the cooling time from 800°C to 400°C is set to 30 minutes or more.

6. In the step of cutting silicon wafers from the silicon single crystal, 2. The method for producing a silicon wafer according to claim 1, wherein the silicon wafer includes at least one of a V-rich region, a DSOD region, an OSF region, and an Nv region.

7. After the surface layer removing step, A BMD precipitation heat treatment step is provided, 2. The method for producing a silicon wafer according to claim 1, wherein the in-plane uniformity (Std. / Ave.) of BMD density is set to 10% or less.

8. 2. The method for producing a silicon wafer according to claim 1, wherein the silicon wafer is for use in an image pickup device.

Citation Information

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