Thin film chip resistor

Abstract

To provide a thin film chip resistor capable of preventing the resistance value from becoming unstable due to the heat generated by trimming and absorbed by a second parallel resistor pattern.SOLUTION: The thin film chip resistor includes a second parallel resistor pattern 24e in which an adjacent folded portion of a zigzag resistor pattern 24b is connected by a substantially U-shaped resistor pattern 24d. Each of the approximately U-shaped resistor patterns 24d has a separate trimming groove 30b formed opposite the longitudinal side of an insulating circuit board 21.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a thin film chip resistor used in various electronic devices. [Background technology]

[0002] FIG. 4 is a cross-sectional view of a conventional thin film chip resistor, and FIG. 5 is a top view of the conventional thin film chip resistor with the protective film layer and the top electrode layer removed.

[0003] As shown in Figures 4 and 5, a conventional thin-film chip resistor is composed of a pair of top electrode layers 2 made of a metal organic compound primarily composed of gold and formed on both ends of the top surface of a rectangular insulating substrate 1 made of an alumina substrate with an alumina purity of approximately 96%; a pair of back electrode layers 3 made of a metal organic compound primarily composed of gold and formed on both ends of the back surface of the insulating substrate 1; a thin-film resistor layer 4 made of a nickel-chromium alloy or the like that covers the pair of top electrode layers 2 and is formed to be electrically connected to the pair of top electrode layers 2; a pair of top electrode layers 5 made of a conductive resin that covers the thin-film resistor layer 4 and is formed on both ends of the top surface of the insulating substrate 1; a protective film layer 6 made of an epoxy resin that covers the thin-film resistor layer 4 and covers part of the pair of top electrode layers 5; a pair of end electrode layers 7 formed on both ends of the insulating substrate 1 respectively to electrically connect the top electrode layer 5 and back electrode layer 3; and an electrode plating layer 8 made of a nickel plating layer and a tin plating layer that is formed by plating on the exposed electrode portions. As shown in Figure 5, a resistor pattern of thin-film resistor layer 9 was used, which allows a large resistance value to be obtained with one resistor pattern by forming a parallel circuit of resistor patterns that realizes large resistance value rounding without the parts that contribute to the resistance value being damaged by the laser and cutting part of it with a laser to form a trimming part.That is, the thin film resistor layer 9 electrically connected to a pair of upper surface electrode layers 2 formed at both ends of the upper surface of the insulating substrate 10 is made up of a fine adjustment resistor pattern 9b formed at the tip of a zigzag resistor pattern 9a electrically connected to one of the pair of upper surface electrode layers 2, a ladder-shaped first parallel resistor pattern 9c for coarse adjustment electrically connected to the fine adjustment resistor pattern 9b, and a resistor pattern electrically connected between the first parallel resistor pattern 9c and the other of the pair of upper surface electrode layers 11. The resistor pattern of the thin film resistor layer 9 is configured by connecting a resistor pattern 9f to a folded portion 9e of the zigzag resistor pattern 9d and a second parallel resistor pattern 9g for coarse adjustment, the resistor pattern 9b for fine adjustment, the ladder-shaped first parallel resistor pattern 9c for coarse adjustment, and the second parallel resistor pattern 9g for coarse adjustment, which are respectively partially cut with a laser to form trimming portions 12a, 12b, and 12c, thereby enabling the use of a resistor pattern of the thin film resistor layer 9 to obtain many resistance values ​​with one resistor pattern.

[0004] As prior art document information relating to the invention of this application, for example, Patent Document 1 is known. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Unexamined Patent Publication No. 1-251601 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the above-described conventional configuration, when trimming the folded portion 9e of the second parallel resistor pattern 9g having a substantially U-shape, the second parallel resistor pattern 9g is trimmed substantially parallel to the longitudinal direction of the insulating substrate 10. Therefore, the second parallel resistor pattern 9g receives heat generated by trimming the adjacent second parallel resistor pattern 9g, and the resistance value fluctuates. The problem was that it was difficult to do.

[0007] The present invention solves the above-mentioned conventional problems and aims to provide a thin film chip resistor in which the resistance value does not become unstable due to the second parallel resistor pattern being exposed to heat generated by trimming. [Means for solving the problem]

[0008] The invention of claim 1 of the present invention comprises an insulating substrate, a pair of upper surface electrode layers provided at both ends of an upper surface of the insulating substrate, a thin-film resistor layer provided so as to be electrically connected to the pair of upper surface electrode layers, and a protective film layer covering the thin-film resistor layer, wherein the thin-film resistor layer comprises a ladder-shaped first parallel resistor pattern for coarse adjustment electrically connected to one of the pair of upper surface electrode layers, and a second parallel resistor pattern for coarse adjustment electrically connected to the first parallel resistor pattern and formed by connecting adjacent folded portions of a zigzag resistor pattern with a substantially U-shaped resistor pattern, and each of the substantially U-shaped resistor patterns is provided with a separate trimming groove so as to face a longitudinal side of the insulating substrate. With this configuration, the second parallel resistor pattern is less susceptible to heat generated by trimming the adjacent second parallel resistor pattern, thereby achieving an advantageous effect of stabilizing the resistance value. [Effects of the Invention]

[0009] The thin film chip resistor of the present invention comprises an insulating substrate, a pair of upper surface electrode layers provided at both ends of the upper surface of the insulating substrate, a thin film resistor layer provided so as to be electrically connected to the pair of upper surface electrode layers, and a protective film layer covering the thin film resistor layer, and the thin film resistor layer is provided with a ladder-shaped first parallel resistor pattern for coarse adjustment electrically connected to one of the pair of upper surface electrode layers, and a second parallel resistor pattern for coarse adjustment electrically connected to the first parallel resistor pattern and formed by connecting adjacent folded portions of a zigzag resistor pattern with an approximately U-shaped resistor pattern, and each of the approximately U-shaped resistor patterns is provided with a separate trimming groove so as to face the longitudinal side of the insulating substrate.With this configuration, the second parallel resistor pattern is less likely to be exposed to heat generated by trimming the adjacent second parallel resistor pattern, and this has the effect of providing a thin film chip resistor with a stable resistance value. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a side cross-sectional view of a thin film chip resistor according to an embodiment of the present invention; [Figure 2] FIG. 1 is a top view showing the state in which the protective film layer and the uppermost electrode layer of the thin film chip resistor have been removed. [Figure 3] FIG. 10 is a top view showing the state in which the protective film layer and the uppermost electrode layer are removed before trimming in the thin film chip resistor; [Figure 4] Side cross-sectional view of a conventional thin film chip resistor [Figure 5] A top view showing a conventional thin film chip resistor with the protective film layer and the top electrode layer removed. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, a thin film chip resistor according to an embodiment of the present invention will be described with reference to the drawings.

[0012] Fig. 1 is a side cross-sectional view of a thin film chip resistor according to one embodiment of the present invention, and Fig. 2 is a top view showing the state in which the protective film layer and the top electrode layer of the thin film chip resistor have been removed. In Fig. 1 and Fig. 2, 21 is a rectangular insulating substrate made of an alumina substrate with an alumina purity of about 96%, and a pair of metal organic compounds mainly composed of gold are attached to both ends of the top surface of this insulating substrate 21. The insulating substrate 21 includes a pair of upper electrode layers 22. 23 denotes a pair of back electrode layers made of a metal organic compound primarily composed of gold, formed on both ends of the back surface of the insulating substrate 21. 24 denotes a thin-film resistor layer made of a nickel-chromium alloy or the like, covering the pair of upper electrode layers 22 and electrically connecting them. 25 denotes a pair of upper electrode layers made of a conductive resin, covering the thin-film resistor layer 24 and formed on both ends of the top surface of the insulating substrate 21. 26 denotes a protective film layer made of an epoxy-based resin, covering the thin-film resistor layer 24 and partially covering the pair of upper electrode layers 25. 27 denotes a pair of end electrode layers formed on both ends of the insulating substrate 21 to electrically connect the upper electrode layer 25 and the back electrode layer 23. 28 denotes a nickel plating layer formed on the exposed electrode portion by plating. 29 denotes a tin plating layer formed on the nickel plating layer 28 by plating.

[0013] The thin-film resistor layer 24 is formed so as to be electrically connected to a pair of upper electrode layers 22 formed at both ends of the upper surface of the insulating substrate 21, and is composed of a ladder-shaped first parallel resistor pattern 24a for coarse adjustment electrically connected to one of the pair of upper electrode layers 22, and a second parallel resistor pattern 24e for coarse adjustment electrically connected to the first parallel resistor pattern 24a and formed by connecting adjacent folded portions 24c of a zigzag resistor pattern 24b with a substantially U-shaped resistor pattern 24d. A plurality of second parallel resistor patterns 24e for coarse adjustment are connected in series.

[0014] Furthermore, trimming portions 30a, 30b are formed by cutting a portion of each of the ladder-shaped first parallel resistor pattern 24a for coarse adjustment in the thin-film resistor layer 24 and the approximately U-shaped resistor pattern 24d in the second parallel resistor pattern 24e with a laser, thereby enabling a variety of resistance values ​​to be obtained with one resistor pattern.

[0015] Consider a case in which trimming grooves 30b are formed by trimming the approximately U-shaped resistor patterns 24d in the second parallel resistor pattern 24e in a thin-film chip resistor according to an embodiment of the present invention. For adjacent approximately U-shaped resistor patterns 24d in a pre-prepared thin-film resistor layer 24 shown in Fig. 3, as shown in Fig. 2, separate trimming grooves 30b are formed in each of the approximately U-shaped resistor patterns so as to face the longitudinal sides of the insulating substrate 21. This has the effect of reducing the second parallel resistor pattern 24e's exposure to heat generated by trimming the adjacent second parallel resistor pattern 24e, thereby stabilizing the resistance value. [Explanation of symbols]

[0016] 21 Insulating substrate 22 Top electrode layer 24 Thin film resistor layer 24a First parallel resistor pattern 24b Zigzag Resistance Pattern 24c Folded section 24d Roughly U-shaped resistor pattern 24e Second parallel resistor pattern 26 Protective film layer 30b Trimming groove

Claims

[Claim 1] a thin-film chip resistor comprising: an insulating substrate; a pair of upper electrode layers provided at both ends of an upper surface of the insulating substrate; a thin-film resistor layer provided so as to be electrically connected to the pair of upper electrode layers; and a protective film layer covering the thin-film resistor layer; the thin-film resistor layer comprising: a ladder-shaped first parallel resistor pattern for coarse adjustment electrically connected to one of the pair of upper electrode layers; and a second parallel resistor pattern for coarse adjustment electrically connected to the first parallel resistor pattern and formed by connecting adjacent folded portions of a zigzag resistor pattern with an approximately U-shaped resistor pattern; and a separate trimming groove provided in each of the approximately U-shaped resistor patterns so as to face a longitudinal side of the insulating substrate.

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