Photoelectric conversion device, photoelectric conversion system, movable body, apparatus, and method for manufacturing photoelectric conversion device

The photoelectric conversion device addresses crosstalk issues through a structured semiconductor layer with grooves and films, improving pixel isolation and sensitivity to long-wavelength light.

JP2025154454APending Publication Date: 2025-10-10CANON KK
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Patent Information

Application Number
JP2024057460
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-29
Publication Date
2025-10-10

AI Technical Summary

Technical Problem

Existing photoelectric conversion devices do not adequately address crosstalk issues due to refraction and diffraction in isolation structures, which affect the performance of adjacent pixels.

Method used

A photoelectric conversion device with a semiconductor layer having a first and second surface, featuring a first photoelectric conversion element, a second photoelectric conversion element, an uneven portion with a groove, and a separation portion with a groove that extends through a film into the semiconductor layer, along with specific manufacturing methods involving etching and film formation.

Benefits of technology

The solution provides a suitable isolation structure that reduces optical crosstalk between pixels, enhancing the device's performance and sensitivity, especially for long-wavelength light detection.

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Abstract

To provide a suitable irregularity part or separation part.SOLUTION: A photoelectric conversion device has an irregularity part that has grooves in a semiconductor layer and is arranged in correspondence with a first photoelectric conversion element; a separation part that has grooves in the semiconductor layer and is arranged between the first photoelectric conversion element and a second photoelectric conversion element; a first film that is arranged on at least part of the grooves of the irregularity part; and a second film that is arranged on at least part of the grooves of the separation part. The grooves of the separation part penetrate through the first film and extend in the semiconductor layer.SELECTED DRAWING: Figure 6
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Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device, a photoelectric conversion system, a mobile object, an apparatus, and a method for manufacturing a photoelectric conversion device. [Background technology]

[0002] There is known a photoelectric conversion device that can detect weak light at the single photon level by utilizing avalanche multiplication. Patent Document 1 discloses a photoelectric conversion device in which a concave-convex structure is provided on the light-receiving surface of a photoelectric conversion element and an isolation structure is provided between pixels. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-075774 Summary of the Invention [Problem to be solved by the invention]

[0004] Patent Document 1 does not provide a detailed consideration of crosstalk to adjacent pixels due to refraction, diffraction, etc. that occurs in the isolation structure or the uneven structure. Therefore, one aspect of the present invention aims to provide a more suitable isolation structure or a method for manufacturing an isolation structure. [Means for solving the problem]

[0005] One aspect of the present invention is a photoelectric conversion device comprising: a semiconductor layer having a first surface and a second surface opposite to the first surface; a first photoelectric conversion element disposed in the semiconductor layer; a second photoelectric conversion element disposed in the semiconductor layer; an uneven portion disposed corresponding to the first photoelectric conversion element and disposed on the second surface of the semiconductor layer, the uneven portion having a groove in the semiconductor layer; a separation portion disposed between the first photoelectric conversion element and the second photoelectric conversion element, the separation portion having a groove in the semiconductor layer; a first film disposed on the second surface side and disposed in at least a portion of the groove in the uneven portion; and a second film disposed in at least a portion of the groove in the separation portion, the groove in the separation portion extending through the first film into the semiconductor layer.

[0006] Another aspect of the present invention is a method for manufacturing a photoelectric conversion device, comprising the steps of: preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element arranged therein; forming a first groove by etching on the second surface side of the semiconductor layer at a position corresponding to the position of the first photoelectric conversion element in the semiconductor layer; forming a first film in the first groove; forming a second groove by etching on the second surface side of the semiconductor layer at a position corresponding to between the first photoelectric conversion element and the second photoelectric conversion element in the semiconductor layer; and forming an opening in the first film during the step of forming the second groove.

[0007] Another aspect of the present invention is a method for manufacturing a photoelectric conversion device, comprising the steps of: preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element arranged therein; forming a first groove by anisotropic etching on the second surface side of the semiconductor layer at a position corresponding to the position of the first photoelectric conversion element in the semiconductor layer; forming a first film in the first groove; forming a second groove by anisotropic etching on the second surface side of the semiconductor layer at a position corresponding to between the first photoelectric conversion element and the second photoelectric conversion element in the semiconductor layer; and performing isotropic etching on at least one of the first groove or the second groove. [Effects of the Invention]

[0008] The above means provide a suitable isolation structure or a method for manufacturing an isolation structure. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a schematic diagram of a photoelectric conversion device according to an embodiment. [Figure 2] FIG. 2 is a schematic diagram of a pixel substrate of a photoelectric conversion device according to an embodiment. [Figure 3] FIG. 2 is a schematic diagram of a circuit board of a photoelectric conversion device according to an embodiment. [Figure 4] 2 is a configuration example of a pixel circuit of a photoelectric conversion device according to an embodiment. [Figure 5] FIG. 2 is a schematic diagram illustrating driving of a pixel circuit of a photoelectric conversion device according to an embodiment. [Figure 6] 1A and 1B are schematic cross-sectional and plan views of a pixel of a photoelectric conversion device according to a first embodiment. [Figure 7] 2A to 2C are schematic cross-sectional views illustrating a method for manufacturing the photoelectric conversion device according to the first embodiment. [Figure 8] 2A to 2C are schematic cross-sectional views illustrating a method for manufacturing the photoelectric conversion device according to the first embodiment. [Figure 9] 2A to 2C are schematic cross-sectional views illustrating a method for manufacturing the photoelectric conversion device according to the first embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view illustrating a method for manufacturing a photoelectric conversion device according to a second embodiment. [Figure 11] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a third embodiment. [Figure 12] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a fourth embodiment. [Figure 13] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a fifth embodiment. [Figure 14] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a sixth embodiment. [Figure 15]FIG. 10 is a schematic cross-sectional view illustrating a method for manufacturing a photoelectric conversion device according to a sixth embodiment. [Figure 16] FIG. 10 is a schematic cross-sectional view illustrating a method for manufacturing a photoelectric conversion device according to a sixth embodiment. [Figure 17] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a seventh embodiment. [Figure 18] FIG. 10 is a schematic cross-sectional view illustrating a photoelectric conversion device according to a seventh embodiment. [Figure 19] FIG. 13 is a schematic diagram illustrating a device, a photoelectric conversion system, and a moving object according to an eighth embodiment. [Figure 20] FIG. 13 is a schematic diagram illustrating a photoelectric conversion system according to a ninth embodiment. [Figure 21] FIG. 20 is a schematic diagram illustrating a photoelectric conversion system according to a tenth embodiment. [Figure 22] FIG. 22 is a schematic diagram illustrating a photoelectric conversion system according to an eleventh embodiment. [Figure 23] FIG. 22 is a schematic diagram illustrating a medical system according to a twelfth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] The embodiments shown below are intended to embody the technical concept of the present invention and are not intended to limit the present invention. The size and positional relationship of components shown in each drawing may be exaggerated for clarity. In the following description, the same components may be designated by the same reference numerals and their description may be omitted.

[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions or positions (for example, "upper," "lower," "right," "left," and other terms including these terms) will be used as necessary. The use of these terms is intended to facilitate understanding of the embodiments with reference to the drawings, and the meaning of these terms does not limit the technical scope of the present invention.

[0012] In this specification, a planar view refers to a view from a direction perpendicular to the light incident surface of the semiconductor layer. A cross-sectional view refers to a surface perpendicular to the light incident surface of the semiconductor layer. When the light incident surface of the semiconductor layer is a rough surface when viewed microscopically, the planar view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0013] The semiconductor layer has a first surface and a second surface opposite to the first surface, through which light is incident. In this specification, the depth direction is the direction from the first surface of the semiconductor layer, on which the photoelectric conversion element is disposed, toward the second surface. Hereinafter, the "first surface" may be referred to as the "front surface," and the "second surface" may be referred to as the "rear surface." The "depth" of a point or region in the semiconductor layer refers to the distance from the first surface (front surface) of that point or region. When there is a point (or region) Z1 whose distance (depth) from the first surface is d1 and a point (or region) Z2 whose distance (depth) from the first surface is d2, and d1 > d2, it may be expressed as "Z1 is deeper than Z2" or "Z2 is shallower than Z1." Also, when there is a point (or region) Z3 whose distance (depth) from the first surface is d3 and d1>d3>d2 holds, it can be expressed as "Z3 is at a depth between Z1 and Z2" or "Z3 is between Z1 and Z2 in the depth direction."

[0014] In the following description, the anode of an avalanche photodiode (APD), which is a photoelectric conversion element, is set to a fixed potential, and a signal is extracted from the cathode side. Therefore, the first conductivity type semiconductor region, which has majority carriers of charges with the same polarity as the signal charges, is an N-type semiconductor region, and the second conductivity type semiconductor region, which has majority carriers of charges with a polarity opposite to that of the signal charges, is a P-type semiconductor region. Note that the present invention also applies when the cathode of the APD is set to a fixed potential and the signal is extracted from the anode side. In this case, the first conductivity type semiconductor region, which has majority carriers of charges with the same polarity as the signal charges, is a P-type semiconductor region, and the second conductivity type semiconductor region, which has majority carriers of charges with a polarity opposite to that of the signal charges, is an N-type semiconductor region. While the following description focuses on a case where one node of the APD is set to a fixed potential, the potentials of both nodes may fluctuate.

[0015] In this specification, when the term "impurity concentration" is used simply, it means the net impurity concentration minus the amount compensated for by impurities of the opposite conductivity type. In other words, "impurity concentration" refers to the NET doping concentration. A region where the P-type doped impurity concentration is higher than the N-type doped impurity concentration is a P-type semiconductor region. Conversely, a region where the N-type doped impurity concentration is higher than the P-type doped impurity concentration is an N-type semiconductor region.

[0016] In addition, in the following embodiments, the connection between elements of a circuit may be described. In this case, even if another element is interposed between the elements of interest, the elements of interest are treated as being connected unless otherwise specified. For example, suppose that element A is connected to one node of a capacitive element C having multiple nodes, and element B is connected to the other node. Even in such a case, elements A and B are treated as being connected unless otherwise specified. Note that when elements are connected to each other without any other element being interposed, they may be described as being directly connected. In the above example, if there is no other element between element A and capacitive element C, it can be said that element A and capacitive element C are directly connected.

[0017] Metallic components such as wiring and pads described herein may be composed of a single metal element or a mixture (alloy). For example, wiring described as copper wiring may be composed of copper alone or may be composed primarily of copper with other components. Furthermore, for example, pads connected to external terminals may be composed of aluminum alone or may be composed primarily of aluminum with other components. The copper wiring and aluminum pads shown here are merely examples and can be replaced with various metals.

[0018] Furthermore, the wiring and pads shown here are an example of metal members used in semiconductor devices (photoelectric conversion devices), and can also be applied to other metal members.

[0019] In the following embodiments, an image pickup device will be mainly described as an example of a photoelectric conversion device. However, the embodiments are not limited to image pickup devices and can be applied to other examples of photoelectric conversion devices. For example, the present invention may be applied to a detection device that detects light, a distance measurement device (a device that measures distance using focus detection or TOF (Time Of Flight)), a photometry device (a device that measures the amount of incident light), or the like.

[0020] (Explanation of photoelectric conversion device) A configuration common to each embodiment of a photoelectric conversion device and a driving method thereof according to the present invention will be described with reference to FIGS. 1 to 5. FIG.

[0021] FIG. 1 is a diagram showing the configuration of a photoelectric conversion device 100 according to an embodiment of the present invention. The following description will be given taking as an example a case where the photoelectric conversion device 100 is a stacked photoelectric conversion device. That is, the description will be given taking as an example a photoelectric conversion device configured by stacking and electrically connecting two substrates, a sensor substrate 11 and a circuit substrate 21. However, the photoelectric conversion device is not limited to this. For example, the photoelectric conversion device may be one in which the components included in the sensor substrate 11 and the components included in the circuit substrate are arranged on a common semiconductor layer, as described below. Hereinafter, a photoelectric conversion device in which the components included in the sensor substrate 11 and the components included in the circuit substrate are arranged on a common semiconductor layer will also be referred to as a non-stacked photoelectric conversion device.

[0022] The sensor substrate 11 has a first semiconductor layer having photoelectric conversion elements 102 (described later) and a first wiring structure. The circuit board 21 has a second semiconductor layer having circuits such as a signal processing circuit 103 (described later) and a second wiring structure. The photoelectric conversion device 100 is configured by laminating the second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer in this order.

[0023] FIG. 1 illustrates a back-illuminated photoelectric conversion device in which light is incident from a first surface and a circuit board is disposed on a second surface opposite the first surface. In the case of a non-stacked photoelectric conversion device, the surface on which the transistors of the signal processing circuit are disposed is referred to as the second surface. In the case of a back-illuminated photoelectric conversion device, the first surface opposite the second surface of the semiconductor layer is the light incident surface. In the case of a front-illuminated photoelectric conversion device, the second surface of the semiconductor layer is the light incident surface.

[0024] In the following description, the sensor substrate 11 and the circuit substrate 21 are described as diced chips, but are not limited to chips. For example, each substrate may be a wafer. Also, each substrate may be stacked in the wafer state and then diced, or each chip may be stacked and bonded after being formed into chips.

[0025] The sensor substrate 11 has a pixel region 12 arranged thereon, and the circuit substrate 21 has a circuit region 22 arranged thereon for processing signals detected in the pixel region 12 .

[0026] 2 is a layout diagram of the sensor substrate 11. Pixels 101, each having a photoelectric conversion unit 102 including an avalanche photodiode (hereinafter, referred to as APD), are arranged two-dimensionally to form a pixel region 12.

[0027] The pixel 101 is typically a pixel for forming an image, but when used for TOF (Time of Flight), it does not necessarily have to form an image. In other words, the pixel 101 may be a pixel for measuring the time and amount of light that arrives.

[0028] 3 is a configuration diagram of the circuit board 21. It has a signal processing unit 103 that processes the charges photoelectrically converted by the photoelectric conversion unit 102 in FIG. 2, a readout circuit 112, a control pulse generation unit 115, a horizontal scanning circuit unit 111, a signal line 113, and a vertical scanning circuit unit 110.

[0029] The photoelectric conversion unit 102 in FIG. 2 and the signal processing unit 103 in FIG. 3 are electrically connected via connection wiring provided for each pixel.

[0030] The vertical scanning circuit unit 110 receives a control pulse supplied from the control pulse generating unit 115 and supplies the control pulse to each pixel. The vertical scanning circuit unit 110 uses logic circuits such as a shift register and an address decoder.

[0031] The control pulse generation unit 115 includes a signal generation unit 215 that generates a control signal P_CLK for a switch, which will be described later. The signal generation unit 215 generates a pulse signal for controlling the switch, as will be described later. For example, as shown in FIG. 4(a), the signal generation unit 215 may generate a common control signal P_CLK for multiple pixels in a pixel region. Alternatively, as shown in FIG. 4(b), the signal generation unit 215 may generate a control signal P_CLK for each pixel. When generating a common pulse signal P_CLK, at least one of the period, number of pulses, and pulse width of a signal P_EXP that controls the exposure period is generated in common so as to correspond to the exposure period. When controlling the control signal P_CLK for each pixel, a signal can be generated using both an input signal P_CLK_IN output from the control pulse generation unit 115 and a signal P_EXP that controls the exposure period. The control pulse generation unit 115 preferably includes, for example, a frequency divider circuit. This simplifies control and reduces the need for an increased number of elements.

[0032] The signal output from the photoelectric conversion unit 102 of each pixel is processed by the signal processing unit 103. The signal processing unit 103 is provided with a counter, a memory, etc., and the memory holds digital values.

[0033] The horizontal scanning circuit unit 111 inputs a control pulse to the signal processing unit 103 to sequentially select each column in order to read out the signal from the memory of each pixel in which the digital signal is held.

[0034] A signal is output to the signal line 113 from the signal processing unit 103 of the pixel selected by the vertical scanning circuit unit 110 for the selected column.

[0035] The signal output to the signal line 113 is output via an output circuit 114 to a recording unit or a signal processing unit outside the photoelectric conversion device 100 .

[0036] 2, the pixels 100 may be arranged one-dimensionally in the pixel region 12. The function of the signal processing unit 103 does not necessarily need to be provided for each pixel 101, and for example, one signal processing unit 103 may be shared by multiple pixels 101, and signal processing may be performed sequentially.

[0037] Fig. 4 is an example of a block diagram including the equivalent circuits of Fig. 2 and Fig. 3. In Fig. 2, a photoelectric conversion unit 102 having an APD 201 is provided on a sensor substrate 11, and other members are provided on a circuit substrate 21.

[0038] The APD 201 generates charge pairs in response to incident light through photoelectric conversion. A voltage VL (first voltage) is supplied to the anode of the APD 201. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD 201. A reverse bias voltage is supplied to the anode and cathode so that the APD 201 performs avalanche multiplication. With this voltage supplied, charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0039] When a reverse bias voltage is supplied, the APD can be operated in either Geiger mode, where the potential difference between the anode and cathode is greater than the breakdown voltage, or in linear mode, where the potential difference between the anode and cathode is close to or less than the breakdown voltage. An APD operated in Geiger mode is called a SPAD. For example, the voltage VL (first voltage) is -30 V and the voltage VH (second voltage) is 1 V. The APD 201 can be operated in either linear mode or Geiger mode. The potential difference of a SPAD is greater than that of a linear mode APD, and the effect of its withstand voltage is significant.

[0040] The switch 202 is connected to a control line supplied with a drive voltage VH and the APD 201. The switch 202 is connected to one of the anode and cathode nodes of the APD. The switch 202 switches the potential difference between the anode and cathode of the APD between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication. Hereinafter, switching from the second potential difference to the first potential difference is also referred to as turning on the switch 202, and switching from the first potential difference to the second potential difference is also referred to as turning off the switch 202. The switch 202 functions as a quenching element. The switch 202 functions as a load circuit (quenching circuit) during signal multiplication by avalanche multiplication, and suppresses the voltage supplied to the APD 201 to suppress avalanche multiplication (quenching operation). The switch 202 also functions to return the voltage supplied to the APD 201 to the drive voltage VH by passing a current equivalent to the voltage drop caused by the quench operation (recharge operation). In other words, the switch 202 functions as a control circuit that controls the occurrence of avalanche multiplication in the APD 201.

[0041] The switch 202 can be configured, for example, by a MOS transistor. A control signal P_CLK for the switch 202, supplied from the signal generating unit 215, is applied to the gate electrode of the MOS transistor that configures the switch 202. In this embodiment, the on / off state of the switch 202 is controlled by controlling the voltage applied to the gate electrode of the switch 202.

[0042] The signal processing unit 103 has a waveform shaping unit 210, a counter circuit 211, and a selection circuit 212. In this specification, the signal processing unit 103 only needs to have at least one of the waveform shaping unit 210, the counter circuit 211, and the selection circuit 212.

[0043] The waveform shaping unit 210 shapes the potential change at the cathode of the APD 201 obtained upon photon detection and outputs a pulse signal. The input node of the waveform shaping unit 210 is designated as nodeA, and the output node is designated as nodeB. The waveform shaping unit 210 changes the output potential from nodeB depending on whether the input potential to nodeA is equal to or higher than a predetermined value. For example, in FIG. 5, when the input potential to nodeA is equal to or higher than a threshold, the output potential from nodeB becomes low. When the input potential to nodeA is lower than the threshold, the output potential from nodeB becomes high. For example, an inverter circuit is used as the waveform shaping unit 210. While FIG. 4 illustrates an example in which a single inverter is used as the waveform shaping unit 210, a circuit in which multiple inverters are connected in series or another circuit with a waveform shaping effect may also be used.

[0044] Although the switch 202 can perform quenching and recharging operations in response to avalanche multiplication in the APD 201, depending on the timing of photon detection, the charge generated in the APD may not be recognized as an output signal. For example, assume that avalanche multiplication occurs in the APD, causing node A to go low and a recharge operation is in progress. Generally, the decision threshold of the waveform shaping unit 210 is set to a potential higher than the potential difference at which avalanche multiplication occurs in the APD. When a photon is incident on the APD while the potential at node A is lower than the decision threshold due to the recharge operation and at a potential at which avalanche multiplication is possible in the APD, avalanche multiplication occurs in the APD, causing the voltage at node A to drop. In other words, because the potential at node A drops below the decision threshold, no potential change occurs across the decision threshold, and the output potential from node B remains unchanged. Therefore, even though avalanche multiplication is occurring, the photon detection is not recognized as a signal. Particularly under high illuminance, photons enter the APD continuously in a short period of time, making it difficult for the incident light to be detected as a signal. As a result, even under high illuminance, the actual number of incident photons and the output signal tend to diverge.

[0045] In contrast, by applying a control signal P_CLK to the switch 202 to switch the switch 202 between its on and off states, it is possible to determine a signal even when photons continuously enter the APD in a short period of time. FIG. 5 illustrates an example in which the control signal P_CLK is a pulse signal with a repetitive cycle. In other words, FIG. 5 illustrates a mode in which the switch 202 is switched on and off at a predetermined clock frequency. However, the effect of suppressing an increase in power consumption of a photoelectric conversion device can be obtained even if the pulse signal is not a signal with a repetitive cycle.

[0046] The counter circuit 211 counts the pulse signals output from the waveform shaping unit 210 and holds the count value. When a control pulse pRES is supplied via a drive line 213, the signal held in the counter circuit 211 is reset.

[0047] 1 via a drive line 214 (not shown in FIG. 3) in FIG. 4, and switches between electrical connection and disconnection between the counter circuit 211 and the signal line 113. The selection circuit 212 includes, for example, a buffer circuit for outputting a signal.

[0048] The electrical connection may be switched by disposing a switch such as a transistor between the switch 202 and the APD 201 or between the photoelectric conversion unit 102 and the signal processing unit 103. Similarly, the supply of the voltage VH or the voltage VL to the photoelectric conversion unit 102 may be electrically switched using a switch such as a transistor.

[0049] In this embodiment, a configuration using the counter circuit 211 has been described. However, the photoelectric conversion device 100 may acquire pulse detection timing using a time-to-digital converter (hereinafter referred to as TDC) or a memory instead of the counter circuit 211. In this case, the generation timing of the pulse signal output from the waveform shaping unit 210 is converted into a digital signal by the TDC. To measure the timing of the pulse signal, a control pulse pREF (reference signal) is supplied to the TDC from the vertical scanning circuit unit 110 in FIG. 1 via a drive line. The TDC acquires, as a digital signal, a value obtained by converting the input timing of the signal output from each pixel into a relative time based on the control pulse pREF.

[0050] FIG. 5 is a diagram illustrating the relationship between the control signal P_CLK of the switch, the potential of node nodeA, the potential of node nodeB, and the output signal. In this embodiment, when the control signal P_CLK is at a high level, the drive voltage VH is not easily supplied to the APD, and when the control signal P_CLK is at a low level, the drive voltage VH is supplied to the APD. The high level of the control signal P_CLK is, for example, 1 V, and the low level of the control signal P_CLK is, for example, 0 V. When the control signal P_CLK is at a high level, the switch is turned off, and when the control signal P_CLK is at a low level, the switch is turned on. The resistance of the switch when the control signal P_CLK is at a high level is higher than the resistance of the switch when the control signal P_CLK is at a low level. When the control signal P_CLK is at a high level, recharging is not easily performed even if avalanche multiplication occurs in the APD, so the potential supplied to the APD is a potential below the breakdown voltage of the APD. Therefore, the avalanche multiplication operation in the APD stops.

[0051] As shown in Figure 5(a), it is preferable to configure the switch 202 using a single transistor, which performs both the quenching and recharging operations. This allows for a reduction in the number of circuits compared to when the quenching and recharging operations are performed using separate circuit elements. In particular, when each pixel has a counter circuit and the SPAD signal is read out for each pixel, it is preferable to reduce the circuit area used for the switch in order to accommodate the counter circuit, and the effect of configuring the switch 202 using a single transistor is significant.

[0052] At time t1, the control signal P_CLK changes from high to low, turning on the switch and starting the APD recharge operation. This causes the potential of the APD's cathode to transition to high. The potential difference between the potentials applied to the APD's anode and cathode then becomes a state in which avalanche multiplication is possible. The potential of the cathode is the same as that of node nodeA. Therefore, when the potential of the cathode transitions from low to high, the potential of node nodeA becomes equal to or greater than the decision threshold at time t2. At this time, the pulse signal output from node nodeB is inverted, transitioning from high to low. After that, a potential difference of drive voltage VH - drive voltage VL is applied to the APD 201. The control signal P_CLK transitions to high, turning off the switch.

[0053] Next, at time t3, when a photon is incident on the APD 201, avalanche multiplication occurs in the APD 201, and the voltage at the cathode drops. That is, the voltage at nodeA drops. As the voltage drop increases and the voltage difference applied to the APD 201 decreases, avalanche multiplication in the APD 201 stops, as at time t2, and the voltage level at nodeA no longer drops below a certain value. As the voltage at nodeA drops, if the voltage at nodeA falls below the decision threshold, the voltage at nodeB changes from low to high. That is, the portion of the output waveform at nodeA that exceeds the decision threshold is shaped by the waveform shaping unit 210 and output as a signal at nodeB. The portion is then counted by the counter circuit, and the count value of the counter signal output from the counter circuit increases by 1 LSB.

[0054] Between time t3 and time t4, photons are incident on the APD, but the switch is in the off state and the voltage applied to the APD 201 does not have a potential difference that allows avalanche multiplication, so the voltage level of node A does not exceed the decision threshold.

[0055] At time t4, the control signal P_CLK changes from high to low, turning on the switch. As a result, a current flows through node A to compensate for the voltage drop from drive voltage VH, and the voltage at node A returns to its original voltage level. At this time, at time t5, the voltage at node A exceeds the threshold, causing the pulse signal at node B to invert and change from high to low.

[0056] At time t6, node A returns to its original voltage level, and the control signal P_CLK changes from low to high. This turns the switch off. From this point onward, the potentials of the nodes and signal lines change in response to the control signal P_CLK and the incidence of photons, as explained from time t1 to time t6.

[0057] The photoelectric conversion devices of the respective embodiments will be described below.

[0058] (First embodiment) The first embodiment will be described with reference to Figs. 6 to 8. Fig. 6 is a schematic diagram for explaining a photoelectric conversion device of this embodiment. Fig. 6(a) is a schematic cross-sectional view of two pixels of the photoelectric conversion device. Fig. 6(b) is a schematic plan view of two pixels of the photoelectric conversion device. In Fig. 6(b), for ease of understanding, only an optional configuration is shown as projected, rather than all of the configuration.

[0059] The cross-sectional structure of the photoelectric conversion device will be described using Figure 6(a). The photoelectric conversion device includes a semiconductor layer 301, a first film 321, a second film 322, a third film 323, an isolation portion 324, a concave-convex portion 325, a fourth film 326, a light-shielding portion 328, a microlens 329, and a color filter 330. An opening 327 is formed in the light-shielding portion 328. In this figure, other semiconductor layers in which wiring structures and circuits are arranged are omitted. The semiconductor layer 301 has a first surface P1 and a second surface P2 and includes an APD composed of multiple semiconductor regions. The first film 321, the second film 322, the third film 323, the fourth film 326, the light-shielding portion 328, the microlens 329, and the color filter 330 are arranged on the second surface P2 side of the semiconductor layer 301. It is assumed that light passes through the microlens 329, the color filter 330, and the opening 327, and is incident on the second surface P2 of the semiconductor layer 301.

[0060] The second film 322 and the fourth film 326 are disposed for desired purposes such as planarization, anti-reflection, and etching stop, and may be, for example, insulating films. The second film 322 may be, for example, silicon nitride or silicon oxynitride. The second film 322 may have the function of reducing the reflection of light incident on the semiconductor layer 301 by optically adjusting its relationship with other films, such as the semiconductor layer 301, the first film 321, and the third film 323. The fourth film 326 may be silicon oxide or an organic material having a planarization function. The color filter 330 can be replaced with various optical filters, such as an infrared light blocking filter or a monochrome filter, in addition to a color filter. The color filter 330 is an RGB filter, but an RGBW filter including a complementary color filter or a transparent filter can also be used. Furthermore, the color filter 330 may have desired layers other than the color filter layer, such as a planarization layer below the color filter layer, a layer above the color filter layer for planarizing the color filter layer, both of these, or another wavelength blocking filter. The microlens 329 may be individually arranged for each pixel, or a plurality of microlenses may be arranged in a continuous, integrated configuration.

[0061] The following describes the multiple semiconductor regions arranged in the semiconductor layer 301. The semiconductor layer 301 is provided with a first semiconductor region 311, a second semiconductor region 312, a third semiconductor region 313, a fourth semiconductor region 314, a fifth semiconductor region 315, a sixth semiconductor region 316, a seventh semiconductor region 317, an eighth semiconductor region 318, and a ninth semiconductor region 319. The first semiconductor region 311, the fourth semiconductor region 314, the sixth semiconductor region 316, and the seventh semiconductor region 317 are semiconductor regions of a first conductivity type, for example, N-type semiconductor regions. The second semiconductor region 312, the third semiconductor region 313, the fifth semiconductor region 315, and the ninth semiconductor region 319 are semiconductor regions of a second conductivity type, for example, P-type semiconductor regions. The APD includes at least a first semiconductor region 311 that functions as a cathode and a second semiconductor region 312 that functions as an anode, and the first semiconductor region 311 and the second semiconductor region 312 form an avalanche multiplication region.

[0062] The first semiconductor region 311 is arranged near the first surface P1, and the second semiconductor region 312 is arranged at a position overlapping the first semiconductor region 311 in plan view. The fourth semiconductor region 314 is arranged at a position overlapping the second semiconductor region 312 in plan view, and the sixth semiconductor region 316 is arranged around the fourth semiconductor region 314. The seventh semiconductor region 317 is arranged around the first semiconductor region 311. The fourth semiconductor region 314 and the seventh semiconductor region 317 have an impurity concentration lower than that of the first semiconductor region 311. The seventh semiconductor region 317 can also function as an electric field relaxation region.

[0063] The size of each semiconductor region is not limited to this. For example, although the fourth semiconductor region 314 and the seventh semiconductor region 317 are of approximately the same size, the fourth semiconductor region 314 may be formed larger than the seventh semiconductor region 317, and charges may be collected from a wider range to the first semiconductor region 311.

[0064] Here, in a pixel having an APD, the size of one pixel can also be regarded as the distance from the separation portion 324 to the separation portion 324 provided at the closest position. When the size of one pixel is L and the distance from the second surface P2, which is the light incident surface, to the avalanche multiplication region is d, it is desirable that the distance d satisfies L√2 / 4 < d < L×√2. When the lateral size and depth of the photoelectric conversion element satisfy this relational expression, the strength of the electric field in the depth direction and the strength of the electric field in the planar direction in the vicinity of the first semiconductor region 311 become comparable, so the variation in the time required for charge collection is reduced, and the generation of timing jitter can be reduced.

[0065] Next, the uneven portion 325 will be described. The uneven portion 325 is disposed on the second surface P2 of the semiconductor layer 301. The uneven portion 325 has an uneven structure and can scatter and diffract light incident on the second surface P2, thereby changing the optical path length within the semiconductor layer 301. Specifically, when incident light travels obliquely through the semiconductor layer 301, an optical path length equal to or greater than the thickness of the semiconductor layer 301 can be ensured, making it possible to photoelectrically convert light with longer wavelengths than in a case where the uneven portion 325 is not provided. In other words, the uneven portion 325 can contribute to improving sensitivity on the long-wavelength side. Furthermore, the uneven portion 325 reduces reflection of incident light within the substrate, thereby improving the photoelectric conversion efficiency of incident light. The uneven portion 325 includes grooves or depressions and a film filling the grooves or depressions. For simplicity of explanation, the grooves and depressions will be referred to as grooves hereinafter. The uneven portion 325 is disposed on the second surface P2 of the semiconductor layer 301, and can be formed by filling the first film 321 into grooves or depressions formed by removing a portion of the semiconductor layer 301. The first film 321 can have a laminated structure made up of multiple layers. For example, the first film 321 may include a layer that functions as a pinning film, a layer that functions as an anti-reflection film, and a layer for planarization. The specific configuration will be described later.

[0066] Here, the uneven portion 325 is arranged so as to overlap with the fourth semiconductor region 314 in a planar view. In a planar view, the area where the fourth semiconductor region 314 and the uneven portion 325 overlap is larger than the area of ​​the portion of the fourth semiconductor region 314 that does not overlap with the uneven portion 325. With this configuration, charges generated by incident light travel through the fourth semiconductor region 314 and are easily collected in the avalanche multiplication region. In addition, the uneven portion 325 is covered by the third semiconductor region 313. The third semiconductor region 313 can reduce the generation of thermally excited charges at the interface of the uneven portion 325 with the semiconductor layer 301. This reduces the dark current or dark count rate (DCR) of the photoelectric conversion element.

[0067] The second film 322 is disposed on the first film 321 along the second plane P2. The second film 322 is located between the first film 321 and the third film 323. The second film 322 may be omitted, in which case the third film 323 is disposed on the first film 321.

[0068] The isolation portion 324 has an isolation structure and is disposed, for example, between pixels to reduce electrical or optical crosstalk between the pixels. The isolation portion 324 includes a groove, a depression, or a through-hole and a film filling the groove. For simplicity, the groove, depression, or through-hole will be referred to as a groove hereinafter. The isolation portion 324 can be formed by filling a third film 323 into a groove or depression formed by removing a portion of the semiconductor layer 301. The third film 323 can have a multi-layer structure. For example, the third film 323 can include a layer functioning as a pinning film, a layer functioning as an anti-reflection film, and a layer for planarization. In this embodiment, the isolation portion 324 can include a light-shielding member in addition to the third film 323. The light-shielding member can be a light-shielding material, such as a conductive film 331. The third film 323 is formed by stacking a pinning layer and an insulating layer in this order, and is disposed so as to surround the conductive film 331. The specific configuration will be described later. The separation portion 324 penetrates the first film 321 and the second film 322, and penetrates the semiconductor layer 301. The third film 323 is disposed from the groove that constitutes the separation portion 324 onto the second surface P2 of the semiconductor layer 301, along the second surface P2. The third film 323 covers the side and bottom surfaces of the groove in the semiconductor layer 301 that constitutes the separation portion 324, and extends between the second film 322 and the fourth film 326. Note that the separation portion 324 does not have to penetrate the semiconductor layer 301. The conductive film 331 is scraped off where it fills the groove. Here, the upper surface of the separation portion 324 is defined as the third surface P3.

[0069] Here, the positional relationship between the separation section 324 and the uneven section 325 will be described. The upper surface of the separation section 324 is located on the third plane P3, and the upper surface of the uneven section 325 is located on the second plane P2. In this way, by positioning the separation section 324 closer to the microlens 329 than the uneven section 325, it is possible to reduce the intrusion of stray light refracted or reflected by the uneven section 325 into adjacent pixels. Such a configuration of the separation section 324 makes it possible to provide a photoelectric conversion device with reduced optical crosstalk.

[0070] FIG. 6(b) is a schematic plan view of two pixels of a photoelectric conversion device. For ease of explanation, only the concave-convex portion 325, the separator 324, the microlens 329, the fourth semiconductor region 314, and the fifth semiconductor region 315 are shown. The separator 324 only shows the groove and the third film 323 disposed therein. The separator 324 surrounds the APD and has a lattice shape in plan view. The fifth semiconductor region 315 is disposed along the side surface of the groove in the separator 324, which can reduce noise from the groove. The concave-convex portion 325 is disposed in a position that mainly overlaps with the fourth semiconductor region 314 and is spaced apart from the separator 324. The separator 324 does not have to completely surround the APD; it may have a shape with a partial gap, or may be disposed only on the opposite side. The concave-convex portion 325 may be in contact with the separator 324.

[0071] A method for manufacturing the photoelectric conversion device of this embodiment will be described with reference to FIGS. 7 and 8. FIG. 7 is a cross-sectional view showing a manufacturing method for the isolation portion 324 and the uneven portion 325. FIG. 7 corresponds to FIG. 6(a) and shows a cross section of two pixels. FIG. 7 also shows the wiring structure 701 that is omitted in FIG. 6(a). In the following description, for simplicity, the same reference numerals may be used to denote components before and after processing.

[0072] First, multiple semiconductor regions are formed in a semiconductor substrate, and a wiring structure 701 is formed on the front surface of the semiconductor substrate. The back surface of the semiconductor substrate is thinned to form a semiconductor layer 301. The wiring structure 701 has a wiring layer, a plug, and an insulator portion 710. The wiring structure 701 has a first wiring layer 711 and a second wiring layer 712. The first wiring layer 711 is located between the second wiring layer 712 and the first surface P1. The wiring structure 701 may have three or more wiring layers. Each wiring layer includes multiple wires. The wiring structure 701 includes plugs such as a contact plug 713 for electrical connection between the first wiring layer 711 and the semiconductor layer 301 and a via plug 714 for electrical connection between the first wiring layer 711 and the second wiring layer 712. The wiring structure 701 may have plugs other than those shown in the figure. The wiring structure 701 has an insulator portion 710. The insulator portion 710 may be composed of multiple insulating layers. The wiring structure 701 has a fourth surface P4, which is the surface opposite to the first surface P1. Another semiconductor substrate can be provided on the fourth surface P4. The configuration up to this point is the configuration of a backside photoelectric conversion device, and since it can be manufactured by that process, explanation will be omitted.

[0073] Next, grooves 702 for the uneven portions 325 are formed on the second surface P2 of the semiconductor layer 301 (FIG. 7(a)). The grooves 702 are formed by isotropically etching the semiconductor layer 301 using a photoresist as a mask. Then, the first film 321 is formed to fill the grooves 702. As described above, the first film 321 may be made up of multiple layers. After the grooves 702 are filled, if the top surface of the first film 321 is not flat, a planarization process is performed on the top surface of the first film 321. Then, the second film 322 is formed on the first film 321.

[0074] A photoresist pattern 715 for forming the separation portion 324 is formed on the second film 322 (FIG. 7(c)). Using the photoresist pattern 715 as a mask, anisotropic etching is performed on the second film 322, the first film 321, and the semiconductor layer 301. First, etching is performed under conditions for removing the second film 322 and the first film 321, forming a groove 716 (FIG. 7(d)). Subsequently, etching is performed under conditions for removing the semiconductor layer 301, forming a groove 717. Here, when removing the semiconductor layer 301, the photoresist pattern 715 can be used as a mask, or the second film 322 or the first film 321 can be used as a mask, depending on the etching conditions. The photoresist pattern 715 is removed, resulting in the configuration shown in FIG. 7(e).

[0075] Here, the grooves 717 are further subjected to isotropic etching (FIG. 7(f)). By performing this process, the width of the grooves 717 can be adjusted. Furthermore, by performing this process, the side surfaces of the grooves 717 where the semiconductor layer 301 is exposed are smoothed, thereby reducing dark current. The grooves 717 are wider and deeper than the grooves 702, and therefore suffer more etching damage, so the grooves 717 are expected to have a greater dark current reduction effect. However, this isotropic etching can also be performed on the grooves 702. It is possible to reduce the dark current caused by the grooves 702.

[0076] Next, a third film 323 and a conductive film 331 are formed (FIG. 7(g)), and unnecessary conductive film 331 is removed to obtain the configuration shown in FIG. 7(g). Thereafter, a light-shielding portion 328 is formed. Note that the conductive film 331 may be left on the third film 323, so that the light-shielding portion 328 is formed from the conductive film 331. In this case, the conductive film 331 and the light-shielding portion 328 have an integral structure.

[0077] The subsequent steps are the same as in the manufacturing method of a normal photoelectric conversion device. In this manner, the photoelectric conversion device of this embodiment can be manufactured.

[0078] The manufacturing method described in Fig. 7 will be described in more detail with reference to Fig. 8. Fig. 8 is a cross-sectional view similar to Fig. 7, showing a manufacturing method for the separation portion 324 and the uneven portion 325. Fig. 8 focuses on the first film 321, the second film 322, and the third film 323, and is a cross-sectional view of one pixel, showing only the periphery of the semiconductor layer 301.

[0079] FIG. 8(a) shows a state similar to FIG. 7(a). FIGS. 8(b) and 8(c) show the formation of the first film 321 shown in FIG. 7(b). The first film 321 has a three-layer structure consisting of a first layer 801, a second layer 802, and a third layer. The first layer 801 is formed to cover at least a portion of the bottom and side surfaces of the trench 702, as well as the entire bottom and side surfaces. The first layer 801 is, for example, a pinning layer. The pinning layer has the function of reducing the generation of dark current at the interface with the semiconductor layer 301 and is made of, for example, a high-dielectric material having a negative fixed charge. Examples of pinning layers include aluminum oxide, hafnium oxide, zirconium dioxide, and tantalum oxide. The pinning layer can be manufactured using, for example, an ALD apparatus. Here, the first layer 801 is aluminum oxide. Next, the second layer 802 is formed on the first layer 801. The second layer 802 is, for example, an anti-reflection layer. The material and thickness of the second layer 802 can be selected taking into consideration the refractive indexes of the semiconductor layer 301, the first layer 801, and the third layer 803. The second layer 802 can be, for example, tantalum oxide, titanium oxide, zirconium dioxide, aluminum oxide, etc. The second layer 802 can be tantalum oxide. The third layer 803 is then formed on the second layer 802. The presence of such an anti-reflection layer can reduce reflection of incident light on the uneven portion 325 and the second surface P2. The third layer 803 is a layer for embedding, and is, for example, silicon oxide, silicon oxynitride, or silicon nitride. Here, the third layer 803 is silicon oxide. The third layer 803 is subjected to planarization treatment such as chemical mechanical polishing (CMP) as necessary. The top surface of the third layer 803 is flat. Here, the thickness of first layer 801 is thinner than the thickness of second layer 802, which is thinner than the thickness of third layer 803. Note that third layer 803 may have an air gap therein into which gas is trapped. Thereafter, second film 322 is formed on first film 321. Note that since semiconductor layer 301 is single crystal silicon (refractive index: approximately 4) and third layer 803 is silicon oxide (refractive index: approximately 1.8), the material of second layer 802 may be selected from materials with a refractive index between those two.

[0080] FIG. 8(d) shows a state similar to FIG. 7(d). Anisotropic etching is performed using a photoresist pattern 715 as a mask to form a groove 716. Here, the second film 322, the first layer 801 of the first film 321, the second layer 802 of the first film 321, and the third layer 803 of the first film 321 are made of different materials. Therefore, by performing etching under conditions that result in different etching selectivity, each layer can be used as an etching stop. This method enables highly accurate etching.

[0081] Next, Figure 8(e) shows a state similar to Figure 7(f). From the state of the groove 716 shown in Figure 7(e), anisotropic etching is performed on the semiconductor layer 301 to form a groove 717. Then, with the groove 717 exposed as shown in Figure 8(e), isotropic etching is performed on the semiconductor layer 301. By performing this process, the width of the groove 717 can be adjusted as described above. Furthermore, it is possible to reduce dark current caused by the groove 717.

[0082] 8(f), a third film 323 is formed to cover the groove 717 and the second film 322, and a conductive film 331 is then formed. As described above, unnecessary portions of the conductive film 331 can be removed.

[0083] With this configuration, it can be said that the separation section 324 is provided at the opening of the first film 321. By positioning the upper surface of the separation section 324 above the first film 321, which is made up of stacked layers with different refractive indices, it is possible to reduce lateral reflection or propagation of light due to phenomena such as reflection, refraction, and diffraction at each interface between the first film 321 and the second film 322 and at the uneven section 325. Note that even in a configuration in which the uneven section 325 is not provided, it is possible to reduce stray light caused by reflection or the like from entering other pixels.

[0084] Next, isotropic etching will be described with reference to Fig. 9. Fig. 9(a), Fig. 9(b), and Fig. 9(c) are cross-sectional schematic diagrams of one pixel of a photoelectric conversion device for explaining the width of the grooves in the isolation section 324 and the concave-convex section 325.

[0085] FIG. 9(a) shows the width and length of the groove 702 and groove 717 when they are simultaneously formed by anisotropic etching. The groove 702 has a length extending from the second surface P2 to the fifth surface P5. It can also be said that the groove 702 has a depth extending from the second surface P2 to the fifth surface P5. The groove 702 has a width W1 in the direction along the second surface P2. Between the second surface P2 and the fifth surface P5, the width of the groove 702 may differ from width W1. In FIG. 9(a), the width of the groove 702 decreases from the second surface P2 to the fifth surface P5. A portion of the width extending from the second surface P2 to the fifth surface P5 may be larger than width W1, and the groove 702 may have any structure. The groove 717 has a length extending from the second surface P2 to the first surface P1. It can also be said that the groove 717 has a depth extending from the second surface P2 to the first surface P1. The groove 717 has a width W2 in the direction along the second surface P2. The width of the groove 717 between the second surface P2 and the first surface P1 may be different from the width W2. In FIG. 9(a), the width of the groove 717 decreases from the second surface P2 to the first surface P1. A portion of the width from the second surface P2 to the first surface P1 may be larger than the width W2, and the groove 717 may have any structure.

[0086] FIG. 9(b) shows the shapes of the grooves 702 and 717 when isotropic etching is performed on the grooves 702 and 717 after the process of FIG. 9(a). The groove 702 changes from width W1 to width W3, and the groove 717 changes from width W2 to width W4. Width W3 is larger than width W1, and width W4 is larger than width W2. This process reduces the dark current in the grooves 702 and 717. Furthermore, the widths of the grooves 702 and 717 can be adjusted with precision, improving separation performance and sensitivity. Furthermore, isotropic etching positions the bottom of the groove 702 at the sixth plane P6. The sixth plane P6 is closer to the first plane P1 than the fifth plane P5. The bottom of the groove 717 is located at the first plane P1 as of FIG. 9(a), and does not become deeper because the semiconductor layer 301 is not present at the bottom. Depending on the conditions of the isotropic etching, the bottom surface of the groove 717 may be located farther from the second surface P2 than the first surface P1.

[0087] FIG. 9(c) shows the shapes of the grooves 702 and 717 when separate isotropic etching processes are performed on the grooves 702 and 717. The groove 702 changes from width W1 to width W3, and the groove 717 changes from width W2 to width W5. Width W3 is larger than width W1, and width W5 is larger than width W2. This process reduces the dark current in the grooves 702 and 717. Furthermore, the widths of the grooves 702 and 717 can be adjusted with precision, improving separation performance and sensitivity. Furthermore, because the isotropic etching processes are performed in separate processes, the shapes of the grooves 702 and 717 can be adjusted individually.

[0088] Here, from the viewpoint of shape control, the conditions for isotropic etching of the grooves 702 can be set so that the etching amount is equal to or greater than the conditions for isotropic etching of the grooves 717. Also, the conditions for isotropic etching of the grooves 702 can be set so that the etching amount is smaller than the conditions for isotropic etching of the grooves 717. In this case, the amount of change in the width of the grooves 702 can be reduced. This is because the grooves 702 become the uneven portions 325 provided on the light-receiving surface, and therefore a smaller width of the grooves 702 is expected to improve sensitivity. Furthermore, because the grooves 702 are provided on the light-receiving surface, damage due to etching can be reduced, enabling a reduction in dark current.

[0089] 9(a) and 9(c), for example, the width W1 is approximately 0.06 μm, and the width W3 is approximately 0.15 μm. For example, the width W2 is approximately 0.25 μm, and the width W5 is approximately 0.36 μm. This suppresses the generation of thermally excited charges at the interface of the uneven portion 325 or the separation portion 324 with the semiconductor layer 301, thereby reducing dark current. The ratio of the width W2 of the groove 702 to the width W5 of the groove 717 can be selected arbitrarily within a range of 1:2 to 10. In other words, the ratio of the groove width of the uneven portion 325 to the groove width of the separation portion 324 can be selected arbitrarily within a range of 2 to 10. The groove 717 can be formed to a depth of 0.1 to 0.6 μm. It is desirable that the depth of the groove 717 be greater than the width of the groove 717 in order to sufficiently capture diffracted light of incident light by the uneven portion 325. The width of the grooves can be arbitrarily controlled depending on the prescription for isotropic etching after the anisotropic etching process, and it is desirable to determine an appropriate etching amount by comprehensively assessing the dark current, the embedding property of the embedding material, and the optical characteristics. Note that the depth of the grooves 702 and 717 can also be changed by isotropic etching.

[0090] As described above, by positioning the separation portion 324 closer to the microlens 329 than the concave-convex portion 325, it is possible to reduce the intrusion of stray light refracted or reflected by the concave-convex portion 325 into adjacent pixels. Such a configuration of the separation portion 324 makes it possible to provide a photoelectric conversion device with reduced optical crosstalk. Furthermore, by further performing isotropic etching on the grooves 702 of the concave-convex portion 325 and the grooves 717 of the separation portion 324, it is possible to adjust the shapes of the grooves 702 and 717. Therefore, it is possible to provide a photoelectric conversion device having a more suitable concave-convex portion 325 and separation portion 324.

[0091] Furthermore, by further performing isotropic etching on the grooves 702 of the concave-convex portion 325 and the grooves 717 of the separation portion 324, it is possible to reduce dark current, and it is possible to provide a photoelectric conversion device with reduced dark current. Furthermore, by performing isotropic etching on the grooves 702 and 717 in separate processes, it is possible to control the shapes of the grooves 702 and 717 with higher precision. Therefore, it is possible to provide a photoelectric conversion device with more suitable concave-convex portion 325 and separation portion 324. Furthermore, when performing isotropic etching on the grooves 702 and 717 in separate processes, it is possible to reduce the etching amount of the grooves 717 more than the etching amount of the grooves 702, thereby reducing the dark current on the light-receiving surface while controlling the shape of the grooves 717. Therefore, it is possible to provide a photoelectric conversion device with reduced dark current.

[0092] (Second embodiment) The second embodiment will be described with reference to Fig. 10. Fig. 10 is a cross-sectional view illustrating a method for manufacturing a photoelectric conversion device corresponding to Fig. 7 of the first embodiment. In Fig. 10, explanations of steps similar to those in Fig. 7 will be omitted. The second embodiment differs from the first embodiment in that the structures of the first film 321 and the second film 322 are different.

[0093] The process shown in Figure 10(a) is similar to that shown in Figure 7(a), and therefore a description thereof will be omitted. The process shown in Figure 10(b) is similar to that shown in Figure 7(b), and therefore a description thereof will be omitted. In Figure 10(b), a planarization process such as CMP is performed on the first film 321. Then, the portions of the first film 321 other than those embedded in the trenches 702 are removed (Figure 10(c)). At this point, the second film 322 may be formed.

[0094] After these steps, a photoresist pattern 715 for forming a groove 717 is formed (FIG. 10(d)), similar to FIG. 7(d), and the groove 717 is formed by anisotropic etching (FIG. 10(d)). In FIG. 10(f), isotropic etching is performed on the groove 717, similar to FIG. 7(f). Then, similar to FIGS. 7(g) and 7(h), a third film 323 and a conductor film 331 are formed (FIG. 10(g)).

[0095] In this way, a process may be performed in which the first film 321 is scraped off and the third film 323 is formed on the second surface P2. As in the first embodiment, this embodiment can also provide a photoelectric conversion device having at least one of the effects of a photoelectric conversion device with reduced optical crosstalk, a photoelectric conversion device having more suitable uneven portion 325 and separation portion 324, or a photoelectric conversion device with reduced dark current.

[0096] (Third embodiment) The second embodiment will be described with reference to FIG. 11. FIG. 11 is a cross-sectional view illustrating a photoelectric conversion device corresponding to FIG. 8(f) of the first embodiment. In FIGS. 11(a) to 11(c), the description of the same configuration as FIG. 8(f) will be omitted. The third embodiment differs from the first embodiment in that the second film 322 is not provided and the structure of the separation section 324 is different.

[0097] First, FIG. 11(a) shows one pixel of the semiconductor layer 301 of the photoelectric conversion device, similar to FIG. 8(f). The difference between the configuration of FIG. 11(b) and the configuration of FIG. 8(f) is that the conductive film 331 filling the groove 717 of the separation unit 324 is replaced by a different dielectric film 1101. A dielectric film 1101 may be disposed inside the groove 717 instead of the conductive film 331. Furthermore, the dielectric film 1101 filling the groove 717 may include voids. Furthermore, the dielectric film 1101 may be disposed along the side surface of the groove 717, or may be disposed on part of the side surface of the groove 717.

[0098] FIG. 11(b) illustrates one pixel of the semiconductor layer 301 of the photoelectric conversion device, similar to FIG. 8(f). The difference between the configuration of FIG. 11(b) and the configuration of FIG. 8(f) is the difference in the structures of the left and right isolation portions 324. In FIG. 11(b), the isolation portion 324a is formed and embedded simultaneously with the groove of the uneven portion 325. Therefore, the isolation portion 324a is embedded with the first film 321. The isolation portion 324b is formed after the first film 321 is formed. The isolation portion 324b includes a groove 717, a third film 323 that fills the groove 717, and a conductive film 331. In this way, when the uneven portion 325 and the isolation portion 324 are formed in separate processes, it is also possible to form only a desired portion of the isolation portion 324 simultaneously with the uneven portion 325. Since the structure of the isolation portion 324 can be modified at any desired location, this is suitable for varying the isolation performance between APDs. For example, the separator 324a in Fig. 11(b) may be arranged between two APDs arranged for one color filter, and the separator 324b in Fig. 11(b) may be arranged between another APD. Alternatively, the separator 324a in Fig. 11(b) may be arranged between two APDs arranged for one microlens, and the separator 324b in Fig. 11(b) may be arranged between another APD.

[0099] 11(c), like FIG. 11(b), shows one pixel of the semiconductor layer 301 of the photoelectric conversion device. The difference between the configuration of FIG. 11(c) and the configuration shown in FIG. 11(b) is that the depth of the separation portion 324a is different from the depth of the separation portion 324b. By forming them in separate processes, it is possible to make the depth and width of the separation portion 324a different from those of the separation portion 324b, and it is possible to provide a separation portion that is suitable for changing the separation performance as described above.

[0100] (Fourth embodiment) The fourth embodiment will be described with reference to Fig. 12. Fig. 12(a) and Fig. 12(b) are diagrams corresponding to Fig. 6(a) of the first embodiment, and are cross-sectional schematic diagrams for explaining a photoelectric conversion device. In Fig. 12(a) and Fig. 12(b), the same configuration as Fig. 6(a) will not be described.

[0101] The photoelectric conversion device of FIG. 12(a) differs from the photoelectric conversion device of FIG. 6(a) in the configuration of the multiple semiconductor regions, the configuration of the concave-convex portion 325, and the depth of the isolation portion 324. Compared to the configuration of FIG. 6(a), the first semiconductor region 311 is larger and more highly concentrated. The second semiconductor region 312 is more highly concentrated. The sixth semiconductor region 316 has a P conductivity type, and the seventh semiconductor region 317 is larger. Furthermore, an N-type eighth semiconductor region 318 is added. This configuration can also be applied to APDs. Furthermore, the concave-convex portion 325 has a pyramidal shape with acute angles compared to that of FIG. 6(a). Even with this configuration, sensitivity can be improved. Furthermore, the isolation portion 324 does not penetrate the semiconductor layer 301, and the bottom surface of the isolation portion 324 is located on the seventh plane P7. A P-type ninth semiconductor region 319 is disposed between the isolation portion 324 and the first plane P1. The ninth semiconductor region 319 reduces noise generation on the first plane P1 side.

[0102] The photoelectric conversion device of FIG. 12(b) differs from the photoelectric conversion device of FIG. 6(a) in that it includes insulating films 1201, 1202, and 1203 arranged on the first surface P1 side, and the configuration of the isolation portion 324 is different. The isolation portion 324 of FIG. 12(b) penetrates the first surface P1 of the semiconductor layer 301, penetrates the insulating film 1201, and contacts the insulating film 1202. The insulating film 1202 can function as an etching stop film. This configuration improves the accuracy of the depth of the trench 717. Here, the insulating films 1201, 1202, and 1203 are, for example, silicon oxide, silicon oxynitride, or silicon nitride. For example, the insulating films 1201 and 1203 can be silicon oxide, and the insulating film 1202 can be silicon nitride.

[0103] 12(b), the angle of the side surface of the separation portion 324 increases at the seventh plane P7, or the rate of decrease in its width increases. The angle of the side surface means, for example, the angle that the side surface forms with a line perpendicular to the first plane P1. This shape can be obtained by changing the etching conditions midway when forming the groove 717 of the separation portion 324. This shape reduces the separation portion 324 formed on the first plane P1 side, allowing the distance from the separation portion 324 to the avalanche multiplication region to be increased. Therefore, it is possible to provide a photoelectric conversion device with reduced dark current.

[0104] (Fifth embodiment) The fifth embodiment will be described with reference to FIG. 13. FIG. 13 is a cross-sectional view illustrating a photoelectric conversion device corresponding to FIG. 6(a) of the first embodiment. While FIG. 6(a) illustrates a photoelectric conversion device having an APD, the photoelectric conversion device of FIG. 13 is a CMOS image sensor having a so-called photodiode PD. In FIG. 13, direction P indicates the horizontal direction (in-plane direction) and direction N indicates the vertical direction (normal direction). The vertical direction is the direction relative to the second plane P2.

[0105] The photoelectric conversion device has a semiconductor layer 1300 having a first surface P1 and a second surface P2. The semiconductor layer 1300 is, for example, a single crystal silicon layer, but is not limited to a single crystal silicon layer as long as it is a semiconductor layer capable of photoelectric conversion.

[0106] On the first surface P1 side of the semiconductor layer 1300, an element isolation portion 1301, a wiring structure 1350, and another semiconductor layer 1360 are arranged. The wiring structure 1350 includes a wiring layer 1351, a wiring layer 1352, a wiring layer 1353, and an insulator portion 1354. The wiring structure 1350 does not include contact plugs or via plugs. The insulator portion 1354 can be composed of multiple insulating layers. The semiconductor layer 1360 may be a simple support substrate, or may include a circuit for processing signals from a CMOS image sensor. In the latter case, the semiconductor layer 1300 and the semiconductor layer 1360 can be electrically connected by any technique. The semiconductor layer 1300 has a thickness of about 1 to 10 μm, and the semiconductor layer 1360 has a thickness of about 50 to 800 μm.

[0107] The second surface P2 side of the semiconductor layer 1300 has a first film 1321, a second film 1322, a third film 1323, a separation portion 1324, a concave-convex portion 1325, a fourth film 1326, a light-shielding portion 1328, a microlens 1329, and a color filter 1330. An opening is formed in the light-shielding portion 1328. These configurations are the same as those in the first embodiment, so a description thereof will be omitted.

[0108] The semiconductor layer 1300 has N-type semiconductor regions 1311 and 1312 that constitute the PD. The semiconductor layer 1300 also has P-type semiconductor regions 1313 and 1314. The semiconductor region 1311 may further have a P-type semiconductor region on the first surface P1 side. The PD is composed of the N-type semiconductor region including the semiconductor regions 1311 and 1312 and other P-type semiconductor regions. The semiconductor region 1313 covers the uneven portion 1325 and can reduce dark current from the uneven portion 1325 and dark current from the second surface P2. The semiconductor region 1314 covers the side surface of the isolation portion 1324 and can reduce dark current from the isolation portion 1324. The semiconductor layer 1300 may have a transistor having a gate electrode 1305, a channel region 1306, and a source / drain region (not shown). This transistor is called a pixel transistor of a CMOS image sensor. The semiconductor layer 1300 may have only PDs, and another semiconductor layer may have pixel transistors and the like.

[0109] The element isolation portion 1301 is arranged on the first surface P1 of the semiconductor layer 1300, and can be configured by a trench 1302 and an insulator 1303 arranged therein. The element isolation portion 1301 can have, for example, an STI structure or a LOCOS structure. The insulator 1303 is made of, for example, silicon oxide.

[0110] The isolation portion 1324 may be composed of a trench disposed in the semiconductor layer 1300 and a film filling the trench. The isolation portion 1324 is disposed so as to penetrate a ninth plane P9, which is located equidistant from the first plane P1 and the second plane P2. The isolation portion 1324 includes a third film 1323 and a conductive film 1331. The trench may contain a vacuum space or an air gap formed of gas, or may contain both gas and a solid, such as a film. The solid present in the trench may be an insulator, a conductor, or a semiconductor. Silicon oxide is typically used as the solid insulator present in the trench, but silicon nitride, silicon oxynitride, tantalum oxide, hafnium oxide, titanium oxide, etc. can also be used. Metal or polysilicon is typically used as the solid conductor present in the trench, but aluminum, copper, tungsten, titanium, titanium nitride, tantalum, tantalum nitride, metal silicide, etc. can also be used. The solid semiconductor present in the trench is typically single-crystal silicon, but may be amorphous silicon. The conductivity type of the solid semiconductor present in the trench is preferably the opposite conductivity type to the signal charge stored in the photoelectric conversion element described below. These materials are also applicable to other embodiments.

[0111] The uneven portion 1325 is disposed on the second surface P2 of the semiconductor layer 1300 and can be configured by a film that fills the grooves and grooves. The uneven portion 1325 scatters and diffracts incident light.

[0112] In such a CMOS image sensor, by positioning the separation portion 1324 closer to the microlens 1329 than the concave-convex portion 1325, it is possible to reduce the intrusion of stray light refracted or reflected by the concave-convex portion 1325 into adjacent pixels. This separation portion 1324 configuration makes it possible to provide a photoelectric conversion device with reduced optical crosstalk. Furthermore, the manufacturing methods and modifications described in other embodiments can be applied as appropriate. In a CMOS image sensor having an overflow drain, the separation portion at the desired overflow location can be configured to have lower separation characteristics than the other separation portions. Specifically, this configuration may involve providing the separation portion 324a on the left in FIG. 11(b) or FIG. 11(c) at the desired overflow location, and placing the separation portion 324b on the right in FIG. 11(b) or FIG. 11(c) elsewhere. This embodiment can also achieve the same effects as the other embodiments.

[0113] (Sixth embodiment) This embodiment will be described with reference to FIGS. 14 to 18. FIG. 14 corresponds to FIG. 6(a) and is a cross-sectional view illustrating a photoelectric conversion device according to this embodiment. The same configuration as that in FIG. 6(a) will not be described in FIG. 14. Unlike the photoelectric conversion device according to the first embodiment, the photoelectric conversion device according to this embodiment has the separation section 324 and the concave-convex section 325 embedded in the same first film 321, and does not have the conductive film 331 shown in FIG. 6(a). That is, the upper surface of the separation section 324 is located on the second plane P2, which is the same as the upper surface of the concave-convex section 325. Unlike the first embodiment, the third film 323 extends along the second plane P2. The third film 323 is, for example, a film made of silicon oxide, silicon oxynitride, silicon nitride, or the like.

[0114] 14 changes its width from the ninth semiconductor region 319, and its width at the first plane P1 is smaller than its width at the second plane P2. Furthermore, the bottom surface of the separation portion 324 penetrates the first plane P1 and is located at the eleventh plane P11. By reducing the width of the separation portion 324 at the first plane P1 in this manner, the distance from the avalanche multiplication region increases. This reduces the influence of noise from the separation portion 324 on the avalanche multiplication region. Furthermore, because the width of the ninth semiconductor region 319 can be made smaller than in the first embodiment, it is possible to reduce the influence of the electric field and the like on the avalanche multiplication region caused by the ninth semiconductor region 319.

[0115] FIG. 15 is a cross-sectional view illustrating a method for manufacturing a photoelectric conversion device having such a configuration. FIG. 15 corresponds to FIG. 7 and is a cross-sectional view illustrating a method for manufacturing the isolation portion 324 and the uneven portion 325. In FIG. 15, the same components as those in FIG. 7 are not described. In FIG. 15(a), a groove 702 is formed in the semiconductor layer 301. A photoresist pattern 1501 is formed thereon. Using the photoresist pattern 1501 as a mask, anisotropic etching is performed on the semiconductor layer 301 to form a groove 717 for the isolation portion 324 (FIG. 15(b)). After removing the photoresist pattern 1501, isotropic etching is performed (FIG. 15(c)). Then, a first film 321 is formed so as to fill the groove 702 and the groove 717 (FIG. 15(d)). The subsequent steps are performed in the method for manufacturing a photoelectric conversion device. The top surface of the first film 321 is planarized, and a second film 322 and a third film 323 are formed, and a light-shielding portion 328 is formed. A fourth film 326 that covers the light-shielding portion 328, a color filter 330, and a microlens 329 are formed. Through these steps, the photoelectric conversion device of this embodiment can be manufactured.

[0116] FIG. 16 is a cross-sectional view illustrating in more detail the manufacturing method described in FIG. 15. FIG. 16 corresponds to FIG. 8 of the first embodiment and is a cross-sectional view illustrating a manufacturing method for the isolation portion 324 and the uneven portion 325. FIG. 16 focuses on the first film 321, is a cross-sectional view of one pixel, and shows only the periphery of the semiconductor layer 301. FIG. 16(a) illustrates a process in which isotropic etching is simultaneously performed on the grooves 702 and 717. After this process, a first layer 801 of the first film 321 is formed (FIG. 16(b)). Then, a second layer 802 is formed (FIG. 16(c)). The first layer 801 and the second layer 802 may be the same as those used in the first embodiment. Either the first layer 801 or the second layer 802 may not be formed. In this embodiment, the thickness T2 of the second layer is greater than the thickness T1 of the first layer 801. The thickness of the second layer 802 is adjusted in consideration of optical properties. Furthermore, the portion of the first layer 801 formed on and along the second surface P2 is thicker than the portion formed on the side surfaces of the grooves 702 or 717. This configuration allows for the formation of a film with high adhesion. The portion of the second layer 802 formed on and along the second surface P2 is thicker than the portion formed on the side surfaces of the grooves 702 or 717. This configuration allows for reduced reflection of incident light. Next, the third layer 803 is formed. The third layer 803 is formed to fill the grooves 702 and 717, and is therefore formed thicker above the second surface P2. The third layer 803 can then be removed and planarized by CMP or etching. In this manner, the separation portion 324 and the uneven portion 325 of this embodiment are formed.

[0117] (Seventh embodiment) This embodiment will be described with reference to Figures 17 and 18. Figure 17(a) is a drawing corresponding to Figure 14 and is a cross-sectional schematic diagram for explaining the photoelectric conversion device of this embodiment. In Figure 17(a), the description of the same configuration as in Figure 14 will be omitted. Figure 17(a) shows the semiconductor layer 301, the wiring structure 701 not shown in Figure 14, and another wiring structure 1705.

[0118] The wiring structure 701 includes a wiring layer, a plug, and an insulator portion 710. The components of the wiring structure 701 already described in FIG. 7 will not be described again. The wiring structure 701 includes a first wiring layer 711, a second wiring layer 712, a third wiring layer 1703, a contact plug 713, a via plug 714, and a via plug 1702. The wiring layer and the plug may be integrally formed. The wiring structure 701 also includes a metal portion 1704 for bonding. The metal portion 1704 may be for electrical connection. The metal portion 1704 may also be for bonding between a metal and an insulator, known as hybrid bonding. The wiring structure 701 contacts another wiring structure 1705 via a fourth surface P4, which serves as a bonding surface. The other wiring structure 1705 includes a wiring layer 1709, a wiring layer 1707, a via plug 1708, and a metal portion 1706. These have the same functions as the corresponding components of the wiring structure 701.

[0119] The semiconductor layer 301 has separation portions 324 and uneven portions 325. The separation portions 324 have rounded ends on the first plane P1 side. The side surfaces of the separation portions 324 include curves near the first plane P1. Furthermore, there is a void 1701 (air gap) inside the separation portions 324. The uneven portions 325 have rounded ends on the first plane P1 side. The side surfaces of the uneven portions 325 include curves on the first plane P1 side. The dotted line area surrounding one of the uneven portions 325 is designated as area A, and is shown in Figure 17(b).

[0120] FIG. 17(b) is a schematic diagram showing an enlarged view of the uneven portion 325 in region A in FIG. 17(a). The first layer 801 and the second layer 802 are arranged along the shape of the groove 702 formed in the semiconductor layer 301 and are arranged on the semiconductor layer 301 along the second plane P2. The first layer 801 and the second layer 802 can also be said to be arranged conformally on the surface of the semiconductor layer 301. The third layer 803 is arranged to fill the groove 702 and has a flat upper surface. Here, the first layer 801 is thinner than the second layer 802, which is thinner than the third layer 803. A void 1710 is arranged within the groove 702 and surrounded by the third layer. The void 1710 may be omitted. The film thickness of the portion of the second layer 802 located on the second plane P2 is thicker than the film thickness of the portion of the second layer 802 located within the groove 702. This configuration reduces reflection on the light-receiving surface. Furthermore, by enlarging the opening of the groove 702, it becomes easier to fill the groove 702 with the third layer 803, making it easier to generate refraction and diffraction at the uneven portion 325. Furthermore, the thickness of the second layer 802 along the side of the groove 702 is initially thin at a portion 1711 near the bottom. The thick bottom portion reduces reflection of incident light that enters the bottom. Each of the uneven portions 325 has this structure. While the second layer 802 and the third layer 803 have been described as continuous layers, they may also be layers with discontinuities. For example, the second layer 802 may be present at least on the bottom surface. The second layer 802 may also be observed to be partially discontinuous.

[0121] Figure 18(a) is a schematic diagram showing an enlargement of the separation section 324. Figure 18(c) is a schematic diagram showing an enlargement of the bottom surface of the separation section 324 in Figure 18(a). Figure 18(d) is a schematic diagram showing an enlargement of region B in Figure 18(c). Although the first layer 801 is not shown in Figures 18(a), 18(c), and 18(d), it is formed to be thin.

[0122] The bottom surface of the separation portion 324 contacts the film 1802. The width of the bottom surface is smaller than the width of the remaining portion. As shown particularly in FIGS. 18(c) and 18(d), the width of the separation portion 324 decreases at the boundary between the semiconductor layer 301 and the film 1802 and then increases again at the film 1801. For example, the width of the separation portion 324 increases once near the first plane P1, decreases at the boundary between the semiconductor layer 301 and the film 1801, and then increases within the film 1801. The film thickness of the portion of the second layer 802 located on the second plane P2 is thicker than the film thickness of the second layer 802 located on the side surface of the groove. As shown in FIG. 18(d), a portion of the film 1801 on the first plane P1 side has a convex shape toward the inside of the groove and is covered by the second layer 802.

[0123] FIG. 18(b) is a schematic diagram showing a modified example of the isolation portion 324 similar to the isolation portion 324 of FIG. 14. Although not shown in FIG. 18(b), the first layer 801 is thin. The angle of the side surface changes at the twelfth plane P12 near the first plane P1, resulting in a tapered shape along the direction from the twelfth plane P12 toward the first plane P1. The width decreases along the direction from the twelfth plane P12 toward the first plane P1. The bottom surface, film 1801, and film 1802 of the isolation portion 324 may be similar to those shown in FIGS. 18(a), 18(b), and 18(d). This configuration can reduce the influence of noise from the isolation portion 324 on the avalanche multiplication region. Furthermore, the influence of the electric field and the like on the avalanche multiplication region caused by the ninth semiconductor region 319 can be reduced.

[0124] Here, the film 1801 and the film 1802 can be selected from, for example, silicon oxide, silicon oxynitride, silicon nitride, etc. In this embodiment, for example, the film 1801 contains silicon oxide, and the film 1802 contains silicon nitride.

[0125] (Eighth embodiment) FIG. 19( a) is a schematic diagram illustrating a device 9191 including a semiconductor device 930 according to this embodiment. The photoelectric conversion device (imaging device) of each of the above-described embodiments can be used as the semiconductor device 930. The device 9191 including the semiconductor device 930 will be described in detail. The semiconductor device 930 may include a semiconductor device 910. In addition to the semiconductor device 910, the semiconductor device 930 may also include a package 920 that houses the semiconductor device 910. The package 920 may include a base to which the semiconductor device 910 is fixed and a lid such as glass that faces the semiconductor device 910. The package 920 may further include bonding members such as bonding wires or bumps that connect terminals provided on the base to terminals provided on the semiconductor device 910. The semiconductor device 930 has a region 901 in which a plurality of pixels 900 are arranged and a surrounding region 902.

[0126] The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a memory device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 includes an optical system, such as a lens, a shutter, or a mirror, that guides light to the semiconductor device 930. The control device 950 controls the semiconductor device 930. The control device 950 is a semiconductor device, such as an ASIC. The processing device 960 processes signals output from the semiconductor device 930. The processing device 960 is a semiconductor device, such as a CPU or an ASIC, that configures an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the semiconductor device 930. The memory device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0127] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the semiconductor device 930 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) provided in the device 9191. For this purpose, the device 9191 preferably further includes a memory device 980 and a processing device 960 in addition to the memory circuit and arithmetic circuit provided in the semiconductor device 930. The mechanical device 990 may be controlled based on the signal output from the semiconductor device 930.

[0128] The device 9191 is also suitable for electronic devices such as information terminals with a photographing function (for example, smartphones and wearable devices) and cameras (for example, interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for vibration isolation operations.

[0129] Furthermore, the device 9191 may be transportation equipment (moving body) such as a vehicle, a ship, or an aircraft (drone, aircraft, etc.). The mechanical device 990 in transportation equipment can be used as a moving device. The device 9191 as transportation equipment is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (piloting) using a photographing function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a moving device based on information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot.

[0130] According to the above-described embodiment, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. In this case, increasing the value corresponds to at least one of adding functions, improving performance, improving characteristics, improving reliability, improving manufacturing yield, reducing environmental impact, reducing costs, reducing size, and reducing weight.

[0131] Therefore, if the semiconductor device 930 according to this embodiment is used in the equipment 9191, the value of the equipment can also be improved. For example, by installing the semiconductor device 930 in a transport equipment, excellent performance can be obtained when photographing the exterior of the transport equipment or measuring the external environment. Therefore, when manufacturing and selling transport equipment, deciding to install the semiconductor device according to this embodiment in the transport equipment is advantageous in terms of improving the performance of the transport equipment itself. In particular, the semiconductor device 930 is suitable for transport equipment that performs driving assistance and / or automatic driving of the transport equipment using information obtained by the semiconductor device.

[0132] The photoelectric conversion system and the moving object of this embodiment will be described with reference to FIGS. 19(b) and 19(c).

[0133] 19(b) and 19(c) show an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 1908 includes a photoelectric conversion device 1980. The photoelectric conversion device 1980 is the photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 1908 includes an image processing unit 1981 and a parallax acquisition unit 1982. The image processing unit 1981 performs image processing on multiple image data acquired by the photoelectric conversion device 1980. The parallax acquisition unit 1982 calculates parallax (phase difference between parallax images) from the multiple image data acquired by the photoelectric conversion system 1908. The photoelectric conversion system 1908 may include an optical system (not shown) that guides light to the photoelectric conversion device 1980, such as a lens, shutter, or mirror. Furthermore, multiple photoelectric conversion units that are approximately conjugate with the pupil of the optical system may be arranged in the pixels of the photoelectric conversion device 1980. For example, multiple photoelectric conversion units nearly conjugate with the pupil are arranged corresponding to one microlens. The multiple photoelectric conversion units receive light beams that have passed through different positions on the pupil of the optical system, and the photoelectric conversion device 1980 outputs image data corresponding to the light beams that have passed through the different positions. The parallax acquisition unit 1982 may then calculate parallax using the output image data. The photoelectric conversion system 1908 also includes a distance acquisition unit 1983 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 1984 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 1982 and the distance acquisition unit 1983 are examples of distance information acquisition means that acquire information about the distance to the object. That is, the distance information includes information about the parallax, the defocus amount, the distance to the object, etc. The collision determination unit 1984 may determine the possibility of collision using any of this distance information. The distance information may also be acquired using ToF (Time of Flight). The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination thereof.

[0134] The photoelectric conversion system 1908 is connected to a vehicle information acquisition device 1910 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 1908 is also connected to a control ECU 1920, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 1984. The photoelectric conversion system 1908 is also connected to an alarm device 1930 that issues an alarm to the driver based on the determination result of the collision determination unit 1984. For example, if the determination result of the collision determination unit 1904 indicates a high possibility of a collision, the control ECU 1920 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 1930 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0135] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by a photoelectric conversion system 1908. Fig. 19(c) shows a photoelectric conversion system for imaging the area in front of the vehicle (imaging range 1950). A vehicle information acquisition device 1910 sends instructions to the photoelectric conversion system 1908 or the photoelectric conversion device 1980. This configuration can further improve the accuracy of distance measurement.

[0136] While the above describes an example of control to prevent collisions with other vehicles, the present invention can also be applied to other applications, such as control for automatic driving by following other vehicles or control for automatic driving to avoid drifting out of a lane. Furthermore, the photoelectric conversion system 1908 can be applied not only to automobiles and other vehicles, but also to moving bodies (mobile devices) such as ships, aircraft, and industrial robots. The moving body includes one or both of a driving force generating unit that generates a driving force primarily used to move the moving body and a rotating body primarily used to move the moving body. The driving force generating unit can be an engine, a motor, or the like. The rotating body can be a tire, a wheel, a ship's screw, an aircraft's propeller, or the like. In addition to moving bodies, the present invention can be applied to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0137] Although various devices have been described in the above embodiments, a mechanical device may also be provided. The mechanical device in the camera can drive optical components for zooming, focusing, and shutter operation. Alternatively, the mechanical device in the camera can move a photoelectric conversion device for vibration reduction.

[0138] The equipment may also be transportation equipment such as a vehicle, a ship, or an aircraft. A mechanical device in the transportation equipment category may be used as a moving device. Equipment serving as transportation equipment is suitable for transporting a photoelectric conversion device or for assisting and / or automating driving (piloting) using a photographing function. A processing device for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device as a moving device based on information obtained by the photoelectric conversion device.

[0139] (Ninth embodiment) The photoelectric conversion system of this embodiment will be described with reference to Fig. 20. Fig. 20 is a block diagram showing an example of the configuration of a range image sensor which is the photoelectric conversion system of this embodiment.

[0140] 20, the range image sensor 2001 is configured to include an optical system 2002, a photoelectric conversion device 2003, an image processing circuit 2004, a monitor 2005, and a memory 2006. The range image sensor 2001 can obtain a range image according to the distance to the subject by receiving light (modulated light or pulsed light) that is projected from a light source device 2011 toward the subject and reflected by the surface of the subject.

[0141] The optical system 2002 is configured to have one or more lenses, and guides image light (incident light) from a subject to the photoelectric conversion device 2003 , forming an image on the light receiving surface (sensor section) of the photoelectric conversion device 2003 .

[0142] The photoelectric conversion device 2003 is one of the photoelectric conversion devices of the above-described embodiments, and a distance signal indicating a distance determined from a light reception signal output from the photoelectric conversion device 2003 is supplied to an image processing circuit 2004 .

[0143] The image processing circuit 2004 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 2003. The distance image (image data) obtained by this image processing is then supplied to a monitor 2005 for display, or supplied to a memory 2006 for storage (recording).

[0144] In the range image sensor 2001 configured in this way, by applying the above-described photoelectric conversion device, it is possible to obtain, for example, a more accurate range image as the pixel characteristics improve.

[0145] (Tenth embodiment) The photoelectric conversion system of this embodiment will be described with reference to FIGS. 21(a) and 21(b). FIG. 21(a) illustrates glasses 2100 (smart glasses) which are the photoelectric conversion system of this embodiment. The glasses 2100 have a photoelectric conversion device 2102. The photoelectric conversion device 2102 is the photoelectric conversion device (imaging device) described in each of the above embodiments. A display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 2101. There may be one or more photoelectric conversion devices 2102. A combination of multiple types of photoelectric conversion devices may also be used. The arrangement position of the photoelectric conversion device 2102 is not limited to that shown in FIG. 21(a).

[0146] The glasses 2100 further include a control device 2103. The control device 2103 functions as a power source that supplies power to the photoelectric conversion device 2102 and the display device. The control device 2103 also controls the operations of the photoelectric conversion device 2102 and the display device. The lens 2101 is formed with an optical system for focusing light onto the photoelectric conversion device 2102.

[0147] FIG. 21(b) illustrates glasses 2110 (smart glasses) according to one application example. The glasses 2110 include a control device 2112, which is equipped with a photoelectric conversion device corresponding to the photoelectric conversion device 2102 and a display device. A lens 2111 includes an optical system for projecting light emitted from the photoelectric conversion device and the display device, and an image is projected onto the lens 2111. The control device 2112 functions as a power source for supplying power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device may include a gaze detection unit for detecting the gaze of the wearer. Infrared light may be used for gaze detection. The infrared light emitter emits infrared light toward the eyeball of a user gazing at a displayed image. An imaging unit with a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. A reduction unit for reducing light from the infrared light emitter to the display unit in a planar view reduces degradation of image quality.

[0148] The gaze of the user relative to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be used for gaze detection using an image of the eyeball. One example is a gaze detection method based on the Purkinje image formed by reflection of irradiated light on the cornea.

[0149] More specifically, gaze detection processing is performed based on the pupil-corneal reflex method, which calculates a gaze vector representing the direction (rotation angle) of the eyeball based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0150] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the image displayed on the display device based on information about the user's line of sight from the photoelectric conversion device.

[0151] Specifically, the display device determines a first field of view area where the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0152] The display area may include a first display area and a second display area different from the first display area, and a high-priority area may be determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the high-priority area may be controlled to be higher than the resolution of areas other than the high-priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0153] Note that AI may be used to determine the first field of view area and areas with high priority. The AI ​​may be a model configured to estimate the angle of gaze and the distance to an object in the line of sight from an image of the eyeball, using as training data an image of the eyeball and the direction in which the eyeball in the image was actually looking. The AI ​​program may be included in the display device, the photoelectric conversion device, or an external device. If included in an external device, it is transmitted to the display device via communication.

[0154] When display control is performed based on visual recognition detection, the present invention is preferably applied to smart glasses that further include a photoelectric conversion device for capturing images of the outside world. The smart glasses can display captured external information in real time.

[0155] (Eleventh embodiment) The above-described photoelectric conversion device may be applied to devices, for example, electronic devices such as so-called smartphones and tablets.

[0156] 22(a) and 22(b) are diagrams showing an example of an electronic device 2200 equipped with a photoelectric conversion device. Fig. 22(a) shows the front side of the electronic device 2200, and Fig. 22(b) shows the back side of the electronic device 2200.

[0157] 22(a), a display 2210 for displaying an image is disposed in the center of the surface of the electronic device 2200. Then, along the upper side of the surface of the electronic device 2200, front cameras 2221 and 2222 using photoelectric conversion devices, an IR light source 2230 for emitting infrared light, and a visible light source 2240 for emitting visible light are disposed.

[0158] Also, as shown in FIG. 22(b), rear cameras 2251 and 2252 using photoelectric conversion devices, an IR light source 2260 that emits infrared light, and a visible light source 2270 that emits visible light are arranged along the upper edge of the back of the electronic device 2200.

[0159] In the electronic device 2200 configured as described above, by applying the above-described photoelectric conversion device, it is possible to capture, for example, higher quality images. The photoelectric conversion device can also be applied to other electronic devices, such as infrared sensors, distance measurement sensors using active infrared light sources, security cameras, and personal or biometric authentication cameras. This can improve the accuracy and performance of these electronic devices. The types of cameras and light sources arranged on the front and back surfaces can be selected as appropriate.

[0160] (Twelfth embodiment) The above-described photoelectric conversion device may be applied to a medical system such as an X-ray CT device.

[0161] 23 is a block diagram of an X-ray CT apparatus according to this embodiment. The photoelectric conversion device is applicable to the detector of the X-ray CT apparatus. The X-ray CT apparatus 2300 has an X-ray generation unit 2310, a wedge 2311, a collimator 2312, an X-ray detection unit 2320, a top plate 2330, a rotating frame 2340, and a high-voltage generation device 2350. Furthermore, the X-ray CT apparatus 2300 has a data acquisition system (DAS) 2351, a signal processing unit 2352, a display unit 2353, and a control unit 2354.

[0162] The X-ray generating unit 2310 is composed of, for example, a vacuum tube that generates X-rays. A high voltage and a filament current are supplied to the vacuum tube of the X-ray generating unit 2310 from a high voltage generator 2350. X-rays are generated by irradiating the anode (target) with thermoelectrons from the cathode (filament).

[0163] The wedge 2311 is a filter that adjusts the amount of X-rays irradiated from the X-ray generation unit 2310. The wedge 2311 attenuates the amount of X-rays so that the X-rays irradiated from the X-ray generation unit 2310 to the subject have a predetermined distribution. The collimator 2312 is made of a lead plate or the like that narrows the irradiation range of the X-rays that have passed through the wedge 2311. The X-rays generated by the X-ray generation unit 2310 are shaped into a cone beam via the collimator 2312 and are irradiated onto the subject on the tabletop 2330.

[0164] The X-ray detection unit 2320 is configured using the above-mentioned photoelectric conversion device. The X-ray detection unit 2320 detects X-rays emitted from the X-ray generation unit 2310 and passed through the subject, and outputs a signal corresponding to the X-ray dose to the DAS 2351.

[0165] The rotating frame 2340 has an annular shape and is configured to be rotatable. An X-ray generation unit 2310 (wedge 2311, collimator 2312) and an X-ray detection unit 2320 are arranged facing each other inside the rotating frame 2340. The X-ray generation unit 2310 and the X-ray detection unit 2320 can rotate together with the rotating frame 2340.

[0166] The high voltage generator 2350 includes a booster circuit and outputs a high voltage to the X-ray generation unit 2310. The DAS 2351 includes an amplifier circuit and an A / D conversion circuit and outputs a signal from the X-ray detection unit 2320 to the signal processing unit 2352 as digital data.

[0167] The signal processing unit 2352 includes a CPU (Central Processing Unit), ROM (Read Only Memory), and RAM (Random Access Memory), and is capable of performing image processing on digital data. The display unit 353 includes a flat display device and is capable of displaying X-ray images. The control unit 2354 includes a CPU, ROM, RAM, and the like, and controls the overall operation of the X-ray CT device 2300.

[0168] In the above-described embodiment, the explanation is based on the form of a stacked sensor in which the sensor substrate 11 and the circuit substrate 21 are stacked, but the present invention is not limited to this example. In other words, the configuration may be such that all of the components shown in FIG. 3 are arranged on one chip.

[0169] As used herein, expressions such as "A or B," "at least one of A and B," "at least one of A and / or B," and "one or more of A and / or B" include all possible combinations of the listed items unless expressly defined otherwise. That is, the above expressions are understood to disclose all cases, including cases containing at least one A, cases containing at least one B, and cases containing both at least one A and at least one B. This applies equally to combinations of three or more elements.

[0170] The above-described embodiments can be modified as appropriate without departing from the technical spirit. The disclosure of this specification includes not only what is described in this specification, but also all matters that can be understood from this specification and the drawings attached hereto. The disclosure of this specification also includes the complement of the concepts described in this specification. In other words, if this specification states, for example, that "A is greater than B," it can be said that this specification discloses that "A is not greater than B" even if the statement that "A is not greater than B" is omitted. This is because the statement that "A is greater than B" is based on the premise that the case in which "A is not greater than B" is taken into consideration.

[0171] The disclosure of this embodiment includes the following configurations and methods.

[0172] (Configuration 1) a first film disposed on the second surface and disposed in at least a portion of the groove of the uneven portion; and a second film disposed in at least a portion of the groove of the separation portion, the first film being disposed on the second surface side, and the groove of the separation portion extending into the semiconductor layer.

[0173] (Configuration 2) The photoelectric conversion device according to configuration 1, wherein the first film has a first layer containing any one of aluminum oxide, hafnium oxide, zirconium oxide, and tantalum oxide, a second layer containing any one of aluminum oxide, hafnium oxide, zirconium oxide, and tantalum oxide, and a third layer containing silicon oxide or silicon oxynitride.

[0174] (Configuration 3) 3. The photoelectric conversion device according to configuration 1 or 2, wherein the ratio of the width of the grooves of the separation portion to the width of the grooves of the concave-convex portion is 2 or more and 10 or less.

[0175] (Configuration 4) 4. The photoelectric conversion device according to any one of structures 1 to 3, wherein the second film extends from a side surface of the groove of the separation section onto the first film.

[0176] (Configuration 5) 5. The photoelectric conversion device according to any one of configurations 1 to 4, wherein the separator further includes a light-shielding member.

[0177] (Configuration 6) 6. The photoelectric conversion device according to configuration 5, wherein the light blocking member is a conductive film.

[0178] (Configuration 7) 7. A photoelectric conversion system comprising: the photoelectric conversion device according to any one of configurations 1 to 6; and a signal processing unit that generates an image using a signal output from the photoelectric conversion device.

[0179] (Configuration 8) A moving body including the photoelectric conversion device according to any one of configurations 1 to 6, characterized in that the moving body has a control unit that controls movement of the moving body using a signal output by the photoelectric conversion device.

[0180] (Configuration 9) An apparatus including a semiconductor device according to any one of configurations 1 to 6, further including at least one of an optical device corresponding to the semiconductor device, a control device that controls the semiconductor device, a processing device that processes a signal output from the semiconductor device, a display device that displays information obtained by the semiconductor device, a storage device that stores information obtained by the semiconductor device, and a mechanical device that operates based on the information obtained by the semiconductor device.

[0181] (Configuration 10) a step of preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element disposed therein; a step of forming a first groove by etching on the second surface side of the semiconductor layer at a position corresponding to the position where the first photoelectric conversion element is disposed in the semiconductor layer; and a step of forming a first film in the first groove. A method for manufacturing a photoelectric conversion device, comprising: a step of forming a second groove by etching on the second surface side of the semiconductor layer at a position corresponding to between the first photoelectric conversion element and the second photoelectric conversion element of the semiconductor layer; and a step of forming an opening in the first film in the step of forming the second groove.

[0182] (Configuration 11) 11. The method for manufacturing a photoelectric conversion device according to configuration 10, wherein the ratio of the width of the second groove to the width of the first groove is 2 or more and 10 or less.

[0183] (Configuration 12) 12. The method for producing a photoelectric conversion device according to Structure 10 or 11, further comprising the step of forming a second film that covers the first film from the side surface of the second groove.

[0184] (Configuration 13) 13. The method for manufacturing a photoelectric conversion device according to any one of Structures 10 to 12, further comprising the step of isotropically etching the first groove after the step of forming the first groove.

[0185] (Configuration 14) 14. The method for manufacturing a photoelectric conversion device according to any one of configurations 10 to 13, further comprising the step of isotropically etching the second groove after the step of forming the second groove.

[0186] (Configuration 15) a step of preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element disposed therein; a step of forming a first groove by anisotropic etching on the second surface side of the semiconductor layer at a position corresponding to the position where the first photoelectric conversion element is disposed in the semiconductor layer; and a step of forming a first film in the first groove. A method for manufacturing a photoelectric conversion device, comprising: a step of forming a second groove by anisotropic etching on the second surface side of the semiconductor layer, at a position corresponding to between the first photoelectric conversion element and the second photoelectric conversion element of the semiconductor layer; and a step of performing isotropic etching on at least one of the first groove and the second groove.

Claims

1. a semiconductor layer having a first surface and a second surface opposite to the first surface; a first photoelectric conversion element disposed on the semiconductor layer; a second photoelectric conversion element disposed on the semiconductor layer; a concave-convex portion disposed on the second surface of the semiconductor layer, the concave-convex portion being arranged corresponding to the first photoelectric conversion element, and having a groove in the semiconductor layer; an isolation portion disposed between the first photoelectric conversion element and the second photoelectric conversion element and having a groove in the semiconductor layer; a first film disposed on the second surface side and disposed in at least a part of the grooves of the concave-convex portion; a second film disposed in at least a part of the groove of the separation section, The photoelectric conversion device according to claim 1, wherein the groove of the isolation portion penetrates the first film and extends into the semiconductor layer.

2. The first film is a first layer including any one of aluminum oxide, hafnium oxide, zirconium oxide, and tantalum oxide; a second layer containing any one of aluminum oxide, hafnium oxide, zirconium oxide, and tantalum oxide; 2. The photoelectric conversion device according to claim 1, further comprising a third layer containing silicon oxide and silicon oxynitride.

3. 2. The photoelectric conversion device according to claim 1, wherein a ratio of the width of the grooves of the separation portion to the width of the grooves of the concave-convex portion is 2 or more and 10 or less.

4. 2. The photoelectric conversion device according to claim 1, wherein the second film extends from a side surface of the groove of the isolation portion onto the first film.

5. The photoelectric conversion device according to claim 1 , wherein the separator further comprises a light-shielding member.

6. 6. The photoelectric conversion device according to claim 5, wherein the light blocking member is a conductive film.

7. The photoelectric conversion device according to any one of claims 1 to 6, a signal processing unit that generates an image using a signal output from the photoelectric conversion device.

8. A moving object comprising the photoelectric conversion device according to any one of claims 1 to 6, A moving body comprising a control unit that controls the movement of the moving body using a signal output from the photoelectric conversion device.

9. An apparatus comprising the semiconductor device according to any one of claims 1 to 6, an optical device corresponding to the semiconductor device; a control device for controlling the semiconductor device; a processing device that processes a signal output from the semiconductor device; a display device that displays information obtained by the semiconductor device; a storage device that stores information obtained by the semiconductor device; and and a mechanical device that operates based on information obtained by the semiconductor device.

10. preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element disposed therein; forming a first groove by etching on the second surface side of the semiconductor layer at a position corresponding to a position where the first photoelectric conversion element is disposed in the semiconductor layer; forming a first film in the first groove; forming a second groove by etching at a position on the second surface side of the semiconductor layer corresponding to a position between the first photoelectric conversion element and the second photoelectric conversion element of the semiconductor layer; A method for manufacturing a photoelectric conversion device, wherein the step of forming the second groove comprises the step of forming an opening in the first film.

11. The method for manufacturing a photoelectric conversion device according to claim 10, wherein the ratio of the width of the second groove to the width of the first groove is 2 to 10 times.

12. 11. The method for manufacturing a photoelectric conversion device according to claim 10, further comprising the step of forming a second film that covers the first film from the side surface of the second groove.

13. 11. The method for manufacturing a photoelectric conversion device according to claim 10, further comprising the step of isotropically etching the first groove after the step of forming the first groove.

14. 14. The method for manufacturing a photoelectric conversion device according to claim 13, further comprising the step of isotropically etching the second groove after the step of forming the second groove.

15. preparing a semiconductor layer having a first surface and a second surface opposite to the first surface, and having a first photoelectric conversion element and a second photoelectric conversion element disposed therein; forming a first groove by anisotropic etching on the second surface side of the semiconductor layer at a position corresponding to a position where the first photoelectric conversion element is disposed on the semiconductor layer; forming a first film in the first groove; forming a second groove by anisotropic etching on the second surface side of the semiconductor layer at a position corresponding to a gap between the first photoelectric conversion element and the second photoelectric conversion element of the semiconductor layer; A method for manufacturing a photoelectric conversion device, comprising the step of isotropically etching at least one of the first groove and the second groove.

Citation Information

Patent Citations

  • Photodetector and manufacturing method thereof

    JP2022075774A