Ferroelectric memory structure

Abstract

To provide a ferroelectric memory structure that improves the performance of ferroelectric memory elements.SOLUTION: It is characterized that a ferroelectric memory structure of the present invention comprises a first ferroelectric material layer, and a first metal compound layer closely bonded to the surface of the first ferroelectric material layer and formed by atomic layer deposition and connected to the first ferroelectric material layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to ferroelectric memory structures, and more particularly to ferroelectric memory structures fabricated through atomic layer deposition processes. [Background technology]

[0002] Ferroelectric materials are materials that have spontaneous polarization, i.e., the ability of positive and negative charge centers to separate and form dipoles within a unit cell structure even in the absence of an electric field.

[0003] In the field of memory technology, ferroelectric memory is likely to become the foundation of next-generation in-memory computing, which is currently attracting the most attention in the industry. Existing technology uses hafnium dioxide (HfO2) as the material for ferroelectric memory. This material has a high polarization density, which not only allows for a significant reduction in the area of ​​memory cells, but also has excellent coating and shape retention properties, making it suitable for building highly integrated 3D structures using semiconductor processes.

[0004] However, existing technologies can generate contaminants and oxides during the manufacturing process of ferroelectric memory materials, which can affect the bonding ability between the ferroelectric memory material and the electrode layer, thereby degrading the performance of ferroelectric memory devices, potentially resulting in poor polarization ability and durability.

[0005] Therefore, improving the performance of ferroelectric memory devices through structural design improvements and overcoming the above drawbacks has become one of the important challenges that the related industry must address. Summary of the Invention

[0006] The present invention provides a ferroelectric memory structure that overcomes the shortcomings of existing technologies. The ferroelectric memory structure includes a first ferroelectric material layer and a first metal compound layer. The first metal compound layer is in close contact with a surface of the first ferroelectric material layer, and the first ferroelectric material layer and the first metal compound layer are formed in contact with each other by atomic layer deposition.

[0007] In a possible embodiment, the ferroelectric memory structure further includes a second metal compound layer, the second metal compound layer being in close contact with another surface of the first ferroelectric material layer, and the first metal compound layer, the first ferroelectric material layer, and the second metal compound layer being sequentially and interconnected by atomic layer deposition.

[0008] In a possible embodiment, the ferroelectric memory structure further comprises an electrode layer, which is connected to the first metal compound layer or the second metal compound layer.

[0009] In a possible embodiment, the ferroelectric memory structure further comprises a second ferroelectric material layer, wherein the first ferroelectric material layer, the first metal compound layer, and the second ferroelectric material layer are sequentially and interconnected by atomic layer deposition.

[0010] In a possible embodiment, the ferroelectric memory structure further comprises an electrode layer, which is connected to the first ferroelectric material layer or the second ferroelectric material layer.

[0011] In a possible embodiment, the ferroelectric memory structure further includes a second metal compound layer, a second ferroelectric material layer, and a third metal compound layer, wherein the first metal compound layer, the first ferroelectric material layer, the second metal compound layer, the second ferroelectric material layer, and the third metal compound layer are sequentially and interconnected by atomic layer deposition.

[0012] In a possible embodiment, the ferroelectric memory structure further comprises an electrode layer, which is connected to the first metal compound layer or the third metal compound layer.

[0013] In a possible embodiment, the first metal compound layer of the ferroelectric memory structure comprises a first deposition layer and a second deposition layer, the first deposition layer and the second deposition layer having different compositions.

[0014] In a possible embodiment, the material of the first metal compound layer includes at least an oxygen-containing compound or a nitrogen-containing compound formed by any one or more of tantalum, titanium, and aluminum.

[0015] In a possible embodiment, the thickness of the first metal compound layer is less than or equal to 20 nm.

[0016] The ferroelectric memory structure of the present invention can be applied to memory elements having different structures such as FeRAM, FeFET, and FTJ.

[0017] According to an embodiment, the beneficial effect of the present invention is that in the ferroelectric memory structure provided by the present invention, the first metal compound layer can be used as an atomic diffusion blocking layer by the technical means of "connecting the first ferroelectric material layer and the first metal compound layer by atomic layer deposition." It is also possible to reduce the interface defect density between the ferroelectric material layer and the electrode layer, reduce the interface resistance, and adjust the stress of the ferroelectric layer. By applying the ferroelectric memory structure to a ferroelectric memory device, it is possible to achieve low-voltage, high-speed operation, and high reliability characteristics.

[0018] Furthermore, according to the embodiment, the ferroelectric memory structure includes two ferroelectric material layers and a metal compound layer. The metal compound layer functions as a layer that can align the crystal orientation of the ferroelectric material layer. As a result, the ferroelectric characteristics of the ferroelectric memory element are improved. In this way, by applying the ferroelectric memory structure to a ferroelectric memory element, it is possible to similarly achieve characteristics of low voltage, high-speed operation, and high reliability.

[0019] Furthermore, in some embodiments, the material of the metal compound layer is TaN. The atomic layer deposition of the metal compound layer as an intermediate layer can effectively improve the durability and decay time of the applied ferroelectric memory device, and can withstand continuous operation under high electric fields for a long time.

[0020] Furthermore, in some embodiments, a ferroelectric memory structure includes two ferroelectric material layers and a metal compound layer, the metal compound layer separating the two ferroelectric material layers, and after annealing, the grain size of the ferroelectric material can be effectively reduced, and the operating speed and operating voltage can be improved.

[0021] In order to better understand the features and technical contents of the present invention, please refer to the following detailed description of the present invention and the accompanying drawings, which are provided for reference and explanation only and are not intended to limit the scope of the present invention. [Brief explanation of the drawings]

[0022] [Figure 1] 1 is a structural schematic diagram of a ferroelectric memory structure according to a first embodiment of the present invention. [Figure 2] FIG. 4 is a structural schematic diagram of a ferroelectric memory structure according to a second embodiment of the present invention. [Figure 3] FIG. 10 is a structural schematic diagram of a ferroelectric memory structure according to a third embodiment of the present invention. [Figure 4] 1 is a schematic diagram for comparing a ferroelectric memory structure according to an embodiment of the present invention with a ferroelectric memory structure according to an existing technique; [Figure 5] 1 is a schematic diagram for comparing a ferroelectric memory structure according to an embodiment of the present invention with a ferroelectric memory structure according to an existing technique; DETAILED DESCRIPTION OF THE INVENTION

[0023] The following describes embodiments of the present invention. Those skilled in the art can understand the merits and advantages of the present invention from the disclosure of this specification. The present invention can be implemented or applied in other different embodiments. Each detail in this specification can be modified or changed equivalently based on various viewpoints or applications without departing from the spirit of the present invention. In addition, the drawings of the present invention are for simple and schematic illustration only and do not represent actual dimensions. The following embodiments will further explain technical matters related to the present invention, but the disclosed contents do not limit the present invention.

[0024] Throughout this specification, terms such as "first," "second," and "third" may be used to describe various components or signals, but it should be understood that these components or signals should not be limited by these terms. These terms are used primarily to distinguish one component from another or one signal from another. Furthermore, as used herein, the term "or" can include any one or combination of the associated listed items, where appropriate.

[0025] [First embodiment] Please refer to FIG. 1. This figure shows a structural schematic diagram of a ferroelectric memory structure Z1 according to a first embodiment of the present invention. The ferroelectric memory structure Z1 includes a first ferroelectric material layer 11 and a first metal compound layer 21. The first metal compound layer 21 is in close contact with the surface of the first ferroelectric material layer 11, and the first ferroelectric material layer 11 and the first metal compound layer 21 are connected and formed by atomic layer deposition (ALD). Because the first ferroelectric material layer 11 and the first metal compound layer 21 are fabricated in the same chamber under a vacuum environment, the interface quality between the first metal compound layer 21 and the first ferroelectric material layer 11 exhibits a low defect density. In other words, no other oxide layer or oxide is formed between the first ferroelectric material layer 11 and the first metal compound layer 21.

[0026] The ferroelectric material layer is exemplified by HfO2, but may also be HfZrOx. In some embodiments, the ferroelectric material layer may be BaTiO3 (BTO) or lead zirconium titanate (PbZrTiO3, PZT), but the present invention is not limited thereto.

[0027] 1 , the ferroelectric memory structure Z1 further includes a second metal compound layer 22. The second metal compound layer 22 is in close contact with the other surface of the first ferroelectric material layer 11, and the first metal compound layer 21, the first ferroelectric material layer 11, and the second metal compound layer 22 are sequentially formed and connected by atomic layer deposition. That is, the first metal compound layer 21, the first ferroelectric material layer 11, and the second metal compound layer 22 are manufactured in the same chamber under a vacuum environment, so that no oxide layer or oxide is formed between the first metal compound layer 21 and the first ferroelectric material layer 11 or between the first ferroelectric material layer 11 and the second metal compound layer 22.

[0028] Furthermore, based on the embodiment shown in FIG. 1 , the ferroelectric memory structure Z1 includes two electrode layers 4 and 5, which are electrically connected to the first metal compound layer 21 and the second metal compound layer 22, respectively. However, the present invention is not limited thereto, and additional film layers can be provided on the electrode layers 4 and 5 according to user needs. For example, the electrode layer 4 can be connected to the first metal compound layer 21, and a functional film layer can be deposited or installed on the second metal compound layer 22, followed by providing another electrode layer 5, thereby completing a desired ferroelectric memory element.

[0029] In some embodiments, after deposition of second metal compound layer 22, a plasma can be used to modify the surface of second metal compound layer 22 to repair defects in the surface.

[0030] [Second embodiment] Please refer to FIG. 2, which shows a structural schematic diagram of a ferroelectric memory structure Z2 according to a second embodiment of the present invention. The ferroelectric memory structure Z2 further includes a second ferroelectric material layer 12. Based on the embodiment shown in FIG. 2, the first ferroelectric material layer 11, the first metal compound layer 21, and the second ferroelectric material layer 12 are sequentially formed and connected by atomic layer deposition. As described above, the first ferroelectric material layer 11, the first metal compound layer 21, and the second ferroelectric material layer 12 are fabricated in the same chamber under a vacuum environment. Therefore, the interface quality between the first ferroelectric material layer 11 and the first metal compound layer 21 and between the first metal compound layer 21 and the second ferroelectric material layer 12 exhibits low defect density, and no oxide layer or oxide is formed at these interfaces.

[0031] 2, the ferroelectric memory structure Z2 further includes two electrode layers 4 and 5, which are electrically connected to the first ferroelectric material layer 11 and the second ferroelectric material layer 12, respectively. However, the present invention is not limited thereto, and additional film layers can be provided on the electrode layers 4 and 5 according to the user's needs. For example, the electrode layer 4 can be connected to the first ferroelectric material layer 11, and a functional film layer can be deposited or installed on the second ferroelectric material layer 12, followed by providing another electrode layer 5, thereby completing a desired ferroelectric memory element.

[0032] The following describes an example of a manufacturing method for fabricating the ferroelectric memory structure Z2 according to the embodiment shown in FIG. 2. First, an electrode layer 4 (e.g., 100 nm thick) is prepared. Next, a first ferroelectric material layer 11 (e.g., 5 nm thick), a first metal compound layer 21 (e.g., 2 nm thick), and a second ferroelectric material layer 12 (e.g., 5 nm thick) are sequentially deposited on the electrode layer 4. Then, another electrode layer 5 (e.g., 100 nm thick) is provided on the second ferroelectric material layer 12. Next, an annealing step is performed, for example, by heating to 400°C and maintaining the temperature for 30 seconds. This step can reduce the grain size of the ferroelectric material layer and repair defects at the interface between the metal compound layer and the ferroelectric material layer. In some embodiments, the electrode layer 4 is formed by physical vapor deposition.

[0033] [Third embodiment] FIG. 3 shows a schematic diagram of a ferroelectric memory structure Z3 according to a third embodiment of the present invention. The ferroelectric memory structure Z3 further includes a second metal compound layer 22, a second ferroelectric material layer 12, and a third metal compound layer 23. The first metal compound layer 21, the first ferroelectric material layer 11, the second metal compound layer 22, the second ferroelectric material layer 12, and the third metal compound layer 23 are sequentially formed and connected by atomic layer deposition. As described above, the first metal compound layer 21, the first ferroelectric material layer 11, the second metal compound layer 22, the second ferroelectric material layer 12, and the third metal compound layer 23 are fabricated in the same chamber in a vacuum environment. This ensures that the interface quality between the ferroelectric material layer and the metal compound layer exhibits low defect density and no oxide layer or oxide is formed at these interfaces.

[0034] 3, the ferroelectric memory structure Z3 further includes two electrode layers 4 and 5, which are electrically connected to the first metal compound layer 21 and the third metal compound layer 23, respectively. However, users can decide whether to provide additional film layers on the two electrode layers 4 and 5 according to their needs. For example, the electrode layer 4 can be connected to the first metal compound layer 21, a functional film layer can be deposited or installed on the third metal compound layer 23, and then another electrode layer 5 can be provided to complete the desired ferroelectric memory element. The present invention is not limited thereto.

[0035] In some embodiments, after deposition of third metal compound layer 23, a plasma may be used to modify the surface of third metal compound layer 23 to repair defects in the surface.

[0036] In some embodiments, the first metal compound layer 21 includes a first deposition layer and a second deposition layer. The first deposition layer and the second deposition layer have different compositions. The second metal compound layer 22 and the third metal compound layer 23 may also each include two or more deposition layers, and the compositions of the deposition layers within the same metal compound layer may be different. This difference in "composition" refers to different components or different proportions, and the present invention is not limited thereto.

[0037] Furthermore, in some embodiments, the material of the first metal compound layer 21 includes an oxygen-containing compound or a nitrogen-containing compound formed of at least one of tantalum, titanium, and aluminum. For example, tantalum nitride, titanium nitride, or aluminum nitride may be used. In some embodiments, the material may be aluminum oxynitride or titanium oxynitride, but the present invention is not limited thereto.

[0038] The material for the electrode layer 4 (or electrode layer 5) can be a pure metal (for example, titanium, tantalum, lead, tin, niobium, or tungsten). It is also possible to use an alloy of these elements or a metal compound (for example, titanium nitride, tantalum nitride, or aluminum nitride), or a semiconductor substrate doped with a Group 3 or Group 5 element, but the present invention is not limited thereto.

[0039] In some embodiments, the thickness of the material of the first metal compound layer 21 is 20 nm or less. The thickness of the second metal compound layer 22 is also 20 nm or less, as is the thickness of the third metal compound layer 23. Furthermore, in some embodiments, the thickness of the material of the aforementioned metal compound layers is 2 to 10 nm.

[0040] It is particularly important to note that when two metal compound layers (the first metal compound layer 21 and the second metal compound layer 22) are included in the same ferroelectric memory structure Z3, the thicknesses of the metal compound layers may be the same or different. Furthermore, the compositions and composition ratios of the metal compound layers may be the same or different, and the present invention is not limited to this. The same is true when three metal compound layers (the first metal compound layer 21, the second metal compound layer 22, and the third metal compound layer 23) are included in the same ferroelectric memory structure Z3.

[0041] Please refer to Figures 4 and 5, which are comparative schematic diagrams of a ferroelectric memory element according to an embodiment (embodiment 4) of the present invention and ferroelectric memory elements of the prior art (first and second comparative examples). The ferroelectric memory structure used in the ferroelectric memory element is shown in Figure 1, and embodiment 4 uses atomic layer deposited tantalum nitride (TaN) as the metal compound layer. In the first comparative example, atomic layer deposited titanium nitride (TiN) is used as the metal compound layer, and in the second comparative example, physical vapor deposited titanium nitride (TiN) is used as the metal compound layer.

[0042] Figure 4 shows the relationship between the pulse width and the polarization amount (μC / cm 24, when the same electric field (for example, 4 MV / cm) is applied and the pulse width is 2 μs, the polarization amount of the fourth embodiment of the present invention is about 40 μC / cm 2 The polarization amount of the first comparative example is 30 μC / cm 2 The polarization amount of the second comparative example is 15 μC / cm 2 The polarization amount of the fourth embodiment of the present invention exceeds that of both the first and second comparative examples.

[0043] 5 is a graph showing the relationship between the number of cycles (cycles) and the polarization amount (μC / cm2). Compared with the result of the polarization amount in FIG. 4 (conditions of an electric field of 4 MV / cm and a pulse width of 2 μs), as shown in FIG. 5, the number of cycles in the fourth embodiment of the present invention is 10 8 On the other hand, the number of operations in the first comparative example reaches 5×10 7 The number of operations in the second comparative example is 10 7 This clearly shows that the fourth embodiment of the present invention exhibits better performance in terms of the number of operations than the first and second comparative examples.

[0044] 4 and 5, the continuous fabrication process (sequential growth in the deposition process) of the metal compound layer and two ferroelectric material layers of the present invention realizes a state in which there is no (or only a trace amount of) oxides or contaminants between the metal compound layer and the ferroelectric material layer, which effectively reduces the interface defect density between the metal compound layer and the ferroelectric material layer, and improves the performance of the ferroelectric memory element.

[0045] [Beneficial Effects of the Embodiments] The ferroelectric memory structure of the present invention is applicable to memory elements having different structures such as FeRAM, FeFET, and FTJ.

[0046] According to an embodiment, the beneficial effect of the present invention is that in the ferroelectric memory structure provided by the present invention, the first ferroelectric material layer and the first metal compound layer are connected by atomic layer deposition, which allows the first metal compound layer to function as a blocking layer for atomic diffusion. This reduces the interface defect density between the ferroelectric material layer and the electrode layer, lowers the interface resistance, and adjusts the stress of the ferroelectric layer. By applying the ferroelectric memory structure to a ferroelectric memory device, it is possible to achieve low-voltage, high-speed operation, and high reliability.

[0047] Furthermore, according to the embodiment, the ferroelectric memory structure includes two ferroelectric material layers and a metal compound layer. The metal compound layer functions as a layer for matching the crystal orientation of the ferroelectric material layer and improving the ferroelectric properties of the ferroelectric memory element. In this way, by applying the ferroelectric memory structure to the ferroelectric memory element, it is possible to similarly achieve the properties of low voltage, high speed operation, and high reliability.

[0048] Furthermore, in some embodiments, the metal compound layer is made of tantalum nitride (TaN), which is formed by atomic layer deposition. Compared with metal compound layers formed by physical vapor deposition, the metal compound layer of the present invention functions as an intermediate layer, effectively improving the durability and decay time of the applied ferroelectric memory element. It can also withstand long-term continuous operation under high electric fields.

[0049] In some embodiments, the ferroelectric memory structure includes two ferroelectric material layers and a metal compound layer, and the metal compound layer separates the two ferroelectric material layers. After annealing, the grain size of the ferroelectric material can be effectively reduced, and the operating speed and operating voltage can be improved.

[0050] The above disclosure is merely a preferred embodiment of the present invention, and does not limit the scope of the claims of the present invention. Therefore, all equivalent technical modifications made based on the contents of the specification and accompanying drawings of the present invention shall be included in the scope of the claims of the present invention. [Explanation of symbols]

[0051] Z1 to Z3: Ferroelectric memory structures 11: First ferroelectric material layer 12: Second ferroelectric material layer 21: First metal compound layer 22: Second metal compound layer 23: Third metal compound layer 4: Electrode layer 5: Electrode layer

Claims

1. a first layer of ferroelectric material; a first metal compound layer that is in close contact with a surface of the first ferroelectric material layer and is formed in connection with the first ferroelectric material layer by atomic layer deposition; Equipped with 1. A ferroelectric memory structure comprising:

2. a second metal compound layer in close contact with another surface of the first ferroelectric material layer; 2. The ferroelectric memory structure of claim 1, wherein said first metal compound layer, said first ferroelectric material layer and said second metal compound layer are sequentially and connected by said atomic layer deposition method.

3. 3. The ferroelectric memory structure of claim 2, further comprising an electrode layer connected to said first metal compound layer or said second metal compound layer.

4. further comprising a second ferroelectric material layer; 2. The ferroelectric memory structure of claim 1, wherein said first ferroelectric material layer, said first metal compound layer, and said second ferroelectric material layer are sequentially and connected by said atomic layer deposition method.

5. 5. The ferroelectric memory structure of claim 4, further comprising an electrode layer connected to said first ferroelectric material layer or said second ferroelectric material layer.

6. 2. The ferroelectric memory structure of claim 1, further comprising a second metal compound layer, a second ferroelectric material layer, and a third metal compound layer, wherein the first metal compound layer, the first ferroelectric material layer, the second metal compound layer, the second ferroelectric material layer, and the third metal compound layer are sequentially and connected together by the atomic layer deposition method.

7. 7. The ferroelectric memory structure of claim 6, further comprising an electrode layer connected to said first metal compound layer or said third metal compound layer.

8. 2. The ferroelectric memory structure of claim 1, wherein said first metal compound layer comprises a first deposition layer and a second deposition layer, said first deposition layer and said second deposition layer having different compositions.

9. 2. The ferroelectric memory structure of claim 1, wherein the material of said first metal compound layer comprises an oxygen-containing compound or a nitrogen-containing compound formed from at least one of tantalum, titanium, and aluminum.

10. 2. The ferroelectric memory structure of claim 1, wherein said first metal compound layer has a thickness of 20 nm or less.

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