Evaluation method of semiconductor wafer

Abstract

To provide a method for quantitatively evaluating an overpolish (polishing marks or the like) formed on a wafer main surface in the vicinity of a notch of a semiconductor wafer.SOLUTION: An evaluation method of a semiconductor wafer is an evaluation method for evaluating an overpolish formed on at least one of a main front surface and a main back surface in the vicinity of a notch part of the semiconductor wafer having a main front surface and the main back surface, and comprises: an irradiation step of irradiating a region including the notch part with light from an LED illumination installed above a surface of the semiconductor wafer to be evaluated so that an optical axis is perpendicular to a surface of evaluation target of the semiconductor wafer that has been left stationary; an image acquisition step of capturing reflected light from an irradiation surface in a bright field by a CCD camera installed above the surface of an evaluation target so that the optical axis of an imaging lens is perpendicular to the surface of the evaluation target; and a length measurement step of measuring a length of the overpolish captured in an image acquired in the image acquisition step by an image analysis.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for evaluating a semiconductor wafer. [Background technology]

[0002] Semiconductor device manufacturing technology is advancing every day. In parallel with the miniaturization of process design rules, technologies for stacking devices in three dimensions are beginning to be developed. One such technology that can improve the power efficiency of semiconductor chips is the Backside Power Delivery Network (BSPDN), which supplies power from the backside. This technology involves bonding two wafers together during the device manufacturing process. If the quality of the wafer edges or notches used in the bonding process is poor, there are concerns that the edges may not be bonded properly or that the centers of the two wafers may not be aligned, leading to reduced yields. Therefore, high-precision smoothness is required all the way to the wafer's periphery and notch, and methods for evaluating these areas are important.

[0003] Patent Document 1 describes a technology in which a laser beam is irradiated onto an area from the boundary between the chamfered surface and the main surface near the notch to a distance of 2 mm inward toward the center of the wafer, and the scattered light from the irradiated surface is detected to inspect in a dark field, thereby inspecting for over-polishing, which occurs when polishing goes beyond the boundary between the chamfered surface and the main surface during mirror chamfering.

[0004] Patent Document 2 discloses a technology for capturing the side shape of a bevel edge using an imaging element having a light source positioned to illuminate the bevel edge and an objective lens positioned so that its optical axis is perpendicular to the wafer surface.

[0005] Patent Document 3 discloses a technology for measuring the shape of a chamfered surface by irradiating the chamfered surface and main surface of a wafer with LED light from the side of the wafer, capturing images of the chamfered surface and main surface using a top CCD camera and a bottom CCD camera, and processing the captured images of the bright areas using an image processing device. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2018-182160 [Patent Document 2] International Publication No. 2008 / 139735 [Patent Document 3] Japanese Patent Application Laid-Open No. 2014-085296 Summary of the Invention [Problem to be solved by the invention]

[0007] Mirror-polished wafers are required to be highly smooth all the way to the wafer's outer periphery and edge. In wafer processing, mirror polishing of the wafer edge is performed to remove circumferential grinding marks formed on the wafer edge. In particular, during edge processing within the notch, polishing is sometimes performed by rotating a wafer polishing member perpendicular to the wafer's circumferential direction. In this process, the polishing member may penetrate deeply into the wafer's main surface, resulting in the formation of polishing marks on the wafer main surface in a direction perpendicular to the wafer's circumferential direction (radial direction) (hereinafter referred to as "overpolish"). If this overpolish is long and penetrates deeper into the wafer's main surface, it may affect the yield of the device fabrication process. Therefore, a method for quantitatively evaluating this overpolish is important.

[0008] The optical conditions described in Patent Document 1 allow for qualitative observation of over-polishing, but because the circular image is corrected to a rectangular image, accurate measurement from the image is difficult. Also, while an example is described in which traces of over-polishing are observed in a dark-field image near the notch, no method for quantitative analysis of the length of over-polishing is disclosed. If over-polishing extends inside the specification, it may affect yield in the device process, so quantitative evaluation is necessary.

[0009] Patent Document 2 describes an evaluation method for detecting the presence or absence of polishing marks in the circumferential direction on the wafer edge, but does not describe the evaluation of over-polishing on the wafer main surface formed in the radial direction relative to the notch.

[0010] The optical conditions in Patent Document 3 are a technique for evaluating grinding marks based on the difference between reduced reflected light due to wafer surface roughness (dark areas) and increased reflected light from the circumferential area (bright areas). This technique takes advantage of the fact that the grinding marks to be evaluated are formed in the circumferential direction, and the device is configured to increase the reflected light from grinding marks formed in that direction. Therefore, polishing marks formed in a direction perpendicular to the grinding marks formed in the circumferential direction may not provide sufficient reflected light, considering the direction of the polishing marks. Furthermore, if the wafer main surface is smooth, the incident light will not be scattered by the main surface, increasing the reflected light and making it less likely that the image on the main surface will become dark. Therefore, this method is not suitable for evaluating overpolishing, which is the subject of the present invention.

[0011] The present invention has been made to solve the above problems, and aims to provide a method for quantitatively evaluating over-polishing (such as polishing marks) formed on the main surface of a semiconductor wafer near its notch. [Means for solving the problem]

[0012] The present invention has been made to achieve the above-mentioned object, and provides a semiconductor wafer evaluation method for evaluating over-polish formed on at least one of a main surface and a main back surface in the vicinity of a notch portion of a semiconductor wafer having the main surface and the main back surface, the method comprising: an illumination step of irradiating a region including the notch portion with light from an LED light source installed above the surface to be evaluated of the stationary semiconductor wafer so that the optical axis is perpendicular to the surface to be evaluated; an image acquisition step of capturing an image of the light reflected from the irradiated surface in a bright field with a CCD camera installed above the surface to be evaluated so that the optical axis of an imaging lens is perpendicular to the surface to be evaluated; and a length measurement step of measuring, by image analysis, the length of the over-polish imaged in the image acquired in the image acquisition step.

[0013] According to this semiconductor wafer evaluation method, an image of the notch portion can be taken without distortion, and the over-polishing can be measured quantitatively with high accuracy in image processing of the image.

[0014] In this case, the measurement can be performed on at least the polishing marks formed on the surface in the vicinity of the notch portion.

[0015] This allows accurate and quantitative measurement of the polishing marks formed on the surface in the vicinity of the notch portion.

[0016] In this case, the measurement can be performed on polishing marks formed on the surface in a direction perpendicular to the circumferential direction of the semiconductor wafer.

[0017] This allows accurate and quantitative evaluation of polishing marks near the notch, where polishing marks are likely to be formed in a direction perpendicular to the circumferential direction. [Effects of the Invention]

[0018] As described above, according to the semiconductor wafer evaluation method of the present invention, it is possible to capture an image of the notch portion without distortion, and in image processing of the image, it is possible to accurately and quantitatively measure the over-polishing. [Brief explanation of the drawings]

[0019] [Figure 1] 1 shows a flowchart of an example of a semiconductor wafer evaluation method according to the present invention. [Figure 2] 1 is a schematic diagram of an apparatus configuration that can be used in a semiconductor wafer evaluation method according to the present invention. [Figure 3] 1 shows an example of a result image of Example 1. [Figure 4] 10 shows an example of a result image of Example 2. [Figure 5] 10 shows an example of a result image of Example 3. DETAILED DESCRIPTION OF THE INVENTION

[0020] The present invention will be described in detail below, but the present invention is not limited thereto.

[0021] As described above, there has been a demand for a method for quantitatively evaluating over-polishing (polishing marks, etc.) formed on the main surface of a semiconductor wafer in the vicinity of the notch.

[0022] As a result of extensive research into the above-mentioned problems, the inventors have found that a semiconductor wafer evaluation method for evaluating over-polish formed on at least one of a main surface and a main back surface near a notch portion of a semiconductor wafer having the main surface and the main back surface comprises: an illumination step of irradiating a region including the notch portion with light from an LED light source installed above the surface to be evaluated of the semiconductor wafer placed stationary, so that the optical axis is perpendicular to the surface to be evaluated; an image acquisition step of capturing an image of the light reflected from the irradiated surface in a bright field with a CCD camera installed above the surface to be evaluated, so that the optical axis of an imaging lens is perpendicular to the surface to be evaluated; and a length measurement step of measuring the length of the over-polish captured in the image acquired in the image acquisition step by image analysis, thereby making it possible to capture an image of the notch portion without distortion, and to perform accurate and quantitative length measurement of the over-polish in image processing of the image, and have completed the present invention.

[0023] FIG. 1 shows a flowchart of an example of a semiconductor wafer evaluation method according to the present invention. First, as shown in S1 of FIG. 1, a silicon wafer is prepared that has been mirror-polished by a conventional method.

[0024] [Irradiation process] Next, as shown in S2 in Figure 1, an LED light is installed above the surface of the semiconductor wafer to be evaluated, which has a main surface and a main back surface, and the light axis is perpendicular to the surface to be evaluated. The LED light is then irradiated onto the area including the notch.

[0025] [Image acquisition process] Next, as shown in S3 of Figure 1, the reflected light from the irradiated surface is captured in a bright field by a CCD camera installed above the surface to be evaluated so that the optical axis of the imaging lens is perpendicular to the surface to be evaluated.

[0026] Figure 2 is a schematic diagram of an apparatus configuration that can be used in the semiconductor wafer evaluation method according to the present invention. As shown in Figure 2, the LED light 1 and the CCD camera 2 are installed above the surface of the semiconductor wafer 4 to be evaluated so that the optical axis 3A of the LED light 1 and the optical axis 3B of the imaging lens of the CCD camera (camera module) 2 are perpendicular to the surface of the semiconductor wafer 4 to be evaluated. The LED light 1 and the CCD camera 2 are integrally configured so that their optical axes 3A and 3B are coaxial.

[0027] In this way, by irradiating the LED illumination light perpendicularly to the surface of the evaluation object and installing the CCD camera 2 so that the optical axis 3B of the imaging lens is perpendicular to the surface of the evaluation object, it is possible to efficiently capture reflected light. If there is over-polishing in the observation area, the irradiated light will be scattered, reducing the brightness of the reflected light, resulting in clear contrast. In addition, it becomes possible to capture images without distortion, allowing for accurate length measurements.

[0028] When imaged in bright field, the overpolish appears as a radial line of dark contrast in the area containing the notch.

[0029] When imaging in dark field, over-polishing is observed as radial lines with bright contrast, and the contact area of ​​the slurry used for polishing is observed with bright contrast from the outer edge of the notch to the inside. However, the intensity of the vertical lines of over-polishing is low, making measurement of their length more difficult than in bright field.

[0030] The imaging range is not particularly limited as long as it is large enough to observe over-polishing within the field of view, but it is preferable to image a range about 4 mm inward from the edge of the wafer (the outer edge in the case of a notch).

[0031] The wavelength of the LED illumination may be any wavelength that allows the light to be reflected by the wafer surface. In the case of silicon, it is preferable to select visible light, more preferably 635 nm.

[0032] [Length measurement process] Next, as shown in S4 of Figure 1, the length of the over-polished area captured in the image acquired in the image acquisition step is measured by image analysis. The means of image analysis are not particularly limited, but software provided with the device or free software such as ImageJ may be used. The color tone, brightness, and contrast of the image may be changed. The 2D displayed image may be converted to a 3D display and a filter may be applied. By performing these image processing steps, the over-polished area can be identified and its length measured.

[0033] The measurement can be performed on at least the polishing marks formed on the surface in the vicinity of the notch portion. This allows accurate and quantitative measurement of the polishing marks formed on the surface in the vicinity of the notch.

[0034] Furthermore, the measurement can be performed on polishing marks formed on the surface in a direction perpendicular to the circumferential direction of the semiconductor wafer. This allows accurate and quantitative evaluation of polishing marks near the notch, where polishing marks are likely to be formed in a direction perpendicular to the circumferential direction. [Example]

[0035] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0036] (Examples 1 to 3) First, three silicon wafers (used as Examples 1 to 3, respectively) each having a diameter of 300 mm that had been mirror-polished by a common method were prepared.

[0037] Next, the LED light was installed above the surface to be evaluated (either the front or back surface of the wafer) at a position where its optical axis intersects perpendicularly with the surface to be evaluated, and the CCD camera was installed above the surface to be evaluated at a position where its light-receiving surface is parallel to the main surface of the wafer (the optical axis of the imaging lens intersects perpendicularly with the surface to be evaluated).The LED light source and CCD camera were also installed integrally so that their optical axes were coaxial.

[0038] Then, an LED light with a wavelength of 635 nm was irradiated onto the area including the notch on the surface of the silicon wafer to be evaluated, and the reflected light was captured in a bright field using a CCD camera.

[0039] Next, from the obtained images, a bright-field image of the surface to be evaluated was subjected to image analysis using the free software "ImageJ." The image was loaded, and the notch portion was three-dimensionally drawn in grayscale. The grid size was set to 1024, smoothing to 6.0, and lightning to 0.66. The image was displayed two-dimensionally and measured. Over-polishing of up to 0.8 mm was observed on the wafer of Example 1, over-polishing of up to 0.2 mm on the wafer of Example 2, and no over-polishing was observed on the wafer of Example 3. This demonstrates that the presence or absence of over-polishing and the degree of over-polishing can be distinguished. Images of the results from Examples 1 to 3 are shown in Figures 3 to 5, respectively. Over-polishing of 5 mm was observed in Figures 3 and 4.

[0040] (Comparative Examples 1 to 3) First, three silicon wafers each having a diameter of 300 mm, which were used in Examples 1 to 3, were prepared (used as Comparative Examples 1 to 3, respectively).

[0041] The LED lighting and CCD camera used were the same as those used in Examples 1 to 3. An LED light with a wavelength of 635 nm was irradiated onto an area including the notch on the surface of the silicon wafer to be evaluated, and the scattered light was captured in a dark field by the CCD camera.

[0042] Of the images obtained, dark-field images of the surfaces to be evaluated were analyzed using the free software "ImageJ" under the same conditions as in Examples 1 to 3. However, the brightness of the over-polished areas was low, and the results were almost the same for Comparative Examples 1 to 3, making it impossible to distinguish whether or not there was over-polishing and the difference in the degree of over-polishing.

[0043] As described above, according to the examples of the present invention, it is possible to capture an image without distortion that includes over-polish formed on at least one of the main front surface and the main back surface in the vicinity of the notch portion of the silicon wafer, and to measure the length of the over-polish quantitatively with high accuracy.

[0044] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0045] 1...LED lighting, 2...CCD camera (camera module), 3A, 3B...optical axis, 4...Semiconductor wafer, 5...Overpolish.

Claims

1. 1. A semiconductor wafer evaluation method for evaluating over-polishing formed on at least one of a main surface and a main back surface near a notch portion of a semiconductor wafer having the main surface and the main back surface, comprising: an illumination step of irradiating a region including the notch with light from an LED illumination device installed above the surface of the semiconductor wafer to be evaluated so that the optical axis is perpendicular to the surface of the semiconductor wafer to be evaluated; an image acquisition step of capturing an image of reflected light from the irradiated surface in a bright field using a CCD camera installed above the surface of the evaluation object so that the optical axis of the imaging lens is perpendicular to the surface of the evaluation object; a length measurement step of measuring the length of the over-polished area captured in the image acquired in the image acquisition step by image analysis.

2. 2. The semiconductor wafer evaluation method according to claim 1, wherein the measurement is performed on polishing marks formed on the surface at least in the vicinity of the notch.

3. 3. The semiconductor wafer evaluation method according to claim 1, wherein the measurement is performed on polishing marks formed on the surface in a direction perpendicular to the circumferential direction of the semiconductor wafer.

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