Multilayer seed for single-crystal growth, method of producing a multilayer seed, use of the multilayer seed in PVT process for growing single-crystal and PVT process using the same

Abstract

To provide a multilayer seed for single crystal growth, a method for manufacturing the multilayer seed, use of the multilayer seed in a PVT process for single crystal growth, and the PVT process using the same.SOLUTION: The present invention provides a multilayer seed which is designed such as to offer a virtually unstressed surface onto which a single-crystal can grow without the negative impact of the internal stress carried by monocrystalline seeds, in particular at the high temperatures conventionally used in sublimation processes. The multilayer seed for growing a single-crystal comprise at least two seed layers, wherein each of the at least two seed layers is a monocrystalline layer characterized by one or more parameters associated with a respective degree of internal stress. The one or more parameters are selected such that the at least two seed layers are adapted to counter-act the respective internal stresses from each other.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a multilayer seed designed with a combination of multiple single crystal layers to reduce or eliminate the negative effect of internal stress of the single crystal seed on crystal growth, a method for manufacturing the multilayer seed, the use of the multilayer seed, and a PVT process for growing single crystals with the multilayer seed. [Background technology]

[0002] Semiconductor substrates are commonly used in the manufacture of electronic components. In particular, silicon carbide (SiC) substrates are the basis for the production of power electronic components, for example in the automotive and green energy industries. Typically, such electronic components are made from thin monocrystalline layers of semiconductor materials (e.g., SiC, GaN) that are deposited on SiC substrates using epitaxial processes. Therefore, the properties of the deposited monocrystalline layer, and therefore the properties of the electronic components, depend crucially on the properties and quality of the underlying SiC substrate.

[0003] SiC substrates are typically produced from SiC single crystal boules, e.g., by cutting wafers from the single crystal boule using a thread saw or similar separation process. These wafers are then further processed, e.g., with multiple polishing steps, to obtain substrates with polished surfaces suitable for growing single crystals thereon. Nevertheless, the quality of the SiC substrates still depends on the crystalline quality of the SiC single crystal boule (hereinafter also referred to as bulk SiC single crystal) from which they are produced.

[0004] As a standard, bulk SiC single crystals employed in the fabrication of SiC substrates are grown using the physical vapor transport (PVT) process. The basic principle of the PVT process is to sublimate a suitable source material into the gas phase and deposit the species present in the gas phase (e.g., SiC, Si2C, SiC2) from which the single crystal will grow onto a single crystal seed, which is typically a wafer of single crystal material cut from the bulk single crystal. The quality of the seed is crucial to obtaining a bulk single crystal with low defect density for the fabrication of high-quality SiC substrates.

[0005] Thus, the increasing demand for high-quality SiC substrates suitable for the production of electronic components also requires high-quality seeds to grow the highest quality bulk SiC single crystals possible.

[0006] Typically, the seed itself is produced from a single crystal grown using a sublimation process similar to that employed to grow bulk single crystals that make up semiconductor substrates. However, the inventors have realized that the use of a single single crystal seed, as commonly used in conventional PVT processes, can lead to unexpectedly low quality of the grown SiC single crystal. This is caused by inherent tensions present in the single crystal seed itself, e.g., thermally induced stresses, which affect the growing SiC single crystal, as will be explained below with reference to Figures 1-3.

[0007] 1 shows a conventional growth arrangement 100 for growing a bulk single crystal 102 on a single single crystal seed 104 by sublimation growth. The growth arrangement 100 includes a crucible 106 in which crystal growth takes place, which may include, for example, a source material region 108 and a crystal growth region 110 in which a seed 104 is arranged. The seed 104 is attached to a seed holder 112 provided on a crucible lid 114 by a stationary bed or by a clamp (not shown) and is oriented toward the surface for crystal growth, the source material region 108 being filled with a suitable source material 116, e.g., SiC, in powder form. During the growth process, the source material 116 is sublimated by controlled heat generated by a heating system surrounding the crucible 106, such as a thermal induction coil 118, or alternatively, by resistive heating means. The sublimated species (e.g., SiC, SiC, SiC) in the vapor phase are then transported in a controlled manner by a thermal gradient established in the crucible 106 toward the single crystal seed 104, and a bulk single crystal 102 is grown by deposition of the species onto the growth surface of the seed crystal 104. The bulk single crystal 102 may be used to produce one or more wafers of single crystal seeds (i.e., seed crystals) therefrom. A representative PVT process is described in U.S. Pat. No. 8,865,324.

[0008] In growing SiC single crystals using the PVT process, axial and radial temperature gradients are set very precisely to produce high-quality single crystals. The axial temperature gradient established in the axial direction (i.e., along the central longitudinal axis L in FIG. 1 ) from the SiC source material 116 toward the seed 104 determines the growth rate of the single crystal. The radial temperature gradient, i.e., transverse to the growth direction L, is set to form a convex single crystal, i.e., a single crystal boule with a top surface that has a convex curvature in the growth direction. The thick arrows in FIG. 1 illustrate the direction of heat flow to establish a convex radial gradient inside the crystal growth region 110 of the crucible 106 to form the convex single crystal 102. The convex shape of the single crystal 102 prevents the growth of defects at the edges of the single crystal, which can result from unavoidable contact between the growing single crystal 102 and the crucible wall 122. However, the convexity of the single crystal is associated with the formation of intrinsic stresses, which leads to an increase in dislocation density as well as geometric values ​​of curvature and warpage of the single crystal seed produced from the convex single crystal.

[0009] FIG. 2 shows an example of a convex SiC single crystal 200 obtained by a conventional sublimation process (as described with reference to FIG. 1 ). The bulk SiC single crystal 200 has a convex top surface 202 with several intrinsic stress regions (depicted by dashed lines 204, 206, 208, 210) that are induced by thermal gradients during crystal growth and tend to follow the convex shape of the top surface 202. Thus, a single crystal seed or wafer produced from the bulk SiC single crystal 200 will carry some of the intrinsic stress regions 204, 206, 208, 210 present in the SiC single crystal 200. For example, in the case of a SiC single crystal seed 300 produced from the region depicted by the dotted lines in FIG. 2 , the intrinsic stress regions 204, 206, 208 are not evenly distributed within the SiC single crystal seed 300. That is, the carbon-terminated face 302 (C-face) and silicon-terminated face 304 (Si-face) of the SiC single crystal seed 300 are differently intersected by the intrinsic stress regions 206, 208, 210. This affects the overall response of the SiC single crystal seed 300 to thermally induced stresses at the high temperatures used during sublimation growth.

[0010] Additionally, the flatness of the single crystal seed 300 may also be affected by the convexity of the intrinsic stress regions 204, 206, 208, depending on the seed thickness and the temperatures to which it is subjected during the PVT growth process. For example, the SiC single crystal seed 300 may bend according to the dominant curvature of the intrinsic stress regions 204, 206, 208, thus creating additional internal stress and dislocation formation in the bulk SiC single crystal growing thereon. This results in an increased density of dislocations (particularly stress-induced basal plane dislocations) in the SiC substrate produced from the resulting bulk SiC single crystal.

[0011] Overall, even when using the most favorable thermal gradients, the single crystal seeds produced from such single crystals still do not have the appropriate quality for growing high quality, bulk single crystals that meet the increasing demands of the semiconductor substrate industry.

[0012] So far, the influence of thermally and mechanically induced stresses during the growth and / or processing of bulk single crystals on the reduced quality of the produced single crystal seeds has not been adequately addressed.

[0013] European Patent No. 1,200,651 describes a crystal growth arrangement with a lateral framework of seeds, intended to enable the growth of high-quality single crystals through special seed fixation. However, this arrangement cannot completely eliminate the effects of internal stresses during crystal growth. Furthermore, the use of metal compounds near the seeds can lead to contamination of the growing single crystals. Contaminated single crystals generally must be discarded.

[0014] Therefore, there remains a need for a solution to the problem of how to reduce or eliminate the negative impact of the internal stresses of the single crystal seeds inherent in the seed on the quality of the bulk single crystal grown thereon, and ultimately improve the quality of the substrates produced therefrom. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] U.S. Patent No. 8,865,324 [Patent Document 2] European Patent No. 1,200,651 Summary of the Invention [Problem to be solved by the invention]

[0016] It is therefore an object of the present invention to provide a multi-layer seed, a method for manufacturing the multi-layer seed, and a PVT process for growing bulk single crystals using the same, which eliminates or at least mitigates the above-mentioned drawbacks of prior art single crystal seeds and growth methods.

[0017] This object is solved by the subject matter of the independent claims. Particular embodiments of the invention are the subject matter of the dependent claims. [Means for solving the problem]

[0018] The concept of the present solution is to improve the quality of single crystals grown by sublimation processes by providing a multi-layer seed designed to provide a virtually stress-free surface on which single crystals can grow without the negative effects of internal stresses carried by the single crystals, especially at the high temperatures conventionally used in sublimation processes.

[0019] The present invention therefore makes it possible to overcome the problems mentioned above when using single crystal seeds by providing a multi-layer seed that behaves like a virtually stress-free seed.

[0020] Therefore, the present invention provides a multi-layer seed for growing a single crystal, comprising at least two seed layers, each of which is a single crystal layer characterized by one or more parameters related to a respective internal stress, and wherein the one or more parameters are selected so that the at least two seed layers are adapted to counteract each other's internal stresses.

[0021] According to a further development, each of the at least two seed layers is a monocrystalline layer, and / or the one or more parameters include one or more of a curvature value, a warpage value, a total thickness variation value, a thickness, and a doping content of each seed layer.

[0022] According to a further development, the at least two seed layers include a top seed layer providing a growth surface adapted for growing a single crystal thereon, the at least two seed layers being arranged adjacent to one another along an axial direction transverse to said growth surface, the axial direction being a direction for growing a single crystal on the multi-layer seed.

[0023] According to a further development, each of the at least two seed layers is a monocrystalline layer terminated by a face of a first type characterized by a first crystal lattice plane and an opposing face of a second type characterized by a second lattice plane, and adjacent seed layers are arranged with the same face type facing each other so as to cancel out their respective internal stresses (or with the same face type pointing towards each other so as to cancel out their respective internal stresses).

[0024] According to a further development, the at least two seed layers are SiC single crystal layers, the first type face is a C-face and the second type face is a Si-face, and the uppermost seed layer of the at least two seed layers is arranged with the C-face as a termination face for crystal growth.

[0025] According to a further development, the at least two seed layers are selected based on their respective curvature values ​​so as to compensate for the intrinsic stress of adjacent seed layers and so that the multilayer seed is characterized by a curvature value between -50 μm and +50 μm, or between -30 μm and +30 μm, or between -20 μm and +20 μm.

[0026] In a further development, the at least two seed layers are selected to compensate for the intrinsic stress of adjacent seed layers and based on their respective warpage values, such that the multi-layer seed is characterized by a warpage value of less than 50 μm, or less than 30 μm, or less than 20 μm.

[0027] According to a further development, the at least two seed layers are selected based on their respective total thickness variation values ​​so as to compensate for the intrinsic stress of adjacent seed layers and so that the multilayer seed is characterized by a total thickness variation value of less than 50 μm, or less than 30 μm, or less than 20 μm.

[0028] According to a further development, the growth seed layer of the at least two seed layers has a minimum thickness of 0.5 mm and a maximum thickness of 2.0 mm, and the at least two seed layers other than the growth seed layer have respective thicknesses between 350 μm and 3 mm.

[0029] According to a further development, the at least two seed layers consist of: up to four single crystal seed layers, and / or one or more single crystal seed layers with different doping amounts, and / or one or more single-crystalline seed layers composed of any of the semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN; and / or a homostructure of a single-crystalline seed layer made of one of the semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN; and / or Heterostructures with single crystal seed layers of combinations of semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN.

[0030] According to a further development, the at least two seed layers comprise one or more monocrystalline seed layers having different levels of subsurface damage obtained by treating the seed layers with at least one of sawing, grinding, and polishing, and / or the at least two seed layers are bonded together with a bonding layer between each pair of adjacent seed layers, said bonding layer being formed by adhesive means or sintering.

[0031] According to a further development, the top seed layer for crystal growth is oriented with the 0001 crystal axis tilted from the axial direction by a tilt angle between 0° and 8°, or between 2° and 6°.

[0032] The present invention also provides a method for manufacturing a multi-layer seed according to the present invention, the method comprising the steps of: selecting at least two seed crystals for at least two seed layers of a multi-layer seed; disposing at least two seed crystals adjacent to each other along an axial direction in which a single crystal is to be grown on the multi-layer seed; Forming a bonding layer between each pair of adjacent seed layers. Here, each of the at least two seed crystals is selected based on one or more parameters related to their respective degrees of internal stress such that the respective internal stresses oppose each other.

[0033] The present invention also includes the use of a multi-layer seed according to the present invention in a sublimation process for growing semiconductor single crystals.

[0034] The present invention also provides a physical vapor transport (PVT) method for producing at least one SiC single crystal, the method comprising: placing at least one seed and a feedstock adapted to grow a SiC single crystal inside a PVT growth crucible; introducing the growth crucible into an inductively heated or resistively heated reactor of a PVT system; and controlling a temperature gradient established in the growth crucible to grow at least one SiC single crystal on the at least one seed, wherein the at least one seed is a multi-layer seed according to the present invention.

[0035] According to further developments, the temperature gradient is controlled to achieve a growth temperature range of 2000°C-2500°C or 2100°C-2400°C inside the PVT growth crucible.

[0036] The accompanying drawings are incorporated into and form a part of the specification to illustrate several embodiments of the present invention. These drawings, together with the description, serve to explain the principles of the invention. The drawings are merely for the purpose of illustrating preferred and / or alternative examples of how the invention can be made and / or used. Therefore, the present invention should not be construed as being limited to only the embodiments shown and described. Moreover, several aspects of the embodiments may form solutions in accordance with the present invention, individually or in different combinations. The embodiments described below may thus be considered alone or in any combination thereof.

[0037] Further features and advantages will become apparent from the following particular description of various embodiments of the invention, as illustrated in the accompanying drawings, in which like references refer to like elements and in which: [Brief explanation of the drawings]

[0038] [Figure 1]1 is a schematic cross-sectional view of a conventional PVT growth arrangement for producing semiconductor single crystals by sublimation growth on a seed consisting of a single single crystal layer. The lower diagram shows the profile of the radial temperature gradient with distance (X-axis) from the longitudinal central axis L (Y-axis) of the PVT growth arrangement for growing a convex single crystal. [Figure 2] 1 is a schematic cross-sectional view of a conventional convex single crystal with freeze-inducing stress (dashed line) formed due to a thermal gradient established during crystal growth, with the dotted line indicating the location of the single crystal seed generated from the bulk single crystal. [Figure 3] 3 is a cross-sectional view of a single crystal seed produced from the bulk single crystal shown in Figure 2. The dashed line indicates the intrinsic stress region of the single crystal seed transferred from the bulk single crystal. [Figure 4] 1 is a schematic cross-sectional view of an exemplary embodiment of a multi-layer seed according to the present invention. [Figure 5] 10 is a schematic cross-sectional view of a further exemplary embodiment of a multi-layer seed according to the present invention. [Figure 6] 10 is a schematic cross-sectional view of a further exemplary embodiment of a multi-layer seed according to the present invention. [Figure 7] 10 is a schematic cross-sectional view of a further exemplary embodiment of a multi-layer seed according to the present invention. [Figure 8] 1 is a flowchart illustrating a comparison of processes for producing a SiC substrate from a SiC single crystal grown using a conventional single crystal seed and a multi-layer seed according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0039] The concept of the present invention is to improve the quality of bulk single crystals obtained in sublimation processes, and therefore the quality of substrates made therefrom, by providing a specially designed seed that provides a substantially stress-free crystal growth surface at temperatures conventionally used in sublimation processes. As a result, bulk single crystals can be grown without the negative effects of intrinsic stress introduced by the use of seeds generated from a single wafer or slice of a single crystal (hereinafter referred to as a single crystal seed layer or simply a seed layer), such as single crystal seed 300 discussed above with reference to Figures 2 and 3.

[0040] This is achieved by providing a multi-layer seed consisting of a combination of single crystal seed layers (i.e., at least two seed layers) stacked along the direction for crystal growth (i.e., stacked on top of each other) and firmly bonded to each other so as to cancel out their respective internal stresses. In particular, the combination of single crystal seed layers is selected to equalize the effect of internal stresses in at least the top seed layer (hereinafter referred to as the growth seed layer) from which the bulk single crystal is grown, in the temperature range conventionally used in sublimation processes, for example, from about 2000°C to 2400°C.

[0041] As described below with reference to Figures 4-7, multilayer seeds composed of different combinations of single crystal seed layers can be envisioned depending on the degree of internal stress of the individual seed layers (e.g., in number, thickness, and orientation) to achieve a multilayer seed having a virtually stress-free top seed layer during crystal growth.

[0042] FIG. 4 illustrates a multi-layer seed 400 including multiple single-crystal SiC seed layers, i.e., at least two seed layers, including a first seed layer 401 and a second seed layer 402. Each single-crystal seed layer 401, 402 corresponds to a slice or wafer of single-crystal material fabricated from a bulk single crystal, such as the single-crystal layer 300 described above with reference to FIGS. 2 and 3. The multiple single-crystal seed layers 401, 402 are preferably made from the same semiconductor material, e.g., the same bulk single crystal, or from different bulk single crystals. Each of the individual seed layers 401, 402 is characterized by a respective internal stress region 411, 412 that corresponds to a stress region of the bulk single crystal from which the individual seed layer 401, 402 is generated.

[0043] The first and second seed layers 401, 402 are preferably disk-shaped slices, arranged adjacent to each other along a longitudinal medial axis L transverse to their disk-shaped surfaces, i.e., forming a multilayer stack on the multilayer seed 400 in the direction intended for crystal growth. Furthermore, the first and second seed layers 401, 402 are firmly bonded to each other by an adhesive layer 420. The bonding layer 420 provides stable bonding in the temperature range used in sublimation growth, e.g., temperatures up to approximately 2000°C to 2400°C, and can be produced by adhesive bonding or sintering. For adhesive bonding, organic compounds such as special phenolic resins or novolacs can be used as adhesives. For sintered connections, fine silicon powder can be used as a sintering aid. The first seed layer 401 can be fixed to the seed holder 112 by an adhesive layer 430, which can be produced by adhesive bonding or sintering, i.e., using the same or a different compound as the adhesive layer 420. Alternatively, the seed holder 112 may be fixed to the first seed layer 401 by clamping.

[0044] To achieve a multilayer seed 400 having a stress-free growth surface at crystal growth temperatures, the first seed layer 401 and the second seed layer 402 are stacked on top of each other and oriented based on their respective intrinsic stresses, so that, at least at the growth temperature, the effect produced by the intrinsic stress region 411 carried by the first seed layer 401 counteracts (cancels) the effect produced by the intrinsic stress of the top seed layer, i.e., the second seed layer 402 in the configuration of Figure 4.

[0045] For example, the internal stress of each of the individual SiC seed layers 401, 402 forming the multilayer seed 400 can be compensated for by orienting the first and second seed layers 401, 402 in the multilayer stack so that the carbon-terminated face (C-face) of one of the SiC seed layers (e.g., the first seed layer 401) is turned toward the C-face of the adjacent layer (e.g., the second seed layer 402). Alternatively, adjacent seed layers can be turned with their respective silicon-terminated faces (Si-faces) facing each other. Such a relative orientation between adjacent SiC seed layers 401, 402 forming the multilayer seed 400 can be achieved by first preparing the SiC seed layer from a bulk SiC single crystal (e.g., the second seed layer 401) and then rotating the SiC seed layer 180° relative to the growth direction of the original single crystal. The rotated SiC seed layer is then connected to another non-rotated SiC seed layer (e.g., the second seed layer 402).

[0046] If the multilayer seed is intended for the growth of 4H-SiC single crystals, the free surface for crystal growth, i.e., the top surface of the multilayer seed, should be carbon-terminated. In this case, the top SiC seed layer of the multilayer seed should be oriented so that its C-plane corresponds to the free surface. This specific orientation of the top seed layer will determine the orientation of the lower seed layers with respect to their intrinsic stress, so as to achieve effective compensation between adjacent seed layers. For example, as illustrated in FIG. 3 , according to the relationship between the convex curvature of the intrinsic stress regions 204, 206, 208 borne by individual seed layers 300 obtained from a convex SiC single crystal 200 and the relative positions of the C-terminated and Si-terminated faces 302 and 304, effective compensation of internal stress between adjacent layers within the multilayer seed can be achieved by alternating the sign of curvature of the stress regions borne by the individual seed layers. For example, in the multilayer seed 400 shown in FIG. 4 , the top second seed layer 402 is oriented with its C-terminated face 440 as the free growth surface of the multilayer seed 400. As a result, as the Si-terminated surface of the second seed layer 402 faces toward the underlying first seed layer 401, the first seed layer 401 is oriented to counteract the internal stress of the second seed layer 402. That is, the first and second seed layers 401, 402 are oriented with their respective Si-terminated surfaces facing each other.

[0047] Alternatively, in the case of a configuration in which a multilayer seed is to have a Si-terminated growth surface, the top seed layer and the adjacent underlying layer should be rotated with their respective C-planes facing each other to compensate for their respective internal stresses.

[0048] The individual seed layers that make up the multi-layer seed may have the same or similar layer thickness as the first and second seed layers 401 , 402 of the multi-layer seed 400 .

[0049] Alternatively, a multilayer seed may be configured with seed layers of different thicknesses, as in the configuration of multilayer seed 500 shown in FIG. 5 . Multilayer seed 500 includes a combination of two single-crystal SiC seed layers of different thicknesses: a first seed layer 501 and a thinner second seed layer 502. Similar to the configuration described with reference to FIG. 4 , first and second seed layers 501, 502 are also firmly bonded to each other by a temperature-stable bonding layer 520. This bonding layer may be fabricated by adhesive bonding or sintering, such as the above-described bonding layer 420. Additionally, first seed layer 501 may be fixed to seed holder 112 by a fixing layer 530 fabricated by adhesive bonding or sintering, for example, using the same compound as that used for adhesive layer 520 or by clamping.

[0050] Similar to the configuration described with reference to FIG. 4 , the growth surface 540 of the multilayer seed 500 preferably corresponds to the C-plane of the top second seed layer 502. The first seed layer 501 is then oriented based on its intrinsic stress 511, which acts to counteract the influence of the intrinsic stress region 512 carried by the second seed layer 502 at the growth temperature. To achieve the desired equalization of internal stress in the top growth layer 502 of the multilayer seed 500, the thickness and level of intrinsic stress between the individual seed layers 501, 502 are parameters to consider when selecting the seed layers 501, 502 forming the multilayer seed 500. For example, a thinner top seed layer 502 may carry a lower intrinsic stress region than a thicker seed layer 501, meaning that, when fabricated from the same bulk SiC single crystal, its thinner thickness may mean that it may be more susceptible to thermally induced deformation in the growth temperature range. The optimal parameters can be found based on characterizing the thermally induced deformation of a single seed layer as a function of its thickness, for example by experiment or simulation methods.

[0051] Figure 6 shows a further configuration of a multi-layer seed 600 that includes a combination of two single crystal SiC seed layers of different thicknesses, a first seed layer 601 and a second seed layer 602. Multi-layer seed 600 differs from the configuration of Figure 5 in that the free top seed layer 602 has a greater thickness in the mid-axis direction L than the underlying seed layer 601.

[0052] Similar to the configuration described with reference to FIG. 5 , the first seed layer 601 and the second seed layer 602 carry respective internal stress regions 611, 612 and are firmly bonded to each other by a bonding layer 620. The multilayer seed 600 is also fixed to the seed holder 112 by a fixing layer 630. Both the bonding layer 620 and the fixing layer 630 may have properties similar to the connecting layers 520 and 530 described above, respectively. The growth surface of the multilayer seed 600 preferably corresponds to the C-face of the top seed layer 602 for growing 4H—SiC single crystal. As a result, to counteract the influence from the intrinsic stress region 612 carried by the top seed layer 602 at growth temperatures, the lower seed layer 601 has its Si-face oriented toward the Si-face of the top seed layer 602 (i.e., the stress region 611 curves upward in the direction of the medial axis L and faces the downward curvature of the stress region 612).

[0053] The desired equalization of internal stress can be achieved by setting a balance between the thickness and intrinsic stress intensity of the individual seed layers 601, 602. As explained above, the top seed layer 602 may carry a larger intrinsic stress region than the first seed layer 601, but due to its larger thickness, may be less susceptible to thermally induced deformation in the growth temperature range. As mentioned above, the optimal parameters can be determined based on the characterization of a single seed layer according to its thickness, for example, by experiment or simulation methods.

[0054] The multilayer seed according to the present invention can be configured with two or more single-crystal seed layers, preferably four or less. Furthermore, it may be advantageous to design a multilayer seed having a pair of seed layers, since selecting a pair of adjacent seed layers that effectively counteract each other's internal stresses facilitates equalization of the overall internal stress.

[0055] For example, FIG. 7 illustrates a multilayer seed 700 configuration including four single-crystal SiC seed layers 702, 704, 706, and 708. Similar to the previous embodiment, the first through fourth seed layers 702, 704, 706, and 708 are arranged adjacent to one another along the medial axis L in a stacked manner. Each of the first through fourth seed layers 702, 704, 706, and 708 carries a respective internal stress region 712, 714, 716, and 718 and is firmly bonded to adjacent seed layers by a respective connecting layer 720, 722, and 724. The multilayer seed 700 can be secured to the seed holder 112 by a fixing layer 730 or by clamping. Both the bonding layers 720, 722, and 724, and the fixing layer 730, have properties similar to the connecting layers 420 and 530, respectively, described above.

[0056] Similar to the configuration described with reference to FIGS. 5-6 , the growth surface of the multilayer seed 700 preferably corresponds to the C-plane of the top seed layer 708 for growing 4H—SiC single crystal. The lower first through third seed layers 702, 704, and 706 are oriented relative to the adjacent seed layer, i.e., to counteract the influence of the adjacent seed layer 718 by alternating the direction of curvature of the intrinsic stress field along the multilayer stack along the central axis L. Thus, the Si-face of the top seed layer 708 faces toward the directly adjacent seed layer 706, and the Si-face of the seed layer 706 faces toward the top seed layer 708. As a result, the C-face of the middle third seed layer 706 faces toward the C-face of the middle second seed layer 704. The adjacent first and second seed layers 702 and 704 of the lower seed layer pair, which are oriented with their respective Si-faces, are oriented toward each other.

[0057] The multiple seed layers forming the multilayer seed are therefore oriented along the medial axis L such that any two directly adjacent seed layers are oriented so that they face each other with the same type of termination face (i.e., either the Si-face or the C-face). This applies not only to the case where the termination, growth face of the multilayer seed corresponds to the carbon-terminated face of the top single crystal seed layer, but also to multilayer seeds designed for growing pure 4H—SiC single crystals or other types of single crystals, which may be terminated by other crystal faces, e.g., Si-terminated faces.

[0058] To achieve a multi-layer seed having a stress-free top surface for growing a stress-free single crystal thereon, the single crystal seed layers are selected according to one or more parameters related to the strength of the intrinsic stress carried by each individual single crystal seed layer, as described below, so that the internal stresses of each can be homogenized.

[0059] For example, any or a combination of geometric parameters typically used to characterize the planarity of a semiconductor substrate, such as curvature, bow, and total thickness variation value (TTV), may be used to quantify the strength of the intrinsic internal stress carried by the single crystal seed layer, more particularly by curvature measurements.

[0060] According to the standard definition used in silicon substrate manufacturing, the curvature value indicates the deviation of the center point of the mid-plane of a free, unclamped substrate from a mid-plane reference plane established by three equally spaced points on a circle, e.g., a three-point plane defined around the edge of the substrate. The mid-plane may be defined as the locus of points in the substrate that are equidistant between the front and back surfaces. The curvature value is negative or positive depending on whether the mid-point is below or above the reference plane. Bow is the difference between the maximum and minimum distances of the mid-plane from the reference plane, taking into account the entire mid-plane of the substrate, rather than just the mid-point as in bow measurements. The TTV value gives the difference between the maximum and minimum thickness of the substrate.

[0061] Because the internal stress of a single-crystal SiC wafer is known to be proportional to its curvature over a wide temperature range, curvature measurements can be used to determine the intrinsic stress of a SiC seed layer, even at high temperatures. The effectiveness of the stress reduction achieved by the combination of seed layers forming a particular multilayer seed can then be checked by measuring the curvature of the individual seed layers and / or the resulting multilayer seed itself. That is, by setting the maximum curvature of the multilayer seed at room temperature, e.g., 50 μm in the module (i.e., the measured curvature should be between -50 μm and +50 μm), if the measured curvature is below this limit, it can be assumed that the intrinsic stress in the multilayer seed is negligible at typical growth temperatures.

[0062] Additional or alternative methods for quantifying the degree of intrinsic, internal stress carried by a seed layer include measuring the bending of lattice planes, or the convexity of the bulk single crystal from which the seed layer is prepared.

[0063] Additionally, it would be advantageous to be able to control and / or adjust one or more parameters that affect the internal stress carried by each single crystal seed.

[0064] For example, single crystal seeds may carry internal stresses, which are mechanical stresses introduced into the grown single crystal (or wafers prepared therefrom) by subsequent processing of the grown crystal, known as subsurface damage, as well as thermally induced stresses during crystal growth. Subsurface damage generates stresses due to near-surface crystal lattice disturbances caused by mechanical processes applied to the bulk single crystal (e.g., wire sawing and grinding) and can usually be removed by finer forms of processing, such as polishing. Therefore, the degree of subsurface damage provides an adjustable parameter for controlling the mechanical internal stresses carried by the single crystal seed layer, and therefore the overall intrinsic stress. For example, it is generally preferable for the top seed layer (i.e., the growth seed layer) of a multilayer seed to not exhibit any subsurface damage, as this can negatively affect the quality of the single crystal subsequently grown on the multilayer seed. On the other hand, the lower seed layer can have a defined subsurface damage and therefore a defined induced mechanical stress, so that the mechanically and thermally induced stresses in adjacent seed layers, especially the top seed layer of a multi-layer seed, can be compensated for by this additional adjustable parameter of the individual seed layer. Thus, the subsurface damage provides an additional parameter that can be consciously controlled and individually adjusted to affect the tension carried by each of the seed layers forming the multi-layer seed.

[0065] Another parameter that can be used to influence the thermally induced stress in the seed layer is the degree of doping. For example, during the growth of SiC single crystals, it is common to introduce doping elements such as nitrogen into the PVT growth reactor in a controlled admixture with an inert gas, such as argon. The inclusion of nitrogen in the crystal lattice of the SiC single crystal affects the electrical properties, such as the resistance, of the SiC substrates made from the doped SiC single crystals. Furthermore, the degree of nitrogen content in the crystal lattice also changes the brittleness of silicon carbide and the effect of thermally induced stress on the geometric parameters of SiC substrates prepared from doped SiC single crystals.

[0066] Thus, a multilayer seed may be composed of one or more seed layers produced from a SiC single crystal with a given doping amount at which a desired strength of thermally induced stress in the individual seed layers is achieved. The optimal doping amount depends on the specific characteristics of the multilayer seed (e.g., semiconductor material, number of seed layers, seed layer thickness, etc.) and can be determined for a given design of the multilayer seed by experimental and / or simulation methods.

[0067] An additional or alternative parameter for achieving the desired equalization of internal stress in a multilayer seed is the thickness (or relative thickness) of the seed layers that make up the multilayer seed. This parameter influences the overall effect of the internal stresses carried by the individual seed layers. For example, the thickness of a SiC multilayer seed in the crystal growth direction can be up to 5 mm, whereby the topmost SiC seed layer (i.e., the growth seed layer) on which the single crystal grows should preferably have a thickness of 0.5 mm to 2 mm. Suitable thicknesses for other individual SiC seed layers and / or most multilayer seed designs range from 350 μm to 1 mm.

[0068] In any of the above multilayer seed configurations, the top seed layer for crystal growth may be an oriented single-crystalline layer having a 0001 crystallographic axis tilted from the longitudinal median axis (L) by a tilt angle between 0° and 8°, or between 2° and 6°. That is, the basal plane (0001) is tilted by the tilt angle relative to a plane parallel to the growth surface of the multilayer seed layer. Such a crystal orientation of the seed layer from which crystal growth occurs may be advantageous for certain epitaxial processes. For example, a commonly desired 4° off-axis SiC substrate has a 4° tilt of the basal plane (0001) in the [-1 -1 20] crystallographic direction, which allows for optimal step flow during the epitaxy process and therefore ensures optimal quality of the deposited epitaxial film.

[0069] Although the present invention is primarily applicable to reducing the overall stress on multilayer seeds composed of single-crystal seed layers, the seed holder itself can also contribute to balancing the internal stress within the multilayer seed. Therefore, multilayer seeds can be designed to compensate for additional tension through fixation with the seed holder, which is typically made of graphite. In such cases, the geometry of the multilayer seed, including the seed holder, should also be measured to take into account the influence of the seed holder.

[0070] The multilayer seeds of the present invention can be composed of a combination of single-crystal seed layers made of SiC and / or other semiconductor materials. For example, the multilayer seeds can be homostructures of single-crystal seed layers sharing similar properties, such as semiconductor material, layer thickness, doping amount, etc. Alternatively, the multilayer seeds can be formed as heterostructures, in which all or only a few seed layers have different properties and / or are made of different semiconductors. Thus, the present invention is not limited to single-crystal and multilayer seeds made of SiC. In addition to SiC, multilayer seeds can also be made of other semiconductor materials, such as AlN and GaN (where homostructures and heterostructures are possible), as well as GaN, AlN, AlGaN, AlInN, and InN, for example, as heterostructures on sapphire, GaAs, Si, or oxide substrates.

[0071] The principles underlying the present invention for producing high-quality single crystals can also be applied to any system based on the growth of semiconductor single crystals by a PVT process (or a similar sublimation process) on the surface of a seed, in particular, where the seed surface corresponds approximately to the diameter of the single crystal to be grown. In particular, the present invention is suitable for growing bulk single crystals having diameters suitable for producing substrates with diameters of approximately 150 mm, 200 mm, and 300 mm. Therefore, the individual seed layers forming the multilayer seed can have different diameters. In this regard, it should be noted that bulk SiC single crystals typically have diameters that correspond approximately to the target diameter of the SiC substrate from which they are produced. Nevertheless, the bulk SiC single crystal diameter can also be up to 15% larger than the target diameter of the SiC substrate, i.e., approximately 150 mm, approximately 200 mm, or approximately 300 mm.

[0072] Therefore, the present invention also includes the use of a multi-layer seed in a sublimation process for growing a semiconductor single crystal. Generally, the diameter of the seed and / or multi-layer seed corresponds approximately to the diameter of the single crystal to be grown thereon. However, the seed diameter can be up to 15% smaller or larger than the diameter of the single crystal to be grown, depending on the process and setup used to grow the single crystal.

[0073] The present invention also provides a method for fabricating a multilayer seed. The method includes selecting at least two seed crystals for at least two seed layers of the multilayer seed, positioning the at least two seed crystals adjacent to each other along an axial direction, which is the intended direction for growing a single crystal on the multilayer seed, and forming a bonding layer between each pair of adjacent seed layers to firmly connect the seed layers to each other. The seed crystals are selected based on one or more parameters related to the respective degrees of internal stress, such that the respective internal stresses are counterbalanced, thereby achieving a multilayer seed having a virtually stress-free growth surface. This selection can be made based on one or more of the curvature, bow, total thickness variation, thickness, and doping content of the respective seed layers, and / or taking into account desired properties of the multilayer seed, such as the total thickness, the total thickness of the seed layer and the single crystal grown thereon, the type of semiconductor material, and the growth temperature of the sublimation growth process. The parameters of the multiple seed layers that optimize the desired equalization of internal stress can be found through experiments and / or simulations.

[0074] Furthermore, the multilayer seed of the present invention can be used in a wide range of sublimation processes for growing semiconductor single crystals with the above-mentioned advantages of the present invention. In particular, the present invention contemplates a physical vapor transport (PVT) method for producing at least one SiC single crystal, the method comprising: placing at least one multilayer seed and a feedstock adapted to grow a SiC single crystal inside a PVT growth crucible; introducing the growth crucible into an inductively heated or resistively heated reactor of a PVT system; and controlling the temperature gradient established inside the growth crucible to grow at least one SiC single crystal on the at least one seed, for example, to achieve a growth temperature range of 2000°C to 2500°C, or 2100°C to 2400°C inside the PVT growth crucible.

[0075] The multilayer seed according to the present invention can be advantageously used in both vertical and horizontal crystal growth processes, i.e., with its longitudinal mid-axis L aligned along the vertical direction for growing single crystals in the direction of gravity (or against the direction of gravity), or with its longitudinal mid-axis L aligned horizontally.

[0076] 8, the process 900 using a multi-layer seed according to the present invention allows for the growth of a bulk single crystal as if on a substantially unstressed seed, in contrast to the conventional process 800 using a single-layer single crystal seed. Thus, the present invention provides a new concept of a multi-layer seed that eliminates the problem of the origin of unexpectedly low quality of SiC substrates produced from SiC single crystals grown by a sublimation process.

[0077] In conclusion, the present invention provides a multi-layer seed consisting of a combination of single crystal seeds that enables the growth of high-quality semiconductor single crystals, such as SiC single crystals, with reduced internal stress. This improves the quality of the grown semiconductor single crystals and, consequently, the quality of the wafers produced therefrom. In particular, internal thermal stress is reduced, allowing the production of wafers with fewer dislocations, i.e., fewer stress-induced basal plane dislocations.

[0078] Certain features of the above exemplary embodiments have been described using the term "monocrystalline seed layer" (or simply "seed layer"). This term should be understood to refer to a slice or wafer of monocrystalline semiconductor having a thickness on the order of a few microns or more, and therefore should not be interpreted as referring to a layer in the sense of several atomic lattice planes. Furthermore, the monocrystalline seed layer preferably has a flat, disk-like surface transverse to the longitudinal medial axis L of the multilayer seed, which corresponds to the intended direction for crystal growth. Terms such as "top" and "bottom" are used with reference to the longitudinal medial axis L for the purpose of facilitating the description of each feature and their relative orientation within the multilayer seed, and should not be construed as limiting the claimed invention or any of its components to a particular spatial orientation. [Explanation of symbols]

[0079] 100 Growth Sequence 102 Bulk single crystal 104 Monolayer, seed crystal 106 Growth Crucible 108 Source Material Region 110 Crystal growth region 112 Seed Holder 114 Crucible Lid 116 raw materials 118 Thermal Induction Coil 120 Heat flow direction 122 Crucible Wall L-axis direction, longitudinal intermediate shaft 200 SiC single crystal 202 Convex top surface 204, 206, 208, 210 Induced tension 300 single crystal seeds 302 carbon-terminated surface 304 silicon termination surface 400, 500, 600, 700 multi-layer seeds 401, 501, 601 First seed layer 402, 502, 602 Second seed layer, growth seed layer 702, 704, 706, 708 First through fourth seed layers of multi-layer seed 700 420, 520, 620, 720, 722, 724 Tie layer between seed layers 411, 412, 511, 512, 611, 612, 712, 714, 717, 718 Internal stress areas 430, 530, 630, 730 Fixed layer between seed holder and multi-layered seed 440, 540, 740 Carbon termination surface, growth surface

Claims

1. A multi-layer seed for growing a single crystal, comprising at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708), each of the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) being a single crystalline layer characterized by one or more parameters related to a respective degree of internal stress; A multi-layer seed, wherein the one or more parameters are selected such that the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are adapted to counteract the respective internal stresses of each other.

2. each of the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) is a monocrystalline layer; and / or The multi-layer seed of claim 1 , wherein the one or more parameters include one or more of a curvature value, a bow value, a total thickness variation value, a thickness, and a doping content of each of the seed layers.

3. The at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) comprises a top seed layer (402; 502; 602; 708) providing a growth surface adapted for growing said single crystal thereon; The at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are arranged adjacent to each other along the axial direction (L).

4. each of the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) is a monocrystalline layer terminated by a face of a first type characterized by a first crystal lattice plane and an opposing face of a second type characterized by a second lattice plane; 10. The multi-layer seed of claim 1, wherein adjacent seed layers are arranged with the same face type facing each other to counteract their respective internal stresses.

5. the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are SiC single crystal layers, the first type surface is a C-face, and the second type surface is a Si-face; The multi-layer seed of claim 4 , wherein the top seed layer (402; 502; 602; 708) of the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) is aligned with a C-plane as the termination surface for crystal growth.

6. at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are selected based on their respective curvature values ​​to compensate for the intrinsic stress of the adjacent seed layers; 2. The multilayer seed according to claim 1, wherein the multilayer seed (400; 500; 600; 700) is characterized by a curvature value between -50 μm and +50 μm, or between -30 μm and +30 μm, or between -20 μm and +20 μm.

7. the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are selected based on their respective warpage values ​​to compensate for the intrinsic stress of the adjacent seed layers; 2. The multilayer seed according to claim 1, wherein the multilayer seed (400; 500; 600; 700) is characterized by a warpage value of less than 50 μm, or less than 30 μm, or less than 20 μm.

8. the at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are selected based on their respective total thickness variations to compensate for intrinsic stress of adjacent seed layers; 2. The multilayer seed according to claim 1, wherein the multilayer seed (400; 500; 600; 700) is characterized by a total thickness variation of less than 50 μm, or less than 30 μm, or less than 20 μm.

9. At least two seed layers (401, 402; 501, 502; ６０１，６０２； the growth seed layer (402; 502; 602; 708) of 702, 704, 706, 708) has a minimum thickness of 0.5 mm and a maximum thickness of 2.0 mm; 2. The multi-layer seed of claim 1, wherein at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) other than the growth seed layer (402; 502; 602; 708) have a respective thickness between 350 μm and 3 mm.

10. at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708); up to four single crystal seed layers (702, 704, 706, 708); and / or one or more single crystal seed layers with different doping amounts, and / or one or more single-crystalline seed layers composed of any of the semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN; and / or a homostructure of a single-crystalline seed layer made of one of the semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN; and / or heterostructures of single crystal seed layers in combinations of semiconductor materials selected from Si, SiC, AlN, GaN, AlGaN, AlInN, and InN; The multi-layer seed of claim 1 , comprising:

11. At least two seed layers (401, 402; 501, 502; ６０１，６０２； 702, 704, 706, 708) comprise one or more single crystal seed layers having different levels of subsurface damage obtained by treating the seed layers with at least one of sawing, grinding, and polishing, and / or at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) are bonded together with a bonding layer (420; 520; 620; 720, 722, 724) between each pair of adjacent seed layers, the bonding layer (420; 520; 620; 720, 722, 724) being formed by adhesive means or sintering.

12. 2. The multilayer seed of claim 1, wherein the top seed layer (402; 502; 602; 708) for crystal growth has a [0001] crystal axis tilted from the axial direction (L) by a tilt angle of 0° to 8° or 2° to 6°.

13. A method for producing a multilayer seed (400; 500; 600; 700) according to any one of claims 1 to 12, comprising the steps of: selecting at least two seed crystals for at least two seed layers (401, 402; 501, 502; 601, 602; 702, 704, 706, 708) of a multi-layer seed (400; 500; 600; 700); Arranging at least two seed crystals adjacent to each other along an axial direction (L) in which a single crystal is grown on the multi-layer seed (400; 500; 600; 700); forming a bonding layer (420; 520; 620; 720, 722, 724) between each pair of adjacent seed layers; wherein each of the at least two seed crystals is selected based on one or more parameters related to respective degrees of internal stress such that the respective internal stresses oppose each other.

14. Use of a multilayer seed (400; 500; 600; 700) according to any one of claims 1 to 12 in a sublimation process for growing a semiconductor single crystal (102).

15. 1. A PVT method for producing at least one SiC single crystal, comprising: disposing, within a PVT growth crucible (106), at least one seed (400; 500; 600; 700) and a source material (116) adapted for growing a SiC single crystal (102); introducing the growth crucible (106) into an inductively or resistively heated reactor of a PVT system (100); controlling a temperature gradient established inside the growth crucible (106) to grow the at least one SiC single crystal on the at least one seed (400; 500; 600; 700); Including, A method, wherein said at least one seed is a multi-layer seed (400; 500; 600; 700) according to any one of claims 1 to 12.

16. 16. The method of claim 15, wherein the temperature gradient is controlled to achieve a growth temperature range of 2000°C to 2500°C or 2100°C to 2400°C inside the PVT growth crucible (106).

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