Protection relay

Abstract

To keep a range of a composite signal on which a signal for monitoring is superposed within a full-scale range of an analog input circuit while securing a dynamic range of an input signal even when a signal with comparatively large amplitude to be generated in occurrence of a failure of a power system, etc. is input.SOLUTION: In a protection relay, an analog input circuit 30 generates a plurality of analog composite signals by adding a signal for monitoring B to each of a plurality of analog input signals Ax (X=a, b, c, n), and generates a plurality of digital composite signals Cx by performing analog-digital conversion to each of the plurality of generated analog composite signals. An arithmetic processing unit 40 comprises a signal range determination unit 70 which stops output of the signal for monitoring B from a signal source for monitoring 58 when at least one of the plurality of digital composite signals Cx is not included in a limit range determined according to a full-scale range of the analog input circuit 30.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a protective relay. [Background technology]

[0002] Protection relays are equipped with analog input circuits to perform analog-to-digital conversion of signals input from the power grid. A known method for detecting faults in the analog input circuit is to superimpose a monitoring signal on the input signal from the power grid and detect changes in the monitoring signal. Signals of various frequencies can be used as the monitoring signal.

[0003] For example, Japanese Patent Laid-Open Publication No. 9-168226 (Patent Document 1) discloses a method of using a harmonic signal (e.g., a quadruple harmonic) of the fundamental wave of a power system as a monitoring signal, and a method of using a signal with the same frequency as the fundamental wave. Also, Japanese Patent Laid-Open Publication No. 2-285920 (Patent Document 2) discloses a method of using a DC signal as a monitoring signal. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 9-168226 [Patent Document 2] Japanese Patent Application Publication No. 2-285920 Summary of the Invention [Problem to be solved by the invention]

[0005] When fault detection is performed using a monitoring signal, the magnitude of the composite signal obtained by adding the monitoring signal to the input signal from the power system must be within the full-scale range of the analog input circuit. This constraint can be particularly problematic when a signal based on a fault current generated when a fault occurs in the power system is input to the protective relay. However, if the signal level of the input signal is reduced more than necessary using an input converter to fit within the full-scale range of the analog input circuit, another problem occurs: the dynamic range required for waveform analysis during a power system fault cannot be secured. Conventional protective relays have not taken these issues into consideration.

[0006] The present disclosure has been made in consideration of the above-mentioned problems, and its purpose is to ensure that, in a protective relay that uses a monitoring signal to determine whether an analog input circuit is faulty, even when a signal with a relatively large amplitude that occurs when a fault occurs in the power system or the like is input, the dynamic range of the input signal is maintained while the range of the composite signal on which the monitoring signal is superimposed is within the full scale range of the analog input circuit. [Means for solving the problem]

[0007] In one embodiment, the protective relay includes a monitoring signal source, an analog input circuit, and a processing unit. The monitoring signal source generates a monitoring signal. The analog input circuit receives analog input signals of multiple channels, each representing a voltage or current value of a power system, and generates multiple analog composite signals by adding a monitoring signal to each of the multiple analog input signals. Each of the multiple generated analog composite signals passes through a corresponding analog filter, and then performs analog-to-digital conversion using an analog-to-digital converter to generate multiple digital composite signals. The processing unit performs processing on the multiple digital composite signals. The processing unit includes a signal range determination unit that stops output of the monitoring signal from the monitoring signal source when at least one of the multiple digital composite signals is not within a limit range determined according to a full-scale range of the analog input circuit. [Effects of the Invention]

[0008] According to the above-described protective relay, when at least one of the plurality of digital composite signals is not within the limited range, the output of the monitoring signal from the monitoring signal source is stopped, thereby making it possible to keep the range of the composite signal on which the monitoring signal is superimposed within the full-scale range of the analog input circuit while maintaining the dynamic range of the input signal. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram showing an example of the overall configuration of a protective relay. [Figure 2] FIG. 2 is a block diagram showing the functional configuration of a calculation processing unit in FIG. [Figure 3] 3 is a block diagram showing a first operation example of the signal separator of FIG. 2 when a monitoring signal is being output. FIG. [Figure 4] 10 is a block diagram showing a second operation example of the signal separator of FIG. 2 when a supervisory signal is being output. FIG. [Figure 5] 10A and 10B are diagrams showing various signal waveforms in a time period including a period during which the monitoring signal is stopped. [Figure 6] 6 is an enlarged view of the waveform of the monitoring signal that has passed through the analog filter in FIG. 5, showing a portion immediately after a stop command. [Figure 7] 6 is an enlarged view of the waveform of the monitoring signal that has passed through the analog filter in FIG. 5, showing a portion immediately after a recovery command. [Figure 8] 4 is a flowchart showing the operation of an analog input circuit and an arithmetic processing unit of the protection relay. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments will be described in detail with reference to the drawings. The same or corresponding parts will be denoted by the same reference characters and description thereof will not be repeated.

[0011] Embodiment 1 [Overall configuration of protective relays] Fig. 1 is a block diagram showing an example of the overall configuration of a protective relay, and also shows an example of a power system to which a protective relay 10 is connected.

[0012] Referring to FIG. 1, a protection relay 10 includes an input converter 20, an analog input circuit 30, an arithmetic processing unit 40, an I / O (Input / Output) unit 50, a bus 56, and a monitoring signal source 58.

[0013] The input converter 20 converts analog input signals of multiple channels into signal levels suitable for signal processing inside the protection relay 10. Each of the multiple analog input signals represents a voltage or current value of the power system. The input converter 20 includes auxiliary transformers 21a, 21b, 21c, and 21n for each input channel. The auxiliary transformers 21a, 21b, 21c, and 21n are collectively referred to as auxiliary transformer 21.

[0014] 1, the primary winding of auxiliary transformer 21a is connected to a-phase current transformer 2a provided on transmission line 1, the primary winding of auxiliary transformer 21b is connected to b-phase current transformer 2b provided on transmission line 1, and the primary winding of auxiliary transformer 21c is connected to c-phase current transformer 2c provided on transmission line 1. Therefore, an a-phase current signal Ia is input to auxiliary transformer 21a, a b-phase current signal Ib is input to auxiliary transformer 21b, and a c-phase current signal Ic is input to auxiliary transformer 21c. Note that the primary winding of auxiliary transformer 21 may be connected to a voltage transformer provided on transmission line 1, and a signal representing the voltage value of the power system may be input to auxiliary transformer 21.

[0015] Furthermore, the example in FIG. 1 includes an additional component for detecting the zero-phase current of the transmission line 1. Specifically, the current transformers 2a, 2b, and 2c are Y-connected, and the primary windings of the auxiliary transformers 21a, 21b, and 21c are Y-connected. The neutral points of the Y-connections of the current transformers 2a, 2b, and 2c are connected to the neutral points of the primary windings of the auxiliary transformers 21a, 21b, and 21c. The input converter 20 of the protective relay 10 further includes an auxiliary transformer 21n that detects the neutral point current In flowing through the connection line between the neutral points. The neutral point current In is a signal obtained by combining the a-phase, b-phase, and c-phase current signals Ia, Ib, and Ic, and is equivalent to three times the zero-phase current I0.

[0016] The analog input circuit 30 generates a plurality of analog composite signals by adding the monitoring signal B output from the monitoring signal source 58 to the analog input signals Aa, Ab, Ac, and An output from the secondary sides of the auxiliary transformers 21a, 21b, 21c, and 21n, respectively. Furthermore, the analog input circuit 30 generates a plurality of digital composite signals by performing analog-to-digital (A / D) conversion on each of the generated plurality of analog composite signals.

[0017] 1, the analog input circuit 30 includes adders 31a, 31b, 31c, and 31n, analog filters 32a, 32b, 32c, and 32n, a multiplexer 33, and an analog-to-digital (A / D) converter 34. The adders 31a, 31b, 31c, and 31n and the analog filters 32a, 32b, 32c, and 32n will be collectively referred to as adder 31 and analog filter 32.

[0018] An adder 31 and an analog filter 32 are provided for each channel. Each adder 31 adds the analog input signal output from the secondary side of the auxiliary transformer 21 of the corresponding channel to the monitoring signal B output from the monitoring signal source 58, and outputs the sum to the analog filter 32 of the corresponding channel. In this embodiment, the monitoring signal B is a DC voltage.

[0019] Specifically, the adder 31a generates an analog composite signal Aa+B by adding the monitoring signal B to the analog input signal Aa corresponding to the a-phase current signal Ia, and outputs the generated analog composite signal Aa+B to the analog filter 32a. Similarly, the adder 31b generates an analog composite signal Ab+B by adding the monitoring signal B to the analog input signal Ab corresponding to the b-phase current signal Ib, and outputs the generated analog composite signal Ab+B to the analog filter 32b. The adder 31c generates an analog composite signal Ac+B by adding the monitoring signal B to the analog input signal Ac corresponding to the c-phase current signal Ic, and outputs the generated analog composite signal Ac+B to the analog filter 32c. Furthermore, the adder 31n generates an analog composite signal An+B by adding the monitoring signal B to the analog input signal An corresponding to the neutral point current In, and outputs the generated analog composite signal An+B to the analog filter 32n.

[0020] Each analog filter 32 performs filtering on the analog composite signal output from the corresponding adder 31. More specifically, each analog filter 32 is configured as a low-pass filter or band-pass filter that removes high-frequency components from the output signal of the corresponding adder 31 in order to remove aliasing errors during A / D conversion.

[0021] 1, the composite signal that has passed through analog filter 32a will be expressed as Ca=Aa'+B', the composite signal that has passed through analog filter 32b will be expressed as Cb=Ab'+B', the composite signal that has passed through analog filter 32c will be expressed as Cc=Ac'+B', and the composite signal that has passed through analog filter 32n will be expressed as Cn=An'+B'. The prime symbol (') indicates that the waveform of the input signal has been changed by analog filter 32.

[0022] The multiplexer 33 sequentially selects each of the analog composite signals Ca, Cb, Cc, and Cn that have passed through the analog filters 32a, 32b, 32c, and 32n, respectively, and the monitoring signal B that has not passed through an analog filter and is output from the monitoring signal source 58. More specifically, a sample-and-hold circuit (not shown) is provided for each channel before the multiplexer 33, and the multiplexer 33 sequentially selects the signals held in each sample-and-hold circuit. The A / D converter 34 converts the analog signal selected by the multiplexer 33 into a digital signal. Note that multiple A / D converters may be provided to perform A / D conversion in parallel.

[0023] The arithmetic processing unit 40 performs arithmetic processing on the digital composite signal output from the analog input circuit 30. Specifically, the arithmetic processing unit 40 includes a CPU (Central Processing Unit) 41, a RAM (Random Access Memory) 42, a ROM (Read Only Memory) 43, and a rewritable non-volatile storage device 44. These components of the arithmetic processing unit 40, the output terminal of the A / D converter 34, and the control terminal of the monitoring signal source 58 are interconnected via a bus 56.

[0024] The CPU 41 operates according to a program to control the overall operation of the protection relay 10 and also to control the operation of the monitoring signal source 58. The specific operation of the arithmetic processing unit 40 including the CPU 41 will be described later with reference to Figs. 2 to 7.

[0025] The RAM 42 and the ROM 43 are used as main memories for the CPU 41. The storage device 44 is configured by, for example, a hard disk drive (HDD), a solid state drive (SSD), a universal serial bus (USB) memory, etc. The storage device 44 stores programs, setting values ​​for signal processing, etc.

[0026] At least a part of the functions of the arithmetic processing unit 40 may be realized as an electronic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array), or may be realized by combining two or more of a CPU, an ASIC, and an FPGA.

[0027] The I / O unit 50 includes a digital output (D / O) circuit 51, a digital input (D / I) circuit 52, an input device 53, an output device 54, and a communication device 55. These components of the I / O unit 50 are connected to a bus 56 and controlled by the CPU 41.

[0028] Specifically, the digital output circuit 51 and the digital input circuit 52 are interface circuits for inputting and outputting digital signals between the CPU 41 and an external device. For example, the digital output circuit 51 outputs a trip signal to a corresponding circuit breaker in accordance with a command from the CPU 41.

[0029] The input device 53 is a device for providing data, user instructions, etc. to the CPU 41. The input device 53 includes, for example, a keyboard, a mouse, a touch panel, etc.

[0030] The output device 54 is a device for presenting to the user the results of calculations performed by the CPU 41. The output device 54 includes, for example, a display device, a printer, a speaker, etc. The communication device 55 is a device for allowing the CPU 41 to communicate with a CPU of an external device.

[0031] The monitoring signal source 58 generates the monitoring signal B in accordance with instructions from the CPU 41. In this embodiment, the monitoring signal B is a DC voltage as a preferred example, but is not limited to this. A switch SW1 is provided on the output side of the monitoring signal source 58, and the output of the monitoring signal B can be stopped by turning off the switch SW1 in accordance with instructions from the CPU 41.

[0032] [Functional configuration of the calculation processing unit] Fig. 2 is a block diagram showing the functional configuration of the arithmetic processing unit in Fig. 1. Referring to Fig. 2, digital composite signals Ca, Cb, Cc, and Cn and digital monitoring signal B are input to arithmetic processing unit 40 from analog input circuit 30 at every A / D conversion cycle. Digital monitoring signal B is a digital signal obtained by A / D converting analog monitoring signal B output from monitoring signal source 58 without passing through an analog filter. As shown in Fig. 2, arithmetic processing unit 40 includes a signal separation unit 60, a relay calculation unit 61, a signal waveform storage unit 62, a normality confirmation unit 63, and a signal range determination unit 70. These functions are mainly realized by CPU 41 in Fig. 1 executing a program.

[0033] The signal separator 60 separates the a-phase digital composite signal Ca into an input signal component Aa' corresponding to the a-phase current signal Ia and a supervisory signal component B'(a) corresponding to the supervisory signal B. Similarly, the signal separator 60 separates the b-phase digital composite signal Cb into an input signal component Ab' corresponding to the b-phase current signal Ib and a supervisory signal component B'(b) corresponding to the supervisory signal B, and separates the c-phase digital composite signal Cc into an input signal component Ac' corresponding to the c-phase current signal Ic and a supervisory signal component B'(c) corresponding to the supervisory signal B. Furthermore, when an auxiliary transformer 21n for detecting the neutral point current In is provided, the signal separator 60 separates the zero-phase digital composite signal Cn into an input signal component An' corresponding to the neutral point current In and a supervisory signal component B'(n) corresponding to the supervisory signal B.

[0034] The relay calculation unit 61 performs various protective relay calculations based on the input signal component Aa' corresponding to the a-phase current signal Ia, the input signal component Ab' corresponding to the b-phase current signal Ib, the input signal component Ac' corresponding to the c-phase current signal Ic, and the input signal component An' corresponding to the neutral point current In output from the signal separation unit 60, thereby determining whether or not a fault has occurred in the protected range of the transmission line 1.

[0035] When a fault is detected by the relay calculation unit 61, the signal waveform storage unit 62 stores time-series data (i.e., signal waveforms) of the input signal components Aa', Ab', Ac', and An' for a predetermined period including the time point at which the fault occurred. More specifically, the signal waveform storage unit 62 normally stores and constantly updates the time-series data of the input signal components Aa', Ab', Ac', and An' from the present time up to a predetermined period prior. When a power transmission line fault occurs, the signal waveform storage unit 62 stops updating the data a certain time after the fault occurred, thereby retaining the data for the predetermined period including the time point at which the fault occurred. The signal waveform storage unit 62 corresponds, for example, to the RAM 42 or the storage device 44 of the calculation processing unit 40 in FIG. 1.

[0036] The normality confirmation unit 63 determines whether the analog filter 32 is normal based on the monitoring signal components B'(a), B'(b), B'(c), and B'(n) output from the signal separation unit 60 and the A / D converted monitoring signal B that has not passed through the analog filter. Furthermore, the normality confirmation unit 63 determines whether the monitoring signal source 58 and the A / D converter 34 are normal based on the A / D converted monitoring signal B that has not passed through the analog filter.

[0037] The signal range determination unit 70 is provided to confirm that the analog composite signal, obtained by superimposing the monitoring signal B on each of the analog input signals Aa, Ab, Ac, and An, does not exceed the full-scale range of the analog input circuit 30. When a fault occurs in the power system, the amplitude of the analog input signal of the faulty phase increases, and there is a possibility that at least one analog composite signal will exceed the full-scale range of the analog input circuit 30. If the analog composite signal exceeds the full-scale range of the analog input circuit 30, the signal will be clipped, preventing accurate calculation processing in the relay calculation unit 61 and the normality confirmation unit 63, and the waveform stored in the signal waveform storage unit 62 will differ from the actual waveform.

[0038] Specifically, the signal range determination unit 70 determines whether the digital composite signals Ca, Cb, Cc, and Cn input from the analog input circuit 30 are within a limit range determined according to the full-scale range of the analog input circuit 30. If the result of this determination is that at least one digital composite signal is outside the limit range, the signal range determination unit 70 stops the output of the monitoring signal B from the monitoring signal source 58 (i.e., turns off the switch SW1) and then restores the output of the monitoring signal B after a predetermined stop period has elapsed (i.e., turns on the switch SW1). The stop period is set based on the expected duration of the power system fault. As an example, the stop period is set to several to approximately 10 cycles of the fundamental wave of the power system.

[0039] For example, let us say that the full-scale range of the analog input circuit 30 is -Ln to +Lp, and the limit range is set, for example, to -Ln x 0.9 to +Lp x 0.9 (90% of full scale). In this case, if the value of at least one digital composite signal exceeds the upper limit of Lp x 0.9 or the lower limit of -Ln x 0.9, the signal range determination unit 70 will suspend the output of the supervisory signal B from the supervisory signal source 58 for a specified suspension period. As a result, the analog composite signals Ca, Cb, Cc, and Cn are prevented from exceeding the full-scale range of the analog input circuit 30 in the event of a power system failure.

[0040] It is also possible to avoid providing the signal range determination unit 70 with the above configuration and instead use the input converter 20 to sufficiently reduce the amplitudes of the analog input signals Aa, Ab, Ac, and An so that the analog composite signals Ca, Cb, Cc, and Cn fall within the full-scale range of the analog input circuit 30 even during a power system failure. However, if the amplitudes of the analog input signals Aa, Ab, and Ac are reduced too much, another problem occurs in that the required dynamic range cannot be secured. In this embodiment, providing the signal range determination unit 70 with the above configuration makes it possible to minimize the loss of the dynamic range of the digital signal after A / D conversion.

[0041] 2, the signal range determination unit 70 includes an a-phase determination unit 71a, a b-phase determination unit 71b, a c-phase determination unit 71c, a zero-phase determination unit 71n, an OR circuit 72, and a recovery timer 73. In the following description, the zero-phase is also referred to as the n-phase.

[0042] The a-phase determination unit 71a determines whether the a-phase digital composite signal Ca is outside a limited range (for example, whether it exceeds 90% of the full scale FS) determined in accordance with the full-scale range of the analog input circuit 30. If the a-phase digital composite signal Ca is outside the limited range, the a-phase determination unit 71a asserts its output signal (corresponding to "1" and a high level in this embodiment).

[0043] Similarly, the b-phase determination unit 71b determines whether the b-phase digital composite signal Cb is outside the limit range determined in accordance with the full-scale range of the analog input circuit 30 (for example, whether it exceeds 90% of the full scale FS). If the b-phase digital composite signal Cb is outside the limit range, the b-phase determination unit 71b asserts its output signal. The c-phase determination unit 71c determines whether the c-phase digital composite signal Cc is outside the limit range determined in accordance with the full-scale range of the analog input circuit 30 (for example, whether it exceeds 90% of the full scale FS). If the c-phase digital composite signal Cc is outside the limit range, the c-phase determination unit 71c asserts its output signal. The zero-phase determination unit 71n determines whether the n-phase digital composite signal Cn is outside the limit range determined in accordance with the full-scale range of the analog input circuit 30 (for example, whether it exceeds 90% of the full scale FS). If the n-phase digital composite signal Cn is outside the limit range, the zero-phase determination unit 71n asserts its output signal.

[0044] The OR circuit 72 calculates the logical sum of the output signals from the a-phase determination unit 71a, the b-phase determination unit 71b, the c-phase determination unit 71c, and the zero-phase determination unit 71n. Therefore, when at least one of the digital composite signals Ca, Cb, Cc, and Cn is outside the limit range, the output signal of the OR circuit 72 is asserted. The recovery timer 73 outputs an asserted signal (in this embodiment, "1" and a high level) from the assertion of the output signal of the OR circuit 72 until a recovery time T1 has elapsed. The recovery time T1 corresponds to the stop period of the aforementioned monitoring signal B and is set, for example, to be equal to or longer than the duration of the system fault.

[0045] The output signal of the signal range determination unit 70 (i.e., the output signal of the recovery timer 73) is output to the signal separation unit 60, the supervisory signal source 58, and the switch SW1. While the output signal of the signal range determination unit 70 is asserted, the switch SW1 is turned off, thereby stopping the output of the supervisory signal B from the supervisory signal source 58 and changing the processing content of the signal separation unit 60. Details of the signal processing of the signal separation unit 60 will be described later with reference to FIGS. 3 to 7.

[0046] [Signal separation unit operation - when monitoring signal is output (part 1)] Next, the operation of the signal separation unit 60 in Fig. 2 will be described. First, the operation of the signal separation unit 60 when the output signal of the signal range determination unit 70 is not asserted (i.e., when supervisory signal B is being output) will be described with reference to Figs. 3 and 4. Next, the operation of the signal separation unit 60 when the output signal of the signal range determination unit 70 is asserted (i.e., when supervisory signal B is not being output) will be described with reference to Figs. 5 to 7.

[0047] Fig. 3 is a block diagram showing a first operation example of the signal separator shown in Fig. 2 when a monitoring signal is being output. Fig. 3 illustrates a case where the a-phase, b-phase, and c-phase digital composite signals Ca, Cb, and Cc are input from the analog input circuit 30, but the digital composite signal Cn corresponding to the zero-phase current is not input from the analog input circuit 30.

[0048] 3, the signal separation unit 60 includes an a-phase monitoring signal calculation unit 80a, a b-phase monitoring signal calculation unit 80b, and a c-phase monitoring signal calculation unit 80c, as well as an a-phase input signal calculation unit 81a, a b-phase input signal calculation unit 81b, and a c-phase input signal calculation unit 81c. In addition to the configuration of the signal separation unit 60, Fig. 3 also shows a relay calculation unit 61, a signal waveform storage unit 62, and a normality confirmation unit 63.

[0049] When x=a, b, or c, the x-phase monitoring signal calculation unit 80x is configured as a digital filter that extracts a frequency component corresponding to the monitoring signal B (i.e., the monitoring signal component B'(x)) from the x-phase digital composite signal Cx. In this case, the frequency of the monitoring signal B must be different from the frequency of the fundamental wave of the power system. In this embodiment, a DC signal is used as the monitoring signal B.

[0050] Specifically, when the supervisory signal B is a DC signal, the x-phase supervisory signal calculation unit 80x calculates, for example, [Cx(t)+Cx(t-180°)] / 2 …(1) The monitoring signal component B'(t) can be extracted by performing the calculation shown above. In the above formula (1), Cx(t) is the x-phase digital composite signal at the current time, and Cx(t-180°) is the x-phase digital composite signal at a time point a half cycle of the fundamental wave of the power system before the current time. The normality confirmation unit 63 confirms the normality of the A / D converter 34 by comparing the monitoring signal B, which has been A / D converted without passing through the analog filter 32, with the set value of the output signal level of the monitoring signal source 58. The normality confirmation unit 63 further confirms the normality of the x-phase analog filter 32x by comparing the monitoring signal B, which has been A / D converted without passing through the analog filter 32, with the monitoring signal component B'(x) output from the x-phase monitoring signal calculation unit 80x.

[0051] When x=a, b, or c, the x-phase input signal calculation unit 81x subtracts the monitoring signal component B′(x) extracted by the corresponding x-phase monitoring signal calculation unit 80x from the x-phase digital composite signal Cx, i.e., Cx-B'(x) …(2) The x-phase input signal component Ax′ is calculated by performing the following calculation. The calculated x-phase input signal component Ax′ is used for relay calculation in the relay calculation unit 61 and is also stored in the signal waveform storage unit 62.

[0052] Here, when a power system fault occurs, the voltage and current of the power system contain DC components. Therefore, it is important to note that the monitoring signal component B' cannot be extracted using a digital filter such as that shown in equation (1) above. Therefore, the input signal calculation unit 81x stores the monitoring signal component B'(x) extracted immediately before the occurrence of a power system fault, and when a power system fault occurs, it uses this stored monitoring signal component B'(x) to calculate the input signal component Ax'.

[0053] Using a DC signal as the monitoring signal B has the following advantages. First, the comparison monitoring signal B does not need to pass through the analog filter 32. When a harmonic signal of the power system's fundamental wave is used as the monitoring signal B, the shape of the monitoring signal B itself is also changed by the analog filter 32. Therefore, the monitoring signal B to be compared with the monitoring signal component B'(x) extracted from the x-phase digital composite signal Cx must also pass through the analog filter 32. In this case, the difference in characteristics between the analog filter 32x that passes the x-phase digital composite signal Cx and the analog filter 32 that passes the comparison monitoring signal B must also be taken into consideration. Note that when a D / A (Digital-to-Analog) converter is used to generate a high-frequency signal as the monitoring signal B under the control of the CPU 41, the waveform of the monitoring signal B after passing through the analog filter 32 can be obtained by digital processing by the CPU 41. However, the high-frequency signal as the monitoring signal B must be subjected to the same transfer function as the analog filter 32, which complicates the processing.

[0054] On the other hand, when a DC signal is used as the monitoring signal B and the analog filter 32 is configured as a low-pass filter, the shape of the monitoring signal B itself is hardly changed by the analog filter 32. This has the advantage that the monitoring signal B for comparison does not need to pass through the analog filter 32.

[0055] Secondly, there is an advantage that the normality of the monitoring signal source 58 and the A / D converter 34 can be confirmed by using the monitoring signal B for comparison that has been A / D converted without passing through the analog filter 32.

[0056] [Signal separation unit operation - when monitoring signal is output (part 2)] Fig. 4 is a block diagram showing a second example of operation of the signal separator 60 in Fig. 2 when a monitoring signal is being output. Fig. 4 shows the operation of the signal separator 60 when a digital composite signal Cn corresponding to three times the zero-phase current is input from the analog input circuit 30, along with digital composite signals Ca, Cb, and Cc corresponding to the a-phase, b-phase, and c-phase current signals.

[0057] The signal separation unit 60 in Fig. 4 differs from the signal separation unit 60 in Fig. 3 in that it further includes a zero-phase monitoring signal calculation unit 80n and a zero-phase input signal calculation unit 81n. In the following description, the zero phase will also be referred to as the n-phase. The zero-phase monitoring signal calculation unit 80n calculates a monitoring signal component B'(n) using digital composite signals Ca, Cb, and Cc corresponding to the a-phase, b-phase, and c-phase current signals and a digital composite signal Cn corresponding to three times the zero-phase current signal.

[0058] Specifically, the analog input signals Aa, Ab, Ac corresponding to the a-phase, b-phase, and c-phase current signals and the analog input signal An corresponding to three times the zero-phase current signal are as follows: Aa+Ab+Ac=An …(3) Therefore, the analog input signals Aa', Ab', Ac', and An' that have passed through the analog filter 32 also have the following relationship: Aa'+Ab'+Ac'=An' …(4) The zero-phase-phase monitoring signal calculation unit 80n uses the above formula (4) and the definitions of Ca=Aa'+B', Cb=Ab'+B', Cc=Ac'+B', and Cn=An'+B' to obtain the following formula: [Ca+Cb+Cc-Cn] / 2=B' …(5) The monitoring signal component B' is calculated according to the following equation. Equation (5) always holds true whether or not the power system is in a fault state.

[0059] 4, the x-phase input signal calculation unit 81x calculates the x-phase input signal component Ax' by subtracting the monitoring signal component B'(n) output from the zero-phase monitoring signal calculation unit 80n from the x-phase digital composite signal Cx, where x = a, b, c, or n. This allows the input signal component Ax' corresponding to the x-phase current signal to be calculated in the same way regardless of whether or not there is a fault in the power system.

[0060] 4, the normality confirmation unit 63 confirms the normality of the analog filter 32 by using the monitoring signal component B'(n) output from the zero-phase-phase monitoring signal calculation unit 80n and the monitoring signal B that has been A / D converted without passing through the analog filter 32. Since equation (5) always holds regardless of whether or not there is a fault in the power system, the normality confirmation unit 63 can confirm the normality of the analog filter 32 even when there is a fault in the power system.

[0061] [Signal separation unit operation - when monitoring signal output is stopped] 2, a case will be described in which the output signal of the signal range determination unit 70 is asserted, i.e., the supervisory signal B is not being output from the supervisory signal source 58 because the switch SW1 is in the off state. In this case, the digital composite signals Ca, Cb, Cc, and Cn input to the arithmetic processing unit 40 basically do not include the supervisory signal component B' and are composed only of the input signal components Aa', Ab', Ac', and An'. Therefore, when x = a, b, c, or n, the signal separation unit 60 does not need to separate the x-phase digital composite signal Cx into the input signal component Ax' and the supervisory signal component B'.

[0062] However, immediately after the monitoring signal B switches from the output state to the stopped state, the digital composite signal Cx contains a transient response signal based on the transfer function of the analog filter 32. Therefore, immediately after the monitoring signal B switches from the output state to the stopped state, the signal separation unit 60 calculates the input signal component Ax by subtracting the transient response signal based on the transfer function of the analog filter 32 from the digital composite signal Cx.

[0063] Also, immediately after the supervisory signal B returns from a stopped state to an output state, the waveform of the supervisory signal B' that has passed through the analog filter 32 changes due to the transient response based on the transfer function of the analog filter 32. Therefore, the signal separation unit 60 corrects the supervisory signal component B' contained in the digital composite signal Cx that is input immediately after the supervisory signal B returns from a stopped state to an output state, by the amount of reduction due to the transient response based on the transfer function of the analog filter 32. This will be described in detail below with reference to FIGS. 5 to 7.

[0064] Fig. 5 shows various signal waveforms during a time period that includes a period during which the supervisory signal is not active. Specifically, from top to bottom, Fig. 5 shows the instantaneous waveform of the analog input signal Ax (x = a, b, c) input to the analog input circuit 30, the waveform obtained by superimposing the supervisory signal B on the analog input signal Ax, the output signal of the signal range determination unit 70 shown in Fig. 2, the supervisory signal B output from the supervisory signal source 58, and the supervisory signal B' after passing through the analog filter 32. The superimposed waveform of the analog input signal Ax and the supervisory signal B is expressed as a percentage [%] relative to the full scale FS of the analog input circuit 30. The supervisory signal B and its filtered signal waveform B' are expressed as a percentage [%] relative to the output voltage of the supervisory signal source 58.

[0065] 2, the signal range determination unit 70 compares the digital composite signal Cx (x=a, b, c) with the upper and lower limit values ​​of a limited range determined according to the full-scale range of the analog input circuit 30. In FIG. 5, the upper limit value of the limited range is shown as a threshold value.

[0066] 5, at time t1, the instantaneous value of a signal (Ax+B) obtained by superimposing monitoring signal B on analog input signal Ax exceeds the threshold, so the output of signal range determination unit 70 switches from "0" to "1" (i.e., is asserted). The state in which the output of signal range determination unit 70 is asserted continues for recovery time T1 of recovery timer 73 (i.e., from time t1 to time t2).

[0067] At time t1, the output of the signal range determination unit 70 switches from "0" to "1," i.e., a stop command is issued, thereby stopping the output of the supervisory signal B. Specifically, as shown in FIG. 5, the magnitude of the supervisory signal B changes from 100% to 0% at time t1. That is, at time t1, the signal in which the supervisory signal B is superimposed on the analog input signal Ax is no longer output from the analog input circuit 30. On the other hand, after passing through the analog filter 32, a transient response based on the transfer function of the analog filter 32 occurs in the supervisory signal B' for a while after time t1. Therefore, the signal separation unit 60 in FIG. 2 calculates the input signal component Ax' by removing the transient response signal from the digital composite signal Cx.

[0068] At time t2, the output of the signal range determination unit 70 switches from "1" to "0," i.e., a restoration command is issued, and the output of the supervisory signal B is restored. Specifically, as shown in FIG. 5, the magnitude of the supervisory signal B changes from 0% to 100% at time t2. That is, at time t2, the signal in which the supervisory signal B is superimposed on the analog input signal Ax is again output from the analog input circuit 30. Meanwhile, after passing through the analog filter 32, a transient response based on the transfer function of the analog filter 32 occurs in the supervisory signal B' for a while from time t2. Therefore, the signal separation unit 60 in FIG. 2 corrects the influence of the transient response by adding the amount of reduction in the supervisory signal component B' based on the transient response to the digital composite signal Cx.

[0069] Fig. 6 is an enlarged view of the portion immediately after a stop command in the waveform of the monitoring signal that has passed through the analog filter in Fig. 5. Fig. 7 is an enlarged view of the portion immediately after a return command in the waveform of the monitoring signal that has passed through the analog filter in Fig. 5.

[0070] 6 and 7, data on the transient response waveforms immediately after the stop command and immediately after the return command are stored in advance in the storage device 44 of the arithmetic processing unit 40. When the output signal of the signal range determination unit 70 is asserted, the signal separation unit 60 of the arithmetic processing unit 40 corrects the input digital composite signal Cx based on the data on the transient response waveforms read from the storage device 44.

[0071] [Summary of the operation of the calculation processing unit] 8 is a flowchart showing the operation of the analog input circuit and the arithmetic processing unit of the protection relay. The explanation up to this point will be summarized below with reference to FIG.

[0072] In step S10, the analog input circuit 30 receives a plurality of analog input signals Ax (x=a, b, c, or n) corresponding to the voltage or current of the power system.

[0073] In the next step S20, each adder 31x of the analog input circuit 30 generates an analog composite signal Ax+B by superimposing the common monitoring signal B on the corresponding analog input signal Ax.

[0074] In the next step S30, each of the generated multiple analog composite signals Ax+B passes through the analog filter 32x of the corresponding analog input circuit 30.

[0075] In the next step S40, the A / D converter 34 of the analog input circuit 30 sequentially A / D converts Ax'+B' that has passed through each analog filter 32x, thereby generating a plurality of digital composite signals Cx=Ax'+B'.

[0076] In the next step S50, the signal range determination unit 70 of the arithmetic processing unit 40 determines whether each of the plurality of digital composite signals Cx is within a limited range according to the full scale of the analog input circuit 30. If the result of the above determination is that all of the digital composite signals Cx are within the limited range (NO in step S60), the process proceeds to step S70.

[0077] In step S70, the signal separator 60 of the arithmetic processing unit 40 separates the digital composite signal Cx into an input signal component Ax' and a supervisory signal component B'.

[0078] In the next step S80, the relay calculation unit 61 of the calculation processing unit 40 performs relay calculation using the input signal component Ax', and the normality confirmation unit 63 of the calculation processing unit 40 confirms the normality of the analog input circuit 30 using the monitoring signal component B'.

[0079] On the other hand, if the result of the determination in step S50 is that at least one digital composite signal Cx is outside the limit range (YES in step S60), the process proceeds to step S90.

[0080] In step S90, the signal range determination unit 70 of the calculation processing unit 40 stops the output of the monitoring signal B from the monitoring signal source 58. The signal separation unit 60 removes from the digital composite signal Cx a signal due to a transient response of the analog filter 32 caused by an output change of the monitoring signal B immediately after the output of the monitoring signal B is stopped.

[0081] In the next step S100, the relay calculation unit 61 performs relay calculation using the digital composite signal Cx (same as the input signal Ax') from which the transient response signal has been removed.

[0082] In the next step S110, the signal range determination unit 70 restores the output of the supervisory signal B from the supervisory signal source 58 after the suspension period of the supervisory signal B has elapsed. The signal separation unit 60 corrects the supervisory signal component B' contained in the digital composite signal Cx for waveform changes due to the transient response of the analog filter 32 caused by the output change of the supervisory signal B immediately after the restoration of the supervisory signal. Then, the process proceeds to steps S70 and S80.

[0083] [effect] As described above, according to the protection relay 10 of this embodiment, when at least one of the plurality of digital composite signals Cx input from the analog input circuit 30 is not within a limit range determined according to the full-scale range of the analog input circuit 30, the output of the monitoring signal B from the monitoring signal source 58 is stopped. As a result, even when a signal with a relatively large amplitude that occurs when a fault occurs in the power system or the like is input to the analog input circuit 30, the range of the composite signal onto which the monitoring signal B is superimposed can be kept within the full-scale range of the analog input circuit 30 while ensuring the dynamic range of the input signal.

[0084] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) a supervisory signal source for generating a supervisory signal; an analog input circuit that receives analog input signals of a plurality of channels, each of which represents a voltage value or a current value of a power system, generates a plurality of analog composite signals by adding the monitoring signal to each of the plurality of analog input signals, and generates a plurality of digital composite signals by passing each of the generated plurality of analog composite signals through a corresponding analog filter and then performing analog-to-digital conversion on each of the generated plurality of analog composite signals using an analog-to-digital converter; a calculation processing unit that performs calculation processing on the plurality of digital composite signals, The arithmetic processing unit a signal range determination unit that stops output of the monitoring signal from the monitoring signal source when at least one of the plurality of digital composite signals is not within a limited range determined according to a full-scale range of the analog input circuit.

[0085] (Appendix 2) 2. The protective relay of claim 1, wherein the monitoring signal is a DC signal.

[0086] (Appendix 3) The arithmetic processing unit a signal separator that separates each of the plurality of digital composite signals into an input signal component representing a corresponding analog input signal and a supervisory signal component corresponding to the supervisory signal while the supervisory signal is being output; a relay calculation unit that performs a relay calculation based on the input signal component; and a normality confirmation unit that confirms normality of the analog filter by comparing the monitoring signal component with the monitoring signal that has been analog-to-digital converted without passing through the analog filter.

[0087] (Appendix 4) the signal separation unit removes, immediately after the output of the supervisory signal is stopped, a signal due to a transient response of the analog filter caused by an output change of the supervisory signal from each of the plurality of digital composite signals; The protective relay according to claim 3, wherein the relay calculation unit performs relay calculation using the plurality of digital composite signals from which signals due to the transient response have been removed while output of the monitoring signal is stopped.

[0088] (Appendix 5) 5. The protective relay according to claim 3, wherein the signal separation unit corrects a deformation of the monitoring signal component caused by a transient response of the analog filter resulting from a change in the output of the monitoring signal immediately after the output of the monitoring signal is restored from a stopped state.

[0089] (Appendix 6) The protective relay according to any one of appendixes 3 to 5, wherein the normality confirmation unit confirms the normality of the monitoring signal source and the analog-to-digital converter using the monitoring signal that has been analog-to-digital converted without passing through the analog filter.

[0090] (Appendix 7) The signal separation unit a supervisory signal calculation unit that calculates the supervisory signal component by extracting a DC component from a corresponding digital composite signal among the plurality of digital composite signals using a digital filter; an input signal calculation unit that calculates the input signal component by subtracting the calculated monitoring signal component from a corresponding digital composite signal among the plurality of digital composite signals, The protective relay according to any one of appendices 3 to 6, wherein the input signal calculation unit calculates the input signal component during a fault in the power system using the monitoring signal component calculated immediately before the fault occurs.

[0091] (Appendix 8) the power system is a three-phase power system; The plurality of analog input signals are a first analog input signal corresponding to a first current signal obtained from a current transformer of a first phase; a second analog input signal corresponding to a second current signal obtained from the current transformer of the second phase; a third analog input signal corresponding to a third current signal obtained from the current transformer of a third phase; a fourth analog input signal corresponding to a signal obtained by adding together the first current signal, the second current signal, and the third current signal; the analog input circuit generates a first digital composite signal, a second digital composite signal, a third digital composite signal, and a fourth digital composite signal by passing the signals obtained by adding the monitoring signal to the first analog input signal, the second analog input signal, the third analog input signal, and the fourth analog input signal through an analog filter and then performing analog-to-digital conversion on the signals; The signal separation unit a supervisory signal calculation unit that generates the supervisory signal component by dividing a signal obtained by subtracting the fourth digital composite signal from a signal obtained by adding the first digital composite signal, the second digital composite signal, and the third digital composite signal; and an input signal calculation unit that calculates the input signal component by subtracting the calculated monitoring signal component from a corresponding digital composite signal among the plurality of digital composite signals.

[0092] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of this application is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0093] 1 transmission line, 2 current transformer, 10 protection relay, 20 input converter, 21 auxiliary transformer, 30 analog input circuit, 31 adder, 32 analog filter, 33 multiplexer, 34 A / D converter, 40 calculation processing unit, 41 CPU, 42 RAM, 43 ROM, 44 storage device, 50 I / O unit, 51 digital output circuit, 52 digital input circuit, 53 input device, 54 output device, 55 communication device, 56 bus, 58 monitoring signal source, 60 signal separation unit, 61 relay calculation unit, 62 signal waveform memory unit, 63 normality confirmation unit, 70 signal range determination unit, 71a a phase determination unit, 71b b phase determination unit, 71c c phase determination unit, 72 OR circuit, 73 recovery timer, 80x monitoring signal calculation unit, 81x input signal calculation unit, Ax input signal, B monitoring signal, Cx Digital composite signal, Ix current signal, SW1 switch, T1 recovery time.

Claims

1. a supervisory signal source for generating a supervisory signal; an analog input circuit that receives analog input signals of a plurality of channels, each of which represents a voltage value or a current value of a power system, generates a plurality of analog composite signals by adding the monitoring signal to each of the plurality of analog input signals, and generates a plurality of digital composite signals by passing each of the generated plurality of analog composite signals through a corresponding analog filter and then performing analog-to-digital conversion on each of the generated plurality of analog composite signals using an analog-to-digital converter; a calculation processing unit that performs calculation processing on the plurality of digital composite signals, The arithmetic processing unit a signal range determination unit that stops output of the monitoring signal from the monitoring signal source when at least one of the plurality of digital composite signals is not within a limited range determined according to a full-scale range of the analog input circuit.

2. The protective relay according to claim 1 , wherein the monitoring signal is a DC signal.

3. The arithmetic processing unit a signal separator that separates each of the plurality of digital composite signals into an input signal component representing a corresponding analog input signal and a supervisory signal component corresponding to the supervisory signal while the supervisory signal is being output; a relay calculation unit that performs a relay calculation based on the input signal component; 3. The protective relay according to claim 2, further comprising: a normality confirmation unit that confirms normality of the analog filter by comparing the monitoring signal component with the monitoring signal that has been analog-to-digital converted without passing through the analog filter.

4. the signal separation unit removes, immediately after the output of the supervisory signal is stopped, a signal due to a transient response of the analog filter caused by an output change of the supervisory signal from each of the plurality of digital composite signals; The protective relay according to claim 3 , wherein the relay calculation unit performs relay calculation using the plurality of digital composite signals from which the signal due to the transient response has been removed while output of the monitoring signal is stopped.

5. 5. The protective relay according to claim 4, wherein the signal separator corrects a deformation of the monitoring signal component caused by a transient response of the analog filter resulting from an output change of the monitoring signal immediately after output of the monitoring signal is restored from a stopped state.

6. The protective relay according to any one of claims 3 to 5, wherein the normality confirmation unit confirms normality of the monitoring signal source and the analog-to-digital converter using the monitoring signal that has been analog-to-digital converted without passing through the analog filter.

7. The signal separation unit a supervisory signal calculation unit that calculates the supervisory signal component by extracting a DC component from a corresponding digital composite signal among the plurality of digital composite signals using a digital filter; an input signal calculation unit that calculates the input signal component by subtracting the calculated monitoring signal component from a corresponding digital composite signal among the plurality of digital composite signals, The protective relay according to any one of claims 3 to 5, wherein the input signal calculation unit calculates the input signal component during a fault in the power system using the monitoring signal component calculated immediately before the fault occurs.

8. the power system is a three-phase power system; The plurality of analog input signals are a first analog input signal corresponding to a first current signal obtained from a current transformer of a first phase; a second analog input signal corresponding to a second current signal obtained from the current transformer of the second phase; a third analog input signal corresponding to a third current signal obtained from the current transformer of a third phase; a fourth analog input signal corresponding to a signal obtained by adding together the first current signal, the second current signal, and the third current signal; the analog input circuit generates a first digital composite signal, a second digital composite signal, a third digital composite signal, and a fourth digital composite signal by passing the signals obtained by adding the monitoring signal to the first analog input signal, the second analog input signal, the third analog input signal, and the fourth analog input signal through an analog filter and then performing analog-to-digital conversion on the signals; The signal separation unit a supervisory signal calculation unit that generates the supervisory signal component by dividing a signal obtained by subtracting the fourth digital composite signal from a signal obtained by adding the first digital composite signal, the second digital composite signal, and the third digital composite signal; and and an input signal calculation unit that calculates the input signal component by subtracting the calculated monitoring signal component from a corresponding digital composite signal among the plurality of digital composite signals.

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