Method of manufacturing wiring board

By forming resin layers and selectively polishing to achieve a flat metal film surface, the method addresses the issue of uneven metal film thickness due to varying through-hole densities, enhancing the reliability of the wiring board connections.

JP2025169793APending Publication Date: 2025-11-14IBIDEN CO LTD
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Patent Information

Application Number
JP2024074915
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-02
Publication Date
2025-11-14

AI Technical Summary

Technical Problem

The difference in through-hole density on a core substrate leads to variations in metal film thickness, which reduces the reliability of connections between components and the wiring board.

Method used

A method involving the formation of a first resin layer to fill recesses in the metal film, followed by partial polishing to expose thicker portions, and subsequent formation of a second resin layer with selective polishing to achieve a flat metal film surface.

Benefits of technology

This method reduces surface unevenness of the metal film, enhancing the reliability of connections and preventing interfacial peeling, thereby improving the overall reliability of the wiring board.

✦ Generated by Eureka AI based on patent content.

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Abstract

To reduce undulation of a metal film due to variance in a thickness of the metal film on a front face side of an insulated substrate.SOLUTION: A method of manufacturing a wiring board includes: preparing a laminate including an insulated substrate comprising a first face and a second face which is an opposite face of the first face, a plurality of through-holes penetrating the first face and the second face, and a metal film formed on each of the first face and the second face and inside of the through-holes; forming a first resin layer filling a recess on a surface of the metal film on the metal film on the first face and the second face; performing first polishing for polishing the first resin layer, thereby partially exposing the metal film in a portion where the metal film is relatively thick and leaving the first resin layer on a portion where the metal film is relatively thin; forming a second resin layer on the first resin layer on the portion where the metal film is relatively thin; and performing second polishing by which the second resin layer, the first resin layer and the metal film are polished, thereby exposing the metal film having a flat top face.SELECTED DRAWING: Figure 2I
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Description

[Technical Field]

[0001] The disclosed technology relates to a method for manufacturing a wiring board. [Background technology]

[0002] Patent Document 1 discloses a wiring board formed by alternately laminating build-up insulating layers and build-up wiring layers on the top and bottom surfaces of a core substrate having a large number of through holes, and having a semiconductor element connection pad area in the center of the top surface where a large number of semiconductor element connection pads are arranged in a grid pattern. This wiring board has a first area in the center opposite the semiconductor element connection pad formation area of ​​the core substrate, where a first group of through holes is arranged at a first arrangement density, and a second area in the outer periphery of the core substrate, where a second group of through holes is arranged at a second arrangement density lower than the first arrangement density. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-192432 Summary of the Invention [Problem to be solved by the invention]

[0004] In the wiring board disclosed in Patent Document 1, when a core substrate is provided with a first region and a second region having different through-hole density arrangements, the difference in arrangement density is likely to cause a difference in the thickness of the metal film on the surface of the core substrate. For example, in the first region where the through-hole density is high, the thickness of the metal film is likely to be thinner than the thickness of the metal film in the second region. The difference in thickness of the metal film can reduce the reliability of the connection between the mounted components and the wiring board. [Means for solving the problem]

[0005] A method for manufacturing a wiring board according to the present disclosure includes preparing a laminate having an insulating substrate having a first surface and a second surface opposite to the first surface, a plurality of through holes penetrating between the first surface and the second surface, and metal films formed on each of the first surface and the second surface and inside the through holes; forming a first resin layer on the metal film on the first surface and the second surface to fill recesses in the surface of the metal film; performing a first polishing to polish the first resin layer to partially expose the metal film in a relatively thick portion and to leave the first resin layer on the relatively thin portion of the metal film; forming a second resin layer on the first resin layer on the relatively thin portion of the metal film; and performing a second polishing to polish the second resin layer, the first resin layer, and the metal film to expose the metal film having a flat upper surface.

[0006] According to the embodiment of the present disclosure, it is possible to reduce the unevenness of the surface of the metal film due to variations in thickness of the metal film on the surface side of the insulating substrate, thereby suppressing a decrease in the reliability of the connection between the wiring substrate including the metal film and the mounted components. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view showing an example of a wiring board manufactured by a wiring board manufacturing method according to a first embodiment of the present disclosure. [Figure 2A] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2B] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2C] 1A to 1C are plan views illustrating an example of a method for manufacturing a wiring substrate according to a first embodiment of the present disclosure. [Figure 2D] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2E] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2F]1A to 1C are plan views illustrating an example of a method for manufacturing a wiring substrate according to a first embodiment of the present disclosure. [Figure 2G] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2H] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2I] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2J] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2K] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2L] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2M] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2N] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2O] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2P] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 3A] 10A to 10C are cross-sectional views showing an example of a method for manufacturing a wiring board according to a second embodiment of the present disclosure. [Figure 3B] 10A to 10C are cross-sectional views showing an example of a method for manufacturing a wiring board according to a second embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, an example of an embodiment of the present disclosure will be described with reference to the drawings.

[0009] FIG. 1 is a cross-sectional view showing a wiring board 100, which is an example of a wiring board manufactured by a wiring board manufacturing method according to a first embodiment. To facilitate understanding of the first embodiment, the structure of the wiring board 100 will first be described. Note that the wiring board 100 is merely an example of a wiring board manufactured by a wiring board manufacturing method according to the first embodiment (hereinafter simply referred to as the "method of the first embodiment"). The layered structure and the number of conductor layers and insulating layers of a wiring board manufactured by the method of the first embodiment are not limited to the layered structure of the wiring board 100 shown in FIG. 1 and the number of conductor layers and insulating layers included in the wiring board 100. In addition, in the drawings referred to in the following description, characteristic portions may be drawn enlarged to facilitate understanding of the disclosed embodiments, and the components may not be drawn to exact proportions with respect to size or length.

[0010] As shown in FIG. 1, the wiring board 100 includes a core substrate 1, buildup layers 2 laminated on both sides of the core substrate 1, and solder resist 3 formed on each buildup layer 2. The core substrate 1 includes an insulating layer 10 having a first surface 1a and an opposite second surface 1b, and conductor layers 11 formed on each of the first surface 1a and the second surface 1b. The insulating layer 10 includes a reinforcing material 10a formed of, for example, glass fiber or aramid nonwoven fabric. The insulating layer 10 includes through-hole conductors 16 connecting the conductor layers 11 on both sides. The through-hole conductors 16 are filled with a filler 17 containing, for example, epoxy resin. The conductor layer 11 has a multilayer structure and includes, from the insulating layer 10 side, a metal foil 12, a metal film 13 (first metal film) including a lower metal film 131 and an upper metal film 132, and a metal film 15 (second metal film). Each of these metal films may further have a multilayer structure.

[0011] Buildup layers 2 are laminated on the first surface 1a and the second surface 1b of the insulating layer 10. Each buildup layer 2 includes an insulating layer 2a, a conductor layer 21, an insulating layer 2b, and a conductor layer 22, which are laminated in this order from the core substrate 1 side, and also includes via conductors 23 that penetrate each insulating layer. The via conductor 23 that penetrates the insulating layer 2a connects the conductor layer 11 to the conductor layer 21, and the via conductor 23 that penetrates the insulating layer 2b connects the conductor layer 21 to the conductor layer 22. Each via conductor 23 is formed integrally with the conductor layer 21 or the conductor layer 22. The conductor layers 21 and 22 and the via conductor 23 are formed of a material having appropriate conductivity, such as copper or nickel. The insulating layers 2a and 2b are formed using a thermosetting or thermoplastic resin having appropriate insulating properties, such as an epoxy resin, a bismaleimide triazine resin (BT resin), a phenolic resin, a fluororesin, or a liquid crystal polymer (LCP).

[0012] The solder resist 3 has openings 3a that expose the conductor pads of the conductor layer 22. The solder resist 3 is made of, for example, a photosensitive epoxy resin or a polyimide resin.

[0013] Taking the case of manufacturing wiring board 100 of FIG. 1 as an example, the method of manufacturing the wiring board of the first embodiment will be described below with reference to FIGS. 2A to 2P and continuing to refer to FIG.

[0014] 2A to 2C, the method of the first embodiment includes providing an insulating substrate 1c having a first surface 1a and a second surface 1b opposite to the first surface 1a with a through-hole 16a penetrating between the first surface 1a and the second surface 1b. The insulating substrate 1c constitutes the insulating layer 10 (see FIG. 1) of the wiring board 100 to be manufactured.

[0015] In the description of the method of the first embodiment, the side farther from the insulating substrate 1c (i.e., the insulating layer 10 of the wiring substrate 100) in the thickness direction of the insulating substrate 1c (i.e., the thickness direction of the wiring substrate 100) is also referred to as the "outside," "upper side," or "upper," or simply "upper." On the other hand, the side closer to the insulating substrate 1c is also referred to as the "inside," "lower side," or "lower," or simply "lower." Furthermore, in each conductor layer, the conductor pattern contained in each conductor layer, and each insulating layer, the surface facing away from the insulating substrate 1c is also referred to as the "upper surface," and the surface facing the insulating substrate 1c is also referred to as the "lower surface." The thickness direction of the insulating substrate 1c is also referred to as the "Z direction."

[0016] As shown in FIG. 2A, an insulating substrate 1c is prepared, having a first surface 1a and a second surface 1b opposite the first surface 1a. In the example of FIG. 2A, in which a wiring board 100 is manufactured, metal foils 12 are bonded to two main surfaces (first surface 1a and second surface 1b) of the insulating substrate 1c that are perpendicular to the thickness direction. For example, a double-sided copper-clad laminate may be prepared as the insulating substrate 1c having metal foils 12 on both sides. However, the metal foil 12 is not limited to copper and may be made of any metal with appropriate conductivity, such as nickel. Furthermore, the insulating substrate 1c prepared by the method of this embodiment does not necessarily have to have metal foil 12. Alternatively, the metal foil 12 and the insulating substrate 1c, which are separately prepared, may be bonded to each other by thermocompression bonding or by adhesion using an adhesive.

[0017] The insulating substrate 1c may have any thickness. For example, the insulating substrate 1c may have a thickness of 0.8 mm or more and 2.5 mm or less. Examples of materials for the insulating substrate 1c include thermosetting resins such as epoxy resin, BT resin, and phenolic resin, but the material for the insulating substrate 1c is not limited to these. In the example of FIG. 2A, the insulating substrate 1c includes a reinforcing material (core material) 10a. Examples of the reinforcing material 10a include glass fiber, aramid fiber, and aramid nonwoven fabric, but the material for the reinforcing material 10a is not limited to these. The insulating substrate 1c may further include a filler (not shown) made of particles such as silicon dioxide or alumina.

[0018] As shown in Figures 2B and 2C, through-holes 16a are formed through insulating substrate 1c. Figure 2C is a plan view showing the upper surface of metal foil 12 on the first surface 1a side of insulating substrate 1c shown in Figure 2B. Figure 2B is a cross-sectional view of insulating substrate 1c taken along line IIB-IIB in Figure 2C. In the example of Figures 2B and 2C, multiple through-holes 16a are formed that penetrate not only insulating substrate 1c but also metal foil 12 on both sides thereof. Through-holes 16a can be formed by any method, such as drilling or laser processing using laser light such as a carbon dioxide laser.

[0019] The through holes 16a are formed at positions where through-hole conductors 16 (see FIG. 2E) will be formed in a later process. The through holes 16a are formed to have any inner diameter depending on, for example, the electrical characteristics required of the wiring board to be manufactured. For example, the through holes 16a may have an inner diameter of 100 μm or more and 250 μm or less. Although the term "inner diameter" is used for convenience, the planar shape of the through holes 16a formed in the method of the first embodiment is not limited to a circular or elliptical shape, and the through holes 16a may have any planar shape. In addition, in the description of the method of the first embodiment, the "planar shape" refers to the shape of each object as seen in a planar view, and the "planar view" refers to the view of each object from a line of sight along the thickness direction of the wiring board 100 (see FIG. 1) or the insulating substrate 1c.

[0020] As shown in FIG. 2C, in the examples of FIGS. 2B and 2C, the plurality of through holes 16a are not uniformly formed in the insulating substrate 1c in a plan view. The insulating substrate 1c has regions with a large number of through holes 16a per unit area (i.e., regions with a high density of through holes 16a) and regions with a small number of through holes 16a per unit area (i.e., regions with a low density of through holes 16a). Specifically, the insulating substrate 1c has a high-density portion A, which is a region surrounded by a two-dot chain line, as a region with a large number of through holes 16a per unit area (i.e., a high-density region). The insulating substrate 1c also has a low-density portion B, which is a region other than the high-density portion A, as a region with a small number of through holes 16a per unit area (i.e., a non-high-density region). The high-density portion A has the through holes 16a formed at a higher density than the low-density portion B. For example, the high-density portion A has 6 through holes / mm2 More than 25 pieces / mm 2 The through holes 16a are formed at a density of 0 / mm or less in the low density portion B. 2 More than 5 pieces / mm 2 The through holes 16a are formed at a density of 0 / mm or less. In the low-density portion B, which is a non-high-density region, the through holes 16a are formed particularly sparsely (low-density region). 2 More than 3 pieces / mm 2 The through holes 16a may be formed at the following density.

[0021] For example, a high density portion A is formed in the center of the insulating substrate 1c in a plan view, and a low density portion B is formed around the insulating substrate 1c, that is, on the edge side of the insulating substrate 1c.

[0022] After the through-holes 16a are formed, resin residue (smear) in the through-holes 16a is preferably removed by a desmear treatment using, for example, a solution containing alkaline permanganate.

[0023] As shown in FIGS. 2D and 2E, the method of the first embodiment further includes forming a metal film 13 (first metal film) on each of the first surface 1a and the second surface 1b of the insulating substrate 1c and inside each through-hole 16a. In the example of FIGS. 2D and 2E, a lower-layer metal film 131 and an upper-layer metal film 132 are formed, thereby forming a two-layer metal film 13. The lower-layer metal film 131 and the upper-layer metal film 132 that constitute the metal film 13 are both formed so as to be continuous from each of the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of each through-hole 16a. Examples of metals used to form the lower-layer metal film 131 and the upper-layer metal film 132 include copper and nickel. However, these metal films may be formed of any metal having appropriate conductivity other than copper and nickel.

[0024] 2D, first, a lower metal film 131 is formed on the entire exposed surface of the metal foil 12 on each of the first and second surfaces 1a and 1b of the insulating substrate 1c, as well as on the entire inner wall surface of each through-hole 16a. The lower metal film 131 is formed, for example, by electroless plating or sputtering. The lower metal film 131 can be formed by any method capable of forming a metal film on both an insulator such as epoxy resin and a conductor such as the metal foil 12.

[0025] Next, as shown in FIG. 2E , an upper-layer metal film 132 is formed on the lower-layer metal film 131. The upper-layer metal film 132 is formed on the entire exposed surface of the lower-layer metal film 131, for example, by electrolytic plating using the lower-layer metal film 131 as a power supply layer. That is, as the upper-layer metal film 132, an electrolytic plated film is formed continuously from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inner surface of each through hole 16a. As a result, a metal film 13 including the lower-layer metal film 131 and the upper-layer metal film 132 is formed. In this way, forming the metal film 13 in the method of the first embodiment may include forming, by electrolytic plating, a plated film that is continuous from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of each through hole 16a.

[0026] Through-hole conductor 16 made of lower-layer metal film 131 and upper-layer metal film 132 (i.e., metal film 13) is formed in through-hole 16a. Unlike the example of Fig. 2E, through-hole conductor 16 may be formed as a pillar having no hollow portion, with through-hole 16a filled with metal film 13. Furthermore, surface 13a of metal film 13 may be roughened by oxidation treatment (so-called blackening treatment) using a chemical solution, if necessary.

[0027] 2E and 2F, the method of the first embodiment includes preparing a laminate 91 having an insulating substrate 1c, a plurality of through holes 16a, and a metal film 13. Specifically, the laminate 91 has an insulating substrate 1c having a first surface 1a and a second surface 1b, a plurality of through holes 16a penetrating between the first surface 1a and the second surface 1b, and a metal film 13 formed on the first surface 1a and the second surface 1b and inside the through holes 16a.

[0028] When forming the metal film 13, various factors can cause the metal film 13 to be formed without a uniform thickness, resulting in variations in the thickness of the metal film 13 within the surface to be plated (e.g., the surface of the metal foil 12 and the inner wall surface of the through hole 16a). For example, when the metal film 13 is formed by electroless plating or electrolytic plating in which the insulating substrate 1c is immersed in a plating solution, uneven flow of the plating solution can cause variations in the growth rate of the plating film, resulting in variations in the thickness of the metal film 13. Furthermore, when the metal film 13, for example, the upper-layer metal film 132 thereof, is formed by electrolytic plating as described above, variations in the electric field within the surface to be plated can cause variations in the thickness of the upper-layer metal film 132.

[0029] As described above, the upper-layer metal film 132 is continuously formed from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of the through-holes 16a. Therefore, for example, variations in the number of through-holes 16a per unit area (i.e., the arrangement density of the through-holes 16a) can cause variations in the electric field when the upper-layer metal film 132 is formed by electroplating. That is, in the low-density portion B, where the number of through-holes 16a per unit area is small, the area of ​​the plated surface is smaller by the number of through-holes 16a compared to the high-density portion A, where the number of through-holes 16a per unit area is large. As a result, the electric field tends to concentrate in the low-density portion B, and thus a relatively thick plating film tends to be formed. On the other hand, a relatively thin plating film tends to be formed in the high-density portion A. For example, the metal film 13, which is composed of the upper-layer metal film 132 and the like, tends to be relatively thick in the low-density portion B, while the metal film 13, which is composed of the upper-layer metal film 132 and the like, tends to be relatively thin in the high-density portion A. If there is a variation in thickness of the metal film 13 formed of the upper metal film 132 and the like, then undulations corresponding to the difference in thickness may occur on the surface 13a of the metal film 13 opposite to the metal foil 12.

[0030] 2E, as shown in FIGS. 2E and 2F, in the high-density region A, where the number of through holes 16a per unit area is greater than in other regions, recesses 4 are formed that are recessed closer to the metal foil 12 than the surrounding low-density region B. FIG. 2F is a plan view showing the top surface of the upper-layer metal film 132 on the first surface 1a side of the insulating substrate 1c shown in FIG. 2E. The cross-sectional view of the insulating substrate 1c taken along line IIE-IIE in FIG. 2F corresponds to FIG. 2E. The recesses 4 in the examples of FIGS. 2E and 2F are formed across the multiple through holes 16a so as to overlap with the multiple through holes 16a in a plan view.

[0031] As described above, the unevenness of the surface 13a of the metal film 13 can lead to a decrease in reliability due to interfacial peeling within a wiring board, such as the wiring board 100 (see FIG. 1) that includes the metal film 13, and a decrease in the mounting reliability of components connected to the wiring board. However, according to the method of the first embodiment, the surface 13a of the metal film 13 is planarized in a later process, as will be described below. Therefore, a decrease in the reliability of the wiring board 100 itself and its mounting reliability can be prevented.

[0032] As shown in FIG. 2G, the method of the first embodiment includes forming a first resin layer 5 on the metal film 13 on the first surface 1a and the second surface 1b of the insulating substrate 1c, filling the recesses 4 on the surface 13a of the metal film 13. In the method of the first embodiment, forming the first resin layer 5 may include forming the first resin layer 5 on the entire surface 13a of the metal film 13. For example, the first resin layer 5 is formed by printing a first resin (e.g., an appropriate resin such as an epoxy resin). For example, the first resin is applied to each side of the metal film 13 by printing, thereby forming the first resin layer 5 on the metal film 13 on both sides of the laminate 91. Note that instead of printing, the first resin may be applied to each side of the metal film 13, thereby forming the first resin layer 5 on the metal film 13 on both sides of the laminate 91. Alternatively, for example, the first resin layer 5 may be formed by applying heat and pressure to resin sheets made of the first resin on both sides of the metal film 13 to thermocompression bond the resin sheets to the metal film 13.

[0033] The first resin layer 5 is formed of any resin (first resin in the first embodiment), for example, a thermosetting resin such as epoxy resin or BT resin, or a thermoplastic resin such as fluororesin or LCP. The first resin layer 5 may be formed of the same resin as the resin constituting the insulating substrate 1c. However, from the viewpoint of ease of processing in subsequent steps, a first resin layer 5 that does not contain a reinforcing material such as the reinforcing material 10a contained in the insulating substrate 1c is preferred. From the viewpoint of reliability, it is preferable that the first resin layer 5 has a thermal expansion coefficient that is equal to or close to that of the insulating substrate 1c being used, and more preferably, a thermal expansion coefficient that is equal to or close to the thermal expansion coefficient in the Z direction of the insulating substrate 1c.

[0034] In the example shown in FIG. 2G, the inside of the through-hole 16a (the inside of the through-hole conductor 16) is filled with a portion of the first resin constituting the first resin layer 5. The first resin filling the through-hole 16a forms a filler 17. In this manner, forming the first resin layer 5 in the method of the first embodiment may include filling the inside of the through-hole 16a with a portion of the first resin constituting the first resin layer 5. When the through-hole 16a is filled with a portion of the first resin constituting the first resin layer 5 in this manner, a first resin layer 5 containing an inorganic filler (not shown), such as silicon dioxide or alumina, may be preferable in terms of matching the thermal expansion coefficient of the insulating substrate 1c. Filling the through-hole 16a also makes it possible to form a via conductor 23 (see FIG. 2P) directly above the through-hole conductor 16 in a later process, for example.

[0035] As shown in FIG. 2H , the method of the first embodiment includes performing a first polishing process to polish the first resin layer 5, thereby partially exposing the metal film 13 in a relatively thick portion of the metal film 13. In the example shown in FIG. 2H , performing a first polishing process to polish the first resin layer 5 partially exposes the metal film 13 covered by the first resin layer 5. For example, the first resin layer 5 is polished to expose the surface 13a of the relatively thick portion of the metal film 13 in the low-density portion B, i.e., the portion of the surface 13a that is higher than the insulating substrate 1c or the metal foil 12. In the example shown in FIG. 2H , the first polishing process is performed to expose the surface 13a in a portion other than the recess 4 (i.e., the portion other than the inside of the recess 4 including the high-density portion A). A portion (remaining portion 51) of the first resin layer 5 remains in the recess 4 including the high-density portion A.

[0036] The first polishing can be performed by any method capable of removing a portion of the first resin layer 5 in the thickness direction. For example, the first polishing may be performed by mechanical polishing such as sanding with a belt sander or buffing with a ceramic buff roll, or by chemical polishing using a soluble plasma gas, or by chemical mechanical polishing (CMP) which is a combination of these.

[0037] 2H, the first polishing is performed until the portions of the surface 13a of the metal film 13 other than the recesses 4 are exposed. Although the first polishing may be continued after the portions other than the recesses 4 are exposed, the remaining portions 51 of the resin layer 5 remaining in the recesses 4 and the metal film 13 therearound are not polished evenly due to the difference in physical properties between the two. Therefore, it is preferable to end the first polishing when the portions of the surface 13a other than the recesses 4 are exposed.

[0038] As shown in FIG. 2I, the method of the first embodiment includes forming a second resin layer 64 on the first resin layer 5 in the high-density portion A, which is a portion where the metal film 13 is relatively thin. The method of the first embodiment also includes forming a second resin layer 64 on the first resin layer 5 on the metal film 13 in the high-density portion A on the first surface 1a, which is one surface of the insulating substrate 1c. For example, a mask 62 having a plurality of openings 62a that open only in the high-density portion A is used to perform mask printing of a second resin, which is the material for the second resin layer 64. For example, the plurality of openings 62a are provided at positions corresponding to the plurality of through-hole conductors 16. By mask printing, the second resin layer 64 is formed on the first resin layer 5 on the metal film 13. For example, the second resin layer 64 is formed on the first resin layer 5 (e.g., the remaining portion 51) remaining in the recess 4 including the high-density portion A.

[0039] The second resin, which is the material of the second resin layer 64, is preferably a resin that is difficult to peel off from the first resin layer 5 because it is in contact with the first resin layer 5, and is preferably the same resin as that of the first resin layer 5. For example, the second resin is formed of a thermosetting resin such as an epoxy resin or a BT resin, or a thermoplastic resin such as a fluororesin or an LCP.

[0040] 2J and 2K, the method of the first embodiment includes performing a second polishing to polish the second resin layer 64 and the first resin layer 5, thereby exposing the metal film 13 covered by the second resin layer 64 and the first resin layer 5. The method of the first embodiment also includes performing a second polishing to polish the second resin layer 64 and the first resin layer 5 on the first surface 1a side, which is one surface of the insulating substrate 1c, thereby exposing the metal film 13 covered by the second resin layer 64 and the first resin layer 5.

[0041] The second polishing can be performed by any method capable of removing a portion of the second resin layer 64 and the first resin layer 5 in the thickness direction. For example, mechanical polishing may be performed as the second polishing. For example, as shown in FIG. 2J, buffing may be performed by rotating a ceramic buff roll 66. The second polishing exposes the metal film 13 covered by the second resin layer 64 and the first resin layer 5. At this time, since the metal film 13 is relatively thick in the low-density portion B, the second polishing continues polishing the metal film 13 in the low-density portion B while protecting the metal film 13 in the high-density portion A with the second resin layer 64. The second polishing is performed until the metal film 13 in the high-density portion A is exposed. As a result, as shown in FIG. 2K, the variation in height of the surface 13a of the metal film 13 relative to the insulating substrate 1c on the first surface 1a side, which is one surface of the insulating substrate 1c, can be reduced, and the undulations of the surface 13a of the metal film 13 can be reduced.

[0042] As shown in FIG. 2K, the method of the first embodiment includes forming a second resin layer 64 on the first resin layer 5 on the metal film 13 in the high-density portion A where the thickness of the metal film 13 is relatively thin on the second surface 1b side, which is the other surface of the insulating substrate 1c. For example, the process of forming the second resin layer 64 may be repeated as with the first surface 1a side. For example, as with the first surface 1a side, a mask 62 having a plurality of openings 62a that expose only the high-density portion A is used to perform mask printing of the second resin, which is the material for the second resin layer 64. By mask printing, the second resin layer 64 is formed on the first resin layer 5 on the metal film 13 on the second surface 1b side. For example, the second resin layer 64 is formed on the first resin layer 5 (e.g., the remaining portion 51) remaining in the recess 4 including the high-density portion A.

[0043] 2L and 2M, the method of the first embodiment includes performing a second polishing on the second surface 1b, which is the other surface of the insulating substrate 1c, to polish the second resin layer 64 and the first resin layer 5, thereby exposing the metal film 13 covered by the second resin layer 64 and the first resin layer 5. For example, the second polishing step may be repeated in the same manner as on the first surface 1a.

[0044] For example, mechanical polishing may be performed as the second polishing. For example, the second polishing process may be repeated in the same manner as on the first surface 1a. For example, as shown in FIG. 2L, buffing may be performed by rotating a ceramic buff roll 66. The second polishing exposes the metal film 13 covered by the second resin layer 64 and the first resin layer 5 on the second surface 1b, which is the other surface of the insulating substrate 1c. Because the metal film 13 is relatively thick in the low-density portion B, the second polishing continues polishing the metal film 13 in the low-density portion B while protecting the metal film 13 in the high-density portion A with the second resin layer 64. The second polishing is performed until the metal film 13 in the high-density portion A is exposed. As a result, as shown in FIG. 2M, the height variation of the surface 13a of the metal film 13 relative to the insulating substrate 1c can be reduced on the second surface 1b, which is the other surface of the insulating substrate 1c, and the undulations of the surface 13a of the metal film 13 can be reduced.

[0045] By making surface 13a of metal film 13 flat with few undulations or irregularities, it becomes easy to form a fine wiring pattern on a conductor layer (for example, conductor layer 11 in FIG. 1) including metal film 13. This may prevent a decrease in reliability of the wiring board due to interfacial peeling between the insulating layer formed on metal film 13 and the conductor layer, or a decrease in reliability of mounting components on the wiring board.

[0046] 1 is manufactured, the method of the first embodiment may include further steps as described below. In the following description, the insulating substrate 1c is also referred to as "insulating layer 10."

[0047] As shown in FIG. 2N, a metal film 15 (second metal film) is formed on the surface 13a of the metal film 13 and on the end face of the filler 17 that fills the inside of the through-hole conductor 16 (i.e., the inside of the through-hole 16a). The metal film 15 can be formed by, for example, electroless plating or sputtering. The metal film 15 may be formed to have a two-layer structure by electroless plating or sputtering, etc., and electrolytic plating using the metal film formed by electroless plating or the like as a power supply layer. By forming the metal film 15 that covers the end face of the filler 17 so as to be in contact with the metal film 13 surrounding the through-hole conductor 16, a via conductor 23 (see FIG. 2P) that is electrically connected to the through-hole conductor 16 can be formed directly above the through-hole conductor 16 in a later process. In other words, the metal film 15 covers the through-hole conductor 16, so-called cap plating. As described above, the method of the first embodiment may further include forming a metal film 15 that covers the end faces of the resin (filler 17 that is part of the first resin that constitutes the first resin layer 5 in FIG. 2G) that fills the inside of the through hole 16a. By forming the metal film 15, a conductor layer 11 made of the metal foil 12, the metal film 13, and the metal film 15 is formed on each of the first surface 1a and the second surface 1b of the insulating layer 10.

[0048] After the metal film 15 is formed, an etching resist R is provided on the metal film 15, for example, by laminating a dry film resist. The etching resist R is exposed using an exposure mask with appropriate openings, and developed to form openings Ra that expose portions other than the portions where the conductor pattern to be formed on the conductor layer 11 is to be formed. Then, the portions of the conductor layer 11 exposed in the openings Ra are removed by, for example, wet etching or dry etching, and the conductor layer 11 is patterned.

[0049] As shown in Fig. 2O, a conductor layer 11 is obtained that includes a desired conductor pattern, such as conductor pads 11a that are through-hole pads for through-hole conductors 16. Portions of the first surface 1a and the second surface 1b of insulating layer 10 that are not covered by conductor layer 11 are exposed. This completes the core substrate 1 of wiring board 100 of Fig. 1.

[0050] As shown in FIG. 2P, buildup layers 2 are formed on both sides of core substrate 1. Buildup layers 2 can be formed by a typical buildup method. For example, insulating layer 2a is formed by laminating a semi-cured epoxy resin, BT resin, or fluororesin molded into a film or sheet on core substrate 1 and thermocompressing it. Conductor layer 21 is formed on insulating layer 2a by any method such as a subtractive method, a semi-additive method, or a full-additive method, and via conductors 23 are formed in insulating layer 2a. Furthermore, insulating layer 2b and conductor layer 22 are formed by the same methods as insulating layer 2a and conductor layer 21, respectively, and via conductors 23 are also formed in insulating layer 2b.

[0051] Then, solder resist 3 is formed on the build-up layer 2. The solder resist 3 is formed by supplying, for example, a photosensitive epoxy resin or polyimide resin by spraying, laminating, printing, or the like. Openings 3a are formed at desired positions by exposure using an exposure mask (not shown) with appropriate openings, development, laser processing, or the like. Through the above steps, the wiring board 100 of FIG. 1 is completed.

[0052] 3A and 3B show an example of a method for manufacturing a wiring board according to a second embodiment of the present disclosure. Also shown in FIGS. 3A and 3B are other examples of forming a first resin layer 5 (see FIG. 2G) and polishing the first resin layer 5 by first polishing (see FIG. 2H) in the method for manufacturing a wiring board according to the first embodiment. In the second embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and their description will be omitted.

[0053] As shown in FIG. 3A, the method of the second embodiment includes forming a first resin layer 85 on the metal film 13 on the first surface 1a and the second surface 1b of the insulating substrate 1c, the first resin layer 85 filling the recesses 4 on the surface 13a of the metal film 13. In the example shown in FIG. 3A, the inside of the through-hole 16a (the inside of the through-hole conductor 16) is filled with a portion of the first resin constituting the first resin layer 85. For example, the first resin layer 85 is formed by printing a first resin (e.g., an appropriate resin such as epoxy resin). For example, the first resin is applied from one surface (e.g., the first surface 1a) of the insulating substrate 1c by printing, thereby forming the first resin layer 85 filling the inside of the through-hole 16a (the inside of the through-hole conductor 16). At this time, the first resin filled inside the through hole 16a (inside the through-hole conductor 16) is ejected onto the other surface (e.g., second surface 1b) of the insulating substrate 1c. This forms a first resin layer 85 that fills the recess 4 on the surface 13a of the metal film 13 on the other surface (e.g., second surface 1b) side of the insulating substrate 1c.

[0054] As shown in FIG. 3B, the method of the second embodiment includes a first polishing step in which the first resin layer 85 is polished to partially expose the metal film 13 in a relatively thick portion of the metal film 13. For example, the first polishing step is performed until a portion of the metal film 13 in a relatively thick portion of the metal film 13 in the low-density portion B is polished. As a result, the metal film 13 in the high-density portion A is covered with the first resin layer 85, and the metal film 13 in the low-density portion B is exposed. That is, a portion of the first resin layer 85 (remaining portion 51) remains in the recess 4 including the high-density portion A. Note that other steps of the method of the second embodiment are similar to those of the first embodiment. That is, by performing steps similar to those of FIGS. 2I to 2P after the example shown in FIG. 3B, a wiring substrate 100 similar to that of the method of the first embodiment is formed.

[0055] The method for manufacturing a wiring board according to the embodiment of the present disclosure is not limited to the method described with reference to the drawings. For example, as described above, a wiring board having any laminated structure and any number of layers can be manufactured by the method for manufacturing a wiring board according to the first embodiment. Furthermore, cap plating (a metal film such as metal film 15 in the example of FIG. 2N) covering the through-hole conductors need not be formed. The method for manufacturing a wiring board according to the first embodiment may include any additional process in addition to the processes described above, or some of the processes described above may be omitted. [Explanation of symbols]

[0056] 1 Core board 1a 1st page 1b 2nd side 1c Insulating substrate 4 recess 5 First resin layer 10 Insulating layer 11 Conductor layer 13 Metal Film 13a surface 16 through-hole conductor 16a Through hole 51 Remaining part 62 Mask 62a opening 64 2nd resin layer 66 Ceramic buff roll 85 1st resin layer 91 Laminated Plate 100 wiring board 131 Lower metal film 132 Upper metal film A High density area B Low density area

Claims

1. preparing a laminate including an insulating substrate having a first surface and a second surface opposite to the first surface, a plurality of through holes penetrating between the first surface and the second surface, and metal films formed on each of the first surface and the second surface and inside the through holes; forming a first resin layer on the metal film on the first surface and the second surface so as to fill recesses in the surface of the metal film; performing a first polishing of the first resin layer to partially expose the metal film in a portion where the thickness of the metal film is relatively thick, and leaving the first resin layer on the portion where the thickness of the metal film is relatively thin; forming a second resin layer on the first resin layer on a portion of the metal film where the thickness is relatively thin; performing a second polishing process to polish the second resin layer, the first resin layer, and the metal film, thereby exposing the metal film having a flat upper surface; A method for manufacturing a wiring board, comprising:

2. 2. The method for manufacturing a wiring board according to claim 1, wherein preparing the laminated plate comprises: forming a high density portion in which the number of the through holes per unit area of ​​the insulating substrate is large and a low density portion in which the number of the through holes per unit area of ​​the insulating substrate is small; The metal film corresponding to the high density portion is made relatively thin, and the metal film corresponding to the low density portion is made relatively thick.

3. In the method for manufacturing a wiring board described in claim 2, preparing the laminated plate includes forming the high-density portion in the center of the insulating substrate when viewed in a plane, and forming the low-density portion on the end side of the insulating substrate.

4. 2. A method for manufacturing a wiring board according to claim 1, wherein forming the second resin layer includes forming the second resin layer on the first resin layer in the portion where the thickness of the metal film is relatively thin by mask printing that opens the portion where the thickness of the metal film is relatively thin.

5. 2. The method for manufacturing a wiring board according to claim 1, wherein forming the second resin layer and performing the second polishing include performing the second polishing on one side of the first surface and the other side of the second surface.

6. 6. The method for manufacturing a wiring board according to claim 5, forming the second resin layer on the first resin layer on the first surface side; performing the second polishing of polishing the second resin layer, the first resin layer, and the metal film on the first surface side to expose the metal film having a flat upper surface; forming the second resin layer on the first resin layer on the second surface side; performing the second polishing of polishing the second resin layer, the first resin layer, and the metal film on the second surface side to expose the metal film having a flat upper surface; in the above order.

7. 2. A method for manufacturing a wiring board according to claim 1, wherein forming the first resin layer includes filling the inside of the through hole having the metal film on its surface with the first resin constituting the first resin layer.

Citation Information

Patent Citations

  • Wiring board

    JP2014192432A