Gate drive circuit and power conversion apparatus

Abstract

To suppress a surge voltage in a switching device and reduce a switching loss.SOLUTION: A gate drive circuit comprises: a voltage detection unit 7 for detecting an inter-terminal voltage between a first terminal and a second terminal of a switching device 1; a delay unit 8 for delaying a detection value of the inter-terminal voltage acquired from the voltage detection unit 7 for a predetermined time and outputting the detection value; and a first OFF drive unit 5 and a second OFF drive unit 6 each for applying a control signal to a control terminal of the switching device 1 when turning off the switching device 1. The first OFF drive unit 5 is capable of turning off the switching device 1 faster than the second OFF drive unit 6 and stops operating when the delayed voltage detection value outputted from the delay unit 8 exceeds a predetermined threshold.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a gate drive circuit and a power conversion device. [Background technology]

[0002] The power conversion device is equipped with power switching devices such as IGBTs (Insulated Gate Bipolar Transistors) and MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), and the desired power conversion is performed by the switching operations of the power switching devices.

[0003] When a power switching device is turned off, a surge voltage and a turn-off loss occur. For example, if the surge voltage generated in the power switching device exceeds the withstand voltage value of the power switching device, the power switching device will be destroyed, causing a failure of the power conversion device. On the other hand, if the turn-off loss increases, the temperature of the power switching device will rise. As a result, if the temperature of the power switching device exceeds the allowable temperature value, the power switching device will be destroyed, causing a failure of the power conversion device.

[0004] Generally, there is a trade-off between surge voltage and turn-off loss in a power switching device. For example, slowing down the turn-off speed of a power switching device reduces surge voltage and increases turn-off loss.

[0005] It has been proposed to reduce the turn-off loss of power switching devices by increasing the switching speed of the power switching devices using new materials such as SiC (silicon carbide).It has also been proposed to reduce the turn-off loss by devising a driving method for the power switching devices. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-34770 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-29378 Summary of the Invention [Problem to be solved by the invention]

[0007] For example, in a power conversion device equipped with a power switching device made of new materials such as SiC, taking into account the delays of each component, there was a risk that the switching of the gate drive speed would not be able to keep up with the switching operation of the power switching device, making it impossible to suppress surge voltages.

[0008] The embodiments of the present invention have been made in consideration of the above circumstances, and an object of the present invention is to provide a gate drive circuit and a power conversion apparatus that suppress surge voltages in switching devices and reduce switching losses. [Means for solving the problem]

[0009] A gate drive circuit according to an embodiment includes a voltage detection unit that detects the inter-terminal voltage between a first terminal and a second terminal of a switching device, a delay unit that delays the detected value of the inter-terminal voltage obtained from the voltage detection unit by a predetermined time and outputs it, and a first off drive unit and a second off drive unit that apply a control signal to the control terminal of the switching device when turning off the switching device, wherein the first off drive unit can turn off the switching device faster than the second off drive unit and stops operating when the delayed voltage detection value output from the delay unit exceeds a predetermined threshold. [Brief explanation of the drawings]

[0010] [Figure 1]FIG. 1 is a diagram schematically illustrating a configuration example of a power conversion device according to a first embodiment. [Figure 2] FIG. 2 is a diagram schematically illustrating an example of the configuration of the gate drive circuit of the first embodiment. [Figure 3] FIG. 3 is a diagram schematically showing the relationship between the resistance value and the surge voltage in the low-speed OFF driver and the high-speed OFF driver shown in FIG. [Figure 4] FIG. 4 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the first embodiment. [Figure 5] FIG. 5 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the second embodiment. [Figure 6] FIG. 6 is a diagram for explaining an example of changes in the characteristics of the switching devices depending on the operating state of the power conversion device. [Figure 7] FIG. 7 is a diagram for explaining another example of changes in the characteristics of the switching devices depending on the operating state of the power conversion device. [Figure 8] FIG. 8 is a diagram for explaining another example of changes in the characteristics of the switching devices depending on the operating state of the power conversion device. [Figure 9] FIG. 9 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the third embodiment. [Figure 10] FIG. 10 is a diagram for explaining an example of an operation in which the delay section switches the operating state between the first off-high speed driver and the second off-high speed driver in the third embodiment. [Figure 11] FIG. 11 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the third embodiment. [Figure 12] FIG. 12 is a diagram schematically illustrating a configuration example of a gate drive circuit according to the fourth embodiment. [Figure 13] FIG. 13 is a diagram for explaining an example of an operation in which the switching unit switches the operating state between the first low-speed OFF driver and the second low-speed OFF driver in the fourth embodiment. [Figure 14]FIG. 14 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the fourth embodiment. [Figure 15] FIG. 15 is a diagram schematically illustrating a configuration example of a gate drive circuit according to the fifth embodiment. [Figure 16] FIG. 16 is a timing chart for explaining an example of the operation of the gate drive circuit when turning on the switching device in the fifth embodiment. [Figure 17] FIG. 17 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the sixth embodiment. [Figure 18] FIG. 18 is a timing chart for explaining an example of the operation of the gate drive circuit when turning on the switching device in the sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, a gate drive circuit and a power conversion device according to an embodiment will be described in detail with reference to the drawings. FIG. 1 is a diagram schematically illustrating a configuration example of a power conversion device according to a first embodiment. The power conversion device of this embodiment includes a plurality of switching devices 1 and a drive circuit 200. The power conversion device is connected, for example, between a DC power supply (or a DC load) not shown and an AC load (or an AC power supply) ACL.

[0012] The power conversion device is, for example, a three-phase AC power conversion device having U-phase, V-phase, and W-phase legs. Each phase leg is connected between a high-potential side DC main circuit and a low-potential side DC main circuit. Each phase leg includes an upper arm and a lower arm, and is electrically connected to an AC load (or AC power supply) ACL between the upper arm and the lower arm (AC end).

[0013] Each of the upper arm and the lower arm includes a switching device 1. The switching device 1 is a power switching device such as an IGBT or a MOSFET, and its operation is controlled by a control signal supplied from a drive circuit 200. The drive circuit 200 controls the operation of the switching devices 1 based on gate signals (higher-level control signals) supplied from a higher-level control device and information acquired from the multiple switching devices 1.

[0014] FIG. 2 is a diagram schematically illustrating an example of the configuration of the gate drive circuit of the first embodiment. The drive circuit 200 includes a plurality of gate drive circuits 2 that control the operation of a plurality of switching devices 1. Fig. 2 shows a schematic configuration example of one gate drive circuit 2 that controls one switching device 1.

[0015] The switching device 1 is, for example, a MOSFET. The switching device 1 has a gate terminal (control terminal), a source terminal (first terminal), and a drain terminal (second terminal). The source terminal of the switching device 1 on the upper arm is electrically connected to an AC terminal, and the drain terminal is electrically connected to a DC main circuit on a high potential side. The source terminal of the switching device 1 on the lower arm is electrically connected to a DC main circuit on a low potential side, and the drain terminal is electrically connected to an AC terminal. The gate terminal of the switching device 1 is electrically connected to an output terminal of the gate drive circuit 2. The switching device 1 is switched between a state in which the source terminal and the drain terminal are electrically connected (on state) and a state in which they are electrically disconnected (off state) by a gate voltage applied to the gate terminal.

[0016] It should be noted that other power switching devices may also be used as the switching device 1. When an IGBT is used as the switching device 1, for example, the switching device 1 includes a gate terminal (control terminal), an emitter terminal (first terminal), and a collector (second terminal), and the electrical connection state (on or off) between the emitter terminal and the collector terminal is controlled by a gate voltage (control signal) applied to the gate terminal.

[0017] The gate drive circuit 2 includes an ON drive unit 4, an OFF high-speed drive unit (first OFF drive unit) 5, an OFF low-speed drive unit (second OFF drive unit) 6, a voltage detection unit 7, and a delay unit 8. The ON driver 4 includes an ON resistor (not shown) electrically connected to the gate terminal of the switching device 1. A gate signal is input from a higher-level control device to the ON driver 4. The ON driver 4 is configured to operate, for example, while the gate signal is ON, and applies a control signal (gate voltage) that turns on the switching device 1 to the gate terminal via the ON resistor.

[0018] The voltage detection unit 7 detects the value of the drain-source voltage (terminal voltage) Vds of the switching device 1, and supplies the detected value to the delay unit 8. The voltage detection unit 7 may also output a value equivalent to the drain-source voltage Vds.

[0019] The delay unit 8 delays the voltage value (or a value equivalent to the voltage) supplied from the voltage detection unit 7 by a predetermined time and supplies it to the OFF-high-speed driver 5. The delay unit 8 has a delay circuit consisting of a resistor 12 and a capacitor 13, and can delay the input value by a time constant corresponding to the product of the capacitance Cd of the capacitor 13 and the resistance Rd of the resistor 12. Therefore, the time for delaying the input value can be adjusted by selecting the values ​​of the capacitance Cd and the resistance Rd. In this embodiment, the delayed drain-source voltage Vds output from the delay unit 8 is a signal for switching the operating state (operation or stop) of the OFF-high-speed driver 5.

[0020] The high-speed off driver 5 includes a first off resistor (not shown) electrically connected to the gate terminal of the switching device 1. A gate signal is input to the high-speed off driver 5 from a higher-level control device, and the delayed value of the drain-source voltage Vds output from the delay unit 8 is input to the high-speed off driver 5. The high-speed off driver 5 is configured to apply a control signal (gate voltage) that turns off the switching device 1 to the gate terminal via the first off resistor, for example, during a period when the gate signal is off.

[0021] The high-speed off driver 5 is configured to stop applying the control signal to the gate terminal when the delayed drain-source voltage Vds becomes equal to or greater than a predetermined threshold (for example, when the delayed drain-source voltage Vds rises).

[0022] In other words, the high-speed off driver 5 applies a control signal to the gate terminal via the first off resistor to turn off the switching device 1 during the period from when the gate signal is turned off until the delayed drain-source voltage Vds rises.

[0023] The OFF slow drive unit 6 includes a second OFF resistor (not shown) electrically connected to the gate terminal of the switching device 1. A gate signal is input to the OFF slow drive unit 6 from a higher-level control device. For example, during a period when the gate signal is OFF, the OFF slow drive unit 6 applies a control signal to the gate terminal via the second OFF resistor to turn off the switching device 1. The resistance value of the second OFF resistor is greater than the resistance value of the first OFF resistor.

[0024] FIG. 3 is a diagram schematically showing the relationship between the resistance value and the surge voltage in the low-speed OFF driver and the high-speed OFF driver shown in FIG. The resistance value of the second off resistor of the low-speed off driver 6 is set, for example, so that the low-speed off driver 6 turns off the switching device 1 at a speed that can reduce the peak surge voltage generated in the switching device 1 to less than an allowable value. The resistance value of the first off resistor of the high-speed off driver 5 is set, for example, so that the high-speed off driver 5 can turn off the switching device 1 faster than the low-speed off driver 6.

[0025] This enables the low-speed off driver 6 to operate so as to suppress the peak surge voltage in the switching device 1 to below the allowable value, and enables the high-speed off driver 5 to operate so as to reduce the turn-off loss in the switching device 1.

[0026] Next, an example of the operation of the gate drive circuit 2 will be described. FIG. 4 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the first embodiment. Here, a timing chart shows an example of the gate signal input to the gate drive circuit 2, the drain-source voltage Vds and gate-source voltage Vgs of the switching device 1, the drain current Id, the output truth value of the voltage detection unit 7, the output truth value of the delay unit 8, the operating state (operating or stopped) of the off-high-speed drive unit 5, and the operating state (operating or stopped) of the off-low-speed drive unit 6.

[0027] The output truth value of the voltage detection unit 7 is, for example, 0 when the detection value of the voltage detection unit 7 is less than a predetermined threshold, and 1 when the detection value is equal to or greater than the predetermined threshold. In this embodiment, the value of the drain-source voltage Vds when the switching device 1 is on is set to the predetermined threshold, and the output truth value becomes 1 when the drain-source voltage Vds rises.

[0028] The output truth value of the delay unit 8 is 0 when the output value of the delay unit 8 is equal to or less than a predetermined threshold, and is 1 when the output value exceeds the predetermined threshold. In this embodiment, the value of the drain-source voltage Vds when the switching device 1 is on is set to the predetermined threshold, and the output truth value becomes 1 when the delayed drain-source voltage Vds rises.

[0029] When the gate signal changes from on to off, the off-high speed driver 5 and the off-low speed driver 6 enter an operating state, and the gate-source voltage Vgs of the switching device 1 begins to decrease. When the gate-source voltage Vgs of the switching device 1 decreases to a predetermined value, the drain-source voltage Vds rises, and the drain current Id begins to decrease. At the timing when the drain-source voltage Vds rises, the output truth value of the voltage detection unit 7 changes from 0 to 1, and the voltage detection unit 7 inputs a voltage value that exceeds a predetermined threshold to the delay unit 8.

[0030] The delay unit 8 outputs the value input from the voltage detection unit 7 with a predetermined delay. Therefore, the output truth value of the delay unit 8 changes from 0 to 1 with a predetermined delay from the timing at which the output truth value of the voltage detection unit 7 rises.

[0031] At the timing when the output truth value of delay unit 8 becomes 1, the output value of delay unit 8 becomes equal to or greater than a predetermined threshold, and high-speed off driver 5 changes from an operating state to a stopped state. That is, until a predetermined delay time has elapsed since the drain-source voltage Vds of switching device 1 exceeded the predetermined threshold, the turn-off operation of switching device 1 is controlled by high-speed off driver 5 and low-speed off driver 6. After the predetermined delay time has elapsed since the drain-source voltage Vds of switching device 1 exceeded the predetermined threshold, the turn-off operation of switching device 1 is controlled only by low-speed off driver 6.

[0032] Through the operation described above, in the initial stage of turn-off, switching device 1 is turned off quickly by high-speed off driver 5 and low-speed off driver 6, thereby reducing turn-off loss. On the other hand, after high-speed off driver 5 goes into a stopped state, switching device 1 is turned off only by low-speed off driver 6, thereby suppressing surge voltage in switching device 1.

[0033] In the gate drive circuit of this embodiment, the rising edge of the drain-source voltage Vds is detected, and the high-speed off driver 5 is stopped a predetermined time after the rising edge is detected. As a result, when the switching device 1 made of a material such as SiC is turned off, the high-speed off driver 5 can be stopped without delay in the middle of high-speed operation and switched to low-speed operation.

[0034] On the other hand, if the timing for stopping the high-speed off driver 5 is too early, the low-speed driving period will be prolonged during the period in which the switching device 1 is turned off, which may increase the turn-off loss. By setting the delay time in the delay unit 8 to an appropriate time and stopping the high-speed off driver 5, it is possible to suppress the turn-off loss of the switching device 1 while also suppressing the surge voltage.

[0035] Next, we will explain an example of a method for setting the delay time in the delay unit 8. Here, it is assumed that the operating conditions of the power conversion device are that the DC voltage (voltage between the DC main circuits) is Vcc [V] and the maximum value of the voltage change rate is dVdtMax [V / s].

[0036] In the turn-off operation of a typical switching device, when the drain-source voltage Vds reaches a DC voltage value (the voltage value when the switching device is completely turned off), the drain current Id begins to drop significantly. The magnitude of the surge voltage depends on the rate of change of the drain current Id at this time. Therefore, in order to reliably suppress the surge voltage, it is preferable to stop the high-speed turn-off driver 5 before the drain-source voltage Vds reaches the DC voltage Vcc. In the above, the time Tvcc at which the drain-source voltage Vds reaches the DC voltage Vcc can be calculated using the following equation (1). Tvcc=Vcc / dVdtMax (1)

[0037] Furthermore, in an actual power conversion device, there is a specific delay in each of the components constituting the voltage detection unit 7, delay unit 8, and high-speed turn-off driver 5. Therefore, considering the total amount of delay (total delay time of each component) Tdevice of each component constituting the power conversion device, by setting the delay time Td of the delay unit 8 to satisfy the following equation (2), it is possible to stop the high-speed turn-off driver 5 before the drain-source voltage Vds reaches the DC voltage Vcc, and it becomes possible to suppress the surge voltage. Td <Tvcc-Tdevice=Vcc / dVdtMax-Tdevice (2)

[0038] Furthermore, by adjusting the delay amount in delay section 8 within a range that satisfies the above relationship, it is possible to adjust the balance between suppressing surge voltage in switching device 1 and suppressing turn-off loss.

[0039] As described above, in the gate drive circuit and power conversion device of this embodiment, the gate drive speed is increased (driven with a low gate resistance value) when the switching device starts to turn off, thereby reducing loss, and on the other hand, after detecting the start of the voltage rise of the switching device, the gate speed is decreased (driven with a high gate resistance value) with an adjusted delay. This makes it possible to reliably reduce the surge voltage in the switching device.

[0040] That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0041] Next, a gate drive circuit and a power conversion device according to a second embodiment will be described in detail with reference to the drawings. In the following description, the same components as those in the first embodiment will be denoted by the same reference numerals and will not be described again. FIG. 5 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the second embodiment. The gate drive circuit 2 and power conversion device of this embodiment differ from those of the first embodiment described above in that they include various detectors (not shown) that detect the operating state of the power conversion device and in the configuration of the delay unit 8.

[0042] In this embodiment, values ​​of the operating state of the power conversion device detected by the detector (for example, detected current value, detected DC voltage value, detected temperature value, etc.) are input to the delay unit 8. The delay unit 8 is configured to adjust the delay time of the output signal relative to the input signal in accordance with the operating state of the power conversion device.

[0043] Fig. 6 is a diagram illustrating an example of changes in the characteristics of a switching device depending on the operating state of a power conversion device. In Fig. 6, the dashed line indicates the drain-source voltage Vds and the drain current Id when the cutoff current (the drain current Id at the start of the turn-off operation) is relatively large, and the solid line indicates the drain-source voltage Vds and the drain current Id when the cutoff current is relatively small.

[0044] Here, the larger the breaking current of the switching device 1, the faster the voltage change rate. Therefore, when the breaking current is larger, the time it takes for the drain-source voltage Vds to rise and reach the DC voltage Vcc when the switching device 1 is turned off becomes shorter. For this reason, the delay unit 8 can be configured to shorten the delay time as the value of the breaking current (the current detection value of the drain current Id at the start of the turn-off operation) becomes larger.

[0045] 7 is a diagram illustrating another example of changes in the characteristics of the switching device depending on the operating state of the power conversion device. In Fig. 7, the dashed lines indicate the drain-source voltage Vds and the drain current Id when the DC voltage Vcc of the power conversion device is relatively high, and the solid lines indicate the drain-source voltage Vds and the drain current Id when the DC voltage Vcc of the power conversion device is relatively low.

[0046] Here, the larger the DC voltage Vcc, the longer the time it takes for the drain-source voltage Vds to reach the DC voltage Vcc. For this reason, the delay unit 8 can be configured to increase the delay time as the DC voltage Vcc increases.

[0047] 8 is a diagram illustrating another example of changes in the characteristics of the switching device depending on the operating state of the power conversion apparatus. In Fig. 8, the dashed lines indicate the drain-source voltage Vds and the drain current Id when the temperature of the switching device 1 is relatively high, and the solid lines indicate the drain-source voltage Vds and the drain current Id when the temperature of the switching device 1 is relatively low.

[0048] Here, the higher the temperature of the switching device 1, the longer the time it takes for the drain-source voltage Vds to reach the DC voltage Vcc. For this reason, the delay unit 8 can be configured to increase the delay time as the detected temperature value of the switching device 1 increases.

[0049] The delay unit 8 may be previously stored with, for example, a plurality of delay times and a threshold value for switching between the plurality of delay times for at least one of the values ​​indicating the operating state of the power conversion device (value of the cutoff current, value of the DC voltage Vcc, and value of the temperature of the switching device 1).The delay unit 8 can acquire at least one of the detected values ​​of the cutoff current, the DC voltage Vcc, and the temperature of the switching device 1 as the operating state of the power conversion device before starting the turn-off operation, and switch the delay time depending on whether the detected value is equal to or greater than the threshold value. The delay unit 8 may adjust the delay time by adding or subtracting a predetermined time to the current delay time depending on whether the value indicating the operating state of the power conversion device is equal to or greater than a predetermined threshold value.

[0050] As described above, according to this embodiment, delay unit 8 can set the optimum delay time to achieve both reduced turn-off loss and suppressed surge voltage depending on the operating state of the power conversion device. As a result, according to the gate drive circuit of this embodiment, the timing at which the operation of high-speed off driver 5 is stopped during the turn-off operation of switching device 1 is adjusted depending on the operating state of the power conversion device, making it possible to achieve both reduced turn-off loss and suppressed surge voltage in each operating state. That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0051] Next, a gate drive circuit and a power conversion device according to a third embodiment will be described in detail with reference to the drawings. In the following description, the same components as those in the first and second embodiments will be denoted by the same reference numerals and will not be described again. FIG. 9 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the third embodiment. The gate drive circuit 2 of this embodiment differs from the gate drive circuits of the first and second embodiments described above in that it includes a first off high-speed drive unit 5A and a second off high-speed drive unit 5B instead of the off high-speed drive unit 5, and the delay unit 8 outputs a signal to each of the first off high-speed drive unit 5A and the second off high-speed drive unit 5B to switch the operating state (operating or stopped).

[0052] The delay unit 8 acquires the operating state of the power conversion device and outputs a signal that switches the operating state of the first off-high-speed driver 5A and the second off-high-speed driver 5B depending on the operating state of the power conversion device. In the following description, the truth value of the signal input from the delay unit 8 to the first off-high-speed driver 5A is referred to as the first output truth value, and the truth value of the signal input from the delay unit 8 to the second off-high-speed driver 5B is referred to as the second output truth value. The signals input from the delay unit 8 to the first off-high-speed driver 5A and the second off-high-speed driver 5B are not limited to binary signals; the truth value is 0 when the signal value is equal to or less than a predetermined threshold, and the truth value is 1 when the signal value exceeds the predetermined threshold.

[0053] The delay unit 8 sets the first high-speed off driver 5A to an operating state (first output truth value = 0) when, for example, the detected value of the drain current Id is less than the current threshold value and the value of the delayed drain-source voltage Vds is less than a predetermined threshold value, and sets the first high-speed off driver 5A to a stopped state (first output truth value = 1) when the detected value of the drain current Id is greater than or equal to the current threshold value and the value of the delayed drain-source voltage Vds exceeds the predetermined threshold value.

[0054] The delay unit 8, for example, sets the second high-speed off driver 5B to an operating state (second output truth value = 0) when the detected value of the drain current Id is equal to or greater than the current threshold and the delayed value of the drain-source voltage Vds is equal to or less than a predetermined threshold, and sets the second high-speed off driver 5B to a stopped state (second output truth value = 1) when the detected value of the drain current Id is less than the current threshold and the delayed value of the drain-source voltage Vds exceeds the predetermined threshold.

[0055] The delay unit 8 acquires values ​​indicating the operating state of the power conversion device (for example, the value of the cut-off current (drain current Id at the start of the turn-off operation), the value of the DC voltage Vcc, and the temperature value of the switching device 1), and can adjust the delay time of the signal to the first high-speed off driver 5A and the delay time of the signal to the second high-speed off driver 5B according to the acquired values.

[0056] The first high-speed off driver 5A and the second high-speed off driver 5B have different speeds (gate resistance values) at which they turn off the switching device 1. The first high-speed turn-off driver 5A includes a third turn-off resistor (not shown) electrically connected to the gate terminal of the switching device 1. A gate signal is input to the first high-speed turn-off driver 5A from a higher-level control device, and a signal for switching the operating state (operating or stopped) output from the delay unit 8 is also input to the first high-speed turn-off driver 5A.

[0057] The first high-speed off driver 5A is configured to stop applying a control signal (gate voltage) to the gate terminal to turn off the switching device 1 via the third off resistor when the first output truth value of the signal input from the delay unit 8 is 1 (for example, when the detected value of the drain current Id is equal to or greater than the current threshold value and when the value of the delayed drain-source voltage Vds exceeds a predetermined threshold value).

[0058] In addition, the first high-speed off driver 5A is configured to apply a control signal (gate voltage) to the gate terminal via the third off resistor to turn off the switching device 1 when the first output truth value of the signal input from the delay unit 8 is 0 (for example, when the detected value of the drain current Id is less than the current threshold value and the value of the delayed drain-source voltage Vds is less than a predetermined threshold value).

[0059] The second high-speed turn-off driver 5B includes a fourth turn-off resistor (not shown) electrically connected to the gate terminal of the switching device 1. A gate signal is input to the second high-speed turn-off driver 5B from a higher-level control device, and a signal for switching the operating state (operating or stopped) is input from the delay unit 8.

[0060] The second high-speed off driver 5B is configured to stop applying a control signal (gate voltage) to turn off the switching device 1 to the gate terminal via the fourth off resistor when the second output truth value of the signal input from the delay unit 8 is 1 (for example, when the detected value of the drain current Id is less than the current threshold value and when the value of the delayed drain-source voltage Vds exceeds a predetermined threshold value).

[0061] In addition, the second high-speed off driver 5B is configured to apply a control signal (gate voltage) to the gate terminal via the fourth off resistor to turn off the switching device 1 when the second output truth value of the signal input from the delay unit 8 is 0 (for example, when the detected value of the drain current Id is equal to or greater than the current threshold value and the value of the delayed drain-source voltage Vds is equal to or less than a predetermined threshold value).

[0062] FIG. 10 is a diagram for explaining an example of an operation in which the delay section switches the operating state between the first off-high speed driver and the second off-high speed driver in the third embodiment. In this embodiment, the resistance value of the third turn-off resistor is smaller than the resistance value of the fourth turn-off resistor, and the first high-speed turn-off driver 5A can turn off the switching device 1 faster than the second high-speed turn-off driver 5B.

[0063] There is a trade-off between the voltage change rate of the drain-source voltage Vds and loss when the switching device 1 is turned off. The voltage change rate of the drain-source voltage Vds when the switching device 1 is turned off by the first high-speed turn-off driver 5A is greater than the voltage change rate of the drain-source voltage Vds when the switching device 1 is turned off by the second high-speed turn-off driver 5B. On the other hand, the loss that occurs when the switching device 1 is turned off by the first high-speed turn-off driver 5A is smaller than the loss that occurs when the switching device 1 is turned off by the second high-speed turn-off driver 5B.

[0064] In the gate drive circuit 2 of this embodiment, for example, the detected current (drain current Id) value at which the voltage change rate of the drain-source voltage Vds reaches an allowable value when the switching device 1 is turned off by the first high-speed off drive unit 5A is set as the current threshold value for the cut-off current, and the signal supplied from the delay unit 8 controls the first high-speed off drive unit 5A to operate when the value of the cut-off current is less than the current threshold value, and the second high-speed off drive unit 5B to operate when the detected current value is equal to or greater than the current threshold value.

[0065] As described above, by switching between the first high-speed off driver 5A and the second high-speed off driver 5B, which have different turn-off speeds, depending on the value of the interruption current, it is possible to suppress the surge voltage when turning off the switching device 1 and reduce the loss that occurs during turn-off.

[0066] FIG. 11 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the third embodiment. Here, a timing chart shows an example of the gate signal input to the gate drive circuit 2, the drain-source voltage Vds and gate-source voltage Vgs of the switching device 1, the drain current Id, the output truth value of the voltage detection unit 7, the first output truth value and the second output truth value of the signal output from the delay unit 8, the operating state (operating or stopped) of the first high-speed off drive unit 5A, the operating state (operating or stopped) of the second high-speed off drive unit 5B, and the operating state (operating or stopped) of the low-speed off drive unit 6.

[0067] In this example, at the timing when the gate signal is turned off, the cutoff current is equal to or greater than the current threshold value, the first output truth value of the signal supplied from the delay unit 8 to the first high-speed off driver 5A is 1, and the first high-speed off driver 5A is stopped. Therefore, in this example, the first high-speed off driver 5A does not perform the turn-off operation of the switching device 1. For example, as described above, at the timing when the gate signal is turned off, the driving unit that turns off the switching device 1 is determined by comparing the current threshold value with the cut-off current, and the result of this comparison is then held, and the turning off of the switching device 1 is completed.

[0068] Furthermore, at the timing when the gate signal is turned off, the cutoff current is equal to or greater than the current threshold, the drain-source voltage Vds is the on-state voltage value (equal to or less than a predetermined threshold), the second output truth value of the signal supplied to the second high-speed off driver 5B is 0, and the second high-speed off driver 5B is in an operating state. After that, when the drain-source voltage Vds rises due to the control signals supplied from the second high-speed off driver 5B and the low-speed off driver 6, the second output truth value becomes 1 after a predetermined time (delay time), and the second high-speed off driver 5B is stopped. Thereafter, the control signal supplied from the OFF slow drive unit 6 completes the turning off of the switching device 1.

[0069] As described above, by switching the operation of the driving unit that turns off the switching device 1 at different speeds depending on the value of the interruption current, it is possible to reduce the turn-off loss and suppress the surge voltage at the same time. That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0070] Although the present embodiment has described a gate drive circuit 2 equipped with two high-speed turn-off drivers, the gate drive circuit 2 may also be equipped with three or more high-speed turn-off drivers. In that case, by setting multiple current thresholds for the cut-off current of the switching device 1 and switching the operating states of the three or more high-speed turn-off drivers, it is possible to obtain the same effects as the gate drive circuit 2 described above.

[0071] Next, a gate drive circuit and a power conversion device according to a fourth embodiment will be described in detail with reference to the drawings. In the following description, the same components as those in the first to third embodiments will be denoted by the same reference numerals and will not be described again.

[0072] FIG. 12 is a diagram schematically illustrating a configuration example of a gate drive circuit according to the fourth embodiment. The gate drive circuit 2 of this embodiment differs from the second embodiment described above in that it includes a first low-speed off drive unit 6A, a second low-speed off drive unit 6B, and a switching unit 17 instead of the low-speed off drive unit 6.

[0073] The first low-speed off driver 6A receives a gate signal and a signal for switching the operation state (operation or stop) from the switching unit 17. The first low-speed off driver 6A executes or stops the operation of turning off the switching device 1 according to the value of the signal from the switching unit 17. The first slow-turn-off driver 6A includes a fifth turn-off resistor (not shown) connected to the gate terminal of the switching device 1, and applies a control signal to the gate terminal of the switching device 1 via the fifth turn-off resistor.

[0074] The second low-speed OFF driver 6B receives a gate signal and a signal for switching the operation state (operation or stop) from the switching unit 17. The second low-speed OFF driver 6B executes or stops the operation of turning off the switching device 1 according to the value of the signal from the switching unit 17. The second slow-speed turn-off driver 6B includes a sixth turn-off resistor (not shown) connected to the gate terminal of the switching device 1, and applies a control signal to the gate terminal of the switching device 1 via the sixth turn-off resistor.

[0075] The first slow-off driver 6A and the second slow-off driver 6B have different speeds at which they turn off the switching device 1. In this embodiment, the first slow-off driver 6A can turn off the switching device 1 faster than the second slow-off driver 6B. In other words, the resistance value (gate resistance value) of the fifth turn-off resistor of the first slow-off driver 6A is smaller than the resistance value (gate resistance value) of the sixth turn-off resistor of the second slow-off driver 6B. The switching unit 17 outputs a signal to switch the operating state between the first low-speed OFF driver 6A and the second low-speed OFF driver 6B in accordance with the operating state of the power conversion device.

[0076] FIG. 13 is a diagram for explaining an example of an operation in which the switching unit switches the operating state between the first low-speed OFF driver and the second low-speed OFF driver in the fourth embodiment. There is a trade-off between the peak surge voltage and loss that occurs when switching device 1 is turned off. The peak surge voltage when switching device 1 is turned off by first slow-off driver 6A is greater than the peak surge voltage when switching device 1 is turned off by second slow-off driver 6B. On the other hand, the loss that occurs when switching device 1 is turned off by first slow-off driver 6A is smaller than the loss that occurs when switching device 1 is turned off by second slow-off driver 6B.

[0077] In the gate drive circuit 2 of this embodiment, for example, the detection current (drain current Id) value at which the peak surge voltage generated when the switching device 1 is turned off by the first low-speed off drive unit 6A reaches an allowable value is set as the current threshold value for the cut-off current, and the first low-speed off drive unit 6A is controlled by a signal supplied from the switching unit 17 to operate when the value of the cut-off current is less than the current threshold value, and the second low-speed off drive unit 6B is controlled to operate when the detection current value is equal to or greater than the current threshold value.

[0078] As described above, by switching between the first slow-off driver 6A and the second slow-off driver 6B, which have different turn-off speeds, depending on the value of the interruption current, it is possible to suppress the surge voltage when turning off the switching device 1 and reduce the loss that occurs during turn-off.

[0079] FIG. 14 is a timing chart for explaining an example of the operation of the gate drive circuit when turning off the switching device in the fourth embodiment. Here, a timing chart shows an example of the gate signal input to the gate drive circuit 2, the drain-source voltage Vds and gate-source voltage Vgs of the switching device 1, the drain current Id, the output truth value of the voltage detection unit 7, the output truth value of the signal output from the delay unit 8, the operating state (operating or stopped) of the off-high speed drive unit 5, the output value state of the switching unit 17, the operating state (operating or stopped) of the first off-low speed drive unit 6A, and the operating state (operating or stopped) of the second off-low speed drive unit 6A.

[0080] In this example, when the gate signal is turned off, the cutoff current is equal to or greater than the current threshold, and the output value of the switching unit 17 is a value that stops the first low-speed off driver 6A and activates the second low-speed off driver 6B. Therefore, in this example, the first low-speed off driver 6A does not turn off the switching device 1. For example, as described above, at the timing when the gate signal is turned off, the driving unit that turns off the switching device 1 is determined by comparing the current threshold value with the cut-off current, and the result of this comparison is then held, and the turning off of the switching device 1 is completed. After the output signal of the delay section 8 stops the turn-off high-speed driver 5, the control signal supplied from the second turn-off low-speed driver 6B completes the turn-off of the switching device 1.

[0081] As described above, by switching the operation of the driving unit that turns off the switching device 1 at different speeds depending on the value of the interruption current, it is possible to reduce the turn-off loss and suppress the surge voltage at the same time. That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0082] In this embodiment, the gate drive circuit 2 is described as having two slow-off drivers, but the gate drive circuit 2 may have three or more slow-off drivers. In that case, by setting multiple current thresholds for the cut-off current of the switching device 1 and switching the operating states of the three or more slow-off drivers, it is possible to obtain the same effect as the gate drive circuit 2 described above.

[0083] Next, a gate drive circuit and a power conversion device according to a fifth embodiment will be described in detail with reference to the drawings. In the following description, the same components as those in the first to fourth embodiments will be denoted by the same reference numerals and will not be described again. FIG. 15 is a diagram schematically illustrating a configuration example of a gate drive circuit according to the fifth embodiment. The gate drive circuit 2 of this embodiment differs from the first embodiment described above in that it includes a short-circuit protection voltage detection unit (second voltage detection unit) 14, a short-circuit protection determination unit (determination unit) 15, and a short-circuit protection cutoff operation unit 16.

[0084] The short-circuit protection voltage detection unit 14 detects the value of the drain-source voltage Vds of the switching device 1 and outputs the detected value to the short-circuit protection determination unit 15. The short-circuit protection determination unit 15 determines whether the switching device 1 is short-circuited based on the gate signal and the value of the drain-source voltage Vds detected by the short-circuit protection voltage detection unit 14. For example, if the drain-source voltage Vds of the switching device 1 does not decrease even though the gate signal is at the on level, the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited. When the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited, it stops the off-high speed driver 5, the off-low speed driver 6, and the on-driver 4, and causes the short-circuit protection cutoff operation unit 16 to forcibly cut off the switching device 1.

[0085] The short-circuit protection cutoff operation unit 16 cuts off the short-circuit path of the switching device 1 in response to a cutoff signal from the short-circuit protection determination unit 15. In this embodiment, when the short-circuit protection cutoff operation unit 16 receives the cutoff signal, it applies a voltage to the gate terminal to turn off the switching device 1.

[0086] FIG. 16 is a timing chart for explaining an example of the operation of the gate drive circuit when turning on the switching device in the fifth embodiment. When the gate signal changes from OFF to ON, the ON driver 4 enters an operating state, and a control signal (gate voltage) is applied from the ON driver 4 to the gate terminal of the switching device 1. The short-circuit protection voltage detection unit 14 detects the value of the drain-source voltage Vds of the switching device 1 and supplies the detected value to the short-circuit protection determination unit 15 .

[0087] The short-circuit protection determination unit 15 determines whether the switching device 1 is short-circuited based on the value of the drain-source voltage Vds supplied from the short-circuit protection voltage detection unit 14 and the value of the gate signal. In the example shown in Fig. 16, the gate signal is turned on, but the drain-source voltage Vds does not drop to the normal value when the switching device 1 is on. In such a case, the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited, for example, when the drain-source voltage exceeds a predetermined threshold value a predetermined time after the gate signal is turned on.

[0088] When the short circuit protection determination unit 15 determines that the switching device 1 is short-circuited, it stops the operation of the off-high speed drive unit 5, the off-low speed drive unit 6, and the on-drive unit 4, and outputs a forced shutdown signal to the short circuit protection shutdown operation unit 16. When receiving the forced shutdown signal from the short circuit protection determination unit 15, the short circuit protection shutdown operation unit 16 turns off the switching device 1. The short circuit protection shutdown operation unit 16 can turn off the switching device 1 at a slower speed than the off-use slow drive unit 6.

[0089] Note that when the switching device 1 is cut off for short circuit protection, it must be cut off at a slow speed to suppress surge voltages because it is an operation to cut off a large current during a short circuit. Therefore, in the gate drive circuit 2 of this embodiment, when cutting off a short circuit, the high-speed off driver 5 and the low-speed off driver 6 are stopped and the cutting operation is performed only by the short-circuit protection cutoff operating unit 16, thereby making it possible to suppress surge voltages during short circuit protection cutoff.

[0090] As described above, the gate drive circuit 2 and the power conversion device of this embodiment can suppress surge voltage even when the switching device 1 is short-circuited and short-circuit protection shutdown is performed. That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0091] Next, a gate drive circuit and a power conversion device according to a sixth embodiment will be described in detail with reference to the drawings. In the following description, the same components as those in the first to fifth embodiments will be denoted by the same reference numerals and will not be described again. FIG. 17 is a diagram schematically illustrating an example of the configuration of a gate drive circuit according to the sixth embodiment. The gate drive circuit 2 of this embodiment differs from that of the first embodiment described above in that it includes a short-circuit protection determination unit 15.

[0092] The voltage detection unit 7 detects the value of the drain-source voltage Vds of the switching device 1, and outputs the detected value to the delay unit 8 and the short-circuit protection determination unit 15. That is, in the gate drive circuit 2 of this embodiment, the voltage detection unit 7 also includes the function of the short-circuit protection voltage detection unit 14 in the above-described fifth embodiment.

[0093] The short-circuit protection determination unit 15 determines whether the switching device 1 is short-circuited based on the gate signal and the value of the drain-source voltage Vds detected by the voltage detection unit 7. For example, if the drain-source voltage Vds of the switching device 1 does not decrease even though the gate signal is at the on level, the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited. When the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited, it stops the off-high-speed driver 5 and the on-driver 4 and causes the off-low-speed driver 6 to forcibly turn off the switching device 1.

[0094] That is, in the gate drive circuit 2 of this embodiment, when it is determined that the switching device 1 is short-circuited, the OFF low-speed drive unit 6 functions as the short-circuit protection cutoff operation unit 16 in the above-described fifth embodiment. FIG. 18 is a timing chart for explaining an example of the operation of the gate drive circuit when turning on the switching device in the sixth embodiment.

[0095] When the gate signal changes from OFF to ON, the ON driver 4 enters an operating state, and a control signal (gate voltage) is applied from the ON driver 4 to the gate terminal of the switching device 1. The voltage detection unit 7 detects the value of the drain-source voltage Vds of the switching device 1 and supplies the detected value to the short-circuit protection determination unit 15 .

[0096] The short-circuit protection determination unit 15 determines whether the switching device 1 is short-circuited based on the value of the drain-source voltage Vds supplied from the voltage detection unit 7 and the value of the gate signal. In the example shown in Fig. 17, the gate signal is turned on and the drain-source voltage Vds temporarily drops, but then the drain-source voltage Vds rises again to become a DC voltage. In such a case, the short-circuit protection determination unit 15 determines that the switching device 1 is short-circuited, for example, if the drain-source voltage exceeds a predetermined threshold value a predetermined time after the gate signal is turned on.

[0097] When the short circuit protection determination unit 15 determines that the switching device 1 is short-circuited, it stops the operation of the OFF high-speed drive unit 5 and the ON drive unit 4 and outputs a forced shut-off signal to the OFF low-speed drive unit 6.

[0098] When the low-speed off driver 6 receives the forced shutoff signal from the short-circuit protection determination unit 15, it turns off the switching device 1. At this time, the low-speed off driver 6 may be configured to turn off the switching device 1 at a slower speed than when the switching device 1 is normally turned off.

[0099] In the gate drive circuit 2 of this embodiment, the OFF low-speed drive unit 6 is given the function of the short-circuit protection cutoff operation unit 16, and the OFF low-speed drive unit 6 performs forced cutoff operation during short-circuit cutoff, making it possible to suppress surge voltage during short-circuit cutoff even without the short-circuit protection cutoff operation unit 16. Furthermore, by giving the voltage detection unit 7 the function of a short-circuit protection voltage detection unit, the short-circuit protection voltage detection unit can be omitted. Therefore, the gate drive circuit 2 of this embodiment can reduce the number of parts compared to the gate drive circuit of the fifth embodiment, thereby reducing costs. That is, according to this embodiment, it is possible to provide a gate drive circuit and a power conversion device that suppress surge voltage in a switching device and reduce switching loss.

[0100] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Appendix 1] a voltage detection unit that detects a terminal voltage between a first terminal and a second terminal of the switching device; a delay unit that delays the detected value of the inter-terminal voltage obtained from the voltage detection unit by a predetermined time and outputs the delayed value; a first OFF driver and a second OFF driver that apply a control signal to a control terminal of the switching device when turning off the switching device; A gate drive circuit in which the first off drive unit can turn off the switching device faster than the second off drive unit, and stops operating when the delayed voltage detection value output from the delay unit exceeds a predetermined threshold. [Appendix 2] 2. The gate drive circuit of claim 1, wherein the delay time in the delay unit is smaller than a value obtained by dividing the value of the inter-terminal voltage when the switching device is completely turned off by a maximum value of a rate of change of the inter-terminal voltage when the switching device is turned off. [Appendix 3] 2. The gate drive circuit according to claim 1, wherein the delay unit acquires a break current of the switching device and adjusts a delay time according to a value of the acquired break current. [Appendix 4] a second voltage detection unit that detects the inter-terminal voltage; a determination unit that determines whether the switching device is short-circuited based on a detection value of the inter-terminal voltage detected by the second voltage detection unit and a value of a higher-level control signal that controls the operation of the switching device, and that stops the first OFF driver and the second OFF driver and outputs a forced shut-off signal when it determines that the switching device is short-circuited; 2. The gate drive circuit according to claim 1, further comprising: a short-circuit protection cutoff operation unit that cuts off the switching device when the forced cutoff signal is received. [Appendix 5] a determination unit that determines whether the switching device is short-circuited based on a detection value of the inter-terminal voltage detected by the voltage detection unit and a value of a higher-level control signal that controls the operation of the switching device, and that stops the first OFF driver and outputs a forced shut-off signal to the second OFF driver when it is determined that the switching device is short-circuited; 2. The gate drive circuit according to claim 1, wherein the second off drive unit turns off the switching device when the forced shut-off signal is received. [Appendix 6] A gate drive circuit according to any one of Supplementary Note 1 to Supplementary Note 5; the switching device whose operation is controlled by a control signal output from the gate drive circuit. [Explanation of symbols]

[0101] 1...switching device, 2...gate drive circuit, 4...on drive section, 5...off high-speed drive section, 5A...off high-speed drive section, 5B...off high-speed drive section, 6...off low-speed drive section, 6A...off low-speed drive section, 6B...off low-speed drive section, 7...voltage detection section, 8...delay section, 12...resistor, 13...capacitor, 14...short-circuit protection voltage detection section, 15...short-circuit protection judgment section, 16...short-circuit protection cut-off operation section, 17...switching section, 200...drive circuit

Claims

1. a first voltage detection unit that detects a first voltage between a first terminal and a second terminal of the switching device and outputs voltage information that is a value of the detected first voltage or a value corresponding to the detected first voltage; a delay unit that delays the voltage information acquired from the first voltage detection unit for a predetermined time; a first turn-off driver that applies a control signal to a control terminal of the switching device to turn off the switching device; a second turn-off driver that applies a control signal to the control terminal of the switching device to turn off the switching device; a second voltage detection unit that detects a second voltage between the first terminal and the second terminal of the switching device; a short-circuit protection cut-off operation unit that cuts off the switching device when it is determined that the switching device is short-circuited based on the second voltage detected by the second voltage detection unit and a value of a higher-level control signal that controls the operation of the switching device, A gate drive circuit, wherein the first off drive unit can turn off the switching device faster than the second off drive unit, and stops operation to turn off the switching device when the voltage information delayed by the delay unit exceeds a predetermined threshold.

2. 2. The gate drive circuit according to claim 1, wherein the short-circuit protection cutoff operation unit is capable of cutting off the switching device at a slower speed than the second turn-off drive unit.

3. The gate drive circuit according to claim 1 , wherein the delay unit acquires a break current of the switching device and adjusts the delay time in accordance with the acquired value of the break current.

4. a determination unit that determines whether the switching device is short-circuited based on the second voltage detected by the second voltage detection unit and a value of a higher-level control signal that controls the operation of the switching device, and that stops the first OFF driver and the second OFF driver and outputs a forced shut-off signal when it determines that the switching device is short-circuited; 2. The gate drive circuit according to claim 1, wherein the short-circuit protection cutoff operation unit cuts off the switching device when the forced cutoff signal is received.

5. a determination unit that determines whether the switching device is short-circuited based on the first voltage detected by the first voltage detection unit and a value of a higher-level control signal that controls the operation of the switching device, and that stops the first OFF driver and outputs a forced shut-off signal to the second OFF driver when it determines that the switching device is short-circuited; The gate drive circuit according to claim 1 , wherein the second off driver turns off the switching device when the second off driver receives the forced shut-off signal.

6. A gate drive circuit according to any one of claims 1 to 5; the switching device whose operation is controlled by a control signal output from the gate drive circuit.

Images