Method for manufacturing nitride semiconductor substrate

By forming nitride semiconductor layers at varying temperatures with adjusted V/III ratios, the method addresses the challenge of maintaining crystallinity and heat dissipation in thin semiconductor layers, resulting in improved substrate quality and device performance.

JP2025175841APending Publication Date: 2025-12-03SUMITOMO ELECTRIC INDUSTRIES LTD
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Patent Information

Application Number
JP2024082138
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-20
Publication Date
2025-12-03

AI Technical Summary

Technical Problem

Conventional semiconductor devices face challenges in maintaining good crystallinity of nitride semiconductor substrates, especially when the semiconductor layer is formed thin, due to increased heat generation from improved operating speeds, which affects heat dissipation.

Method used

A method involving the formation of a first nitride semiconductor layer at a first temperature, followed by a change to a higher second temperature, with a higher V/III ratio for the first layer compared to the second, facilitating denser formation and atomic migration to improve crystallinity, filling any grooves formed in the first layer with the second layer.

Benefits of technology

This approach enhances the crystallinity and flatness of the nitride semiconductor substrate, allowing for thinner semiconductor layers with improved heat dissipation properties.

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Abstract

To provide a method for manufacturing a nitride semiconductor substrate that can improve crystallinity.SOLUTION: A method for manufacturing a nitride semiconductor substrate includes the steps of: forming a first nitride semiconductor layer containing aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer containing aluminum on the first nitride semiconductor layer at the second temperature. A first V / III ratio of a supply amount of a Group V element to a supply amount of a Group III element in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of a supply amount of a Group V element raw material to a supply amount of a Group III element raw material in the step of forming the second nitride semiconductor layer.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a nitride semiconductor substrate. [Background technology]

[0002] Nitride semiconductor substrates are used in semiconductor devices such as gallium nitride (GaN)-based high electron mobility transistors (HEMTs). The nitride semiconductor substrate includes a substrate such as a silicon carbide (SiC) substrate and a nucleation layer such as an aluminum nitride (AlN) layer, and a semiconductor layer such as a channel layer is formed on the nucleation layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-073702 [Patent Document 2] Special Publication No. 2020-530939 [Patent Document 3] Japanese Patent Application Publication No. 2018-206928 Summary of the Invention [Problem to be solved by the invention]

[0004] From the viewpoint of electrical properties such as electron mobility, good crystallinity is desired for the semiconductor layer, and in conventional semiconductor devices, good crystallinity is achieved on the top surface by forming a thick semiconductor layer. However, in recent years, the amount of heat generated has increased along with improvements in the operating speed of semiconductor devices such as HEMTs. Therefore, in order to improve the heat dissipation of semiconductor devices, there is an increasing demand for improved crystallinity for nitride semiconductor substrates so that good crystallinity can be obtained even when the semiconductor layer is formed thin.

[0005] An object of the present disclosure is to provide a method for manufacturing a nitride semiconductor substrate that can improve crystallinity. [Means for solving the problem]

[0006] A method for manufacturing a nitride semiconductor substrate according to the present disclosure includes the steps of: forming a first nitride semiconductor layer containing aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer containing aluminum on the first nitride semiconductor layer at the second temperature, wherein a first V / III ratio of a supply amount of a Group V element to a supply amount of a Group III element in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of a supply amount of a Group V element raw material to a supply amount of a Group III element raw material in the step of forming the second nitride semiconductor layer. [Effects of the Invention]

[0007] According to the present disclosure, the crystallinity of a nitride semiconductor substrate can be improved. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing changes in temperature and flow rate of source gas in the method for manufacturing a nitride semiconductor substrate according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view (part 1) illustrating the method for manufacturing the nitride semiconductor substrate according to the first embodiment. [Figure 3] FIG. 3 is a cross-sectional view (part 2) showing the method for manufacturing the nitride semiconductor substrate according to the first embodiment. [Figure 4] FIG. 4 is a diagram showing changes in temperature and flow rate of source gas in the method for manufacturing a nitride semiconductor substrate according to the second embodiment. [Figure 5] FIG. 5 is a diagram showing changes in temperature and flow rate of source gas in the method for manufacturing a nitride semiconductor substrate according to the third embodiment. [Figure 6] FIG. 6 is a cross-sectional view showing a HEMT manufactured using a nitride semiconductor substrate. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0010] [1] A method for manufacturing a nitride semiconductor substrate according to one embodiment of the present disclosure includes the steps of: forming a first nitride semiconductor layer containing aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer containing aluminum on the first nitride semiconductor layer at the second temperature, wherein a first V / III ratio of a supply amount of a Group V element to a supply amount of a Group III element in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of a supply amount of a Group V element source to a supply amount of a Group III element source in the step of forming the second nitride semiconductor layer.

[0011] Because the first V / III ratio is greater than the second V / III ratio and the second temperature is higher than the first temperature, the first nitride semiconductor layer can be formed more densely than the second nitride semiconductor layer, and atomic migration is more likely to occur during the formation of the second nitride semiconductor layer than during the formation of the first nitride semiconductor layer. Furthermore, during the temperature change from the first temperature to the second temperature, atoms constituting the first nitride semiconductor layer undergo thermal diffusion, improving the flatness of the top surface of the first nitride semiconductor layer. At this time, grooves due to steps included in the substrate may be locally formed in the first nitride semiconductor layer. However, even if grooves are formed, atomic migration is more likely to occur during the formation of the second nitride semiconductor layer, and the grooves are filled by the second nitride semiconductor layer. As a result, good crystallinity can be achieved in the second nitride semiconductor layer.

[0012] [2] In [1], the first nitride semiconductor layer and the second nitride semiconductor layer may be aluminum nitride layers, which makes it easier to form the first nitride semiconductor layer and the second nitride semiconductor layer stably.

[0013] [3] In [1] or [2], the first temperature may be 600°C or higher and lower than 1000°C, and the second temperature may be 1000°C or higher and 1200°C or lower. When the first temperature is 600°C or higher, the first nitride semiconductor layer is easily formed, and when the first temperature is lower than 1000°C, atomic migration is less likely to occur during the formation of the first nitride semiconductor layer. Furthermore, when the second temperature is 1000°C or higher, atomic migration is more likely to occur during the formation of the second nitride semiconductor layer, and when the second temperature is 1200°C or lower, the first nitride semiconductor layer and the second nitride semiconductor layer are easily formed in the same furnace without being exposed to the atmosphere.

[0014] [4] In any of [1] to [3], the difference between the second temperature and the first temperature may be 100° C. or more. In this case, the first nitride semiconductor layer is easily formed densely, and the second nitride semiconductor layer is easily formed with good crystallinity.

[0015] [5] In any of [1] to [4], a first pressure in the furnace in the step of forming the first nitride semiconductor layer may be higher than a second pressure in the furnace in the step of forming the second nitride semiconductor layer. In this case, the first nitride semiconductor layer is easily formed densely, and the second nitride semiconductor layer is easily formed with good crystallinity.

[0016] [6] In any one of [1] to [5], the first nitride semiconductor layer and the second nitride semiconductor layer may have a total thickness of 50 nm or less. By having a total thickness of 50 nm or less, heat is easily transferred from a semiconductor layer formed on the second nitride semiconductor layer to a substrate.

[0017] [7] In any one of [1] to [6], the second nitride semiconductor layer may be thicker than the first nitride semiconductor layer, in which case grooves formed in the first nitride semiconductor layer are more easily filled with the second nitride semiconductor layer.

[0018] [8] In any of [1] to [7], the first nitride semiconductor layer may have a thickness of 3 nm to 20 nm, and the second nitride semiconductor layer may have a thickness of 5 nm to 30 nm. When the first nitride semiconductor layer has a thickness of 20 nm or less and the second nitride semiconductor layer has a thickness of 30 nm or less, heat is easily transferred from the semiconductor layer formed on the second nitride semiconductor layer to the substrate. On the other hand, it is difficult to form a first nitride semiconductor layer with a thickness of less than 3 nm. Furthermore, when the second nitride semiconductor layer has a thickness of less than 5 nm, it may be difficult to fill grooves formed in the first nitride semiconductor layer.

[0019] [9] In any of [1] to [8], the step of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature may include the steps of changing the temperature of the substrate and the first nitride semiconductor layer to a third temperature higher than the second temperature, and changing the temperature of the substrate and the first nitride semiconductor layer from the third temperature to the second temperature. In this case, thermal diffusion of atoms constituting the first nitride semiconductor layer becomes more active at the third temperature, and the flatness of the upper surface of the first nitride semiconductor layer is further improved.

[0020]

[10] In [9], the third temperature may be 1100° C. or higher and 1300° C. or lower. When the third temperature is 1100° C. or higher, thermal diffusion of atoms constituting the first nitride semiconductor layer is easily activated, and when the third temperature is 1300° C. or lower, the first nitride semiconductor layer and the second nitride semiconductor layer are easily formed in the same furnace without being exposed to the atmosphere.

[0021]

[11] In any of [1] to

[10] , a step of maintaining the temperatures of the substrate and the first nitride semiconductor layer at the second temperature without forming the second nitride semiconductor layer may be included between the step of changing the temperatures of the substrate and the first nitride semiconductor layer to the second temperature and the step of forming the second nitride semiconductor layer. In this case, atoms are thermally diffused while being maintained at the second temperature, and the flatness of the upper surface of the first nitride semiconductor layer is further improved.

[0022]

[12] In any one of [1] to

[11] , the substrate may be a silicon carbide substrate, which makes it easier to form the first nitride semiconductor layer and the second nitride semiconductor layer with good crystallinity.

[0023] [Details of the embodiments of the present disclosure] Hereinafter, embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In this specification and drawings, components having substantially the same functional configurations may be designated by the same reference numerals to avoid redundant description.

[0024] (First embodiment) A first embodiment will be described. The first embodiment relates to a method for manufacturing a nitride semiconductor substrate. Fig. 1 is a diagram showing changes in temperature and flow rate of source gas in the method for manufacturing a nitride semiconductor substrate according to the first embodiment. Figs. 2 and 3 are cross-sectional views showing the method for manufacturing a nitride semiconductor substrate according to the first embodiment.

[0025] In the first embodiment, as shown in FIG. 2, a first aluminum nitride (AlN) layer 21 is formed on a substrate 10 during a period from time t0 to time t11. The substrate 10 is, for example, a silicon carbide (SiC) substrate. When the substrate 10 is a SiC substrate, the first AlN layer 21 is formed on a silicon (Si) polar surface of the substrate 10. The first AlN layer 21 can be formed, for example, by a metal organic chemical vapor deposition (MOCVD) method. When forming the first AlN layer 21, as shown in FIG. 1, the temperature of the substrate 10 is set to a first temperature T1 and the pressure in the furnace is set to a first pressure P1. For example, the first temperature T1 is equal to or higher than 600°C and lower than 1000°C, and the first pressure P1 is equal to or higher than 10 kPa and lower than 40 kPa. In addition, trimethylaluminum (TMA) is used as a raw material for aluminum (Al), which is a group III element, and ammonia (NH3) is used as a raw material for nitrogen (N), which is a group V element. For example, when forming the first AlN layer 21, the flow rate F31 of TMA and the flow rate F51 of NH are adjusted according to the size of the furnace to set the first V / III ratio of the supply amount (moles) of N to the supply amount (moles) of Al to be between 5000 and 20000. The first AlN layer 21 is an example of a first nitride semiconductor layer.

[0026] The formation of the first AlN layer 21 is completed by stopping the supply of TMA into the furnace at time t11. The thickness of the first AlN layer 21 is, for example, 3 nm or more and 20 nm or less. Next, from time t11 to time t12, the temperature of the substrate 10 and the first AlN layer 21 is changed from a first temperature T1 to a second temperature T2. The second temperature T2 is higher than the first temperature T1. From time t11 to time t12, the pressure in the furnace is reduced from a first pressure P1 to a second pressure P2, and the flow rate of NH3 is reduced from a flow rate F51 to a flow rate F52. For example, the second temperature T2 is 1000°C or more and 1200°C or less, and the second pressure P2 is 3 kPa or more and 30 kPa or less. The supply of TMA is kept stopped. Therefore, no AlN layer is formed from time t11 to time t12.

[0027] Next, at time t12, the supply of TMA into the furnace is resumed, thereby starting the formation of the second AlN layer 22. At time t13, the supply of TMA into the furnace is stopped, thereby completing the formation of the second AlN layer 22. That is, as shown in FIG. 3 , the second AlN layer 22 is formed on the first AlN layer 21 during the period from time t12 to time t13. The thickness of the second AlN layer 22 is, for example, 5 nm to 30 nm. The second AlN layer 22 can be formed, for example, by MOCVD. When forming the second AlN layer 22, the temperatures of the substrate 10 and the first AlN layer 21 are set to a second temperature T2, and the pressure in the furnace is set to a second pressure P2. For example, when forming the second AlN layer 22, the flow rate F31 of TMA and the flow rate F52 of NH3 are adjusted according to the size of the furnace to set a second V / III ratio of the supply amount of N (moles) to the supply amount of Al (moles) to 2000 or less. From the viewpoint of migration, the second V / III ratio is preferably low. For example, it may be 50 or less, or may be 1 or less. The first V / III ratio is greater than the second V / III ratio. The second AlN layer 22 is an example of a second nitride semiconductor layer. The value of the flow rate F31 of TMA when forming the second AlN layer 22 may be the same as the value of the flow rate F31 of TMA when forming the first AlN layer 21.

[0028] In this manner, the nitride semiconductor substrate 1 including the substrate 10, the first AlN layer 21, and the second AlN layer 22 can be manufactured.

[0029] In the first embodiment, the first V / III ratio is greater than the second V / III ratio. For example, the first AlN layer 21 is formed at a first temperature T1 of 600°C or higher but lower than 1000°C, and the second AlN layer 22 is formed at a second temperature T2 of 1000°C or higher but lower than 1200°C. Therefore, the first AlN layer 21 can be formed denser than the second AlN layer 22. During the formation of the second AlN layer 22, atomic migration occurs more easily than during the formation of the first AlN layer 21. Furthermore, during the temperature change from the first temperature T1 to the second temperature T2, atoms constituting the first AlN layer 21 thermally diffuse, improving the flatness of the top surface of the first AlN layer 21. At this time, grooves due to steps included in the substrate 10 may occur locally in the first AlN layer 21. However, even if grooves occur, atomic migration is likely to occur during the formation of the second AlN layer 22, and the grooves are filled by the second AlN layer 22. As a result, good crystallinity is obtained in the second AlN layer 22, and good flatness is obtained on the upper surface of the second AlN layer 22. Therefore, by using the second AlN layer 22 as a nucleation layer, a thin semiconductor layer with good crystallinity can be formed on the nitride semiconductor substrate 1. Furthermore, by making the semiconductor layer thin, the heat dissipation performance of a semiconductor device such as a HEMT that includes the semiconductor layer can be improved.

[0030] When the first temperature T1 is 600°C or higher, the first AlN layer 21 is easily formed. When the first temperature T1 is less than 1000°C, atomic migration is less likely to occur during the formation of the first AlN layer 21, making it easier to form a dense first AlN layer 21. When the second temperature T2 is 1000°C or higher, atomic migration is more likely to occur during the formation of the second AlN layer 22, making it easier for the second AlN layer 22 to fill grooves formed in the first AlN layer 21. When the second temperature T2 is 1200°C or lower, the first AlN layer 21 and the second AlN layer 22 are easily formed in the same furnace without being exposed to the atmosphere. The first temperature T1 may be 650°C or higher and 850°C or lower. The second temperature T2 may be 1050°C or higher and 1150°C or lower.

[0031] When the difference between the second temperature T2 and the first temperature T1 is 100°C or more, it is easy to form a dense first AlN layer 21 and a good crystallinity second AlN layer 22. The difference between the second temperature T2 and the first temperature T1 may be 250°C or more, or 300°C or more.

[0032] When the first pressure P1 is higher than the second pressure P2, the first AlN layer 21 is easily formed densely, and the second AlN layer 22 is easily formed with good crystallinity.

[0033] When the total thickness of the first AlN layer 21 and the second AlN layer 22 is 50 nm or less, heat is easily transferred from the semiconductor layer formed on the second AlN layer 22 to the substrate 10. The total thickness may be 40 nm or less, or may be 30 nm or less. Furthermore, when the second AlN layer 22 is thicker than the first AlN layer 21, grooves formed in the first AlN layer 21 are easily filled with the second AlN layer 22.

[0034] For example, the thickness of the first AlN layer is 3 nm or more and 20 nm or less, and the thickness of the second AlN layer 22 is 5 nm or more and 30 nm or less. When the thickness of the first AlN layer 21 is 20 nm or less and the thickness of the second AlN layer 22 is 30 nm or less, heat is easily transferred from the semiconductor layer formed on the second AlN layer 22 to the substrate 10. On the other hand, it is difficult to form a first AlN layer 21 with a thickness of less than 3 nm. Furthermore, when the thickness of the second AlN layer 22 is less than 5 nm, it may be difficult to fill grooves formed in the first AlN layer 21.

[0035] When the substrate 10 is a silicon carbide substrate with high thermal conductivity, the first AlN layer 21 and the second AlN layer 22 are formed thinly thereon, which makes it easier to improve heat dissipation.

[0036] (Second embodiment) Next, a second embodiment will be described. The second embodiment differs from the first embodiment mainly in the manner of temperature change between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. Fig. 4 is a diagram showing the manner of change in temperature and source gas flow rate in the method for manufacturing a nitride semiconductor substrate according to the second embodiment.

[0037] In the second embodiment, in the period from time t0 to time t21, a first AlN layer 21 is formed on the substrate 10 (see FIG. 2). The first AlN layer 21 is formed under the same conditions as in the first embodiment.

[0038] The formation of the first AlN layer 21 is completed by stopping the supply of TMA into the furnace at time t21. Next, during the period from time t21 to time t22, the temperatures of the substrate 10 and the first AlN layer 21 are changed from the first temperature T1 to a third temperature T3. The third temperature T3 is higher than the second temperature T2. For example, the third temperature T3 is not less than 1100°C and not more than 1300°C. Next, during the period from time t22 to time t23, the temperatures of the substrate 10 and the first AlN layer 21 are maintained at the third temperature T3. The time from time t22 to time t23 is not less than 1 minute and not more than 60 minutes, for example. Next, during the period from time t23 to time t24, the temperatures of the substrate 10 and the first AlN layer 21 are changed from the third temperature T3 to the second temperature T2. During the period from time t21 to time t24, the pressure in the furnace is reduced from first pressure P1 to second pressure P2, and the flow rate of NH3 is reduced from flow rate F51 to flow rate F52. The supply of TMA is stopped. Therefore, no AlN layer is formed during the period from time t21 to time t24.

[0039] Next, at time t24, the supply of TMA into the furnace is resumed, thereby starting the formation of the second AlN layer 22. At time t25, the supply of TMA into the furnace is stopped, thereby completing the formation of the second AlN layer 22. That is, the second AlN layer 22 is formed on the first AlN layer 21 during the period from time t24 to time t25 (see FIG. 3). The second AlN layer 22 is formed under the same conditions as in the second embodiment.

[0040] In this manner, the nitride semiconductor substrate 1 can be manufactured.

[0041] In the second embodiment, the temperature of the first AlN layer 21 is set to a third temperature T3, which is higher than the second temperature T2, between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. This makes the thermal diffusion of the Al atoms and N atoms that make up the first AlN layer 21 more active, further improving the flatness of the upper surface of the first AlN layer 21. Therefore, the second AlN layer 22 can have better crystallinity, and the upper surface of the second AlN layer 22 can have better flatness.

[0042] Setting the third temperature T3 to 1100°C or higher facilitates active thermal diffusion of atoms constituting the first AlN layer 21, and setting the third temperature T3 to 1300°C or lower facilitates formation of the first AlN layer 21 and the second AlN layer 22 in the same furnace without exposure to the atmosphere. The third temperature T3 may be 1150°C or higher and 1250°C or lower.

[0043] (Third embodiment) Next, a third embodiment will be described. The third embodiment differs from the first embodiment mainly in the manner of temperature change between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. Fig. 5 is a diagram showing the manner of change in temperature and source gas flow rate in the method for manufacturing a nitride semiconductor substrate according to the third embodiment.

[0044] In the third embodiment, in the period from time t0 to time t31, the first AlN layer 21 is formed on the substrate 10 (see FIG. 2). The first AlN layer 21 is formed under the same conditions as in the first embodiment.

[0045] The formation of the first AlN layer 21 is completed by stopping the supply of TMA into the furnace at time t31. Next, from time t31 to time t32, the temperatures of the substrate 10 and the first AlN layer 21 are changed from the first temperature T1 to the second temperature T2. Next, from time t32 to time t33, the temperatures of the substrate 10 and the first AlN layer 21 are maintained at the second temperature T2. The time from time t32 to time t33 is, for example, 1 minute or more and 60 minutes or less. From time t32 to time t33, the pressure in the furnace is reduced from the first pressure P1 to the second pressure P2, and the flow rate of NH3 is reduced from the flow rate F51 to the flow rate F52. The supply of TMA is kept stopped. Therefore, no AlN layer is formed from time t31 to time t33.

[0046] Next, at time t33, the supply of TMA into the furnace is resumed, thereby starting the formation of the second AlN layer 22. At time t34, the supply of TMA into the furnace is stopped, thereby completing the formation of the second AlN layer 22. That is, the second AlN layer 22 is formed on the first AlN layer 21 during the period from time t33 to time t34 (see FIG. 3). The second AlN layer 22 is formed under the same conditions as in the second embodiment.

[0047] In this manner, the nitride semiconductor substrate 1 can be manufactured.

[0048] In the third embodiment, the temperature of the first AlN layer 21 is maintained at the second temperature T2 during the period from time t32 to time t33 between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. This lengthens the time for thermal diffusion of the Al atoms and N atoms that make up the first AlN layer 21, further improving the flatness of the upper surface of the first AlN layer 21. This therefore allows the second AlN layer 22 to have better crystallinity and the upper surface of the second AlN layer 22 to have better flatness.

[0049] (HEMT) Next, a description will be given of an example of a HEMT manufactured using the nitride semiconductor substrate 1. FIG.

[0050] As shown in FIG. 6, a HEMT 100 manufactured using the nitride semiconductor substrate 1 includes a substrate 10, a semiconductor stack 20, an insulating film 30, a gate electrode 50, a source electrode 44S, and a drain electrode 44D.

[0051] The semiconductor laminate 20 includes a first AlN layer 21, a second AlN layer 22, a channel layer 23, a barrier layer 24, a cap layer 25, a regrown layer 42S, and a regrown layer 42D.

[0052] The channel layer 23 is on the second AlN layer 22. The channel layer 23 is, for example, an undoped gallium nitride (GaN) layer. The barrier layer 24 is on the channel layer 23. The barrier layer 24 is, for example, an n-type AlGaN layer. A two-dimensional electron gas (2DEG) 55 exists near the top surface of the channel layer 23. The cap layer 25 is on the barrier layer 24. The cap layer 25 is, for example, an n-type GaN layer.

[0053] A recess 40S for a source and a recess 40D for a drain are formed in the cap layer 25, the barrier layer 24, and a part of the channel layer 23. The recesses 40S and 40D penetrate the cap layer 25 and the barrier layer 24 and extend into the channel layer 23. The channel layer 23 is exposed from the recesses 40S and 40D.

[0054] The insulating film 30 is on the cap layer 25. The insulating film 30 is, for example, a silicon nitride (SiN) film. An opening 30S for a source and an opening 30D for a drain are formed in the insulating film 30. The opening 30S is connected to the recess 40S, and the opening 30D is connected to the recess 40D.

[0055] The regrown layer 42S is located on the channel layer 23 within the recess 40S and the opening 30S. The regrown layer 42D is located on the channel layer 23 within the recess 40D and the opening 30D. The regrown layers 42S and 42D are, for example, n-type GaN layers. The electrical resistance of the regrown layers 42S and 42D is lower than the electrical resistance of the channel layer 23.

[0056] The source electrode 44S is on the regrowth layer 42S, and the drain electrode 44D is on the regrowth layer 42D. The source electrode 44S is in direct contact with the regrowth layer 42S, and the drain electrode 44D is in direct contact with the regrowth layer 42D. The source electrode 44S makes an ohmic contact with the regrowth layer 42S, and the drain electrode 44D makes an ohmic contact with the regrowth layer 42D.

[0057] An opening 30G for a gate is formed in the insulating film 30. The opening 30G is between the opening 30S and the opening 30D. The gate electrode 50 is provided on the insulating film 30 and makes a Schottky contact with the semiconductor laminate 20 through the opening 30G.

[0058] In such a HEMT device 2, a channel layer 23, a barrier layer 24, and a cap layer 25 with good crystallinity even if thin can be formed on the second AlN layer 22. For example, when the channel layer 23 is a GaN layer having a (002) upper surface Miller index and a thickness of 200 nm, the full width at half maximum (FWHM) of the X-ray rocking curve (XRC) of the upper surface of the channel layer 23 can be made 200 arcsec or less.

[0059] In the present disclosure, the first nitride semiconductor layer and the second nitride semiconductor layer are not limited to aluminum nitride layers. The composition of the first nitride semiconductor layer may be represented by In X1 Al Y1 Ga 1-X1-Y1 N (0 ≦ X1 < 1, 0 < Y1 ≦ 1, 0 < X1 + Y1 ≦ 1). The composition of the second nitride semiconductor layer may be represented by In X2 Al Y2 Ga 1-X2-Y2 N (0 ≦ X2 < 1, 0 < Y2 ≦ 1, 0 < X2 + Y2 ≦ 1). However, when the first nitride semiconductor layer and the second nitride semiconductor layer are aluminum nitride layers, it is easy to stably form the first nitride semiconductor layer and the second nitride semiconductor layer.

[0060] Here, the experiment conducted by the inventor of the present application will be described. In this experiment, four types of samples, No. 1, No. 2, No. 3, and No. 4, were fabricated.

[0061] In samples No. 1 and No. 2, a first AlN layer 21 and a second AlN layer 22 were formed on a SiC substrate 10 in accordance with the second embodiment, and a GaN layer was formed following the second AlN layer 22. The thickness of the first AlN layer 21 was 10 nm, and the thickness of the second AlN layer 22 was 10 nm. In sample No. 1, the thickness of the GaN layer was 200 nm, and in sample No. 2, the thickness of the GaN layer was 400 nm. In addition, the first temperature T1 was 700°C, the third temperature T3 was 1100°C, and the second temperature T2 was 1000°C.

[0062] For samples No. 3 and No. 4, a 20-nm-thick AlN layer was formed on a SiC substrate at a substrate temperature of 1100°C, and a GaN layer was then formed on top of the AlN layer. For sample No. 3, the GaN layer was 200 nm thick, and for sample No. 4, the GaN layer was 400 nm thick.

[0063] The half-width of the X-ray rocking curve of the top surface of the GaN layer of each of Samples No. 1, No. 2, No. 3, and No. 4 was measured. The Miller indices of the top surface of the GaN layer were (002). The results are shown in Table 1.

[0064] [Table 1]

[0065] As shown in Table 1, sample No. 2 has a half-width of 207 arcsec, and sample No. 4 has a half-width of 407 arcsec, demonstrating good crystallinity. However, the GaN layer is 400 nm thick, which may result in poor heat dissipation. Sample No. 3 has a GaN layer thickness of 200 nm, which gives it better heat dissipation than samples No. 2 and No. 4, but its half-width is 550 arcsec, indicating poor crystallinity. In contrast, sample No. 1 has a GaN layer thickness of 200 nm and a half-width of 192 arcsec. Therefore, sample No. 1 has good crystallinity in the GaN layer and high heat dissipation.

[0066] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]

[0067] 1: Nitride semiconductor substrate 10: Circuit board 20: Semiconductor laminate 21: 1st AlN layer 22: 2nd AlN layer 23: Channel layer 24: Barrier layer 25: Cap layer 30: insulating film 30D, 30G, 30S: Aperture 40D, 40S: recessed 42D, 42S: Regrowth layer 44D: Drain electrode 44S: Source electrode 50: Gate electrode 55: Two-dimensional electron gas

Claims

1. forming a first nitride semiconductor layer including aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; forming a second nitride semiconductor layer containing aluminum on the first nitride semiconductor layer at the second temperature; and a first V / III ratio of a supply amount of a Group V element to a supply amount of a Group III element in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of a supply amount of a Group V element to a supply amount of a Group III element raw material in the step of forming the second nitride semiconductor layer.

2. The method for manufacturing a nitride semiconductor substrate according to claim 1 , wherein the first nitride semiconductor layer and the second nitride semiconductor layer are aluminum nitride layers.

3. the first temperature is equal to or higher than 600°C and lower than 1000°C; 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the second temperature is 1000° C. or higher and 1200° C. or lower.

4. 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the difference between said second temperature and said first temperature is 100° C. or more.

5. 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein a first pressure in a furnace in the step of forming the first nitride semiconductor layer is higher than a second pressure in a furnace in the step of forming the second nitride semiconductor layer.

6. 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the first nitride semiconductor layer and the second nitride semiconductor layer have a total thickness of 50 nm or less.

7. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein the second nitride semiconductor layer is thicker than the first nitride semiconductor layer.

8. the thickness of the first nitride semiconductor layer is 3 nm or more and 20 nm or less; 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the second nitride semiconductor layer has a thickness of 5 nm or more and 30 nm or less.

9. The step of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature includes: changing the temperature of the substrate and the first nitride semiconductor layer to a third temperature higher than the second temperature; changing the temperature of the substrate and the first nitride semiconductor layer from the third temperature to the second temperature; 3. The method for producing a nitride semiconductor substrate according to claim 1, comprising:

10. The method for manufacturing a nitride semiconductor substrate according to claim 9 , wherein the third temperature is 1100° C. or higher and 1300° C. or lower.

11. 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, further comprising, between the step of changing the temperatures of the substrate and the first nitride semiconductor layer to the second temperature and the step of forming the second nitride semiconductor layer, a step of maintaining the temperatures of the substrate and the first nitride semiconductor layer at the second temperature without forming the second nitride semiconductor layer.

12. 3. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the substrate is a silicon carbide substrate.

Citation Information

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