Electronic substrate

Abstract

To solve a problem in a conventional printed circuit board in which the artwork property on the board is lost and therefore it is difficult to apply a technology to multi-layer electronic substrates.SOLUTION: A multilayer electronic substrate 1 has a first main surface F1 and a second main surface F2, and is provided with through holes 3 for inserting and soldering terminals T of electronic components P arranged on the second main surface F2 side, and has a structure in which a first conductor layer 2A closest to the first main surface F1 and a second conductor layer 2F closest to the second main surface F2 of a plurality of conductive layers are continuous through the through holes 3. Within a predetermined range A centered on the through holes 3, the area of the first conductor layer 2A is smaller than the area of the second conductor layer 2F, thereby achieving improved solder finish in the multilayer electronic substrate 1 without impairing the artwork property of the board.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an improvement in an electronic substrate having a structure in which a plurality of conductor layers are arranged in the thickness direction. [Background technology]

[0002] An example of a conventional electronic board is described in Patent Document 1. Patent Document 1 describes a printed circuit board in which through holes are formed on a solid pattern and lands are provided on the periphery including the inner wall of the through hole. This printed circuit board has a thermal land provided on a part of the periphery of the land, at least one through hole formed in the peripheral region of the thermal land, and a resist formed in the peripheral region where the periphery of the through hole is located. This suppresses heat dissipation to the solid pattern of the printed circuit board, improving the solder finish. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4919932 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the conventional printed circuit boards described above have through holes formed around the thermal lands, making them difficult to apply to multilayer electronic boards. In other words, multilayer electronic boards have a structure in which multiple conductor layers are arranged in the thickness direction, and therefore, the internal conductor layers interfere with the through holes formed around the thermal lands, resulting in a problem of impairing the artwork of the board.

[0005] The present invention has been made in view of the above-mentioned conventional situation, and aims to provide a multi-layer electronic board that can achieve improved solder finish without impairing the artwork of the board. [Means for solving the problem]

[0006] The electronic board according to the present invention is a multilayer electronic board having a structure in which a plurality of conductor layers are arranged at predetermined intervals in the thickness direction. This electronic board has a first main surface and a second main surface that are opposite each other, and is provided with through holes for inserting and soldering terminals of electronic components arranged on the second main surface, and has a structure in which the first conductor layer closest to the first main surface and the second conductor layer closest to the second main surface are continuous through the through holes. The electronic board is characterized in that, within a predetermined range centered on the through holes, the area of ​​the first conductor layer is smaller than the area of ​​the second conductor layer.

[0007] In the electronic substrate described above, terminals of electronic components arranged on the second principal surface are inserted into through-holes, solder material is filled into the through-holes, and the terminals are soldered to the inner walls of the through-holes. This soldering is performed from the first principal surface side, where there are no electronic components, so heat is applied from the first principal surface side. In this case, the area of ​​the first conductor layer of the electronic substrate is smaller than the area of ​​the second conductor layer in a predetermined area centered on the through-hole. This suppresses heat diffusion in the first conductor layer, which has a smaller area, while facilitating heat transfer to the second conductor layer, which has a larger area, resulting in stable solder formation along the axial direction of the through-hole. [Effects of the Invention]

[0008] As described above, the electronic board of the present invention has solder formed stably along the axial direction of the through hole, and there is no need to provide a through hole or the like in the conductor layer arranged between the first conductor layer and the second conductor layer, so that in multilayer electronic boards, improved solder finish can be achieved without compromising the artwork of the board. [Brief explanation of the drawings]

[0009] [Figure 1]1A and 1B are diagrams illustrating a first embodiment of an electronic substrate, in which the upper part is a plan view of a main part, the middle part is a cross-sectional view of the main part, and the lower part is a horizontal cross-sectional view taken along the line XX shown in the middle part. [Figure 2] FIG. 2 is a plan view showing the arrangement of thermal lands on the electronic board in FIG. [Figure 3] FIG. 10 is a plan view showing the arrangement of thermal lands in a second embodiment of the electronic substrate. DETAILED DESCRIPTION OF THE INVENTION

[0010] First Embodiment The electronic substrate 1 shown in Fig. 1 is a multilayer substrate having a structure in which multiple conductor layers 2A to 2F are arranged in the thickness direction (vertical direction in the middle), and has a first main surface (upper surface) F1 and a second main surface (lower surface) F2, which are opposite surfaces, as shown in the middle part of Fig. 1. The conductor layers 2A to 2F are typically made of copper, and in particular, a substrate with a finished copper thickness of 140 µm or more is called a thick copper conductor layer.

[0011] The electronic substrate 1 also has through holes 3 for inserting and soldering terminals T of electronic components (discrete components) P ​​arranged on the second main surface F2 side, and has a structure in which, of the multiple conductor layers 2A to 2F, the first conductor layer 2A closest to the first main surface F1 and the second conductor layer 2F closest to the second main surface F2 are continuous through the through holes 3.

[0012] The through-hole 3 is a through-hole extending from the first principal surface F1 to the second principal surface F2, and has a connecting conductor layer 2G on its inner wall that electrically connects the first and second conductor layers 2A and 2F. FIG. 1 shows a main part of the electronic substrate 1. The illustrated electronic substrate 1 has intermediate conductor layers 2B-2E of the same size and shape arranged at equal intervals in the thickness direction between the first and second conductor layers 2A and 2F, but is not limited to this configuration. These intermediate conductor layers 2B-2E can be provided with details such as irregularities or openings as necessary, allowing for continuous connection of other electronic components to regions of the electronic substrate 1 not shown.

[0013] When the first main surface F1 of the electronic substrate 1 is viewed in plan, the area of ​​the first conductor layer 2A is smaller than the area of ​​the second conductor layer 2F in a predetermined area A centered on the through-hole 3. The size and shape of the predetermined area A centered on the through-hole 3 are not limited, but can be determined taking into consideration various conditions such as thermal diffusion when soldering the electronic component P. In the illustrated example, the predetermined area A is a concentric region centered on the through-hole 3.

[0014] 2, in the electronic board 1 of this embodiment, the first conductor layer 2A has thermal lands 4 in a predetermined range A centered on the through hole 3. In a more preferred embodiment of the electronic board 1, the first conductor layer 2A has a plurality of thermal lands 4 (eight in the illustrated example) arranged at predetermined intervals on a concentric circle centered on the through hole 3.

[0015] The thermal lands 4 are not limited in size, number, or shape, but in the illustrated example, they are circular holes that penetrate the first conductor layer 2A and are arranged at regular intervals on a concentric circle centered on the through hole 3.

[0016] That is, in the electronic board 1 of this embodiment, the area of ​​the first conductor layer 2A is made smaller than the area of ​​the second conductor layer 2F by providing thermal lands 4 on the first conductor layer 2A in a predetermined range A centered on the through hole 3. In other words, the area of ​​the first conductor layer 2A is smaller than the area of ​​the second conductor layer 2F by the total area of ​​the thermal lands 4.

[0017] The electronic substrate 1 is formed into a plate shape entirely from a resin solder resist 5. The solder resist 5 has, on the first principal surface F1 and second principal surface F2 sides, circular openings H1 and H2 that expose the through-holes 3 including the connecting conductor layers 2G, as well as the peripheral edges of the through-holes 3 in the first and second conductor layers 2A and 2F. The thermal lands 4 may be filled with the solder resist 5 or may be left empty as shown in the illustrated example.

[0018] In the electronic substrate 1 having the above configuration, the terminals T of the electronic components P arranged on the second main surface F2 side are inserted into the through holes 3, and solder material M is filled around the terminals T to solder the terminals T to the inner walls of the through holes 3. This soldering is performed using a soldering iron from the first main surface F1 side where there are no electronic components P, so heat is applied from the first main surface F1 side.

[0019] In this case, the area of ​​the first conductor layer 2A of the electronic board 1 is smaller than the area of ​​the second conductor layer 2F in a predetermined range A centered on the through-hole 3. As a result, the area of ​​the first conductor layer 2A on the electronic board 1 where the soldering iron is applied is small, so that heat diffusion in the first conductor layer 2A is suppressed, while heat is more easily transferred to the second conductor layer 2F side which has a larger area, and solder (M) is stably formed along the axial direction of the through-hole 3.

[0020] In this way, the above electronic board 1 has solder (M) formed stably along the axial direction of the through hole 3, and there is no need to provide a through hole as a thermal land, i.e., a through hole that is continuous in the thickness direction, so interference between the intermediate conductor layers 2B to 2E and the through hole is eliminated, and in the multilayer electronic board 1, improved solder finish can be achieved without impairing the artwork of the board.

[0021] Furthermore, by providing a thermal land 4 which is a hole in the first conductor layer 2A, the area of ​​the first conductor layer 2A in a specified range A is made smaller than that of the second conductor layer 2F in the above electronic substrate 1. This extremely simple structure suppresses thermal diffusion of the first conductor layer 2A and facilitates heat transfer to the second conductor layer 2F side, contributing to the stable formation of solder (M) along the axial direction of the through hole 3.

[0022] Furthermore, by arranging multiple thermal lands 4 at predetermined intervals on a concentric circle centered on the through hole 3, the electronic substrate 1 not only improves the solderability as described above, but also achieves a good balance between the flow of electricity in the first conductor layer 2A and the heat insulation by the thermal lands 4.

[0023] The first and second conductor layers 2A, 2F are basically the same thickness in the electronic substrate 1. Therefore, in the electronic substrate 1, when the area of ​​the first conductor layer 2A is made smaller than the area of ​​the second conductor layer 2F by the thermal land 4, the volume of the first conductor layer 2A is smaller than the volume of the second conductor layer 2F, and this volume difference also suppresses thermal diffusion in the first conductor layer 2A and promotes thermal diffusion in the second conductor layer 2F, making it possible to obtain good solderability along the axial direction of the through hole 3.

[0024] Furthermore, since the electronic substrate according to the present invention may have different thickness dimensions for the first and second conductor layers 2A and 2F, in this case, the size and number of the thermal lands 4 can be set so that the area and volume of the first conductor layer 2A are smaller than those of the second conductor layer 2F.

[0025] Furthermore, in the electronic substrate according to the present invention, when the thickness dimensions of the first and second conductor layers 2A and 2F are different, there may be cases where the volume of the first conductor layer 2A is smaller than the volume of the second conductor layer 2F even if both have the same area. Therefore, the electronic substrate according to the present invention can adopt a configuration in which the area of ​​the first conductor layer 2A is smaller than the area of ​​the second conductor layer 2F within the predetermined range A, and a configuration in which the volume of the first conductor layer 2A is smaller than the volume of the second conductor layer 2F within the predetermined range A.

[0026] Second Embodiment FIG. 3 is a diagram illustrating a second embodiment of an electronic substrate according to the present invention. The illustrated electronic board 1 has a basic configuration equivalent to that of the first embodiment (see FIG. 1), and the thermal land 14 formed on the first conductor layer 2A has an arc shape centered on the through hole 3. The electronic board 1 of this embodiment has two arc-shaped thermal lands 4, 4 arranged on concentric circles at positions 180 degrees apart, but the number of thermal lands 4 may be one or three or more.

[0027] As in the first embodiment, the electronic substrate 1 having the above configuration is a multilayer electronic substrate 1, and can improve the solder finish without impairing the artwork of the substrate, and can achieve a good balance between the flow of electricity in the first conductive layer 2A and the heat insulation by the thermal land 4.

[0028] Furthermore, when emphasis is placed on heat insulation, the thermal lands 4 of the electronic substrate 1 are arranged in an arc shape on a concentric circle centered on the through-hole 3, i.e., on the outer periphery of the solder connection land surface of the electronic component P. In this case, the thermal lands 4 may be, for example, C-shaped in plan view on the surface where the soldering iron is applied (solder connection land surface), so that the current-carrying portion of the first conductor layer 2A (the portion between the thermal lands) is in one place, or as shown in Fig. 3, two semicircular shapes may be arranged, so that the current-carrying portion of the first conductor layer 2A is in two places.

[0029] The detailed configuration of the electronic board according to the present invention is not limited to the above-described embodiments, and can be modified as appropriate without departing from the spirit of the present invention. Furthermore, in the first embodiment of the electronic board according to the present invention, a thermal land is provided on the first conductor layer, thereby making the area of ​​the first conductor layer 2A smaller than the area of ​​the second conductor layer 2F within the predetermined range A. However, it is also possible to adopt a configuration in which the inner diameter of the through hole on the first conductor layer side is enlarged to make the area of ​​the first conductor layer 2A smaller than the area of ​​the second conductor layer 2F. [Explanation of symbols]

[0030] 1. Electronic board 2A First conductor layer 2B~2E Intermediate conductor layers 2F 2nd conductor layer 3 through holes 4. Thermal Land 14 Thermal Land A specified range F1 First main surface F2 Second principal surface M solder P Electronic parts T terminal

Claims

1. An electronic substrate having a structure in which a plurality of conductor layers are arranged in a thickness direction, having a first main surface and a second main surface that are opposite sides of each other; a through hole for inserting and soldering a terminal of an electronic component arranged on the second main surface side, and a first conductor layer closest to the first main surface and a second conductor layer closest to the second main surface among the plurality of conductor layers are continuous through the through hole; An electronic substrate, characterized in that the area of ​​the first conductor layer is smaller than the area of ​​the second conductor layer in a predetermined range centered on the through hole.

2. 2. The electronic substrate according to claim 1, wherein the first conductor layer has a thermal land in a predetermined range centered on the through hole.

3. 3. The electronic substrate according to claim 2, wherein the first conductor layer has a plurality of thermal lands arranged at predetermined intervals on a concentric circle centered on the through hole.

4. 3. The electronic substrate according to claim 2, wherein the thermal land has an arc shape centered on the through hole.

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