Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor in which occurrence of cracking or chipping at a boundary part between an end face side ineffective part and a vertical ridge line ineffective part of a laminated body is prevented.SOLUTION: A multilayer ceramic capacitor 1 includes: a multilayer body 10 including a plurality of stacked dielectric layers 20 and a plurality of internal electrode layers 30; and an external electrode 40 disposed so as to be electrically connected to the internal electrode layers 30. An outer surface of the multilayer body 10 at a boundary part VLB between an end face side ineffective part LG and a vertical ridge line ineffective part VG, the outer surface of a vertical ridge line ineffective part VG, and the outer surface of the multilayer body at a boundary part VWB between the vertical ridge line ineffective part VG and the side face side ineffective part WG form a continuous curved surface VR protruding outward in a plan view from a multilayer direction T, and a protective film SC containing carbon and silicon as constituent elements is formed on the curved surface VR.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] Typically, a multilayer ceramic capacitor comprises a laminate including a plurality of stacked dielectric layers and a plurality of internal electrode layers, and external electrodes arranged at predetermined positions on the laminate so as to be electrically connected to the internal electrode layers. The laminate is composed of an effective portion where the internal electrode layers overlap each other to form a capacitance, and an ineffective portion surrounding the effective portion. The regions that make up the invalid portion include a region that sandwiches the valid portion from the stacking direction (hereinafter referred to as the "main surface side invalid portion"), a region that sandwiches the valid portion from the length direction that intersects the stacking direction (hereinafter referred to as the "end surface side invalid portion"), a region that sandwiches the valid portion from the width direction that intersects the stacking direction and the length direction (hereinafter referred to as the "side surface side invalid portion"), a region that is arranged at the four corners of the laminate so as to connect the end surface side invalid portion and the side surface side invalid portion (hereinafter referred to as the "vertical ridge line invalid portion"), a region that is arranged at the four corners of the laminate so as to connect the main surface side invalid portion and the end surface side invalid portion (hereinafter referred to as the "horizontal ridge line invalid portion"), a region that is arranged at the four corners of the laminate so as to connect the main surface side invalid portion and the side surface side invalid portion (hereinafter referred to as the "long ridge line invalid portion"), and a corner region surrounded by the vertical ridge line invalid portion, horizontal ridge line invalid portion, and long ridge line invalid portion (hereinafter referred to as the "corner invalid portion").

[0003] Here, when the laminate is formed, the ridges and corners tend to have sharp shapes, and in such cases, the ridges or corners come into contact with each other during the manufacturing process of the multilayer ceramic capacitor or during transportation during the manufacturing process, which can easily lead to problems such as cracks or chips in the ridges, etc. To solve such problems, a known manufacturing method is to round the ridges, etc. of the laminate by, for example, barrel polishing the laminate before or after firing. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 8-316088 Summary of the Invention [Problem to be solved by the invention]

[0005] On the other hand, at the end faces of the laminate before the external electrodes are disposed, the boundary between the end face-side invalid portion and the vertical ridge invalid portion and the boundary between the end face-side invalid portion and the horizontal ridge invalid portion are exposed, and cracks and chips are likely to occur at these boundaries due to differences in structure and component composition. In particular, after barrel polishing, the surface of the boundary becomes a curved surface that protrudes outward, making it more susceptible to stress and more likely to crack and chip.

[0006] An object of the present invention is to provide a multilayer ceramic capacitor that prevents cracks and chips from occurring at the boundary between the end face side invalid portion and the vertical ridge line invalid portion of the laminate, or at the boundary between the end face side invalid portion and the horizontal ridge line invalid portion. [Means for solving the problem]

[0007] The inventors discovered that by forming a protective film containing carbon and silicon as constituent elements on a curved surface including the boundary between the end face side invalid portion and the vertical ridge line invalid portion of a laminate, or on a curved surface including the boundary between the end face side invalid portion and the horizontal ridge line invalid portion, it is possible to prevent cracks and chips from occurring at the boundary portion, and have completed the present invention.

[0008] That is, the present invention provides a multilayer ceramic capacitor comprising a laminate including a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, and external electrodes arranged to be electrically connected to the internal electrode layers, the laminate comprises an effective portion where the internal electrode layers overlap each other in a lamination direction, and an ineffective portion surrounding the effective portion, and includes two main surfaces facing each other in the lamination direction, two end faces facing each other in a length direction in which the internal electrode layers extend to the external electrodes, and two side surfaces facing each other in a width direction which intersects both the lamination direction and the length direction, When, of the invalid portions, opposing regions sandwiching the valid portion in the length direction are defined as end face side invalid portions, opposing regions sandwiching the valid portion in the width direction are defined as side face side invalid portions, and regions adjacent to the side face side invalid portions in the length direction and adjacent to the end face side invalid portions in the width direction are defined as vertical ridge line invalid portions, an outer surface at a boundary between the end face side invalid portion and the vertical ridge line invalid portion, an outer surface at the vertical ridge line invalid portion, and an outer surface at a boundary between the vertical ridge line invalid portion and the side face side invalid portion form a continuous curved surface that protrudes outward in a plan view from the stacking direction, The multilayer ceramic capacitor has a protective film containing carbon and silicon as constituent elements formed on the curved surface.

[0009] Furthermore, in the present invention, when opposing regions of the invalid portions sandwiching the effective portion in the stacking direction are defined as main surface side invalid portions, opposing regions sandwiching the effective portion in the length direction are defined as end surface side invalid portions, and a region adjacent to the end surface side invalid portions in the stacking direction and adjacent to the main surface side invalid portions in the length direction is defined as a horizontal ridge line invalid portion, an outer surface at a boundary between the end surface side invalid portion and the horizontal ridge line invalid portion, an outer surface of the horizontal ridge line invalid portion, and an outer surface at a boundary between the horizontal ridge line invalid portion and the main surface side invalid portion form a continuous curved surface that protrudes outward in a side view from the width direction, The multilayer ceramic capacitor has a protective film containing carbon and silicon as constituent elements formed on the curved surface. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide a multilayer ceramic capacitor in which cracks and chips are prevented from occurring at the boundary between the end face side invalid portion and the vertical ridge line invalid portion of the laminate, or at the boundary between the end face side invalid portion and the horizontal ridge line invalid portion. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is an external perspective view of a multilayer ceramic capacitor according to the present invention; [Figure 2] FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line II-II shown in FIG. [Figure 3] 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line III-III shown in FIG. 2. [Figure 4] 4 is a cross-sectional view of the multilayer ceramic capacitor taken along line IV-IV shown in FIG. 2. [Figure 5] FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line VV shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present invention will be described. Fig. 1 is a schematic perspective view of a multilayer ceramic capacitor 1 according to an embodiment. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II shown in Fig. 1. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III shown in Fig. 2. Fig. 4 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line IV-IV shown in Fig. 2. Fig. 5 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line VV shown in Fig. 1. Line II-II passes through the center of the multilayer ceramic capacitor 1 in a width direction W, which will be described later, and line VV passes through the center of the multilayer ceramic capacitor 1 in a length direction L, which will be described later.

[0013] In the following description, the direction in which the dielectric layers 20 and the internal electrode layers 30 are stacked will be referred to as the stacking direction T, which is a term used to represent the orientation of the multilayer ceramic capacitor 1. The direction in which the internal electrode layers 30 extend to the external electrodes 40, intersecting the stacking direction T, will be referred to as the length direction L. The direction intersecting both the length direction L and the stacking direction T will be referred to as the width direction W. In the embodiment, the stacking direction T, the length direction L, and the width direction W are mutually orthogonal. The cross section shown in FIG. 2 will also be referred to as the LT cross section. The cross sections shown in FIGS. 3 and 4 will also be referred to as the LW cross section. The cross section shown in FIG. 5 will also be referred to as the WT cross section.

[0014] (multilayer ceramic capacitors) The multilayer ceramic capacitor 1 comprises a laminate 10 including a plurality of laminated dielectric layers 20 and a plurality of internal electrode layers 30, and a pair of external electrodes 40 provided on both ends of the laminate 10.

[0015] (Laminate) The laminate 10 has a substantially rectangular parallelepiped shape. The corners and ridges of the laminate 10 are rounded. A corner is a portion where three surfaces of the laminate intersect, and a ridge is a portion where two surfaces of the laminate intersect. The dimension of the laminate 10 in the length direction L is not necessarily longer than the dimension in the width direction W. Furthermore, unevenness may be formed on part or all of the surfaces constituting the laminate 10.

[0016] The dimensions of the laminate 10 are not particularly limited, but if the dimension of the laminate 10 in the length direction L is defined as the L dimension, then the L dimension is preferably 0.2 mm or more and 10 mm or less. If the dimension of the laminate 10 in the stacking direction T is defined as the T dimension, then the T dimension is preferably 0.1 mm or more and 10 mm or less. If the dimension of the laminate 10 in the width direction W is defined as the W dimension, then the W dimension is preferably 0.1 mm or more and 10 mm or less.

[0017] As shown in FIG. 1, the laminate 10 has a first main surface TS1 and a second main surface TS2 that face each other in the stacking direction T, a first side surface WS1 and a second side surface WS2 that face each other in the width direction W that intersects with the stacking direction T, and a first end surface LS1 and a second end surface LS2 that face each other in the length direction L that intersects with the stacking direction T and the width direction W.

[0018] In addition, when there is no need to particularly distinguish between the first main surface TS1 and the second main surface TS2, they will be collectively referred to as the main surface TS; when there is no need to particularly distinguish between the first side surface WS1 and the second side surface WS2, they will be collectively referred to as the side surface WS; and when there is no need to particularly distinguish between the first end surface LS1 and the second end surface LS2, they will be collectively referred to as the end surface LS.

[0019] (dielectric layer) The materials constituting the plurality of dielectric layers 20 stacked in the laminate 10 can be, for example, dielectric ceramics containing BaTiO3, CaTiO3, SrTiO3, CaZrO3, or the like, or solid solutions thereof, as a main component. The dielectric layers 20 may also contain Si compounds, Mg compounds, Mn compounds, Al compounds, V compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, or the like. These compounds may also be oxides or carbonates.

[0020] The thickness of the dielectric layers 20 is not particularly limited, but is preferably 0.30 μm to 0.50 μm, and more preferably 0.30 μm to 0.45 μm. The number of dielectric layers 20 is not particularly limited, but is preferably 100 to 2000. The number of dielectric layers 20 is the total number of the dielectric layers in the effective portion 11 and the dielectric layers in the main surface-side ineffective portion TG.

[0021] (Internal electrode layer) The multiple internal electrode layers 30 stacked in the laminate 10 are composed of first internal electrode layers 31 and second internal electrode layers 32. The multiple first internal electrode layers 31 are arranged on the multiple dielectric layers 20. The multiple second internal electrode layers 32 are arranged on the multiple dielectric layers 20. The multiple first internal electrode layers 31 and the multiple second internal electrode layers 32 are arranged alternately in the stacking direction T of the laminate 10.

[0022] The first internal electrode layer 31 has a first opposing portion 31A opposing the second internal electrode layer 32, and a first lead portion 31B led from the first opposing portion 31A to the first end face LS1. The first lead portion 31B is exposed at the first end face LS1.

[0023] The second internal electrode layer 32 has a second opposing portion 32A opposing the first internal electrode layer 31, and a second lead portion 32B led from the second opposing portion 32A to the second end face LS2. The second lead portion 32B is exposed at the second end face LS2.

[0024] The first internal electrode layer 31 and the second internal electrode layer 32 are made of an appropriate conductive material, such as a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing at least one of these metals. When an alloy is used, the first internal electrode layer 31 and the second internal electrode layer 32 may be made of, for example, an Ag-Pd alloy.

[0025] The thickness of each of the first internal electrode layer 31 and the second internal electrode layer 32 is preferably, for example, about 0.2 μm or more and 3.0 μm or less.

[0026] (effective part) The effective portion 11 is a region where the internal electrode layers 30 overlap when the laminate 10 is viewed from the stacking direction T. The effective portion 11 is a portion in the laminate 10 where the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 face each other via the dielectric layer 20, thereby generating capacitance and essentially functioning as a capacitor.

[0027] (Invalid part) The invalid portion 12 surrounds the valid portion 11 and forms the laminate 10 together with the valid portion 11 . The invalid portions 12 are composed of two main surface side invalid portions TG, two end surface side invalid portions LG, two side surface side invalid portions WG, four vertical ridge line invalid portions VR, four horizontal ridge line invalid portions HR, four long ridge line invalid portions XG, and eight corner invalid portions.

[0028] (Ineffective portion on the main surface) As shown in FIG. 2, the main surface side invalid portions TG are regions sandwiching the valid portion 11 in the stacking direction T, and include a first main surface side invalid portion TG1 and a second main surface side invalid portion TG2.

[0029] The first main surface side invalid portion TG1 is located on the first main surface TS1 side of the laminate 10. The first main surface side invalid portion TG1 can be formed by stacking a plurality of dielectric layers 20 as ceramic layers located between the first main surface TS1 and the internal electrode layer 30 closest to the first main surface TS1. The dielectric layer 20 used in the first main surface side invalid portion TG1 may be the same as the dielectric layer 20 used in the valid portion 11.

[0030] The second main surface side invalid portion TG2 is located on the second main surface TS2 side of the laminate 10. The second main surface side invalid portion TG2 can be formed by stacking a plurality of dielectric layers 20 as ceramic layers located between the second main surface TS2 and the internal electrode layer 30 closest to the second main surface TS2. The dielectric layer 20 used in the second main surface side invalid portion TG2 may be the same as the dielectric layer 20 used in the valid portion 11.

[0031] (Ineffective area on end face) As shown in Figures 3 and 4, the end face-side invalid portions LG are opposing regions sandwiching the effective portion 11 in the longitudinal direction L, and are composed of a first end face-side invalid portion LG1 and a second end face-side invalid portion LG2. The first end face-side invalid portion LG1 is a portion including the dielectric layer 20 located between the effective portion 11 and the first end face LS1. The second end face-side invalid portion LG2 is a portion including the dielectric layer 20 located between the effective portion 11 and the second end face LS2. Figure 2 shows the ranges of the first end face-side invalid portion LG1 and the second end face-side invalid portion LG2 in the LT cross section of the multilayer ceramic capacitor. The end face-side invalid portions LG are also called L gaps or end gaps.

[0032] (Ineffective part on the side) As shown in Figures 3 and 4, the side-side invalid portions WG are opposing regions sandwiching the effective portion 11 in the width direction W, and are composed of a first side-side invalid portion WG1 and a second side-side invalid portion WG2. The first side-side invalid portion WG1 is a portion including the dielectric layer 20 located between the effective portion 11 and the first side surface WS1. The second side-side invalid portion WG2 is a portion including the dielectric layer 20 located between the effective portion 11 and the second side surface WS2. Figure 5 shows the ranges of the first side-side invalid portion WG1 and the second side-side invalid portion WG2 in the WT cross section of the multilayer ceramic capacitor. The side-side invalid portions WG are also called W gaps or side gaps.

[0033] (Vertical ridge invalid part) The vertical ridge line invalid portions VG are regions adjacent to the side surface side invalid portions WG in the length direction L and adjacent to the end surface side invalid portions LG in the width direction W. As shown in FIGS. 3 and 4, the vertical edge invalid portions VG are arranged at the four corners of the laminate 10 when viewed from the lamination direction T.

[0034] (Horizontal ridge invalid part) The horizontal ridge line invalid portion HG is a region adjacent to the end surface side invalid portion LG in the stacking direction T and adjacent to the main surface side invalid portion TG in the length direction L. As shown in FIG. 2, the horizontal ridge line invalid portions HG are arranged at the four corners of the laminate 10 when viewed from the width direction W.

[0035] (Long ridge line invalid part) The long ridge line invalid portions XG are regions adjacent to the side surface side invalid portions WG in the stacking direction T and adjacent to the main surface side invalid portions TG in the width direction W. As shown in FIG. 5, the long ridge line invalid portions XG are arranged at the four corners of the laminate 10 when viewed from the length direction L.

[0036] (Ineffective corners) The corner invalid portions are regions surrounded by vertical edge invalid portions VG, horizontal edge invalid portions HG, and long edge invalid portions XG, and are arranged at the eight corners of the laminate 10.

[0037] In this way, the laminate 10 is formed in a structure in which the valid portion 11 is surrounded by invalid portions 11 consisting of two main surface side invalid portions TG, two side surface side invalid portions WG, two end surface side invalid portions LG, four vertical ridge line invalid portions VR, four horizontal ridge line invalid portions HR, four long ridge line invalid portions XG, and eight corner invalid portions.

[0038] (curved surface) As shown in Figures 3 and 4, in the multilayer ceramic capacitor 1 of the present invention, the outer surfaces at the boundary portions VLB between the end face side invalid portions LG and the vertical ridge line invalid portions VG, the outer surfaces of the vertical ridge line invalid portions VG, and the outer surfaces at the boundary portions VWB between the vertical ridge line invalid portions VG and the side face side invalid portions WG are formed into continuous curved surfaces VR that protrude outward when viewed in a plane from the stacking direction T.

[0039] In the LW cross section of the laminate 10 parallel to the length direction L and width direction W, when the length in the width direction W at the center of the laminate 10 is W1, the length in the length direction L of the laminate 10 at a position 0.02W1 toward the side surface WS from the boundary VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG is shorter than the length in the length direction L of the laminate 10 at a position 0.02W1 toward the center in the width direction W of the laminate 10 from the boundary VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG. Such a shape of the curved surface VR in the vicinity of the boundary VLB can be obtained by subjecting the laminate to barrel polishing treatment before or after firing.

[0040] As shown in FIG. 2, in the multilayer ceramic capacitor 1, the outer surface at the boundary HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG, the outer surface of the horizontal ridge line invalid portion HG, and the outer surface at the boundary HTB between the horizontal ridge line invalid portion HG and the main surface side invalid portion TG form a continuous curved surface HR that protrudes outward when viewed from the side in the width direction W.

[0041] In the LT cross section of the laminate 10 parallel to the longitudinal direction L and the stacking direction T, when the length in the stacking direction T at the center of the laminate 10 is T1, the length in the longitudinal direction L of the laminate 10 at a position 0.02T1 toward the main surface TS from the boundary HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG is shorter than the length in the longitudinal direction L of the laminate 10 at a position 0.02T1 toward the center of the stacking direction T of the laminate 10 from the boundary HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG. Such a shape of the curved surface HR in the vicinity of the boundary HLB can be obtained by subjecting the laminate to barrel polishing before or after firing.

[0042] The continuous curved surface VR formed by the outer surface at the boundary portion VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG, the outer surface of the vertical ridge line invalid portion VG, and the outer surface at the boundary portion VWB between the vertical ridge line invalid portion VG and the side face side invalid portion WG, and the continuous curved surface HR formed by the outer surface at the boundary portion HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG, the outer surface of the horizontal ridge line invalid portion HG, and the outer surface at the boundary portion HTB between the horizontal ridge line invalid portion HG and the main face side invalid portion TG can be formed simultaneously by barrel polishing the laminate 10.

[0043] The barrel polishing may be performed in one step or in multiple steps. When the barrel polishing is performed in multiple steps, the rotation speed may be different for each step.

[0044] (protective film) 3 and 4, a protective film SC containing carbon and silicon as constituent elements is formed on a continuous curved surface VR formed by the outer surface of the boundary VLB between the end-side invalid portion LG and the vertical edge invalid portion VG, the outer surface of the vertical edge invalid portion VG, and the outer surface of the boundary VWB between the vertical edge invalid portion VG and the side-side invalid portion WG. The provision of such a protective film SC protects the boundary VLB between the end-side invalid portion LG and the vertical edge invalid portion VG, preventing cracks and chips from occurring at the boundary VLB. The protective film SC also protects the boundary VWB between the vertical edge invalid portion VG and the side-side invalid portion WG, preventing cracks and chips from occurring at the boundary VWB.

[0045] In particular, when the thickness in the width direction W of the side-side invalid portion WG is 20 μm or less, cracks and chips tend to occur easily at the boundary portion VLB between the end-side invalid portion LG and the vertical ridge invalid portion VG of the laminate 10. However, as in the present invention, the outer surface at the boundary portion VLB between the end-side invalid portion LG and the vertical ridge invalid portion VG, the outer surface of the vertical ridge invalid portion VG, and the outer surface at the boundary portion VWB between the vertical ridge invalid portion VG and the side-side invalid portion WG are made into a continuous curved surface VR, and a protective film SC is formed on this curved surface VR, so that cracks and chips can be effectively prevented from occurring at the boundary portion VLB even when the thickness in the width direction W of the side-side invalid portion WG is 20 μm or less.

[0046] The protective film SC is preferably formed continuously from the curved surface VR on the outer surfaces of the side ineffective portions WG. Protecting the outer surfaces of the side ineffective portions WG with the protective film SC continuously from the curved surface VR can further improve the strength of the multilayer ceramic capacitor. The protective film SC only needs to be formed on the curved surface VR, and does not necessarily need to be formed continuously onto the outer surface of the side-side invalid portion WG. Furthermore, the protective film SC formed on the outer surface of the side-side invalid portion WG does not necessarily need to protect the entire outer surface of the side-side invalid portion WG.

[0047] As shown in Figure 2, a protective film SC containing carbon and silicon as constituent elements is formed on the outer surface of the boundary HLB between the end face-side invalid portion LG and the horizontal ridge invalid portion HG, and on the continuous curved surface HR formed by the outer surface of the horizontal ridge invalid portion HG and the outer surface of the boundary HTB between the horizontal ridge invalid portion HG and the main surface-side invalid portion TG. By providing such a protective film SC, the boundary HLB between the end face-side invalid portion LG and the horizontal ridge invalid portion HG can be protected and cracks and chips can be prevented from occurring at the boundary HTB. In addition, the protective film SC protects the boundary HTB between the horizontal ridge invalid portion HG and the main surface-side invalid portion TG and can prevent cracks and chips from occurring at the boundary HTB.

[0048] In particular, when the thickness of the main surface-side invalid portion TG in the stacking direction T is 40 μm or less, cracks and chips tend to occur at the boundary portion HLB between the end surface-side invalid portion LG and the horizontal ridge invalid portion HG of the laminate 10. However, as in the present invention, the outer surfaces of the boundary portion HLB between the end surface-side invalid portion LG and the horizontal ridge invalid portion HG, the outer surfaces of the horizontal ridge invalid portion HG, and the outer surfaces of the boundary portion HTB between the horizontal ridge invalid portion HG and the main surface-side invalid portion TG are formed into a continuous curved surface HR, and a protective film SC is formed on this curved surface HR, thereby effectively preventing cracks and chips from occurring at the boundary portion HLB even when the thickness of the main surface-side invalid portion TG in the stacking direction T is 40 μm or less. Furthermore, even when the thickness of the main surface-side invalid portion TG in the stacking direction T is 25 μm or less, the formation of a protective film SC on the curved surface HR reliably prevents cracks and chips from occurring at the boundary portion HLB.

[0049] The protective film SC is preferably formed continuously from the curved surface HR on the outer surface of the main surface-side invalid portion TG. By protecting the outer surface of the main surface-side invalid portion TG continuously from the curved surface HR with the protective film SC, it is possible to further improve the strength of the multilayer ceramic capacitor. The protective film SC only needs to be formed on the curved surface HR, and does not necessarily need to be formed continuously onto the outer surface of the main surface-side invalid portion TG. Furthermore, the protective film SC formed on the outer surface of the main surface-side invalid portion TG does not necessarily need to protect the entire outer surface of the main surface-side invalid portion TG.

[0050] The protective film SC can be formed by plasma spraying, aerosol deposition, etc. The base material for forming the protective film SC can be, for example, silicon carbide, to which a metal oxide such as alumina, magnesia, zirconia, or titania, silicon nitride, or a mixture thereof can be added.

[0051] The plasma spraying method is a coating method in which a working gas is ejected as a plasma jet by an arc generated between electrodes, and the spray material is introduced into the plasma jet, heated, accelerated, and deposited on the laminate 10 to obtain a sprayed coating.

[0052] The aerosol deposition method involves spraying an aerosol, in which fine particles of raw ceramic material are dispersed in a gas, from an aerosol spray nozzle toward the substrate, which is a laminate 10, and causing the aerosol to collide with the substrate surface at high speed, forming a coating made of the constituent material of the fine particles on the substrate. During film formation by the aerosol deposition method, the ceramic fine particles remain dispersed in the aerosol. Because the coating obtained by the aerosol deposition method is formed from the fine particles dispersed in the aerosol, the resulting protective film SC is formed into a dense film.

[0053] The protective film SC may be formed by laminating two or more coating layers. When forming the layers, for example, either the plasma spraying method or the aerosol deposition method may be used repeatedly, or both methods may be combined (for example, the first layer may be formed by the aerosol deposition method and the second layer by the plasma spraying method).

[0054] The thickness of the protective film SC is preferably 10 nm or more and 100 nm or less to reliably protect the curved surface VR or HR. If the thickness of the protective film SC is less than 10 nm, it will not be possible to maintain sufficient strength, and if it exceeds 100 nm, it will take a long time to perform a sandblasting process on the end surface LS of the laminate 10, scrape off part of the protective film SC, and expose the lead portions of the internal electrode layers 30 in the manufacturing process of the ceramic capacitor described below.

[0055] (external electrode) The external electrode 40 is composed of a first external electrode 40A and a second external electrode 40B.

[0056] The first external electrode 40A is disposed on the first end face LS1 side and is connected to the first internal electrode layer 31. The second external electrode 40B is disposed on the second end face LS2 side and is connected to the second internal electrode layer 32.

[0057] 3 and 4, the first external electrode 40A can be arranged not only on the first end face-side invalid portion LG1 that forms the first end face LS1 but also on parts of the first side face WS1 and the second side face WS2 so as to cover the protective film SC formed on the curved face VR and the outer surface of the side face-side invalid portion WG. Furthermore, the second external electrode 40B can be arranged not only on the second end face-side invalid portion LG2 that forms the second end face LS2 but also on parts of the first side face WS1 and the second side face WS2 so as to cover the protective film SC formed on the curved face VR and the outer surface of the side face-side invalid portion WG.

[0058] 2, the first external electrode 40A can be arranged not only on the first end face-side invalid portion LG1 that forms the first end face LS1 but also on parts of the first main face TS1 and the second main face TS2 so as to cover the protective film SC formed on the curved face HR and the outer surface of the main face-side invalid portion TG. Also, the second external electrode 40B can be arranged not only on the second end face-side invalid portion LG2 that forms the second end face LS2 but also on parts of the first main face TS1 and the second main face TS2 so as to cover the protective film SC formed on the curved face HR and the outer surface of the main face-side invalid portion TG.

[0059] In the laminate 10, a capacitance is formed by the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 facing each other via the dielectric layer 20. Therefore, the function of a capacitor is exerted between the first external electrode 40A connected to the first internal electrode layer 31 and the second external electrode 40B connected to the second internal electrode layer 32.

[0060] The first external electrode 40A and the second external electrode 40B can be formed, for example, by a base electrode layer and a plating layer disposed on the base electrode layer. The base electrode layer is formed by applying a conductive paste containing a metal component and a glass component to the first end face LS1 and the second end face LS2 of the laminate 10, followed by baking. Examples of the metal component contained in the conductive paste include metals such as Cu, Ni, Ag, Pd, and Au, and alloys such as Ag and Pd.

[0061] The plating layer disposed on the base electrode layer contains at least one of metals such as Cu, Ni, Ag, Pd, and Au, or an alloy such as Ag and Pd. The plating layer may have a two-layer structure of, for example, a Ni plating layer and a Sn plating layer. However, the plating layer may be a single layer or multiple layers.

[0062] (Manufacturing method) A multilayer ceramic capacitor can be manufactured by forming a laminate including an active portion in which a plurality of internal electrode layers and dielectric layers are stacked, and arranging external electrodes so as to connect to the ends of the internal electrode layers exposed at the end faces of the laminate.

[0063] (Formation of laminate) First, ceramic green sheets for the dielectric layers and conductive paste for the internal electrode layers are prepared. The ceramic green sheets and the conductive paste for the internal electrode layers contain a binder and a solvent. The binder and solvent may be known.

[0064] Then, a conductive paste for the internal electrode layers is printed in a predetermined pattern on the ceramic green sheets, for example, by screen printing or gravure printing. This prepares a ceramic green sheet on which the pattern of the first internal electrode layer is formed, and a ceramic green sheet on which the pattern of the second internal electrode layer is formed. The conductive paste for the internal electrode layers is, for example, a metal powder to which an organic binder and an organic solvent have been added. Regarding the ceramic green sheets, ceramic green sheets for use in invalid portions on which the pattern of the internal electrode layer is not printed are also prepared.

[0065] Next, a predetermined number of ceramic green sheets for invalid portions on which the pattern of the internal electrode layer is not printed are stacked to form the portions that will become the second main surface side invalid portion and the horizontal ridge line invalid portion. On top of that, ceramic green sheets on which the pattern of the first internal electrode layer is printed and ceramic green sheets on which the pattern of the second internal electrode layer is printed are sequentially stacked to form the structure of the present invention, thereby forming the portions that will become the valid portion, the end surface side invalid portion, the side surface side invalid portion, and the vertical ridge line invalid portion. On top of these portions that will become the valid portion, etc., a predetermined number of ceramic green sheets for invalid portions on which the pattern of the internal electrode layer is not printed are stacked to form the portions that will become the first main surface side invalid portion and the horizontal ridge line invalid portion. This produces a laminated sheet.

[0066] Next, the laminated sheets are pressed in the lamination direction by means of a hydrostatic press or the like to produce a laminated block.

[0067] The laminated block is then cut to a predetermined size to obtain laminated chips, and at this time, the corners and ridges of the laminated chips are rounded by barrel polishing or the like.

[0068] By performing barrel polishing, the surfaces of the boundary portion VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG, the vertical ridge line invalid portion VG, and the boundary portion VWB between the vertical ridge line invalid portion VG and the side face side invalid portion WG can be formed into a continuous curved surface VR that protrudes outward when viewed in a plane from the stacking direction T.

[0069] Similarly, by performing barrel polishing, the surfaces of the boundary portion HLB between the end face side invalid portion LG and the horizontal ridge invalid portion HG, the horizontal ridge invalid portion HG, and the boundary portion HTB between the horizontal ridge invalid portion HG and the main surface side invalid portion TG can be formed into a continuous curved surface HR that protrudes outward when viewed from the side in the width direction W.

[0070] Next, the laminated chip is fired to produce the laminate 10. The firing temperature depends on the materials of the dielectric and internal electrode layers, but is preferably 900°C or higher and 1400°C or lower.

[0071] (Protective film formation) The protective film SC containing carbon and silicon as constituent elements can be formed on the surface of the laminate 10 by, for example, using silicon carbide as the base material and by plasma spraying, aerosol deposition, or the like.

[0072] Next, the end faces LS of the laminate 10 are subjected to sandblasting to expose the lead portions of the internal electrode layers 30 from the end faces LS. However, a masking agent is applied to the curved surface VR consisting of the outer surface of the boundary portion VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG, the outer surface of the vertical ridge line invalid portion VG, and the outer surface of the boundary portion VWB between the vertical ridge line invalid portion VG and the side face side invalid portion WG to protect the protective film SC. In addition, a masking agent is applied to the curved surface HR consisting of the outer surface of the boundary portion HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG, the outer surface of the horizontal ridge line invalid portion HG, and the outer surface of the boundary portion HTB between the horizontal ridge line invalid portion HG and the main surface side invalid portion TG, to protect the protective film SC.

[0073] Examples of blast materials used in the blasting process include steel, stainless steel, zirconia, alumina, silica, silicon carbide, resin, rubber, and the like. The blasting material may be spherical or non-spherical in shape. The blasting treatment may be dry blasting (dry blasting) or wet blasting (wet blasting).

[0074] (Formation of external electrodes) The method for forming the external electrodes on the end faces of the laminate is not particularly limited, but may be a method of applying a conductive paste to the end faces of the laminate and firing the paste. The conductive paste for forming the external electrodes on the ends of the laminate contains metal and glass, and may contain resin as needed. The metal preferably includes at least one selected from the group consisting of Cu, Ni, Ag, Pd, an Ag—Pd alloy, and Au. As the glass, B-Si based glass, B-Si-Zn based glass, B-Si-Zn-Ba based glass, B-Si-Zn-Ba-Ca-Al based glass, etc. can be used.

[0075] A plating layer may further be formed on the surface of the external electrode obtained by firing the conductive paste. The composition of the plating layer formed on the surface of the external electrode is not particularly limited, but it preferably contains at least one selected from the group consisting of Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, and Sn, and two or more layers with different compositions may be laminated. The two or more plating layers are preferably composed of a Ni plating layer (first layer) that is in direct contact with the external electrode and a Sn plating layer (second layer) that is not in direct contact with the external electrode. The thickness of the Ni layer is preferably 1 μm or more and 8 μm or less, and the thickness of the Sn layer is preferably 1 μm or more and 8 μm or less. The Ni plating layer prevents the external electrodes from being corroded by solder when mounting the multilayer ceramic capacitor, while the Sn plating layer improves solder wettability, making it easier to mount the multilayer ceramic capacitor. Through the above steps, a multilayer ceramic capacitor is manufactured. [Example]

[0076] Each sample of the multilayer ceramic capacitor of the following examples and comparative examples was manufactured, and each sample was evaluated by a drop test.

[0077] (Example) Twenty multilayer ceramic capacitors were prepared, each having a protective film SC formed on a curved surface VR formed by the outer surface of the boundary portion VLB between the end face side invalid portion LG and the vertical ridge line invalid portion VG, the outer surface of the vertical ridge line invalid portion VG, and the outer surface of the boundary portion VWB between the vertical ridge line invalid portion VG and the side face side invalid portion WG, and a curved surface HR formed by the outer surface of the boundary portion HLB between the end face side invalid portion LG and the horizontal ridge line invalid portion HG, the outer surface of the horizontal ridge line invalid portion HG, and the outer surface of the boundary portion HTB between the horizontal ridge line invalid portion HG and the main face side invalid portion TG.

[0078] (Comparative Example) Twenty multilayer ceramic capacitors were prepared in the same manner as in the example except that the protective film SC was not formed on the curved surfaces VR and HR.

[0079] (Drop test) Twenty monolithic ceramic capacitors of the example were placed in a container, and the container was dropped from a height of 20 cm, and this operation was repeated 20 times. Similarly, 20 monolithic ceramic capacitors of the comparative example were placed in a container, and the container was dropped from a height of 20 cm, and this operation was repeated 20 times.

[0080] After the drop test, the occurrence of chips was checked. The chips include large chips and small chips. A large chip is a chip that is larger than LW / 4, where LW is the length in the width direction W at the center of the multilayer ceramic capacitor in the length direction L. A small chip is a chip that is smaller than a large chip. The total number of locations where large or small chips occurred is shown below. This total number is obtained by adding up the number of chips that occurred in each multilayer ceramic capacitor. Example: 51 locations Comparative example: 71 locations Next, the number of multilayer ceramic capacitors that had large chips is shown below. Example: 10 pieces Comparative example: 13 pieces

[0081] The results of the drop test confirmed that the multilayer ceramic capacitor according to the present invention is effective in preventing chipping of the laminate.

[0082] Although the embodiments of the present invention have been described above, the present invention is not limited to the embodiments, and can be embodied in various forms without departing from the gist of the present invention.

[0083] The present invention includes the following combinations:

[0084] <1> A multilayer ceramic capacitor comprising: a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers; and external electrodes arranged to be electrically connected to the internal electrode layers, the laminate comprises an effective portion where the internal electrode layers overlap each other in a lamination direction, and an ineffective portion surrounding the effective portion, and includes two main surfaces facing each other in the lamination direction, two end faces facing each other in a length direction in which the internal electrode layers extend to the external electrodes, and two side surfaces facing each other in a width direction which intersects both the lamination direction and the length direction, When, of the invalid portions, opposing regions sandwiching the valid portion in the length direction are defined as end face side invalid portions, opposing regions sandwiching the valid portion in the width direction are defined as side face side invalid portions, and regions adjacent to the side face side invalid portions in the length direction and adjacent to the end face side invalid portions in the width direction are defined as vertical ridge line invalid portions, an outer surface at a boundary between the end face side invalid portion and the vertical ridge line invalid portion, an outer surface at the vertical ridge line invalid portion, and an outer surface at a boundary between the vertical ridge line invalid portion and the side face side invalid portion form a continuous curved surface that protrudes outward in a plan view from the stacking direction, A multilayer ceramic capacitor having a protective film containing carbon and silicon as constituent elements formed on the curved surface.

[0085] <2> The thickness of the side ineffective portion in the width direction is 20 μm or less. <1> The multilayer ceramic capacitor according to claim 1.

[0086] <3> the protective film is formed continuously from the curved surface on the outer surface of the side invalid portion, <1> or <2> The multilayer ceramic capacitor according to claim 1.

[0087] <4> In a cross section of the laminate parallel to the longitudinal direction and the width direction, when the width direction length of the center of the laminate is defined as W1, the length of the laminate in the longitudinal direction at a position 0.02W1 away from the boundary between the end face side invalid portion and the vertical ridge line invalid portion toward the side surface is shorter than the length of the laminate in the longitudinal direction at a position 0.02W1 away from the boundary between the end face side invalid portion and the vertical ridge line invalid portion toward the center of the laminate in the width direction. <1> ~ <3> 10. The multilayer ceramic capacitor according to claim 9, wherein

[0088] <5> A multilayer ceramic capacitor comprising: a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers; and external electrodes arranged to be electrically connected to the internal electrode layers, the laminate comprises an effective portion where the internal electrode layers overlap each other in a lamination direction, and an ineffective portion surrounding the effective portion, and includes two main surfaces facing each other in the lamination direction, two end faces facing each other in a length direction in which the internal electrode layers extend to the external electrodes, and two side surfaces facing each other in a width direction which intersects both the lamination direction and the length direction, When, of the invalid portions, opposing regions sandwiching the effective portion in the stacking direction are defined as main surface side invalid portions, opposing regions sandwiching the effective portion in the length direction are defined as end surface side invalid portions, and a region adjacent to the end surface side invalid portions in the stacking direction and adjacent to the main surface side invalid portions in the length direction is defined as a horizontal ridge line invalid portion, an outer surface at a boundary between the end surface side invalid portion and the horizontal ridge line invalid portion, an outer surface of the horizontal ridge line invalid portion, and an outer surface at a boundary between the horizontal ridge line invalid portion and the main surface side invalid portion form a continuous curved surface that protrudes outward in a side view from the width direction, A multilayer ceramic capacitor having a protective film containing carbon and silicon as constituent elements formed on the curved surface.

[0089] <6> the thickness of the main surface-side ineffective portion in the stacking direction is 40 μm or less; <5> The multilayer ceramic capacitor according to claim 1.

[0090] <7> the protective film is formed continuously from the curved surface on the outer surface of the main surface-side invalid portion, <5> or <6> The multilayer ceramic capacitor according to claim 1.

[0091] <8> in a cross section parallel to the longitudinal direction and the stacking direction of the laminate, when a length in the stacking direction at the center of the laminate is T1, the length in the longitudinal direction of the laminate at a position 0.02T1 away from the boundary between the end face side invalid portion and the horizontal ridge line invalid portion toward the main surface is shorter than the length in the longitudinal direction of the laminate at a position 0.02T1 away from the boundary between the end face side invalid portion and the horizontal ridge line invalid portion toward the center of the laminate in the stacking direction, <5> ~ <7> 10. The multilayer ceramic capacitor according to claim 9, wherein

[0092] <9> The thickness of the protective film is 10 nm or more and 100 nm or less. <1> ~ <8> 10. The multilayer ceramic capacitor according to claim 9, wherein [Explanation of symbols]

[0093] 1. Multilayer ceramic capacitors 10 Laminate 11 Valid Part 12 Invalid part 20 dielectric layer 30 Internal electrode layer 40 External electrode SC protective film LS end face TS main surface WS side HG Horizontal ridge invalid area LG End face side dead section TG main surface side ineffective area VG Vertical ridge invalid area WG Side dead zone XG Long ridge line invalid area VR curved surface HR curved surface HLB boundary HTB border VLB boundary VWB boundary

Claims

1. A multilayer ceramic capacitor comprising: a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers; and external electrodes arranged to be electrically connected to the internal electrode layers, the laminate includes an effective portion where the internal electrode layers overlap each other in a lamination direction, and an ineffective portion surrounding the effective portion, and includes two main surfaces facing each other in the lamination direction, two end faces facing each other in a length direction in which the internal electrode layers extend to the external electrodes, and two side surfaces facing each other in a width direction which is a direction intersecting both the lamination direction and the length direction, When, of the invalid portions, opposing regions sandwiching the valid portion in the length direction are defined as end face side invalid portions, opposing regions sandwiching the valid portion in the width direction are defined as side face side invalid portions, and regions adjacent to the side face side invalid portions in the length direction and adjacent to the end face side invalid portions in the width direction are defined as vertical ridge line invalid portions, an outer surface at a boundary between the end face side invalid portion and the vertical ridge line invalid portion, an outer surface at the vertical ridge line invalid portion, and an outer surface at a boundary between the vertical ridge line invalid portion and the side face side invalid portion form a continuous curved surface that protrudes outward in a plan view from the stacking direction, A multilayer ceramic capacitor having a protective film containing carbon and silicon as constituent elements formed on the curved surface.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the thickness of the side ineffective portions in the width direction is 20 [mu]m or less.

3. 2. The multilayer ceramic capacitor according to claim 1, wherein said protective film is formed continuously from said curved surface onto the outer surface of said side ineffective portion.

4. 2. The multilayer ceramic capacitor according to claim 1, wherein, in a cross section parallel to the longitudinal direction and the width direction of the laminate, when the width direction length of the center of the laminate is defined as W1, the longitudinal length of the laminate at a position 0.02W1 away from the boundary between the end face side invalid portion and the vertical ridge line invalid portion toward the side surface is shorter than the longitudinal length of the laminate at a position 0.02W1 away from the boundary between the end face side invalid portion and the vertical ridge line invalid portion toward the center of the width direction of the laminate.

5. A multilayer ceramic capacitor comprising: a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers; and external electrodes arranged to be electrically connected to the internal electrode layers, the laminate includes an effective portion where the internal electrode layers overlap each other in a lamination direction, and an ineffective portion surrounding the effective portion, and includes two main surfaces facing each other in the lamination direction, two end faces facing each other in a length direction in which the internal electrode layers extend to the external electrodes, and two side surfaces facing each other in a width direction which is a direction intersecting both the lamination direction and the length direction, When, of the invalid portions, opposing regions sandwiching the effective portion in the stacking direction are defined as main surface side invalid portions, opposing regions sandwiching the effective portion in the length direction are defined as end surface side invalid portions, and a region adjacent to the end surface side invalid portions in the stacking direction and adjacent to the main surface side invalid portions in the length direction is defined as a horizontal ridge line invalid portion, an outer surface at a boundary between the end surface side invalid portion and the horizontal ridge line invalid portion, an outer surface of the horizontal ridge line invalid portion, and an outer surface at a boundary between the horizontal ridge line invalid portion and the main surface side invalid portion form a continuous curved surface that protrudes outward in a side view from the width direction, A multilayer ceramic capacitor having a protective film containing carbon and silicon as constituent elements formed on the curved surface.

6. 6. The multilayer ceramic capacitor according to claim 5, wherein the thickness of the main surface side ineffective portion in the lamination direction is 40 [mu]m or less.

7. 6. The multilayer ceramic capacitor according to claim 5, wherein the protective film is formed continuously from the curved surface onto the outer surface of the main surface-side invalid portion.

8. 6. The multilayer ceramic capacitor according to claim 5, wherein, in a cross section parallel to the longitudinal direction and the stacking direction of the laminate, when a length in the stacking direction at a center of the laminate is defined as T1, the longitudinal length of the laminate at a position 0.02T1 away from the boundary between the end face side invalid portion and the horizontal ridge line invalid portion toward the main surface is shorter than the longitudinal length of the laminate at a position 0.02T1 away from the boundary between the end face side invalid portion and the horizontal ridge line invalid portion toward the center of the laminate in the stacking direction.

9. 9. The multilayer ceramic capacitor according to claim 1, wherein the protective film has a thickness of 10 nm or more and 100 nm or less.

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