Reactive gas conditioning for III / IV compound deposition systems.

Abstract

According to the present invention, there is provided a process for manufacturing a semiconductor structure comprising one or more layers of III / IV compounds deposited on a template by PVD sputtering the resulting semiconductor structure. The III or IV material may be gallium, hafnium, indium, aluminum, silicon, germanium, magnesium and / or zirconium. The anions provided by the reactive gas may be nitrides, oxides, arsenides or phosphides. The flow of reactive gas into a vacuum chamber used to react with the sputtered III or IV target material to produce the III / IV compound layer on the template is modulated between target-rich and reactive gas-rich conditions during a duty cycle during the PVD sputtering process to increase the efficiency of the PVD sputtering process and improve the crystallinity of the III / IV compound layer in the resulting semiconductor structure.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 121,620, filed December 4, 2020, U.S. Provisional Patent Application No. 63 / 141,785, filed January 26, 2021, and U.S. Provisional Patent Application No. 63 / 152,531, filed February 23, 2021, each entitled "Array Stamps By Cool Growth," and is a continuation-in-part of U.S. Provisional Patent Application No. 17 / 520,691, filed November 7, 2021, entitled "Method and Apparatus for Micro-LED Array and Active Matrix," all of which are incorporated by reference in their entireties herein.

[0002] This application is a direct descendant of: No. 15 / 294,558, filed on October 14, 2016, entitled “System and Method for Light-Emitting Devices on Lattice-Matched Metal Substrates,” and published on April 20, 2017 as U.S. Patent Application Publication No. 2017 / 0110626; · U.S. Provisional Patent Application No. 62 / 242,604, filed on October 16, 2015, entitled “Method and Hyper Emission Green Light-Emitting Diode on Lattice-Matched Metal Substrates for Advanced Optical Fiber Networking”; each of which is incorporated herein by reference in its entirety.

[0003] This application is also an earlier application: · U.S. Provisional Patent Application No. 60 / 835,934, filed August 6, 2006, entitled “III-Nitride Light-Emitting Devices with One or More Resonance Reflectors and Reflective Engineered Growth Templates for Such Devices, and Methods”; · U.S. Provisional Patent Application No. 60 / 821,588, filed August 7, 2006, entitled “III-Nitride Light-Emitting Devices with One or More Resonance Reflectors and Reflective Engineered Growth Templates for Such Devices, and Methods”; · U.S. Provisional Patent Application No. 61 / 066,960, filed February 25, 2008, entitled “Current-Injecting / Tunneling Light Emitting Device and Method”; · U.S. Provisional Patent Application No. 61 / 610,943, filed on March 14, 2012, entitled “Metallo-Semiconductor Structures for III-Nitride Devices”; · U.S. Provisional Patent Application No. 61 / 623,885, filed April 13, 2012, entitled “Structures for III-Nitride Devices”; · U.S. Provisional Patent Application No. 61 / 655,477, filed June 4, 2012, entitled “Metal-Base Transistors for III-Nitride Devices”; · U.S. Patent No. 7,915,624, issued March 29, 2011, entitled “III-Nitride Light-Emitting Devices with One or More Resonance Reflectors and Reflective Engineered Growth Templates for Such Devices, and Methods”; · U.S. Patent No. 8,253,157, issued on August 28, 2012, entitled “III-Nitride Light-Emitting Devices with Reflective Engineered Growth Templates and Methods of Manufacture” (a division of an application that is now U.S. Patent No. 7,915,624); · U.S. Patent No. 8,890,183, issued on November 18, 2014 and entitled “III-Nitride Light-Emitting Devices with Reflective Engineered Growth Templates and Manufacturing Method” (a division of an application that is now U.S. Patent No. 8,253,157); · U.S. Patent No. 7,842,939, issued November 30, 2010, entitled “Current-Injecting / Tunneling Light Emitting Device and Method”; · U.S. Patent No. 8,865,492 (a division of application now U.S. Patent No. 7,842,939), issued on October 21, 2014 and entitled “Method of Forming Current-Injecting / Tunneling Light Emitting Device”; · U.S. Patent No. 9,608,145, issued on March 28, 2017 and entitled “Materials, Structures, and Methods for Optical and Electrical III-Nitride Semiconductor Devices”; each of which is incorporated herein by reference in its entirety.

[0004] The present invention relates to the field of semiconductor devices and methods for their manufacture, and more particularly to methods for more efficiently growing III / IV compound based semiconductor devices. [Background technology]

[0005] A semiconductor is a material that conducts electric current better than an insulator such as glass, but not as well as a conductor such as copper. Such semiconductor materials enable modern computers and many other devices such as light emitting devices, laser diodes, transistors, radiation detectors, sensors, and solar cells.

[0006] Silicon is the most widely used semiconductor material, however other important materials for semiconductors include cuprous oxide, germanium, gallium arsenide, gallium phosphide, indium arsenide, lead sulfide, selenium, silicon carbide, etc.

[0007] Such semiconductor devices exhibit numerous advantages over the vacuum and gas-filled tubes that preceded them in the electronics industry: for example, semiconductor devices use much less power than tubes, last longer, and can be constructed much smaller.

[0008] In ordinary copper wire, the copper atoms have electrons that move freely from atom to atom. This flow of electrons creates an electric current.

[0009] In an ideal state, a semiconductor material is characterized by the absence of free electrons, thus making it an insulator. However, when tiny amounts of dopant impurities such as antimony, arsenic, or phosphorus are introduced into a semiconductor material, a small number of free electrons are created that can move within the material and generate an electric current. Such semiconductor materials are known in the industry as "n-type semiconductors."

[0010] However, when a semiconductor material is doped with small amounts of other dopant impurities such as aluminum, boron, or gallium, electrons are removed from a few atoms, creating "holes." These holes can pass from atom to atom within the semiconductor. This flow of holes forms an electric current. This is called a "p-type semiconductor."

[0011] Semiconductor diodes allow current to flow in only one direction and are used as rectifiers. Semiconductor diodes contain pieces of gallium arsenide, germanium, or silicon, and have n-type and p-type regions, with a p-n junction where they meet. If the p-type region has a positive charge and the n-type region has a negative charge, the p-type region in the semiconductor will attract electrons from the n-type region, and the n-type region will attract holes from the p-type region. This causes current to flow through the p-n junction in the semiconductor diode. However, if you make the p-type region negative and the n-type region positive, very little current will flow through the p-n junction.

[0012] Light-emitting semiconductor lamps contain tiny gallium phosphide diodes that produce light under little electrical power. Light-emitting diodes ("LEDs") are semiconductor light sources that emit light when electrical current passes through them. Electrons in the semiconductor material recombine with electron-holes contained therein, thereby releasing energy in the form of photons. The color of the resulting light, which corresponds to the energy of these photons, is determined by the energy required for electrons to cross the band gap in the semiconductor.

[0013] LED semiconductors offer many advantages over conventional incandescent lamps, including lower power consumption allowing for cooler operation, longer lifetime, greater physical robustness, smaller size, and faster switching times.

[0014] The first visible spectrum red LEDs, based on the gallium arsenide (GaAs) semiconductor alloy, were demonstrated in the UK in 1961. Monsanto mass-produced red LEDs incorporating GaAsP in 1968, which became the display of choice for numeric displays in calculators and other machines where brightness and size were not an issue.

[0015] The first blue LED using magnesium-doped gallium nitride (GaN) was developed in the United States in 1972. Important breakthroughs in GaN epitaxial growth and p-type doping in the late 1980s enabled Shuji Nakamura to develop a high-brightness blue LED in 1993, for which he was subsequently awarded the Nobel Prize in Physics.

[0016] Epitaxial growth of GaN-based compounds has enabled improvements in the manufacturing process of LEDs. For example, green LEDs are now typically fabricated based on an indium gallium nitride (InGaN) / GaN layered structure rather than traditional non-nitride material systems. White LEDs typically use a combination of multiple LED semiconductor clips emitting red, green, and blue wavelengths.

[0017] However, it would be highly beneficial to develop further improvements to the manufacturing processes and structures of GaN-based and other III / IV compound-based film stack systems that would enable colored LEDs that are brighter, smaller, more robust, more reliable, require less power to operate, and are less expensive to manufacture. Such improvements would expand the end uses of LEDs in a variety of industrial and consumer electronic products. Summary of the Invention

[0018] According to the present invention, a process for manufacturing a semiconductor structure comprising one or more layers of III / IV compounds deposited on a template by PVD sputtering the resulting semiconductor structure is provided. The III or IV material may be gallium, hafnium, indium, aluminum, silicon, germanium, magnesium and / or zirconium. The anions provided by the reactive gas may be nitrides, oxides, arsenides or phosphides. The flow of reactive gas into a vacuum chamber used to react with the sputtered III or IV target material to produce the III / IV compound layer on the template is modulated between target-rich and reactive gas-rich conditions during a duty cycle during the PVD sputtering process to increase the efficiency of the PVD sputtering process and improve the crystallinity of the III / IV compound layer in the resulting semiconductor structure. [Brief description of the drawings]

[0019] The accompanying drawings are as follows: [Figure 1] 1 is a flow chart of a method for growing gallium nitride ("GaN") based devices. [Diagram 2] FIG. 1 is a schematic diagram of a system for growing GaN-based devices. [Diagram 3] FIG. 1 is a schematic diagram of a GaN structure. [Figure 4] FIG. 1 is a schematic diagram of a low temperature III / IV compound sputtering system. [Diagram 5] 1A-1C are a series of schematic diagrams illustrating different epitaxial growth modes in accordance with some embodiments of the present invention. [Figure 6] 1 shows a III-nitride resonant cavity LED (also known as a microcavity LED) with a GEMM and a non-epitaxial metal mirror for improved light extraction according to one embodiment of the present invention. [Figure 7] FIG. 1 is a block diagram of a semiconductor device structure including a multilayer metal semiconductor structure according to one embodiment of the present invention. [Figure 8] FIG. 2 is a schematic diagram showing a series of typical duty cycles for a manufacturing process. [Figure 9] FIG. 2 is a schematic diagram showing the duty cycle of reactive gas adjustment of a PVD sputtering process for manufacturing a semiconductor device according to the present invention. [Figure 10] FIG. 1 is a schematic diagram of a first structure of the present invention comprising layers of n-GaN and ZrHfN used as mirrors in combination with LED layers deposited on a CMOS active matrix backplane, enabling the resulting device to block light propagation into the AM material. [Figure 11] FIG. 1 is a schematic diagram of a second structure including such an n-GaN and ZrHfN mirror in combination with an LED layer deposited on a CMOS active matrix backplane. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] According to the present invention, a process for manufacturing a semiconductor structure comprising one or more layers of III / IV compounds deposited on a template by PVD sputtering the resulting semiconductor structure is provided. The III or IV material may be gallium, hafnium, indium, aluminum, silicon, germanium, magnesium and / or zirconium. The anions provided by the reactive gas may be nitrides, oxides, arsenides or phosphides. The flow of reactive gas into a vacuum chamber used to react with the sputtered III or IV target material to produce the III / IV compound layer on the template is modulated between target-rich and reactive gas-rich conditions during a duty cycle during the PVD sputtering process to increase the efficiency of the PVD sputtering process and improve the crystallinity of the III / IV compound layer in the resulting semiconductor structure.

[0021] As used in this application, the term "substrate" refers to the material on which an epitaxial growth process is performed. Suitable substrates include silicon, sapphire, or other suitable materials.

[0022] For purposes of the present invention, the term "template" refers to one or more layers that form a suitable base for epitaxial growth. Suitable templates include silicon, sapphire, GaN / silicon, GaN / sapphire, GaN / aluminum nitride (AlN), GaN / hafnium nitride (HfN), GaN / zirconium nitride (ZrN), or any other suitable material, structure, pattern template, or substrate.

[0023] As used herein, the term "epitaxial" refers to the material state (i.e., not the process) of an inorganic material based on an electrical or electrical-optical relationship with another inorganic material in physical contact (typically layered) of the material, the materials are substantially lattice matched (i.e., the atomic lattices of two or more materials are arranged in a predictable and organized repeating atomic lattice structure), and the materials are substantially single crystalline. That is, the lattice mismatch and layer thickness distortions (1) do not generate undesirable cracks in the device, (2) do not generate dislocations having a density and / or of such a type that they would cause undesirable electrical shorting of the device such that the device would not be useful, and (3) do not generate secondary material phases (e.g., inclusions, precipitates, polycrystalline grains, and / or multicrystalline grains) such that the device would not be useful.

[0024] Additionally, as one of ordinary skill in the art would understand, carbon-containing compounds such as carbides, carbonates, simple oxides of carbon (e.g., CO and CO2), and cyanides, as well as allotropes of carbon (e.g., diamond and graphite), are considered to be inorganic.

[0025] As used in this application, the term "Group III / IV compound" means a nitride, oxide, arsenide, or phosphide compound in which the Group III or Group IV metal cation is gallium (Ga), indium (In), aluminum (Al), silicon (Si), germanium (Ge), magnesium (Mg), hafnium (Hf), or zirconium (Zr).

[0026] For purposes of this invention, "group III / IV target" means an element or combination of elements selected from the group III / IV periodic elements that are sputtered under the PVD sputtering process of the present invention to produce a group III / IV compound material, including, but not limited to, gallium (Ga), indium (In), aluminum (Al), silicon (Si), germanium (Ge), magnesium (Mg), hafnium (Hf), and / or zirconium (Zr).

[0027] As used in this application, "reactive gas" means a gas that is introduced into a PVD sputtering vacuum chamber and reacts with the sputtered group III / IV target to produce group III / IV compounds, and includes nitrogen (N2), oxygen (O2), arsenide (As -3 ) precursor or phosphide (P -3 ) precursors.

[0028] As used herein, physical vapor deposition ("PVD") describes deposition methods that can be used to produce thin films and coatings, and includes cathodic arc deposition, electron beam PVD, evaporative deposition, pulsed laser deposition, and sputtering.

[0029] For purposes of the present invention, "sputtering" includes one or more of the following: direct current (DC) sputtering, radio frequency (RF) sputtering, reactive sputtering, and magnetron sputtering.

[0030] As used in this application, the term "epitaxially grown product" means a semiconductor product fabricated by a PVD process, particularly sputtering, and functioning as a light emitting device, such as a light emitting diode ("LED"), a laser diode, a transistor, a detector, a sensor, and the like.

[0031] Such epitaxial products are produced by successively depositing layers of III / IV compounds onto a substrate. Furthermore, some epitaxial products require sandwich structures formed from alternating layers of different chemical components, such as GaN, HfN, or AlN.

[0032] FIG. 1 depicts a flow chart of a method 10 for growing GaN-based devices. In some embodiments, method 10 is performed in a single deposition chamber. In other embodiments, method 10 is performed in multiple separate deposition chambers. Method 10 includes any one or more of steps 12-22 (e.g., in some embodiments, steps 14 and 18 are optional). In step 12, a substrate (e.g., sapphire or silicon) is positioned for subsequent deposition. In step 14, substrate conditioning is performed. In step 16, AlN is sputtered onto the substrate, where X represents the thickness of the sputtered AlN material. In step 18, AlN conditioning is performed to remove oxides. In step 20, GaN is sputtered onto the AlN layer, where Y represents the thickness of the sputtered GaN material. In some such embodiments, GaN sputtering includes doping (e.g., doping with silicon, magnesium, iron, carbon, or the like) and / or adatom mobility enhancement. At step 22, a second layer of GaN is sputtered onto the first GaN layer, where Z represents the thickness of this second sputtered GaN layer. In some such embodiments, the GaN sputtering includes doping (e.g., doping with silicon, magnesium, iron, carbon, or the like) and / or adatom mobility enhancement (sometimes referred to herein as EALS). In some embodiments, the GaN is alloyed with scandium, zirconium, hafnium, indium, aluminum, or any other suitable element.

[0033] FIG. 2 depicts a schematic diagram of a system 30 for growing GaN-based devices. In some embodiments, the system 30 is used to implement the method of FIG. 1. The system 30 includes a load lock 32 into which a substrate wafer 34 is loaded and into which a finished wafer 34 is removed from the system 30. The system 30 includes a substrate conditioning module 38 (e.g., for performing step 14 of FIG. 1), an AlN deposition module 40 (e.g., for performing step 16 of FIG. 1), an AlN conditioning module 42 (e.g., for performing step 18 of FIG. 1), a GaN deposition module 44 (e.g., for performing step 20 of FIG. 1), and a doping module 46 for doped GaN deposition. In some embodiments, the modules 32-46 are contained within a single deposition chamber. In other embodiments, each of the modules 32-46 is a separate deposition chamber. In some embodiments, the system 30 includes a wafer handling robot 48 for moving wafers between modules in the system 30.

[0034] FIG. 3 depicts a schematic diagram of a GaN structure 60. In some embodiments, the GaN structure 60 is produced by using the system 30 of FIG. 2 and / or the method 10 of FIG. 1. The GaN structure 60 includes a substrate layer 62, an AlN layer 64 sputtered onto the substrate layer 62 (in some such embodiments, the thickness of the AlN layer 64=X), and a GaN layer 66 sputtered onto the AlN layer 64, where the thickness of the GaN layer 66=Y. In some such embodiments, the GaN layer 66 is doped (e.g., doped with silicon, magnesium, or the like). A second sputtered GaN layer 68 may be sputtered onto the first GaN layer 66, where the thickness of the GaN layer 68=Z. In some such embodiments, the GaN layer 68 is doped (e.g., doped with silicon, magnesium, or the like).

[0035] Conventional industrial systems use metalorganic chemical vapor deposition (MOCVD) for the growth of GaN layers to produce GaN-based devices. In the present invention, sputtering of III / IV compounds is generally used instead of MOCVD, especially for the GaN film layer. Sputtering processes such as PVD allow for less wafer bow and therefore better wafer / device uniformity with sputtering, lower process temperatures, and lower cost chemical use of NH3 and Ga(CH3)3. In some embodiments, sputtering processes are also easier to utilize with less complex equipment requirements and lower cost than molecular beam epitaxy ("MBE") processes.

[0036] FIG. 4 depicts a schematic diagram of a PVD sputtering system 80 for III / IV compounds. The sputtering system 80 includes a vacuum chamber 82. Inside the vacuum chamber are a wafer holder 84 and a sputtering gun cathode 86. Two anodes 88 are disposed inside the vacuum chamber 82 above the cathode 86. A voltage source 90 supplies current to the anodes 88 via wires 92. Meanwhile, an inert gas such as argon (Ar) is supplied from a supply tank 94 to the vacuum chamber 82 above the cathode 86. A separate supply tank provides gas corresponding to the anionic portion of the III / IV compounds (e.g., nitride (N), oxide (O), arsenide (Ar), or phosphide (P)) that is introduced into the top of the vacuum chamber 82.

[0037] Elements such as Hf and Al, which are naturally solid at room temperature, can be easily deposited on a substrate wafer by this PVD sputtering process. In this PVD process, a target III / IV material 83, such as Hf or Al, placed on top of a cathode 86, is essentially vaporized and deposited as a thin film on a substrate wafer 98, which is secured by a wafer holder 84 contained inside a vacuum chamber 82. Atoms of an inert gas, such as argon, are bombarded by electrons passing between the electrically negatively charged anode 88 and the cathode 86, thereby encouraging the resulting positively charged Ar cations to bombard the target material 83, which is placed on top of the cathode inside the chamber. Small molecules 100 of the Hf or Al material are released inside the vacuum chamber 82 and are "sputtered" (i.e., sprayed) towards the underside of the substrate 98. Meanwhile, a reactive gas 96, such as nitrogen (N2), mixes with these HF or Al small molecules 100 to form a plasma of HfN or AlN that rises inside the vacuum chamber and forms a resultant film layer on the substrate wafer. This sputtering process is known in the industry to produce precise, uniform distributions of reactive HfN or AlN compound films and is compatible with a variety of target materials.

[0038] However, Ga is naturally liquid near room temperature. Therefore, it was believed in the industry and research community that gallium compounds such as GaN could not be deposited on substrates by magnetron sputtering using a Ga target. Liquid Ga would accumulate Ar during the PVD sputtering process, thereby generating bubbles that would eventually erupt Ga droplets onto the wafer. Instead, alternative techniques such as molecular beam epitaxy, metalorganic vapor phase epitaxy, reactive pulsed laser, or hydride vapor phase epitaxy were previously employed in the industry and research community for the deposition of GaN or other Ga-containing compounds. However, since HfN films are best made by sputtering, this necessarily required manufacturers to alternate different deposition processes such as magnetron sputtering and molecular beam epitaxy, metalorganic vapor phase epitaxy, reactive pulsed laser, or hydride vapor phase epitaxy to build, for example, alternating HfN-GaN-HfN-GaN sandwiches for semiconductor electrical devices. The use of multiple deposition techniques increases manufacturing costs and increases the complexity within the manufacturing process.

[0039] Thus, the PVD sputtering process 10 of the present invention may apply a cryogenic chiller 104 to circulate one or more heat transfer fluids through lines 106 and 108 to the cathode 86 of the magnetron sputtering gun to significantly reduce the temperature of the liquid Ga material 83 disposed in a cup on the top surface of the cathode to convert the liquid Ga material 83 to a solid state before the sputtering process begins. Such heat transfer fluids may consist of cryogenic fluids such as liquid nitrogen or liquid hydrogen, one or more alcohols, or other suitable heat transfer fluids. In some embodiments, liquid nitrogen and / or liquid hydrogen are used when the sputtering system 80 is used with large wafer and / or wafer platter manufacturing systems. However, this idea requires a sputtering gun 86 capable of operating at low temperatures below about 14° C. for the Ga target, preferably at cryogenic temperatures below 0° C., and even more preferably around −45° C. Furthermore, due to these cryogenic temperatures, the usual rubber seals included in the sputtering gun are insufficient. Thus, the sputtering gun 86 may be equipped with all-metal seals and other appropriate components required to achieve this cryogenic temperature, capable of operating at approximately −45° C., in order to maintain the Ga target in a solid state during the sputtering process required for GaN deposition.

[0040] In some embodiments, as wafer size increases, the voltage from voltage source 90 increases. In some embodiments, system 80 also includes an optical path 110 for in situ closed or open process monitoring. Path 110 is operably coupled to a pyrometer and / or optical reflectance system computer corrected for emissivity.

[0041] The GaN growth process / system described herein is complementary to epitaxial atomic layer sputtering (EALS). EALS is a process that effectively results in stoichiometric epitaxial growth of a metal nitride composite on a substrate using sputtering or reactive sputtering, where the ratio of metal (e.g., Ga) to active nitrogen (N) atoms that reach the surface of the metal nitride being formed is periodically varied between metal-rich-N-rich conditions compared to the stoichiometric composition of the metal nitride compound. In some embodiments, this process of switching from metal-rich to metal-lean conditions is accomplished by (1) decreasing the metal flux to the surface of the metal nitride being formed, or (2) increasing the active nitrogen flux, or (3) increasing the temperature of the substrate (or exposing the surface of the metal nitride being formed) to increase the evaporation rate of the metal adatoms (i.e., decreasing the residence time), or any combination of (1)-(3). In some embodiments, metal-rich conditions increase the mobility of adatoms by reducing the effect of unsatisfactory bonds (or dangling bonds) at the surface and enhancing surface migration, which leads to non-columnar step growth and thus resulting in higher quality, smoother films. In general, increased surface migration of adatoms improves the crystalline quality of the deposited material by promoting the incorporation of adatoms at low energy sites on the growth front. Similarly, in some embodiments, increasing the surface temperature or applying low energy ions can increase the surface migration of adatoms to improve thin film quality. Thus, in some embodiments of the present invention, an EALS process is used, which may include a separate nitrogen plasma source (e.g., a radio frequency (RF) nitrogen source) or even ion beam assisted deposition.

[0042] FIG. 5 is a schematic diagram illustrating a number of different epitaxial growth modes 150 according to some embodiments of the invention. In epitaxial film growth, the deposited material(s) ideally form regular crystals with atomic arrangement and orientation dictated by the crystal structure of the substrate 152. In some embodiments of the invention, depending on the surface mobility of the arriving atoms and the properties of the substrate and the epitaxial film, various growth modes 154, 156, and / or 158 are obtained. Depending on the surface mobility of the arriving atoms on the substrate surface and other factors such as the average terrace length of the surface step, the crystal orientation and defect density of the substrate, the energetics of the surface and interface, the lattice mismatch between the film and the substrate, etc., the epitaxial growth process (1) starts and proceeds in one of the above modes, (2) is a combination of two or more modes, or (3) starts in one mode and then transitions to other modes or combined growth modes.

[0043] In some embodiments, growth mode 154 (represented by the progression from 154a to 154b) is referred to as two-dimensional "2D" island growth. In some embodiments, in mode 154, small islands nucleate across the surface and grow laterally to coalesce into a layer, resulting in many grain boundaries. In some embodiments, growth mode 156 (represented by the progression from 156a to 156b) is referred to as three-dimensional "3D" island growth. In some embodiments, in mode 156, small islands nucleate across the surface and grow as additional islands form on top of the initial islands before the layer underneath is finished, resulting in increased surface roughness (in some embodiments, mode 156 includes columnar growth). In some embodiments, growth mode 158 (represented by the progression from 158a to 158b) is referred to as step-flow growth. In some embodiments, in mode 158, atoms that reach the surface migrate and incorporate into the step edges to complete the layer in a step-flow fashion. In some embodiments, mode 158 occurs when the surface diffusion is large compared to the average terrace length.

[0044] U.S. Patent No. 10,170,303 and U.S. Patent Application Serial No. 16 / 234,070, owned by the inventor of the present application, disclose more complete aspects of the PVD sputtering process 10 of the present invention, and are hereby incorporated by reference in their entireties.

[0045] The inventors of the present application have made many attempts to improve the structure of epitaxially grown products made from III / IV compounds, for example, to enhance their ability to emit bright light in a reliable and focused manner, while allowing the resulting LED device structures to be smaller and less expensive to make. For example, as more fully disclosed in U.S. Patent Nos. 7,915,624, 8,253,157, and 8,890,183, which are incorporated herein by reference in their entireties, a grown epitaxial metal mirror ("GEMM") in the form of a GEMM layer defining an optical cavity therebetween and a separate non-epitaxial metal mirror may be added to the LED semiconductor structure. Such a structure 160 is shown in FIG. 6.

[0046] The GEMM (168) is suitable for many forms of optical cavity semiconductor light emitters. For example, the GEMM (168) with its highly reflective bulk properties may be grown thin such that the GEMM (168) is partially transparent and partially reflective. A planar III / IV nitride material growth template consisting of a sapphire substrate (162), an intrinsically doped GaN buffer layer (164), and a device quality n-GaN layer (166) is used such that the crystal quality of the GEMM (168) is flat, specular, and device quality. The GEMM (168) is lattice matched to the n-GaN layer (166) such that the desired thickness can be less than the epitaxial critical thickness.

[0047] Once the 21.tm initially doped GaN buffer (164) layer and 2gm n-GaN (166) layer have been grown on the sapphire substrate (162), the GEMM (168) may be grown to a specific thickness (-20 nm) for the resonant cavity (182) such that the GEMM is partially reflective and partially transparent. Once the GEMM (168) has been grown on the n-GaN layer (166), a second n-GaN layer (170) may then be grown to a specific thickness (-1200 Å) that is optimal for the resonant cavity (182), and the active region (172) may be grown to a specific thickness (-1200 Å) that is optimal for the resonant cavity (182), and the active region (172) may be grown to a specific thickness (-1200 Å) that is optimal for the resonant cavity (182). GaN The optical field may be placed at or near an antinode, which is a maximum of the optical field within a width of N GaN is the refractive index and X is the emission wavelength in vacuum.

[0048] In this embodiment, the illustrated RCLED may emit light at a wavelength of 500 nm with a cavity length (182) of about 3000 Å (which is in the microcavity regime). Light generated in the active region (172) resonates between a thick, highly reflective, non-epitaxial metal mirror (180) and a thin, partially reflective, partially transparent GEMM (168). The cavity is spaced such that the light generated by the active region (172) may resonate between the mirrors. The mirrors (168)(180) are spaced such that an integer multiple of a half wavelength of the light generated by the active region (172) may fit between the mirrors (168)(180) in the nitride material. The active region (172) is positioned between the mirrors such that the light generated constructively interferes with the reflected light from both mirrors (168)(180). As shown in FIG. 6, the resonated light passes through the sapphire substrate (162) and exits the GEMM (168) side of the device.

[0049] Similarly, as more fully disclosed in U.S. Pat. Nos. 7,842,939 and 8,865,492, the entireties of which are incorporated by reference herein, an LED semiconductor having an active region may include a tunnel barrier ("TB") structure adjacent and facing the active region, and a TB-grown epitaxial metal mirror ("TB-GEMM") structure adjacent and facing the TB structure, the TB-GEMM structure including at least one metal substantially lattice matched to the active region and a conductivity type III-nitride crystal structure adjacent and facing the active region on the opposite side of the TB structure.

[0050] As disclosed more fully in U.S. Patent Nos. 9,608,145 and 9,978,894 and U.S. Patent Application Serial No. 15 / 985,466, which are incorporated by reference herein in their entireties, III-nitride semiconductor devices may include multi-layer metal-semiconductor structures (i.e., PhC-GEMMs). As shown more clearly in the block diagram of semiconductor device 190 in FIG. 7, semiconductor device structure 190 includes a substrate 192 (e.g., Si, GaN, sapphire, GaN-on-sapphire, GaN-on-Si, AlN, AlN-on-sapphire, AlN-on-Si, and / or the like, as described above), a transition layer 194 on substrate 192 (e.g., including a III-nitride layer or a metal material, respectively, as described above), and a metal material layer 196 on transition layer 194 (e.g., including Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, and / or the like, as described above). a III-nitride layer 198 (e.g., GaN, AlN, Si, and / or the like, as described above) on a metal material layer 196 (wherein the metal material layer 196 and the III-nitride layer 198 form a PhC-GEMM structure of a single period 200), a metal cap layer 202 (e.g., comprising a metal material, as described above) on the PhC-GEMM period 200, a III-nitride cap 204 (e.g., comprising a III-nitride material, as described above) on the metal cap layer 202, and a semiconductor device structure 206.

[0051] In some embodiments, the transition layer 194, the III-nitride layer 198, and the III-nitride cap 204 include impurity doping to increase electrical conductivity (e.g., Si doping for n-type conductivity and Mg doping for p-type conductivity).

[0052] Metal layer 196 and III-nitride layer 198 form a PhC-GEMM structure with a single period 200 for tuning the reflectivity of light incident on the structure. Optionally, in some embodiments, semiconductor device 190 includes multiple periods 200 (e.g., up to 20 periods).

[0053] The metal layer 196 may have a thickness of about 20 nm, and the III-nitride layer 198 may have a thickness of about 90 nm. The semiconductor device structure 206 may be an LED device structure and may include an n-type III-nitride layer 208, an active region 210 located on the n-type III-nitride layer 208, and a p-type III-nitride layer 212 located on the active region 210. In some embodiments, the active region 210 includes one or more light emitting quantum wells (e.g., InGaN quantum wells (QW) or multiple quantum wells (MQW)).

[0054] In some embodiments, the substrate 192, the transition layer 194, the metal material layer 196, the III-nitride layer 198, the metal cap layer 202, the III-nitride cap 204, and the semiconductor device structure 206 are each substantially single crystalline and substantially lattice matched to the layers preceding and following them.

[0055] However, it has also been discovered that reactive gas 96, such as nitrogen, should not necessarily be supplied to the vacuum chamber 82 at a constant rate to form a resultant plasma that reacts with III / IV target material 83, such as Ga or Hf, to deposit a GaN or HfN film on the substrate wafer 98 during the PVD sputtering process 10 (see FIG. 4). Rather, it has been discovered in the present invention that it is sometimes advantageous to control or adjust the flow of reactive gas 96 into the vacuum chamber 82 to alternate between target-rich and reactive gas-rich conditions. During target-rich conditions, less reactive gas is present on the substrate wafer 98. During reactive gas-rich conditions, more reactive gas is present on the substrate wafer 98. The volume of III / IV target material, such as Ga, present on the cathode 86 is not affected by this adjustment. However, during reactive gas-rich conditions, when nitrogen gas (N2) is the reactive gas used, the resultant GaN plasma formed inside the vacuum chamber extends vertically to the substrate wafer 98. Meanwhile, during such Ga-rich conditions, all of the GaN plasma is inhibited from extending vertically to the wafer substrate.

[0056] Hereinafter, the "Ga-rich condition" condition will be used for the purposes of the example, however, for the purposes of the present invention, it will be understood that the principles of reactive gas tuning will also work for other group III or IV metal elements other than Ga, including Hf, Al, In, Si, Ge, Mg, or Zr. Similarly, the "nitrogen-rich condition" condition will be used for the purposes of the example, it will be understood that the principles of reactive gas tuning will also work for other reactive gases other than nitrogen, including oxygen, arsenide precursors, or phosphide precursors.

[0057] For purposes of the present invention, modulation of reactive gas 96 into vacuum chamber 82 may be accomplished by valves adjusted by an automatic control system (not shown) that turn flow completely off, completely on, or some measurable flow rate in between. Alternatively, a mechanical device such as a shutter assembly having multiple louver panels (not shown) may be positioned inside vacuum chamber 82 above where plasma is formed during the PVD sputtering process. The modulation process is accomplished by automatically controlling the louver panels to move between a fully open position, a fully blocked position that prevents the plasma from rising further to contact the underside of substrate wafer 98 and form, for example, a GaN film layer, or some position in between where the rise of the plasma is partially reduced to slow the formation of the GaN film layer.

[0058] The reactive gas 96 conditioning process is carried out during cycles that successively encompass both Ga-rich and Nitrogen-rich conditions. Such cycles may encompass approximately 1 Hz to 16 Hz, with 1 Hz = 1 cycle / sec and 16 Hz = 16 cycles / sec. Because the duration of these cycles is so short, it is generally disadvantageous to completely shut off the reactive gas 96 into the vacuum chamber 82 or completely block the rise of the plasma above the mechanical shutter inside the vacuum chamber, because there is insufficient time during the remainder of the cycle to turn the flow on again. Thus, the term "nitrogen-rich" is generally meant to indicate a condition in which the flow of reactive gas 96, such as nitrogen, is reduced or the resulting plasma is partially shut off.

[0059] FIG. 8 shows a schematic diagram of several different possible "duty cycles" for alternating between "on" and "off" conditions.

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[0060] 9 shows a schematic diagram of the duty cycle for the reactive gas conditioning process of the present invention. The time interval of the Ga-rich condition should generally be shorter than the time interval of the Nitrogen-rich condition inside the vacuum chamber.

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[0061] Meanwhile, the amplitude of the curve represents the flow rate level of the reactive gas or plasma. "Y" represents the flow rate of nitrogen gas during the nitrogen-rich condition, and "Z" represents the flow rate of nitrogen gas during the Ga-rich condition. Thus, the ratio Z / Y represents the percentage of the reactive gas flow rate during the Ga-rich condition compared to the flow rate of the reactive gas during the nitrogen-rich condition. In general, this ratio during the Ga-rich condition should be 0-50%, preferably 0-20%. Similarly, the degree of occlusion of the mechanical shutter device inside the vacuum chamber to prevent the rise of the plasma to the substrate wafer during the Ga-rich condition should be 50-100%, preferably 80-100%. This represents a lower duty cycle X.

[0062] If the flow of reactive gas to the vacuum chamber is stopped or reduced, even though some reactive gas remains in the chamber, there is still less reactive gas available to react with the Ga target to generate a plasma. This creates a Ga-rich condition.

[0063] By modulating the flow of reactive gases into the vacuum chamber during the duty cycle, or by preventing the rise of the plasma inside the vacuum chamber during the duty cycle, several advantages of forming a film layer obtained by PVD sputtering a III / IV compound on a substrate wafer are achieved. First, the modulation process increases the efficiency of the GaN deposition process. The GaN deposition process can actually be sped up.

[0064] Secondly, the conditioning process allows for the growth of "better" crystals within the GaN layer. Under X-ray scanning, the resulting crystals show a smoother surface. In addition, the level of molecular defects inside the crystal is reduced. In a "perfect" epitaxial crystalline material, all the crystals are oriented in the same direction. However, in polycrystalline material, single crystals are oriented in different directions. If the crystals are not properly aligned, "line defects" will occur inside the epitaxial GaN material of the layer. When current flows through the semiconductor LED layer, such line defects will cause leakage currents and, in extreme cases, can result in a short circuit of the LED. This reduces the efficiency of the LED's operation.

[0065] Furthermore, crystal defects can adversely affect the optical properties of semiconductors made from III / IV compounds, including the epitaxial growth process of the n-type and p-type material layers. For example, adding dopants such as silicon to GaN compounds allows electrons in the valence band of the layered structure to move up into the "forbidden region" and approach the conduction band, which is located above the forbidden region. Light emitted from the active region within the n-type GaN layer of the semiconductor structure can pass more easily into the conduction band without being absorbed by the GaN material. However, if there are atoms missing from the valence band due to point defects in the n-type material, electrons that would normally rise up into the forbidden region have nowhere to go and instead move into the conduction band.

[0066] Similarly, when a dopant such as magnesium is added to GaN to create a p-type material, the resulting holes in the valence band are filtered by electrons dropping from the forbidden / bandgap region and further up from the conduction band. This cascading effect creates new holes in the conduction band, which is important for visualizing the light emitted from the active region of the p-type GaN layer near the top of the semiconductor LED structure. However, point defects in the crystal of this p-type GaN material make the p-type material itself very difficult to fabricate.

[0067] Therefore, improving the crystal structure of the GaN material improves the optical properties of the semiconductor LED, which, as mentioned above, is important for the n-type, p-type, and GEMM layers that are incorporated into the semiconductor structure.

[0068] Additionally, point defects in the crystal structure of III / IV compound materials can also impair the reflectivity of the metals contained therein. Thus, the reduction of such point defects via reactive gas conditioning processes is important for the GEMM, tunnel barrier ("TB") epitaxial metal mirror ("TB-GEMM"), and metal cap of the semiconductor structures mentioned above.

[0069] Crystal defects formed within the III / IV compound layers can also lead to excessive heating as electrons attempt to move from the valence band to the conduction band while preventing light from passing through the structure. This heat buildup can also cause the semiconductor to fail. Excessive heat buildup can also hinder efforts to design and manufacture smaller semiconductor LEDs, which are crucial for industry adoption.

[0070] Finally, growing a more crystallographically perfect GaN layer within the semiconductor provides a smoother surface on which to grow adjacent HfN and ZrN layers, which are important for increasing the reflectivity and visible emissivity of semiconductor LEDs.

[0071] During the Ga-rich phase of the PVD sputtering process, positively charged Ga atoms are dispersed on the substrate wafer or previous III / IV compound layer. The positively charged Ga atoms repel each other to produce a regular matrix. When the flow of nitrogen gas is increased during the nitrogen-rich phase of the duty cycle, the resulting active nitrogen atoms dispersed on the substrate or previous layer pin the surrounding Ga+ atoms in an ideal pattern. Since more time is needed for the nitrogen atoms to reach the matrix, a longer "off" cycle is required, which leads to a lower duty cycle.

[0072] The quantum wells contained within the semiconductor LED structure are often made from InGaN. This InGaN material usually produces blue light. However, by adding more In at the expense of Ga to the target material set on the cathode inside the vacuum chamber during the PVD sputtering process, green light is produced. By adding even more In at the expense of Ga, red light is produced. However, adding In is thermodynamically difficult when the lattice spacing in the InGaN layer is misaligned due to crystal defects. The reactive gas conditioning process allows for better lattice spacing in the resulting InGaN layer for the quantum wells, and better lattice matching between the materials of the layers in the semiconductor structure. Thus, this reactive gas conditioning process should enable the fabrication of better green and red LEDs.

[0073] Deposition of layered materials to provide integrated functionality for integrated devices is more desirable than mechanical placement of such layers. There is great interest in combining light emitting devices with active matrix ("AM") for displays and other devices. Mechanical placement of LEDs on a CMOS AM backplane is one way to do this. A more desirable way to do this is to deposit the LED layers on a CMOS backplane. However, a significant problem with this deposition approach is that in the epitaxial growth of LEDs, there is no suitable mirror to deposit prior to depositing the LEDs. In the present invention, layers of n-GaN and ZrHfN can be used as mirrors for this purpose, which allows the resulting device to block the propagation of light into the AM materials. In these formed structures, thermal considerations for integration are more favorable.

[0074] The above specification and associated drawings provide a complete description of the structure and method of the III / IV compound semiconductor device and reactive gas conditioning process of the present invention. Many alternative embodiments of the present invention can be made without departing from the spirit and scope of the present invention. Accordingly, the present invention resides within the scope of the claims appended hereto.

Claims

1. 1. A method for growing III / IV compound semiconductor structures in a vacuum chamber having a cathode and a plurality of anodes, comprising: (a) providing a template having a surface in the vacuum chamber; (b) providing at least one Group III or Group IV target material disposed on top of the cathode within the vacuum chamber; (c) providing a reactive gas to the vacuum chamber; (d) providing an inert gas to the vacuum chamber to surround the Group III or Group IV target material; (e) growing at least a first III / IV compound layer on the template using a first sputtering process, the first sputtering process comprising: (i) bombarding atoms of the inert gas with electrons passing between an electrically negatively charged anode and the cathode, whereby resulting positively charged cations of the inert gas bombard the target material and sputter the target material towards the template in the vacuum chamber and react with the reactive gas to form a plasma of the III / IV compound rising in the vacuum chamber and forming a film of the III / IV compound on the template; (ii) adjusting the flow of the reactive gas in the vacuum chamber between a target-rich condition and a reactive-gas-rich condition during a duty cycle of the sputtering of the Group III or Group IV target material; (f) adjusting the reactive gas during the duty cycle increases efficiency of the sputtering process for forming the III / IV compound layer on the target material and improves a crystalline state of the resulting III / IV compound layer in the semiconductor structure.

2. 2. The method of claim 1, wherein the group III / IV compound comprises a nitride, oxide, arsenide, or phosphide compound in which the group III or group IV metal cation is gallium (Ga), indium (In), aluminum (Al), silicon (Si), germanium (Ge), magnesium (Mg), hafnium (Hf), or zirconium (Zr).

3. The reactive gas is nitrogen (N ２ ), oxygen (O ２ ), arsenide precursor (As －３ ), or a precursor of the phosphide (P －３ 2. The method of claim 1 , comprising:

4. The method of claim 1 , wherein the Group III target material comprises gallium (Ga) and the reactive gas comprises nitrogen.

5. The method of claim 4 , wherein the target-rich condition comprises a Ga-rich condition and the reactive gas-rich condition comprises a nitrogen-rich condition.

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