Light emitting device and method for manufacturing the same

Abstract

A substrate (2); a base layer (4) disposed on the substrate (2); a diode layer structure (10) including a quantum well layer structure (30) sandwiched between an n-doped semiconductor layer (12) and a p-doped semiconductor layer (14) disposed on the base layer (4); the quantum well layer structure (30) includes a first quantum well (41) and a second quantum well (42), a first proximal barrier layer (51) and a second proximal barrier layer (52), and a first distal barrier layer (61) and a second distal barrier layer (62); The first quantum well (41) and the second quantum well (42) and the first proximal barrier layer (51) and the second proximal barrier layer (52) are sandwiched between the first distal barrier layer (61) and the second distal barrier layer (62), resulting in a light emitting device (1).

Description

[Technical field]

[0001] The present invention relates generally to light emitting devices and methods for making light emitting devices. [Background technology]

[0002] Semiconductor diodes, such as light-emitting diodes (LEDs) or laser diodes, can form light-emitting devices that are used in a variety of applications, such as 3D printing. Summary of the Invention

[0003] It is an object of the present invention to provide a light emitting device having high power output. It is a further object of the present invention to provide a light emitting device that emits ultraviolet (UV) light. Another object of the present invention is to increase electron and hole carrier injection for light emission in light emitting GaN devices.

[0004] These and other objects of the inventive concept are at least partly met by the invention as defined in the independent claims. Preferred embodiments are set forth in the dependent claims.

[0005] In some embodiments, high power lasers are provided. Carbon dioxide lasers are still too expensive for practical use, so heterostructure laser diodes, an alternative light-emitting diode, are an interesting alternative that can be mass-produced on a large scale. However, laser diodes for 3D printing are currently limited to powers of less than 100 W. Since the beginning of the development of nitride-based laser diode technology, it has been hampered by the problem of poor crystalline quality of the epitaxial layers that make up the active region of these light-emitting devices. This problem is related to the lack of suitable substrate materials that match GaN in terms of both lattice constant and thermal expansion coefficient.

[0006] According to a first aspect, A substrate; A base layer made of Al(x)Ga(1-x)N (where 0 < x ≤ 1) disposed on a substrate, A diode layer structure including a quantum well layer structure sandwiched between an n-doped semiconductor layer and a p-doped semiconductor layer, disposed on the base layer, The quantum well layer structure includes first and second quantum wells, first and second proximal barrier layers, and first and second distal barrier layers, The first and second quantum wells each have a thickness of less than 5 nm and a bandgap smaller than the bandgap of the first and second proximal barrier layers, The first and second proximal barrier layers each essentially contain doped GaN, and the first and second quantum wells are sandwiched between the first and second proximal barrier layers, The first and second distal barrier layers each contain Al(a)Ga(1-a)N (where 0 ≤ a ≤ 0.3), and the first and second quantum wells and the first and second proximal barrier layers are sandwiched between the first and second distal barrier layers, The n-doped semiconductor layer is configured to inject electrons into the quantum well layer structure, The p-doped semiconductor layer is configured to inject holes into the quantum well layer structure. Preferably, a light-emitting device is provided in which the base layer is AlN having a thickness of 100 to 500 nm.

[0007] According to the above, when the light-emitting device is biased in the forward direction, it emits light. The n-doped semiconductor layer may be configured to inject electrons into the quantum well layer structure when the diode layer structure is biased in the forward direction. The n-doped semiconductor layer may have a doping level exceeding 1×10 10 cm -3 The n-doped semiconductor layer may include an Al(y)Ga(1-y)N layer (where 0 ≤ y ≤ 0.5). The p-doped semiconductor layer may be configured to inject holes into the quantum well layer structure when the diode layer structure is biased in the forward direction. The p-doped semiconductor layer may have a doping level of 1×10 15 cm -3The electrons and holes injected into the quantum well layer structure recombine in the first quantum well and the second quantum well of the quantum well layer structure, causing the light emitting device to emit light.

[0008] The first and second quantum wells may be InGaN quantum wells and thus have a band gap smaller than that of the GaN proximal barrier layer. As a result, the charge carriers, i.e., electrons and holes, may be confined in the first and second quantum wells by the proximal barrier layer. The charge carriers may be confined in the first and second quantum wells by the distal barrier layer. The distal barrier layer may have a band gap larger than that of the proximal barrier layer. Furthermore, the distal barrier layer may have a band gap larger than that of the n-doped and p-doped semiconductor layers. Thus, the distal barrier layer may act as a barrier, such as a tunnel barrier, between the quantum wells and the layer that injects the charge carriers.

[0009] Furthermore, it is advantageous to avoid dopants near the quantum wells. Such dopants can act as or form non-radiative paths for charge carriers in the first and second quantum wells. It is therefore advantageous to sandwich the first and second quantum wells between proximal barrier layers of intrinsically doped GaN. The term "intrinsically doped GaN" refers to GaN that is not intentionally doped, e.g., by silicon donor atoms in n-type GaN or magnesium acceptor atoms in p-type GaN, and has, e.g., electron and hole carrier concentrations of both 5×10 at room temperature. 16 cm -3For example, the GaN layer may be less than 100 nm thick. The intentional doping of the GaN may be in situ during the growth of the GaN. Furthermore, the distal barrier layer may separate the charge carriers of the first and second quantum wells from the dopants of the n-doped and p-doped semiconductor layers. Thus, charge carriers may be injected into the first and second quantum wells, for example by tunneling through the distal barrier layer, and may be trapped in the first and second quantum wells where they are prevented from returning to the donor atoms of the n-doped semiconductor layer or the acceptor atoms of the p-doped semiconductor layer. However, the quantum well layer structure may be configured to allow tunneling of charge carriers between the first and second quantum wells. For example, the first and second quantum wells may be separated by a barrier layer, for example a GaN barrier layer, that is thin enough to allow tunneling. The barrier layer between the first and second quantum wells may have a thickness of less than 30 nm, preferably less than 10 nm. Thus, the first and second quantum wells may be quantum mechanically coupled, for example tunnel coupled. Such quantum wells can emit strongly so that the light emitting device has a high output. In addition, they can have further advantages. As an example, the emission spectrum can be tuned by the barrier thickness between the first and second quantum wells. As another example, the emission wavelength can be tuned by the electric field applied between the first and second quantum wells.

[0010] It has further been recognized that high conductivity of charge carriers into the first and second quantum wells enables high power output. The current continuity equation is:

[0011]

number

[0012] where n is the charge carrier concentration, q is the elementary charge, J is the current density, and U(n,p) is the net recombination rate. Thus, charges entering the first and second quantum wells must either come out the other side, be trapped, or be neutralized by recombination. Thus, high conductivity, such as high injection mobility, is achieved, leading to high recombination and thus high light emission or power. High injection mobility is achieved by separating the first and second quantum wells from the n-doped and p-doped semiconductor layers by a proximal barrier layer. For example, a low concentration of dopant atoms in the proximal barrier layer, e.g., an intrinsically doped proximal barrier layer, allows the charge carriers to move ballistically, i.e., without scattering, in the proximal barrier layer. Thus, the charge carriers can move very fast in the proximal barrier layer, thereby enabling high power output.

[0013] Additionally, the light emitting device may be configured such that the conduction band edge of the n-doped semiconductor layer has a higher energy than the conduction band edge of the proximal barrier layer into which the n-doped semiconductor layer injects electrons, such that the energy difference is converted into kinetic energy of the injected electrons, which then travel faster to the first and second quantum wells.

[0014] Additionally, the light emitting device may be configured such that the valence band edge of the p-doped semiconductor layer has a lower energy than the valence band edge of the proximal barrier layer into which the p-doped semiconductor layer injects holes, such that the energy difference is converted into kinetic energy of the injected holes, which then travel faster to the first and second quantum wells.

[0015] It has been recognized that a high crystalline quality of the first and second quantum wells leads to fewer non-radiative recombination centers and / or higher quantum efficiency of the light emitting device, thus enabling higher power output. Separating the first and second quantum wells from the n-doped and p-doped semiconductor layers by proximal and distal barrier layers allows for a high crystalline quality of the first and second quantum wells. Furthermore, the use of a base layer between the substrate and the diode layer structure allows for a high crystalline quality of the diode layer structure, particularly of the first and second quantum wells. Because nitride-based substrates are expensive, the substrate may have a lattice mismatch with the diode layer structure. Thus, the substrate may be a silicon substrate, a sapphire substrate, or a silicon carbide substrate. As used herein, the base layer may prevent or reduce the formation of dislocations that may act as non-radiative recombination centers. The base layer may prevent dislocations from propagating into the diode layer structure, particularly, the dislocations from propagating into the first or second quantum wells. In the present specification, it is particularly advantageous if the base layer comprises an AlN layer, for example an AlN layer formed directly on the substrate. The AlN layer may comprise sputtered AlN, which is particularly advantageous for reducing the risk of dislocations. The base layer may comprise base layer pillars, which are pillars arranged perpendicular to the substrate. The base layer pillars may comprise AlN, for example sputtered AlN. It is the inventor's recognition that AlN processing in MOCVD, as used for example for GaN buffer layers on silicon and sapphire substrates, is a severely contaminating process for InGaN quantum wells. Therefore, the base layer may be provided outside of the MOCVD process. The base layer pillars may have a diameter smaller than 500 nm, for example smaller than 100 nm. The base layer pillars may comprise Al x Ga 1-x The base layer pillars may be laterally sealed with a base layer sealing material such as AlN (where 0≦x≦0.95). x Ga 1-xN may include dislocations propagating laterally from the base layer pillar. Thus, the base layer can confine dislocations by dislocations that preferentially propagate laterally from the base layer pillar so that the dislocations do not reach the diode layer structure.

[0016] The quantum well layer structure may be configured to be substantially doped by the distal n-doped and p-doped semiconductor layers for electron and hole recombination due to energy band bending resulting from the difference in band gaps of the adjacent layers. The band gap of AlN is 6.015 eV and that of GaN is 3.4 V at room temperature. The band gap of the distal barrier may be configured to separate the donor atoms from the electrons and the acceptor atoms from the electron holes. The distal barrier may be an AlGaN alloy that serves as a potential energy barrier to confine the charge carriers to the quantum wells by preventing tunneling out of the quantum wells, while the proximal barrier may be configured to allow substantial tunneling between the quantum wells. The potential energy well formed may confine the charge carriers in a two-dimensional gas at the heterostructure interface where they can tunnel to adjacent quantum wells. Both the thickness of the distal barrier and its aluminum concentration may be set to optimize electroluminescence from the quantum well layer structure. Doping the quantum well layer structure with a distal layer is advantageous because the dopant is isolated from the quantum well layer structure, thereby reducing the Coulomb potential from altering the potential energy well provided by the quantum well layer structure.

[0017] The distal n-doped semiconductor layer for doping the quantum well layer structure may be an n-doped semiconductor layer configured to inject electrons into the quantum well layer structure. Thus, this layer may both dope the quantum well layer structure and inject electrons into the quantum well layer structure. Alternatively, the distal n-doped semiconductor layer for doping the quantum well layer structure may be different from the n-doped semiconductor layer configured to inject electrons into the quantum well layer structure.

[0018] The remote p-doped semiconductor layer for doping the quantum well layer structure may be a p-doped semiconductor layer configured to inject holes into the quantum well layer structure. Thus, this layer can be both doping the quantum well layer structure and injecting holes into the quantum well layer structure. Alternatively, the remote p-doped semiconductor layer for doping the quantum well layer structure may be different from the p-doped semiconductor layer configured to inject holes into the quantum well layer structure.

[0019] The quantum well layer structure of the diode layer structure may include a plurality of quantum wells, and adjacent quantum wells of the plurality of quantum wells are separated by a barrier layer having a thickness of less than 10 nm. The quantization of the layer may be perpendicular to the C direction on a silicon (111) wafer, which may be the growth direction of GaN. For example, the quantum well layer structure may be thin enough to confine charge carriers in a quantum state as a two-dimensional gas and may include more than two quantum wells, such as five quantum wells or ten quantum wells. The thickness of the separation barrier may be the same for all pairs of adjacent quantum wells, or may be different for different pairs of adjacent quantum wells having a thickness of 1 to 5 nm each.

[0020] The plurality of quantum wells can be quantum mechanically coupled to each other, for example, by tunnel coupling. Thus, the plurality of quantum wells can form a mini-band of energy levels. Such a mini-band can emit strongly so that the light-emitting device has high output. Furthermore, the emission spectrum can be adjusted by the barrier wall thickness between adjacent quantum wells.

[0021] The p-doped semiconductor layer may include a superlattice of a GaN layer and an Al(z)Ga(1-z)N layer, where 0 < z ≦ 1, and the Al(z)Ga(1-z)N layer of the superlattice is p-doped.

[0022] It has been recognized that the superlattice can enhance doping in the p-doped semiconductor layers that inject holes into the quantum well layer structure, or alternatively, the superlattice can eliminate or reduce the need for a post-growth anneal of the p-doped semiconductor layers that inject holes into the quantum well layer structure.

[0023] p-doping may be difficult to achieve in GaN-based materials. Doping atoms, such as Mg, used for p-doping are often passivated by hydrogen impurities or nitrogen vacancies. This can result in a low free hole concentration even with a high doping concentration. To remove the passivation (or activate the doping atoms), a post-growth anneal, for example in a low hydrogen atmosphere, may be performed.

[0024] As described by Kozodoy et al. [Appl. Phys. Lett. 75, 2444 (1999)], superlattices can enhance p-doping through variation of the valence band edge. Herein, the variation of the valence band edge is caused by a change in the Al content in the superlattice when the Al(z)Ga(1-z)N layers of the superlattice have a higher Al content than the GaN layers of the superlattice. The acceptors can be ionized at a position where the band edge is much lower than the Fermi energy, and the resulting holes can accumulate at a position where the band edge is close to the Fermi level. Herein, the valence band edge can vary in a direction perpendicular to the layers of the superlattice. As a result of the variation of the valence band edge, the hole concentration can also vary. However, the average hole concentration can be higher than in a bulk film where the valence band edge does not vary. It is understood that the variation of the valence band edge can be due to the variation of the band gap in the superlattice, and the polarization effect due to band bending. As further described in Kozodoy et al. [Appl. Phys. Lett. 75, 2444-2446 (1999)], superlattices can enhance hole mobility.

[0025] The GaN layers of the superlattice of the p-doped semiconductor layer may advantageously be essentially doped. Alternatively, the GaN layers of the superlattice of the p-doped semiconductor layer may be p-doped.

[0026] Similarly, the n-doped semiconductor layer may include a superlattice of GaN layers and Al(z)Ga(1-z)N layers, where 0 < z ≦ 1, and the Al(z)Ga(1-z)N layers of the superlattice are n-doped.

[0027] It is recognized that by using a superlattice, an enhancement effect similar to that of the p-doped semiconductor layer can also be obtained in the n-doped semiconductor layer.

[0028] The GaN layers of the superlattice of the n-doped semiconductor layer may advantageously be essentially doped. Alternatively, the GaN layers of the superlattice of the n-doped semiconductor layer may be n-doped.

[0029] The light-emitting device may further include vias that penetrate the substrate and are electrically connected to the n-doped semiconductor layer or the p-doped semiconductor layer of the diode layer structure.

[0030] Thus, when the lower charge carrier injection layer is an n-doped semiconductor layer and the upper charge carrier injection layer is a p-doped semiconductor layer (i.e., when the n-doped semiconductor layer is closer to the substrate than the p-doped semiconductor layer), the n-doped semiconductor layer can be electrically connected by vias, and the p-doped semiconductor layer can be electrically connected by an upper contact.

[0031] Similarly, when the lower charge carrier injection layer is a p-doped semiconductor layer and the upper charge carrier injection layer is an n-doped semiconductor layer (i.e., when the p-doped semiconductor layer is closer to the substrate than the n-doped semiconductor layer), the p-doped semiconductor layer can be electrically connected by vias, and the n-doped semiconductor layer can be electrically connected by an upper contact.

[0032] As a result, lateral current flow to the lower charge carrier injection layer can be avoided. Furthermore, when multiple light emitting devices are placed on the same chip, multiple light emitting devices can be densely packed if vias to the lower charge carrier injection layer are used.

[0033] The light emitting device may be further configured as follows. the n-doped semiconductor layer comprises a pillar layer, the pillar layer of the n-doped semiconductor layer comprises at least one n-doped semiconductor pillar embedded in a support material, the at least one n-doped semiconductor pillar configured to form an electron transport channel through the pillar layer of the n-doped semiconductor layer to the quantum well layer structure; and / or The p-doped semiconductor layer may include a pillar layer, the pillar layer of the p-doped semiconductor layer including at least one p-doped semiconductor pillar embedded in a support material, and the at least one p-doped semiconductor pillar may be configured to form a hole transport channel through the pillar layer of the p-doped semiconductor layer to the quantum well layer structure.

[0034] The n-doped semiconductor pillar may be, for example, an n-doped GaN pillar, for example, an n-doped GaN nanowire. The p-doped semiconductor pillar may be, for example, a p-doped GaN pillar, for example, a p-doped GaN nanowire.

[0035] It has been recognized that the semiconductor pillars can effectively guide the charge carriers to the quantum well layer structure. Thus, high conductivity can be achieved for the injected charge carriers. Semiconductor pillars exhibiting quantum confinement can be particularly useful, as they can enable ballistic transport of the charge carriers to the quantum well layer structure. Thus, the at least one semiconductor pillar can have a diameter smaller than 500 nm. In particular, the at least one semiconductor pillar can have a diameter smaller than 100 nm. In particular, the at least one semiconductor pillar can be a nanowire. As mentioned above, ballistic transport of the charge carriers can enable the charge carriers to move very fast, thereby enabling high power output and reducing scattering of the charge carriers.

[0036] For one or more pillar layers of a light emitting device, the support material may be a semiconductor material having a doping opposite to that of the semiconductor pillars embedded in the support material.

[0037] Thus, in an n-doped semiconductor layer, the semiconductor pillars of the pillar layer may be n-doped and the supporting material may be p-doped, so that electrons injected from the n-doped semiconductor layer may be forced to pass through the n-doped semiconductor pillars.

[0038] Thus, in a p-doped semiconductor layer, the semiconductor pillars of the pillar layer may be p-doped and the supporting material may be n-doped, so that holes injected from the p-doped semiconductor layer may be forced to pass through the p-doped semiconductor pillars.

[0039] The support material may be, for example, iron-doped or carbon-doped GaN, in the case where the semiconductor pillars of the pillar layer are n-doped. The iron or carbon dopants may act as deep acceptor dopants that compensate for undesired shallow donors and residual impurities in the GaN. The use of iron-doped or carbon-doped GaN support material allows for the growth of higher quality materials on or after the pillar layer, for example in quantum well layer structures grown after the pillar layer.

[0040] Alternatively, or additionally, for one or more pillar layers of a light emitting device, the support material may be gallium oxide or in situ Si3N4.

[0041] The gallium oxide may be Ga2O or Ga2O3, etc. Gallium oxide has a wide band gap, which can facilitate effective confinement of charge carriers into the semiconductor pillars.

[0042] Furthermore, for one or more pillar layers of the light-emitting device, the diameter of the semiconductor pillars may be 10 to 500 nm, and the pitch of the semiconductor pillars may be 200 to 500 nm. Such a configuration can ensure good confinement of charge carriers in the semiconductor pillars while ensuring sufficient current density through the pillar layers.

[0043] The p-doped semiconductor layer can be provided with a charge carrier concentration of light holes by strain. For example, the strain can make the band energy of light holes higher than that of heavy holes. Thus, conduction mainly through light holes can be promoted, leading to high-speed injection of holes and thus high power output. For example, the p-doped semiconductor layer can include a pillar layer, where the semiconductor pillar of the pillar layer is strained by the supporting material such that the light hole band of the semiconductor pillar has a higher energy than the heavy hole band of the semiconductor pillar.

[0044] The light emitting device may be a vertical-cavity surface emitting laser (VCSEL) including a bottom mirror below the first and second quantum wells and an top mirror above the first and second quantum wells, where the top mirror and the bottom mirror form an optical cavity for light emitted by the first and second quantum wells.

[0045] The lower and upper reflectors may each be distributed Bragg reflectors (DBRs). The DBRs may include layers of alternating high and low refractive index. The thickness of the layers may be configured to correspond to one-quarter of the emission wavelength, e.g., one-quarter of the wavelength of light emitted by the quantum wells of the quantum well layer structure.

[0046] When the p-doped semiconductor layer comprises a superlattice of GaN and Al(z)Ga(1-z)N layers, the superlattice may form part of the DBR of the VCSEL.

[0047] When the n-doped semiconductor layer comprises a superlattice of GaN layers and Al(z)Ga(1-z)N layers, the superlattice may form part of the DBR of the VCSEL.

[0048] An optical cavity for light emitted from the first and second quantum wells may be formed by upper and lower reflectors having a separation corresponding to a resonant wavelength similar to the wavelength of the emission from the first and second quantum wells, which resonant wavelength of the optical cavity may be within ±20% of the wavelength of the emission from the first and second quantum wells.

[0049] As mentioned above, it can be particularly advantageous if the charge carriers, i.e., electrons and holes, are confined in the quantum well by both the proximal and distal barrier layers. For example, both the first and second distal barrier layers have a larger band gap than the first and second proximal barrier layers. In such a situation, the distal barrier layer can form an energy barrier for the holes on both sides of the region sandwiched by the distal barrier layers. Similarly, in such a situation, the distal barrier layer can form an energy barrier for the electrons on both sides of the region sandwiched by the distal barrier layers. Thus, both electrons and holes can be confined in a two-stage structure. The electrons and holes can be first confined in the quantum well by the proximal barrier layer. The electrons and holes can then be confined by the distal barrier layer to the region sandwiched by the distal barrier layer. Such a structure that confines both electrons and holes by the distal barrier layer advantageously enhances electroluminescence.

[0050] As mentioned above, having a lower aluminum content in the proximal barrier layer than the distal barrier layer can be particularly advantageous because it can prevent diffusion of aluminum into the quantum wells, which could degrade performance.

[0051] The following shows a further example of a structure in which both the first and second distal barrier layers have a larger bandgap than the first and second proximal barrier layers. Each of the first and second distal barrier layers may have a bandgap larger than that of GaN. Thus, each of the first and second distal barrier layers may include Al(a)Ga(1-a)N (where 0 < a ≤ 0.3, for example 0.1 < a ≤ 0.3). Further, each of the first and second proximal barrier layers may have a thickness of less than 50 nm, for example less than 10 nm. Such a thickness can provide an advantageous relationship between confinement from the proximal barrier layer and confinement from the distal barrier layer. The quantum well section of the structure (for example, including quantum wells sandwiched between the first and second proximal barrier layers with a thickness from the first to the last quantum well) may have a thickness of less than 20 to 100 nm.

[0052] An advantageous structure may be as follows (described from the lower layer to the upper layer). · Substrate. · Base layer including Al(x)Ga(1-x)N (where 0 < x ≤ 1). · n-doped layer, for example n-doped GaN. · First distal barrier layer of Al(a)Ga(1-a)N (where 0 < a ≤ 0.3, for example 0.1 < a ≤ 0.3). The first distal barrier layer may be intrinsic or doped. The thickness of the first distal barrier layer may be less than 10 nm. · First proximal barrier layer of essentially doped GaN. The thickness of the first distal barrier layer may be less than 50 nm, for example less than 10 nm. · First and second quantum wells each having a thickness of less than 5 nm. The quantum wells may be separated by a GaN barrier layer having a thickness of less than 20 nm, for example less than 5 nm. · Second proximal barrier layer of essentially doped GaN. The thickness of the second distal barrier layer may be less than 10 nm, for example less than 5 nm. ·A second distal barrier layer of Al(a)Ga(1-a)N, where 0 < a ≤ 0.3, for example 0.1 < a ≤ 0.3. The second distal barrier layer may be intrinsic or doped. The thickness of the first distal barrier layer may be less than 20 nm, for example less than 10 nm. ·A p-doped layer, for example p-doped GaN.

[0053] In particular, an advantageous structure may be as follows (described from the lower layer to the upper layer). ·A substrate. ·A base layer comprising Al(x)Ga(1-x)N, where 0 < x ≤ 1. ·An n-doped layer of n-doped GaN. ·A first distal barrier layer of Al(a)Ga(1-a)N less than 10 nm, where 0.1 < a ≤ 0.3. ·A first proximal barrier layer of essentially doped GaN. The thickness of the first distal barrier layer may be less than 50 nm, for example less than 10 nm. ·First and second quantum wells of InGaN, each having a thickness of less than 5 nm. The quantum wells may be separated by a GaN barrier layer having a thickness of, for example, less than 30 nm, for example less than 10 nm. ·A second proximal barrier layer of essentially doped GaN. The thickness of the second distal barrier layer may be less than 50 nm, for example less than 10 nm. ·A second distal barrier layer of Al(a)Ga(1-a)N less than 10 nm, where 0.1 < a ≤ 0.3. ·A p-doped layer of p-doped GaN.

[0054] In the above structure, the n-doped layer and the p-doped layer may be interchanged.

[0055] In the above structure, there may be two or more quantum wells between the first and second proximal barrier layers.

[0056] According to a second aspect, ·Providing a substrate, and depositing a base layer comprising Al(x)Ga(1-x)N on a substrate by physical vapor deposition; forming a diode layer structure on the base layer, the diode layer structure including a quantum well layer structure sandwiched between an n-doped semiconductor layer and a p-doped semiconductor layer; the quantum well layer structure includes first and second quantum wells, first and second proximal barrier layers, and first and second distal barrier layers; the first and second quantum wells each have a thickness less than 5 nm and a bandgap less than a bandgap of the first and second proximal barrier layers; the first and second proximal barrier layers each comprise intrinsically doped GaN, the first and second quantum wells being sandwiched between the first and second proximal barrier layers; the first and second distal barrier layers each comprise Al(a)Ga(1-a)N, where 0≦a≦0.3, the first and second quantum wells and the first and second proximal barrier layers being sandwiched between the first and second distal barrier layers; the n-doped semiconductor layer is configured to inject electrons into the quantum well layer structure; A method for manufacturing a light emitting device is provided, wherein the p-doped semiconductor layer is configured to inject holes into the quantum well layer structure, and preferably the base layer is AlN having a thickness of 100-500 nm.

[0057] Thus, the base layer is deposited by physical vapor deposition, for example by sputtering. Each layer of the diode layer structure may be formed by epitaxial growth on the base layer.

[0058] Light emitting devices produced according to the second aspect may have the same or similar advantages as light emitting devices according to the first aspect and may be the subject of a future divisional application.

[0059] The method further comprises: etching holes through the substrate by reactive ion etching; depositing metal into the hole through the substrate such that a metal contact is formed through the substrate and electrically connecting to the n-doped semiconductor layer or the p-doped semiconductor layer of the diode layer structure.

[0060] In this manner, vias may be formed. The reactive ion etch may be particularly suitable for etching deep holes, such as holes through a substrate. The reactive ion etch may be a chlorine reactive ion etch.

[0061] Etching of the through-substrate holes by reactive ion etching can be terminated based on spectroscopic detection of aluminum chloride or aluminum fluoride molecular species.

[0062] When etching deep holes, such as through-substrate holes, it may be difficult to know the exact etch depth. It is recognized that the spectroscopic signal of aluminum chloride or aluminum fluoride can indicate that the reactive ion etch has penetrated the substrate, e.g., silicon substrate, and reached the base layer of Al(x)Ga(1-x)N. The molecular species can be detected spectroscopically, for example, by UV-Vis-NIR spectroscopy.

[0063] The spectroscopic signal can be used as a trigger for the etch to be stopped when etch completion, i.e., breakthrough of the AlN or aluminum-containing Al(x)Ga(1-x)N base layer is reached, which results in a drop in the signal intensity from the AlN. The plasma etching can be performed with ICP plasma etching. The advantage of this fabrication method is that the same base layer used to define trenches for drain contacts of light-emitting devices can be used to grow high-quality GaN on silicon.

[0064] The above, as well as additional objects, features and advantages of the inventive concept, will be better understood through the following illustrative and non-limiting detailed description taken in conjunction with the accompanying drawings, in which like reference numerals are used for like elements unless otherwise noted, and in which: [Brief description of the drawings]

[0065] [Figure 1] FIG. 1 is a diagram showing a light emitting device. [Diagram 2] FIG. 2 is a diagram showing a band structure. [Diagram 3] FIG. 3 is a diagram showing a quantum well layer structure. [Figure 4] FIG. 4 is a diagram illustrating a charge carrier injection layer. [Diagram 5] FIG. 5 is a diagram illustrating a charge carrier injection layer. [Figure 6] FIG. 6 is a diagram illustrating a charge carrier injection layer. [Figure 7] FIG. 7 is a diagram illustrating a charge carrier injection layer. [Figure 8] FIG. 8 is a diagram illustrating a charge carrier injection layer. [Figure 9] FIG. 9 is a diagram illustrating the base layer. [Figure 10] FIG. 10 is a diagram showing a vertical cavity surface emitting laser. [Figure 11] FIG. 11 is a flow chart of the method. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0066] Hereinafter, the technical contents and detailed description of the present invention will be described according to preferred embodiments in conjunction with the accompanying drawings, but are not used to limit the scope of the claims. The present invention can be embodied in many different forms and should not be construed as being limited to the embodiments described herein, but rather, these embodiments are provided for completeness and completeness, and to fully convey the scope of the present invention to those skilled in the art.

[0067] FIG. 1 is a cross-sectional view showing a light-emitting device 1. This light-emitting device includes a substrate 2, a base layer 4 disposed on the substrate 2, and a diode layer structure 10 disposed on the base layer 4.

[0068] The substrate 2 may be a semiconductor wafer or a part of a semiconductor wafer. The substrate 2 may be, for example, a silicon substrate 2, a sapphire substrate 2, or a silicon carbide substrate 2. The silicon substrate 2 is preferable because of its low cost. The substrate 2 may extend in a plane hereinafter referred to as the XY plane. The various layers of the light-emitting device 1 may be successively disposed on the upper part of the substrate 2 in a direction perpendicular to the XY plane, and this perpendicular direction is hereinafter referred to as the Z direction. It should be understood that the illustration of the light-emitting device 1 in this specification is a schematic illustration. The light-emitting device 1 generally has dimensions that are substantially larger in the X and Y directions of the XY plane than in the Z direction.

[0069] The base layer 4 and the diode layer structure 10 may include a nitride-based semiconductor material.

[0070] The base layer 4 includes Al(x)Ga(1-x)N (where 0 < x ≦ 1). The base layer 4 preferably includes an AlN layer having a thickness of 100 to 500 nm, that is, a layer where x = 1, that is, a layer having an Al content of 100%. The AlN layer is preferably disposed directly on the substrate 2, for example, directly on the silicon substrate 2. The AlN layer preferably includes AlN deposited by physical vapor deposition. The AlN layer may include, for example, sputtered AlN. Alternatively, or additionally, the base layer 4 may include a sputtering layer having another Al composition.

[0071] The base layer 4 may include a single layer or a plurality of layers. For example, the base layer may include an AlN layer disposed directly on the substrate 2 and one or more Al(x)Ga(1-x)N layers disposed thereon with a lower Al content, that is, x < 1. The base layer 4 may further include a base layer pillar 6 as described hereinafter.

[0072] The base layer 4 may include an epitaxially grown layer. For example, the base layer 4 may include at least one epitaxially grown layer between the sputtered layer and the diode layer structure 10. The base layer 4 may prevent or reduce the formation of dislocations and / or prevent dislocations from propagating in the diode layer structure 10.

[0073] As mentioned above, the diode layer structure 10 is disposed on the base layer 4. The diode layer structure 10 may comprise a nitride-based semiconductor material. The diode layer structure comprises a quantum well layer structure 30 sandwiched between an n-doped semiconductor layer 12 and a p-doped semiconductor layer 14. In FIG. 1, the order of layers in the diode layer structure 10 is, as viewed in the Z direction from the base layer 4, the n-doped semiconductor layer 12 followed by the quantum well layer structure 30 followed by the p-doped semiconductor layer 14. Alternatively, the order may be reversed, i.e., the p-doped semiconductor layer 14 followed by the quantum well layer structure 30 followed by the n-doped semiconductor layer 12. The n-doped semiconductor layer 12 serves as a charge carrier injection layer that injects electrons into the quantum well layer structure 30 when the diode layer structure 10 is forward biased. Similarly, the p-doped semiconductor layer 14 serves as a charge carrier injection layer that injects holes into the quantum well layer structure 30 when the diode layer structure 10 is forward biased.

[0074] The quantum well layer structure 30 includes a first quantum well 41 and a second quantum well 42, a first proximal barrier layer 51 and a second proximal barrier layer 52, and a first distal barrier layer 61 and a second distal barrier layer 62. The first quantum well 41 and the second quantum well 42 may be separated by a barrier layer 43. The first quantum well 41 and the second quantum well 42 are sandwiched between the first proximal barrier layer 51 and the second proximal barrier layer 52. The first quantum well 41 and the second quantum well 42 and the first proximal barrier layer 51 and the second proximal barrier layer 52 are sandwiched between the first distal barrier layer 61 and the second distal barrier layer 62. Thus, the order of layers in quantum well layer structure 30, viewed in the Z direction from the bottom charge carrier injection layer, may be: first distal barrier layer 61, first proximal barrier layer 51, first quantum well 41, barrier layer 43, second quantum well 42, second proximal barrier layer 52, second distal barrier layer 62.

[0075] The first quantum well 41 and the second quantum well 42 each have a thickness of less than 5 nm and have a bandgap smaller than the bandgap of the first proximal barrier layer 51 and the second proximal barrier layer 52. The first quantum well 41 and the second quantum well 42 may be InAlGaN layers or InGaN layers. For example, the first quantum well 41 and the second quantum well 42 may be In(b)Al(c)Ga(1-bc)N layers, where 0≦b≦1 and 0≦c≦1. The first quantum well 41 and the second quantum well 42 may have the same composition or different compositions. The barrier 43 between the first quantum well 41 and the second quantum well 42 may have a bandgap larger than the bandgap of the first quantum well 41 and the second quantum well 42. The barrier 43 between the first quantum well 41 and the second quantum well 42 may be a GaN layer, for example an intrinsically doped GaN layer. The barrier layer 43 between the first quantum well 41 and the second quantum well 42 may have a thickness of less than 30 nm, preferably less than 10 nm.

[0076] The first proximal barrier layer 51 and the second proximal barrier layer 52 each comprise intrinsically doped GaN. The first distal barrier layer 61 and the second distal barrier layer 62 each comprise Al(a)Ga(1-a)N, where 0≦a≦0.3. Preferably, the first distal barrier layer 61 and the second distal barrier layer 62 each have a composition where 0.3≦a≦1. This provides a good barrier to separate the charge carriers in the first quantum well 41 and the second quantum well 42 from the dopants in the n-doped semiconductor layer 12 and the p-doped semiconductor layer 14.

[0077] Light emitting device 1 may further include electrical contacts for biasing and / or providing charge carriers to diode layer structure 10. As shown in Figure 1, light emitting device 1 may include a top contact 9 electrically connected to the top charge carrier injection layer and a via 3 electrically connected to the bottom charge carrier injection layer. In Figure 1, top contact 9 is electrically connected to p-doped semiconductor layer 14 and via 3 is electrically connected to n-doped semiconductor layer 12. Via 3 is a metal contact through substrate 2.

[0078] The via 3 may be electrically connected to the lower charge carrier injection layer, for example by forming an ohmic contact with the lower charge carrier injection layer. Thus, the via 3 may extend through the substrate 2, through the base layer 4, and to the lower charge carrier injection layer.

[0079] Alternatively, the via 3 may be electrically connected to the lower charge carrier injection layer through one or more intermediate layers. Between the via 3 and the lower charge carrier injection layer, there may be one or more intermediate layers having the same doping type (n or p) as the lower charge carrier injection layer. Thus, the via may form an ohmic contact with the lower intermediate layer, and thereby be electrically connected to the lower charge carrier injection layer through the intermediate layer. Figure 1 shows a situation where the base layer 4 serves as an intermediate layer between the via 3 and the lower charge carrier injection layer, here an n-doped semiconductor layer 12.

[0080] The light emitting device 1 can be configured to emit light in a vertical or Z direction. Herein, the light can be emitted through an opening through the top contact 9 or by the top contact 9 being semi-transparent, as illustrated in FIG. 1. Thus, the light emitting device 1 can be a VCSEL 70.

[0081] Alternatively, the light emitting device 1 can be configured to emit light laterally, for example in the X or Y direction. Herein, light can be emitted at a side of the diode layer structure 10. Thus, the light emitting device 1 can be an edge-emitting laser.

[0082] An example of a semiconductor band structure of the diode layer structure 10 is shown in FIG. 2. As shown, the distal barrier layers 61, 62 may have a larger band gap than the charge carrier injection layers 12, 14 that they border. Thus, the distal barrier layers 61, 62 may form a tunneling barrier through which charge carriers tunnel when injected into the quantum well layer structure 30. The distal barrier layers 61, 62 forming the tunneling barrier may be configured to have a thickness that is thin enough for charge carriers to tunnel through. For example, such a tunneling barrier may be thinner than 30 nm, e.g. thinner than 10 nm. Alternatively, the distal barrier layers 61, 62 may have a smaller band gap than the charge carrier injection layers 12, 14 that they border. In this case, charge carriers may be injected into the quantum well layer structure 30 without tunneling.

[0083] The quantum well layer structure 30 may be configured to be substantially doped by a distal n-doped semiconductor layer and a distal p-doped semiconductor layer for the recombination of electrons and holes. For example, the distal n-doped semiconductor layer for doping the quantum well layer structure 30 may be disposed less than 50 nm from the quantum wells 41, 42 of the quantum well layer structure 30. Similarly, the distal p-doped semiconductor layer for doping the quantum well layer structure 30 may be disposed less than 50 nm from the quantum wells 41, 42 of the quantum well layer structure 30.

[0084] The quantum well layer structure 30 may include two or more quantum wells 40. The quantum well layer structure 30 of the diode layer structure 10 may include a plurality of quantum wells 40, and adjacent quantum wells 40 of the plurality of quantum wells 40 are separated by a barrier layer having a thickness of less than 10 nm. FIG. 3 is a cross-sectional view showing a quantum well layer structure 30 including four quantum wells 40.

[0085] The charge carrier injection layer of the light emitting device 1 may include a superlattice 20. Thereby, the doping of the charge carrier injection layer can be enhanced.

[0086] For example, the p-doped semiconductor layer 14 may include a superlattice 20 of a GaN layer 22 and an Al(z)Ga(1-z)N layer 24, where 0 < z ≦ 1, and the Al(z)Ga(1-z)N layer 24 of the superlattice 20 is p-doped.

[0087] Similarly, the n-doped semiconductor layer 12 may include a superlattice 20 of a GaN layer 22 and an Al(z)Ga(1-z)N layer 24, where 0 < z ≦ 1, and the Al(z)Ga(1-z)N layer 24 of the superlattice 20 is n-doped.

[0088] FIG. 4 is a cross-sectional view of a charge carrier injection layer including a superlattice 20 of a GaN layer 22 and an Al(z)Ga(1-z)N layer 24, here a p-doped semiconductor layer 14. In this figure and the following figures, the doping of each layer is shown next to each layer. Here, p represents p-doping, i represents intrinsic doping, and n represents n-doping. As shown in FIG. 4, the GaN layer 22 may be essentially doped. This can be applied to both the superlattice 20 of the p-doped semiconductor layer 14 and the superlattice 20 of the n-doped semiconductor layer 12.

[0089] Preferably, the Al(z)Ga(1-z)N layer 24 has a composition where z > 0.15, for example 0.2 < z < 0.4. This can provide the most efficient doping enhancement.

[0090] Furthermore, the charge carrier injection layer of the light-emitting device 1 may include a pillar layer 15. Thereby, high conductivity and / or high mobility in the charge carrier injection layer can be promoted. Additionally, or alternatively, ballistic transport through the charge carrier injection layer can be promoted.

[0091] For example, the p-doped semiconductor layer 14 may include a pillar layer 15, and the pillar layer 15 of the p-doped semiconductor layer 14 includes at least one p-doped semiconductor pillar 16 embedded in a support material 18.

[0092] FIGS. 5 and 6 show the pillar layer 15. In the figure, the pillar layer 15 forms the p-doped semiconductor layer 14. However, the pillar layer 15 can alternatively form the n-doped semiconductor layer 12, for example if the doping of the pillar layer 15 is reversed. FIG. 5 is a top view of the pillar layer 15 viewed from the Z direction. FIG. 6 is a cross-sectional view of the pillar layer 15 viewed from the Y direction.

[0093] The semiconductor pillars 16 of the pillar layer 15 can mainly extend along an axis perpendicular to the substrate, i.e., in the Z direction.

[0094] As shown in FIG. 5, the semiconductor pillar 16 may have a circular cross section. Alternatively, the semiconductor pillar 16 may have a non-circular cross section. The semiconductor pillar 16 of the pillar layer 15 may have a diameter D in the range of 10 nm to 500 nm. When the semiconductor pillar 16 has a non-circular cross section, the diameter D is the diameter of the smallest circle that encloses the non-circular cross section.

[0095] The semiconductor pillar 16 of the pillar layer 15 may have a spacing B in the range of 200 nm to 500 nm. Here, as shown in FIG. 5, the spacing B is the distance between adjacent semiconductor pillars 16 in the periodic repetition of the semiconductor pillars 16.

[0096] The semiconductor pillar 16 of the pillar layer 15 may include a single semiconductor material such as Al(x)Ga(1-x)N (where 0 ≦ x ≦ 1). Alternatively, the semiconductor pillar 16 of the pillar layer 15 may include a superlattice 20 of a GaN layer 22 and an Al(z)Ga(1-z)N layer 24 (where 0 < z ≦ 1). FIG. 7 is a cross-sectional view of the pillar layer 15 forming the n-doped semiconductor layer 12 viewed in the Y direction, and the semiconductor pillar 16 includes the superlattice 20. FIG. 8 is a cross-sectional view of the pillar layer 15 forming the p-doped semiconductor layer 14 viewed in the Y direction, and the semiconductor pillar 16 includes the superlattice 20.

[0097] The semiconductor pillars 16 of the pillar layer 15 are doped to form charge carrier transport channels. If the pillar layer 15 forms part of the n-doped semiconductor layer 12, the semiconductor pillars 16 of the pillar layer 15 are n-doped to form electron transport channels through the pillar layer 15. If the pillar layer 15 forms part of the p-doped semiconductor layer 14, the semiconductor pillars 16 of the pillar layer 15 are p-doped to form hole transport channels through the pillar layer 15. The doping may be constant along the axis of the semiconductor pillar 16. Alternatively, the doping may vary along the axis of the semiconductor pillar 16. In particular, if the semiconductor pillar 16 comprises a superlattice 20, the GaN layer 22 may be intrinsically doped, while the Al(z)Ga(1-z)N layer 24 may be p-doped so that the semiconductor pillar 16 forms a hole transport channel, or n-doped so that the semiconductor pillar 16 forms an electron transport channel.

[0098] The pillar layer 15 may be formed by growing a semiconductor layer, patterning the semiconductor layer, and then etching away the semiconductor pillars 16. The spaces between the pillars may then be filled with support material 18 such that the semiconductor pillars 16 are embedded laterally within the support material 18. The support material 18 may be epitaxially grown or deposited by other means.

[0099] The support material 18 may be a semiconductor material, for example an epitaxially grown semiconductor material. The support material 18 may be a semiconductor material having a doping opposite to that of the semiconductor pillars 16 embedded in the support material 18. Thus, in an n-doped semiconductor layer 12, the semiconductor pillars 16 of the pillar layer 15 may be n-doped and the support material 18 may be p-doped. Similarly, in a p-doped semiconductor layer 14, the semiconductor pillars 16 of the pillar layer 15 may be p-doped and the support material 18 may be n-doped.

[0100] Alternatively, or in addition to, using the doped semiconductor material for the support material 18, the support material 18 may be an oxide. For example, the support material may be gallium oxide such as Ga2O or Ga2O3.

[0101] The p-doped semiconductor layer can provide a light hole charge carrier concentration due to strain. Thus, at least a part of the p-doped semiconductor layer 14 may be lattice mismatched with respect to the surroundings such that the part of the p-doped semiconductor layer 14 is strained. As used herein, the term lattice mismatch means having a different lattice constant compared to the surroundings. The lattice mismatch can be configured for the part of the p-doped semiconductor layer 14 by making the band energy of the light hole higher than that of the heavy hole.

[0102] In one example, the p-doped semiconductor layer 14 is lattice mismatched with respect to the adjacent layer.

[0103] In another example, the p-doped semiconductor pillars 16 of the pillar layer 15 of the p-doped semiconductor layer 14 are lattice mismatched with respect to the support material 18 of the pillar layer 15.

[0104] As described above, the base layer 4 includes Al(x)Ga(1-x)N, where 0 < x ≦ 1. The base layer 4 may include, for example, one or more Al(x)Ga(1-x)N layers. Additionally, or alternatively, the base layer 4 may include base layer pillars 6 that are laterally sealed with the base layer encapsulation material 8. FIG. 9 is a cross-sectional view of such a base layer 4 viewed from the Y direction.

[0105] The base layer pillar 6 is mainly a pillar that extends along an axis perpendicular to the substrate, i.e., in the Z direction.

[0106] The base layer pillars 6 may have a circular cross section. Alternatively, the base layer pillars 6 may have a non-circular cross section. The base layer pillars 6 may have a diameter smaller than 500 nm, for example smaller than 100 nm. When the base layer pillars 6 have a non-circular cross section, the diameter is the diameter of the smallest circle that encompasses the non-circular cross section.

[0107] The base layer sealing material 8 laterally seals the base layer pillars 6. Furthermore, the base layer sealing material 8 may seal the top ends of the base layer pillars 6, as shown in FIG.

[0108] The base layer pillars 6 may be AlN pillars, and the base layer sealing material 8 may be Al x Ga 1-x N (where 0≦x≦0.95).

[0109] The light emitting device 1 may be a laser, for example a vertical-cavity surface emitting laser (VCSEL) or an edge-emitting laser diode 70 .

[0110] 10 is a cross-sectional view of a light emitting device 1 in the form of a VCSEL 70. The illustrated VCSEL 70 includes a bottom reflector 72 below the first quantum well 41 and the second quantum well 42 and an top reflector 74 above the first quantum well 41 and the second quantum well 42, where the top reflector 74 and the bottom reflector 72 form an optical cavity for light emitted by the first quantum well 41 and the second quantum well 42.

[0111] As shown in FIG. 10, the bottom mirror 72 and the top mirror 74 may each be distributed Bragg reflectors (DBRs). The DBRs may include layers of alternating high and low refractive index. The layer thicknesses may be configured to correspond to a quarter of the emission wavelength, e.g., a quarter of the wavelength of the light emitted by the quantum wells 41, 42 of the quantum well layer structure 30. In FIG. 10, the bottom mirror 72 includes four periods of alternating high and low refractive index, and the top mirror 74 includes two periods of alternating high and low refractive index.

[0112] 11 is a flow chart showing a method 100 for manufacturing a light emitting device 1. The manufacturing method 100 includes a step S101 of providing a substrate 2, a step S102 of depositing a base layer 4, and a step S103 of forming a diode layer structure 10.

[0113] The substrate 2 may be provided, for example, as a silicon substrate 2, a sapphire substrate 2 or a silicon carbide substrate 2.

[0114] In step S102, a base layer 4 including Al(x)Ga(1-x)N can be deposited by physical vapor deposition, for example by sputtering.

[0115] In step S103, the diode layer structure 10 can be formed by sequentially forming the lower charge carrier injection layer, the first distal barrier layer 61, the first proximal barrier layer 51, the first quantum well 41, the barrier layer 43, the second quantum well 42, the second proximal barrier layer 52, the second distal barrier layer 62, and the upper charge carrier injection layer on the base layer 4. The layers of the diode layer structure 10 can be formed by epitaxial growth. The lower charge carrier injection layer can be an n-doped semiconductor layer 12 and the upper charge carrier injection layer can be a p-doped semiconductor layer 14, or vice versa.

[0116] Optionally, the manufacturing method 100 further comprises: Etching holes through the substrate 2 by reactive ion etching; and forming a via 3 in step S104 by depositing metal in a hole through the substrate 2 such that a metal contact is formed that penetrates the substrate and electrically connects to the lower charge carrier injection layer.

[0117] The etching of holes through the substrate 2 by reactive ion etching can be terminated based on the spectroscopic detection of aluminum chloride or aluminum fluoride molecular species. The molecular species can be spectroscopically detected, for example, by ultraviolet-visible-near infrared spectroscopy. The reactive ion etching of holes through the substrate 2 can include the step of generating a plasma that etches through the substrate 2. The plasma can emit light during etching. Part of the light can come from molecular species generated by the reaction of the etching gas with the material to be etched. Thus, when the etch passes through the substrate, for example the silicon substrate 2, the etching gas can react with aluminum of a layer on the substrate. Thus, the etching gas can react with aluminum, for example of the base layer 4, to form aluminum chloride or aluminum fluoride species that emit a characteristic spectrum when excited by the plasma.

[0118] Although the inventive concept has been described above primarily with reference to a limited number of examples, those skilled in the art will readily appreciate that other embodiments besides those disclosed above are equally possible within the scope of the inventive concept as defined by the appended claims.

Claims

1. A substrate (2), a base layer (4) made of Al(x)Ga(1-x)N (where 0<x≦1) disposed on the substrate (2); a diode layer structure (10) disposed on the base layer (4) and including a quantum well layer structure (30) sandwiched between an n-doped semiconductor layer (12) and a p-doped semiconductor layer (14); The quantum well layer structure (30) includes a first quantum well (41) and a second quantum well (42), a first proximal barrier layer (51) and a second proximal barrier layer (52), and a first distal barrier layer (61) and a second distal barrier layer (62); the first quantum well (41) and the second quantum well (42) each have a thickness of less than 5 nm and a bandgap smaller than the bandgap of the first proximal barrier layer (51) and the second proximal barrier layer (52); the first proximal barrier layer (51) and the second proximal barrier layer (52) each comprise intrinsically doped GaN, the first quantum well (41) and the second quantum well (42) being sandwiched between the first proximal barrier layer (51) and the second proximal barrier layer (52); the first distal barrier layer (61) and the second distal barrier layer (62) each comprise Al(a)Ga(1-a)N (where 0<a≦0.3), both of the first distal barrier layer (61) and the second distal barrier layer (62) having a bandgap larger than that of the first proximal barrier layer (51) and the second proximal barrier layer (52), the first quantum well (41) and the second quantum well (42) and the first proximal barrier layer (51) and the second proximal barrier layer (52) are sandwiched between the first distal barrier layer (61) and the second distal barrier layer (62); the n-doped semiconductor layer (12) is configured to inject electrons into the quantum well layer structure (30); A light-emitting device (1), wherein the p-doped semiconductor layer (14) is configured to inject holes into the quantum well layer structure (30), and preferably the base layer (4) is AlN having a thickness of 100 to 500 nm.

2. 2. The light emitting device (1) of claim 1, wherein the quantum well layer structure (30) is configured to be substantially doped by a distal n-doped semiconductor layer and a distal p-doped semiconductor layer for recombination of electrons and holes.

3. 2. The light-emitting device of claim 1, wherein the quantum well layer structure of the diode layer structure may include a plurality of quantum wells, adjacent quantum wells of the plurality of quantum wells being separated by a barrier layer having a thickness of less than 10 nm.

4. 2. The light-emitting device of claim 1, wherein the p-doped semiconductor layer comprises a superlattice of GaN layers and Al(z)Ga(1-z)N layers, where 0<z≦1, and the Al(z)Ga(1-z)N layers of the superlattice are p-doped.

5. 2. The light-emitting device of claim 1, wherein the n-doped semiconductor layer comprises a superlattice of GaN layers and Al(z)Ga(1-z)N layers, where 0<z≦1, and the Al(z)Ga(1-z)N layers of the superlattice are n-doped.

6. 2. The light-emitting device (1) of claim 1, further comprising a via (3) that is a metal contact that passes through the substrate (2) and electrically connects to the n-doped semiconductor layer (12) or the p-doped semiconductor layer (14) of the diode layer structure (10).

7. the n-doped semiconductor layer (12) comprises a pillar layer (15), the pillar layer (15) of the n-doped semiconductor layer (12) comprises at least one n-doped semiconductor pillar (16) embedded in a support material (18), the at least one n-doped semiconductor pillar (16) being configured to form an electron transport channel through the pillar layer (15) of the n-doped semiconductor layer (12) to the quantum well layer structure (30); and / or 2. The light-emitting device (1) of claim 1, wherein the p-doped semiconductor layer (14) comprises a pillar layer (15), the pillar layer (15) of the p-doped semiconductor layer (14) comprising at least one p-doped semiconductor pillar (16) embedded in a support material (18), and the at least one p-doped semiconductor pillar (16) is configured to form a hole transport channel through the pillar layer (15) of the p-doped semiconductor layer (14) to the quantum well layer structure (30).

8. 8. The light-emitting device (1) of claim 7, wherein for one or more pillar layers (15) of the device (1), the support material (18) is a semiconductor material having a doping opposite to the doping of the semiconductor pillars (16) embedded in the support material (18).

9. 8. The light emitting device (1) of claim 7, wherein for one or more pillar layers (15) of the device (1), the support material (18) is gallium oxide.

10. 8. The light-emitting device (1) of claim 7, wherein for one or more pillar layers (15) of the device (1), the diameter (D) of the semiconductor pillars (16) is between 10 and 500 nm and the pitch (B) of the semiconductor pillars (16) is between 200 and 500 nm.

11. 2. The light emitting device (1) of claim 1, wherein the p-doped semiconductor layer (14) is provided with a light-hole charge carrier concentration due to strain.

12. 2. The light-emitting device of claim 1, wherein the device is a vertical cavity surface-emitting laser including a lower reflecting mirror below the first quantum well and the second quantum well, and an upper reflecting mirror above the first quantum well and the second quantum well, the upper reflecting mirror and the lower reflecting mirror forming an optical cavity for light emitted by the first quantum well and the second quantum well.

13. A step (S101) of providing a substrate (2); a step (S102) of depositing a base layer (4) comprising Al(x)Ga(1-x)N on the substrate (2) by physical vapor deposition; and forming (S103) on the base layer (4) a diode layer structure (10) including a quantum well layer structure (30) sandwiched between an n-doped semiconductor layer (12) and a p-doped semiconductor layer (14), The quantum well layer structure (30) includes a first quantum well (41) and a second quantum well (42), a first proximal barrier layer (51) and a second proximal barrier layer (52), and a first distal barrier layer (61) and a second distal barrier layer (62); the first quantum well (41) and the second quantum well (42) each have a thickness of less than 5 nm and a bandgap smaller than the bandgap of the first proximal barrier layer (51) and the second proximal barrier layer (52); the first proximal barrier layer (51) and the second proximal barrier layer (52) each comprise intrinsically doped GaN, the first quantum well (41) and the second quantum well (42) being sandwiched between the first proximal barrier layer (51) and the second proximal barrier layer (52); the first distal barrier layer (61) and the second distal barrier layer (62) each comprise Al(a)Ga(1-a)N (where 0<a≦0.3), both of the first distal barrier layer (61) and the second distal barrier layer (62) having a larger bandgap than the first proximal barrier layer (51) and the second proximal barrier layer (52), the first quantum well (41) and the second quantum well (42) and the first proximal barrier layer (51) and the second proximal barrier layer (52) are sandwiched between the first distal barrier layer (61) and the second distal barrier layer (62); the n-doped semiconductor layer (12) is configured to inject electrons into the quantum well layer structure (30); The method (100) for manufacturing a light-emitting device (1), wherein the p-doped semiconductor layer (14) is configured to inject holes into the quantum well layer structure (30), and preferably the base layer (4) is AlN having a thickness of 100 to 500 nm.

14. Etching holes through said substrate (2) by reactive ion etching; 14. The method of claim 13, further comprising depositing metal in the holes through the substrate (2) so as to form metal contacts through the substrate (2) and electrically connecting to the n-doped semiconductor layer (12) or the p-doped semiconductor layer (14) of the diode layer structure (10).

15. 15. The method of claim 14, wherein the etching of the holes through the substrate (2) by reactive ion etching is terminated based on spectroscopic detection of aluminum chloride or aluminum fluoride molecular species.

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