Feedback control system for impedance matching.

Abstract

A method, system, and medium for a feedback control system for impedance matching are described. A computer program product for impedance matching and power distribution network is disclosed. The computer program product may include computer executable instructions that may cause a current value of a variable reactance associated with a station of a process chamber to be obtained at a current time, the variable reactance being associated with a first feedback control system for impedance matching to the process chamber, and a frequency adjustment being made on an RF generator of the process chamber in association with a second feedback control system for impedance matching to the process chamber. The instructions may cause an updated value of the variable reactance of the station utilized in association with the first feedback control system based at least in part on an error associated with the second feedback control system.

Description

[Technical field]

[0001] [Incorporated by reference] A PCT application is being filed contemporaneously herewith as a part of this application. Each application identified in the contemporaneously filed PCT application to which this application claims benefit or priority is incorporated by reference in its entirety for all purposes. [Background technology]

[0002] Plasma-based operations may be utilized in semiconductor manufacturing. The plasma may be generated using a radio frequency (RF) generator that provides an RF signal to a process chamber. The load impedance may change at different times, resulting in a variation in the amount of reflected power. Furthermore, in instances where multiple stations are associated with the process chamber, the amount of power delivered to each station may vary. However, it may be difficult to design a feedback control system that provides impedance matching to minimize reflected power and / or control the power balance of the RF power delivered to each station.

[0003] The background description provided herein is intended to provide a general overview of the contents of the present disclosure. Work by the currently named inventors within the scope of what is described in this Background section, as well as aspects of the description that may not otherwise be regarded as prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0004] Disclosed herein are systems, methods, and media for a feedback control system for impedance matching.

[0005] According to some embodiments, a computer program product for impedance matching and power distribution network may include a non-transitory computer readable medium having computer executable instructions disposed thereon. The computer executable instructions may cause a current value of a variable reactance associated with a station of a process chamber to be obtained at a current time, the variable reactance being associated with a first feedback control system for impedance matching to the process chamber, and a frequency adjustment being made on an RF generator of the process chamber in association with a second feedback control system for impedance matching to the process chamber. The computer executable instructions may cause an updated value of the variable reactance of the station utilized in association with the first feedback control system to be determined based at least in part on an error associated with the second feedback control system.

[0006] In some examples, the error associated with the second feedback control system includes a difference between a frequency measured at the station and a target frequency associated with the process chamber. In some examples, the frequency at the station is determined using one or more sensing circuits.

[0007] In some examples, the updated value of the variable reactance can be used to modify a position of one or more variable reactance elements associated with the process chamber to minimize reflected power associated with the station. In some examples, the one or more variable reactance elements include at least one of a series capacitor or a shunt capacitor. In some examples, the frequency is driven toward a target frequency by a second feedback control system by modifying a position of one or more variable reactance elements associated with the first feedback control system. In some examples, the target frequency corresponds to a frequency specified for the currently performed recipe step.

[0008] In some examples, the computer-executable instructions may cause further determining a position of the one or more variable reactance elements using the calibration table and based at least in part on the updated value of the variable reactance.

[0009] In some examples, the variable reactance includes a series reactance associated with a station of the process chamber.

[0010] In some examples, the variable reactance includes a shunt reactance associated with the process chamber.

[0011] In some examples, the variable reactance includes a variable series reactance, and the updated series reactance is determined based on a correction to the target series reactance, the correction incorporating an error associated with the second feedback control system.

[0012] In some examples, the variable reactance includes a variable shunt reactance, and the updated shunt reactance is determined based at least in part on an error associated with the second feedback control system without determining a target shunt reactance.

[0013] In some examples, the update value of the variable reactance is utilized by the first feedback control system in response to one or more criteria being satisfied. In some examples, the one or more criteria include a reflected power associated with the process chamber exceeding a reflected power threshold, a power balance ratio associated with a plurality of stations of the process chamber exceeding a power balance threshold, and an error associated with the second feedback control system exceeding an error threshold. In some examples, in response to determining that a difference between a current value of the variable reactance and the update value of the variable reactance is within a dither threshold, the update value of the variable reactance is modified prior to use.

[0014] In some examples, determining an update value for the station's variable reactance based at least in part on an error associated with the second feedback control system is in response to determining that a mode associated with controlling the first feedback control system based on an error associated with the second feedback control system has been activated in the currently active recipe. [Brief description of the drawings]

[0015] [Figure 1A] FIG. 1A is a schematic diagram of an exemplary device according to some embodiments.

[0016] [Figure 1B] FIG. 1B is a block diagram illustrating various components of a system that may be utilized to perform a semiconductor manufacturing process, according to some embodiments.

[0017] [Figure 1C] FIG. 1C is a block diagram illustrating various components of a system that may be utilized to perform a semiconductor manufacturing process, according to some embodiments.

[0018] [Diagram 2] FIG. 2 is a diagram illustrating various circuit elements utilized in a feedback control system according to some embodiments.

[0019] [Diagram 3] FIG. 3 is a flow chart of an example process for determining values ​​of variable reactance elements to coordinate two feedback control systems for impedance matching, according to some embodiments.

[0020] [Figure 4] FIG. 4 is a flow chart of an example process for determining whether to modify a variable reactance according to a feedback control system for impedance matching according to some embodiments.

[0021] [Diagram 5] FIG. 5 is a flow chart of an example process for coordinating two feedback control systems for impedance matching, according to some embodiments.

[0022] [Figure 6] FIG. 6 illustrates an exemplary computer system that may be employed to implement certain embodiments described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] Terminology The following terms are used throughout the specification.

[0024] The terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" may be used interchangeably. Those skilled in the art will appreciate that the term "partially fabricated integrated circuit" may refer to a semiconductor wafer at any of the many stages of integrated circuit fabrication thereon. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, or 300 mm, or 450 mm. In addition to semiconductor wafers, other workpieces that may take advantage of the disclosed embodiments include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, display devices or components such as backplanes for pixelated display devices, flat panel displays, micromechanical devices, etc. The workpieces may be of various shapes, sizes, and materials.

[0025] As used herein, a "semiconductor device manufacturing operation" is an operation performed during the manufacture of a semiconductor device. Typically, the overall manufacturing process includes multiple semiconductor device manufacturing operations, each performed in a unique semiconductor manufacturing tool, such as a plasma reactor, an electroplating cell, a chemical mechanical planarization tool, a wet etching tool, etc. Categories of semiconductor device manufacturing operations include subtractive processes, such as etching processes and planarization processes, and material additive processes, such as deposition processes (e.g., physical vapor deposition, chemical vapor deposition, atomic layer deposition, electrochemical deposition, electroless deposition). In the context of etching processes, a substrate etching process includes a process that etches a mask layer, or more generally, a process that etches any layer of material previously deposited and / or otherwise present on a substrate surface. Such etching processes may etch a stack of layers within a substrate.

[0026] "Production equipment" refers to equipment in which a production process takes place. Production equipment often has a process chamber in which a workpiece resides during processing. Typically, in use, production equipment performs one or more semiconductor device manufacturing operations. Examples of production equipment for semiconductor device manufacturing include deposition reactors, such as electroplating cells, physical vapor deposition reactors, chemical vapor deposition reactors, and atomic layer deposition reactors, as well as subtractive process reactors, such as dry etch reactors (e.g., chemical etch reactors and / or physical etch reactors), wet etch reactors, and ashers. Impedance Matching Feedback Control System

[0027] A plasma-based reactor may be utilized to perform plasma-based semiconductor operations (e.g., plasma-based deposition and / or plasma-based etching). Such a reactor, i.e., process chamber, may have multiple (e.g., 2, 4, 8, 16, etc.) stations. An RF generator may provide an RF signal to the station(s) of the process chamber, which is used to generate a plasma in the station to perform the plasma-based operation. If the process chamber utilizes multiple stations, a power splitter may be used to provide power to the multiple stations. A matching network may be utilized to perform impedance matching, for example, to compensate for changes in load impedance. Such a matching network (e.g., for impedance matching) may enable maximum power to be delivered from the RF generator to each station by eliminating reflected power.

[0028] In some cases, the matching network may utilize a first feedback control system that adjusts one or more variable reactance elements to perform impedance matching. The one or more variable reactance elements may include a variable capacitor or a variable inductor. In some cases, the variable reactance elements may be adjusted in position to achieve a target or desired reactance value calculated to eliminate reflected power. The system may further utilize a second feedback control system that adjusts the frequency of the RF generator of the process chamber to perform impedance matching. Because impedance matching (i.e., minimizing or eliminating reflected power) requires manipulation of two independent dimensions (i.e., the real and imaginary components of the impedance), adjusting the frequency alone may adjust one dimension to a desired value, but not necessarily both independent dimensions to a desired value. Thus, adjusting the frequency may allow the reflected power to be reduced, but not necessarily eliminated. The first feedback control system may be relatively slow, since adjusting the variable reactance elements (e.g., via a stepper motor) may require durations on the order of milliseconds, or tens of milliseconds. In contrast, the frequency adjustment may be faster than the adjustment of the variable reactance element, e.g., on the order of microseconds or tens of microseconds. In other words, a first feedback control system utilizing the adjustment of the variable reactance element may be relatively slow yet enable complete elimination of reflected power, while a second feedback control system utilizing frequency adjustment may only result in a reduction of reflected power while being orders of magnitude faster than the first feedback control system.

[0029] Described herein is a technique for coordinating a first feedback control system utilizing adjustment of a variable reactance element with a second feedback control system that performs frequency adjustment on an RF generator. Specifically, a new or updated value for the reactance element of the first feedback control system may be determined based on an error of the second feedback control system. In some embodiments, the error may be the difference between the frequency measured at each station of the process chamber (or the average of the frequencies measured at all stations) and the target frequency. Coordinating the first and second feedback control systems may combine the advantages of each feedback control system, thereby allowing for faster removal of reflected power. The techniques described herein may be particularly advantageous during recipe step changes that change RF signal characteristics in a stepwise manner (e.g., not sequential in one or more parameters). Additionally, during the steady state portion during a recipe step, the techniques described herein may allow the frequency at each station to move toward the target frequency specified for that recipe step.

[0030] FIG. 1A shows a substrate processing apparatus for depositing a film on a semiconductor substrate using any number of processes. The apparatus 100 of FIG. 1A utilizes a single processing station 102 of a process chamber having a single substrate holder 108 (e.g., pedestal) within an interior volume that can be maintained under vacuum by a vacuum pump 118. Also fluidly coupled to the process chamber are a gas delivery system 101 and a showerhead 106 for delivering (for example) film precursors, carrier gases, and / or purge gases, and / or process gases, secondary reactants, etc. Equipment for generating plasma in the process chamber is also shown in FIG. 1A. The apparatus shown in FIG. 1 may be particularly adapted for performing plasma enhanced CVD.

[0031] For simplicity, the processing apparatus 100 is shown as a stand-alone process station (102) in a process chamber for maintaining a low pressure environment. However, it will be understood that multiple process stations may be included in a common process tool environment, such as in a common reaction chamber, as described herein. For example, FIG. 1C illustrates an example of a multi-station processing tool, which is described in more detail below. Additionally, it will be understood that in some embodiments, one or more hardware parameters of the processing apparatus 100, including those detailed herein, may be programmatically adjusted by one or more system controllers.

[0032] The process chamber station 102 is in fluid communication with a gas delivery system 101 for delivering process gases, which may include liquids and / or gases, to a distribution showerhead 106. The gas delivery system 101 includes a mixing vessel 104 for blending and / or conditioning the process gases for delivery to the showerhead 106. One or more mixing vessel inlet valves 120 may control the introduction of process gases into the mixing vessel 104.

[0033] Some reactants may be stored in liquid form prior to vaporization and subsequent delivery to station 102 of the process chamber. The embodiment of FIG. 1A includes a vaporization point 103 for vaporizing liquid reactants for delivery to mixing vessel 104. In some embodiments, vaporization point 103 may be a heated dosing module. In some other embodiments, vaporization point 103 may be a heated vaporizer. In still other embodiments, vaporization point 103 may be removed from the process station. In some embodiments, a liquid flow controller (LFC) upstream of vaporization point 103 may be provided to control the mass flow rate of liquid for vaporization and delivery to processing station 102.

[0034] The showerhead 106 distributes process gases and / or reactants (e.g., film precursors) to the substrate 112 at the process stations, the flow of which is controlled by one or more valves (e.g., valves 120, 120A, and 105) upstream from the showerhead. In the embodiment shown in FIG. 1A, the substrate 112 is shown positioned below the showerhead 106 and resting on a pedestal 108. The showerhead 106 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 112. In some embodiments having more than one station, the gas delivery system 101 includes valves or other flow control structures upstream from the showerhead that can independently control the flow of process gases and / or reactants to each station such that gases may be flowed to some stations but not to other stations. Additionally, the gas delivery system 101 may be configured to independently control the process gases and / or reactants delivered to each station in a multi-station apparatus such that different gas compositions are provided to different stations, e.g., partial pressures of gas components may be varied simultaneously between stations.

[0035] A volume 107 is located below the showerhead 106. In some embodiments, the pedestal 108 may be raised or lowered to expose the substrate 112 to the volume 107 and / or to change the volume of the volume 107. Optionally, the pedestal 108 may be lowered and / or raised during portions of the deposition process to adjust process pressure, reactant concentrations, etc., within the volume 107.

[0036] 1A, the showerhead 106 and pedestal 108 are electrically coupled to a radio frequency power source 114 and a matching network 116 to provide power to the plasma generator. In some embodiments, control of the plasma energy (e.g., via a system controller having suitable machine-readable instructions and / or control logic) may be performed by controlling process station pressure, gas concentrations, the source of RF power, etc. For example, the radio frequency power source 114 and the matching network 116 may be operated at any suitable power to form a plasma having a desired composition of radical species. Similarly, the RF power source 114 may provide any suitable frequency, group of frequencies, and power.

[0037] In some examples, control of plasma ignition and maintenance conditions is performed using suitable hardware and / or suitable machine-readable instructions in a system controller that may provide control instructions through a sequence of input / output control (IOC) instructions. In one example, instructions for setting plasma conditions for plasma ignition or maintenance are provided in the form of a plasma activation recipe of a process recipe. In some cases, process recipes may be provided in succession such that all instructions for a process are executed simultaneously with that process. In some examples, instructions for setting one or more plasma parameters may be included in a recipe that precedes a plasma process. For example, a first recipe may include instructions for setting flow rates of an inert gas (e.g., helium) and / or a reactive gas, instructions for setting a plasma generator to a power set point, and time delay instructions for the first recipe. A subsequent second recipe may include instructions for enabling the plasma generator, and time delay instructions for the second recipe. A third recipe may include instructions for disabling the plasma generator, and time delay instructions for the third recipe. It will be understood that these recipes may be further subdivided and / or repeated in any suitable manner within the scope of the present disclosure.

[0038] In some deposition processes, plasma ignition lasts on the order of a few seconds or more in duration. In certain embodiments described herein, much shorter plasma ignitions may be applied during a processing cycle. These may be on the order of less than 50 milliseconds, such as 25 milliseconds.

[0039] For simplicity, the processing apparatus 100 is shown in Figure 1A as a stand-alone station (102) of a process chamber for maintaining a low pressure environment, however, it will be appreciated that multiple process stations may be included in a multi-station processing tool environment, such as that shown in Figure 1B, which shows a schematic diagram of an embodiment of a multi-station processing tool.

[0040] Processing equipment 130 may employ an integrated circuit fabrication chamber 132 that includes multiple fabrication process stations, each of which may be used to perform a processing operation on a substrate held by a wafer holder, such as pedestal 108 of FIG. 1A, at a particular process station. In the embodiment of FIG. 1B, integrated circuit fabrication chamber 132 is shown having four process stations 133, 134, 135, and 136, and four cables that provide RF power to each of the four process stations through input port 137. Other similar multi-station processing equipment may have more or fewer process stations, depending on the embodiment and, for example, the desired level of parallel wafer processing, size / space constraints, cost constraints, etc. Also shown in FIG. 1B is a substrate handler robot 138, which may operate under the control of system controller 140, and is configured to move substrates from a wafer cassette (not shown in FIG. 1B) from a loading port into integrated circuit fabrication chamber 132 and onto one of process stations 133, 134, 135, or 136.

[0041] FIG. 1B also illustrates an embodiment of a system controller 140 employed to control the process conditions and hardware states of the processing tool 130. The system controller 140 may include one or more memory devices, one or more mass storage devices, and one or more processors. The one or more processors may include a central processing unit, analog and / or digital input / output connections, stepper motor controller boards, etc. In some embodiments, the system controller 140 controls all of the activity of the processing tool 130. The system controller 140 executes system control software stored in a mass storage device, which may be loaded into a memory device and executed on the hardware processor of the system controller. The software executed by the processor of the system controller 140 may include instructions for controlling the timing, mixture of gases, pressure of the fabrication chambers and / or stations, temperature of the fabrication chambers and / or stations, wafer temperature, position of the substrate pedestal, chuck, and / or susceptor, number of cycles performed on one or more substrates, and other parameters of a particular process performed by the processing tool 130. These programmed processes may include various types of processes, including, but not limited to, processes related to determining the amount of accumulation on surfaces inside the chamber, processes related to depositing a film on a substrate, including the number of cycles, and processes related to cleaning the chamber. System control software that may be executed by one or more processors of the system controller 140 may be configured in any suitable manner. For example, various process tool component subroutines or control objects may be written to control the operation of the process tool components necessary to perform the various tool processes.

[0042] In some embodiments, the software for execution by the processor of the system controller 140 may include input / output control (IOC) sequence instructions for controlling the various parameters described above. For example, each stage of a substrate deposition and deposition cycle may include one or more instructions for execution by the system controller 140. Instructions for setting process conditions for an ALD / CFD deposition process stage may be included in a corresponding ALD / CFD deposition recipe stage. In some embodiments, the recipe stages may be arranged in series such that all instructions for a process stage are executed simultaneously with that process stage.

[0043] Other computer software and / or programs stored on the mass storage device of the system controller 140 and / or memory devices accessible to the system controller 140 may be employed in some embodiments. Examples of programs or portions of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program. The substrate positioning program may include program code for process tool components used to mount the substrate on the pedestal 108 (of FIG. 1A) and control the spacing between the substrate and other parts of the processing equipment 130. The positioning program may include instructions for the appropriate movement of the substrate in and out of the reaction chamber required for deposition of a film on the substrate and cleaning of the chamber.

[0044] The process gas control program may include code for controlling gas composition and flow rates, and optionally for flowing gases into one or more process stations prior to deposition to stabilize pressure in the process station. In some embodiments, the process gas control program includes instructions for introducing gases during formation of a film on a substrate in a reaction chamber. This may include introducing gases in different numbers of cycles for one or more substrates in a batch of substrates. The pressure control program may include code for controlling pressure in a process station, for example, by regulating a throttle valve in an exhaust system of the process station, gas flow to the process station, etc. The pressure control program may include instructions for maintaining the same pressure during different numbers of cycles of deposition on one or more substrates during processing of a batch.

[0045] The heater control program may include code for controlling the current to a heating unit used to heat the substrate, or the heater control program may control the delivery of a heat transfer gas (such as helium) to the substrate.

[0046] In some embodiments, there may be a user interface associated with the system controller 140. The user interface may include a display screen, a graphical software display of equipment and / or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, etc.

[0047] In some embodiments, the parameters adjusted by the system controller 140 may relate to process conditions. Non-limiting examples include process gas composition and flow rates, temperature, pressure, plasma conditions, etc. These parameters may be provided to the user in the form of a recipe, which may be entered using a user interface. A recipe for an entire batch of substrates may include a compensated cycle count of one or more substrates in the batch to account for thickness trends over the course of processing the batch.

[0048] Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 140 from various process tool sensors. Signals for controlling the process may be output via analog and / or digital output connections of the processing tool 130. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, and the like. Sensors may also be provided and used to monitor and determine the build-up on one or more surfaces inside the chamber and / or the thickness of a material layer on a substrate within the chamber. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain process conditions.

[0049] The system controller 140 may provide program instructions for carrying out the deposition processes described above. The program instructions may control a wide variety of process parameters, such as DC power levels, pressure, temperature, number of cycles for the substrate, amount of accumulation on at least one surface inside the chamber, etc. The instructions may control parameters for operating the in situ deposition of a film stack according to various embodiments described herein.

[0050] For example, the system controller may include control logic for implementing the techniques described herein, such as determining an amount of deposition material currently accumulated on at least an internal region inside the deposition chamber, obtaining a compensated number of ALD cycles to reach the target deposition thickness taking into account the amount of deposition material currently accumulated on the internal region inside the deposition chamber by applying the determined amount of deposition material, or a parameter derived therefrom, to a relationship between (i) the number of ALD cycles required to achieve the target deposition thickness and (ii) a variable representing the amount of accumulated deposition material, and performing the compensated number of ALD cycles on one or more substrates in the batch of substrates. The system may also include control logic for determining that the accumulation in the chamber has reached an accumulation limit and, in response to the determination, for stopping processing of the batch of substrates as well as for cleaning the chamber interior.

[0051] 1B , the controller may further control and / or manage the operation of an RF subsystem that may generate and deliver RF power to integrated circuit fabrication chamber 132 via radio frequency input port 137. As described further herein, such operations may relate to, for example, determining upper and lower thresholds for RF power delivered to integrated circuit fabrication chamber 132, determining the actual (e.g., real-time) level of RF power delivered to integrated circuit fabrication chamber 132, RF power activation / deactivation times, RF power on / off durations, operating frequency, etc.

[0052] In certain embodiments, integrated circuit fabrication chamber 132 may include input ports (additional input ports not shown in FIG. 1B) in addition to input port 137. Thus, integrated circuit fabrication chamber 132 may utilize eight RF input ports. In certain embodiments, process stations 133-136 of integrated circuit fabrication chamber 132 may each utilize a first input port and a second input port, where the first input port may transmit a signal having a first frequency and the second input port may transmit a signal having a second frequency. The use of dual frequencies may enhance plasma characteristics, which may result in deposition rates within certain limits and / or more controllable deposition rates. Dual frequencies may provide other desirable results than those described herein. In certain embodiments, frequencies from about 300 kHz to about 300 MHz may be utilized.

[0053] 1B , RF power from RF signal source 142 may be split into four output channels, which may be coupled to corresponding ones of input ports 137 of integrated circuit manufacturing chamber 132. In at least certain embodiments, it may be useful to split the RF power from RF signal source 142 into relatively equal portions (such as about +1%). Thus, in one example, if RF signal source 142 provides 1000 W of output power, about 250 W (+1%) is delivered to each of input ports 137 of manufacturing chamber 132.

[0054] FIG. 1C is a block diagram illustrating various components of a system utilized to perform a semiconductor manufacturing process, according to an embodiment 151. In FIG. 1C, an RF signal generator 160 may be utilized to generate an excitation signal that may cause the formation of plasma in stations 102A, 102B, 102C, and 102D of the process chamber. Stations 102A, 102B, 102C, and 102D may correspond to stations of the semiconductor process chamber, as described above with reference to FIG. 1A. It should be noted that in some embodiments, multiple RF signal generators may be used. For example, a first RF generator configured to generate a relatively low frequency signal, such as a signal of about 400 kHz, and a second RF generator configured to generate a relatively high frequency signal, such as a signal of about 27.12 MHz. However, these are merely exemplary frequencies. In other embodiments, different radio frequencies may be generated, and the embodiments are not limited to 400 kHz and 27.12 MHz signals. For example, in certain cases, the relatively low frequency may correspond to a frequency of 360 kHz to 440 kHz. In another example, the relatively high frequency may correspond to a frequency between 26.5 MHz and 27.5 MHz.

[0055] In FIG. 1C, an RF transmission line couples the RF signal generator 160 to a matching network 163. The RF transmission line may have a characteristic impedance of approximately 50 ohms. However, other embodiments may utilize transmission lines having different characteristic impedances, such as 70 ohms, 300 ohms, etc. In the embodiment of FIG. 1C, the matching network 163 operates to match the load presented by the power divider 170 to the output impedance of the RF signal generator 160. Such matching allows for maximum power transfer from the RF signal generator 160 to the power divider 170. Thus, maximum power can be transferred from the RF signal generator 160 to the power divider 170 even when the power divider 170 presents a high reactive load (e.g., a complex impedance having a relatively small real component and a large reactive component). The matching network 163 may utilize various reactive components, such as inductors and / or capacitors, that operate to compensate for the high reactive load that may be presented by the power divider 170. It should be noted that in some embodiments, the matching network 163 and the power divider 170 may be combined in an integrated system.

[0056] In certain embodiments, the components of the matching network 163 may be arranged to match a particular load presented by the low frequency and high frequency input ports of the power divider 170, which may be operable to provide plasma generating power via output ports 171, 172, 173, and 174. However, during a plasma based etch operation or other plasma based process (for example), loads such as reactive loads presented by the formation of plasma in stations 102A, 102B, 102C, and 102D of the process chamber may begin to fluctuate or drift. Thus, for example, during the first moments of plasma generation (e.g., the first 30-60 seconds), the amplitudes of the output signals from ports 171-174 may correspond to substantially equal amounts. However, as the plasma generation progresses, the amplitudes of the output signals from ports 171-174 may begin to differ. Such differences may result from changes in the reactive loads presented by stations 102A-102D of the process chamber. Thus, in some instances, in response to the varying reactive loads presented by the process chamber stations 102A-102D, the actual power coupled out of the power divider ports 171-174 may vary between values ​​ranging from 0.0% to 100.0%, subject to the constraint that the power going to each station sums to 100%. Additionally, the RF power flow to a station may be set to 0.0 or other negligible amount by entering 0.0 watts as the set point. Alternatively, the capacitance of a variable capacitor may be adjusted to a value that results in a current flow close to or approaching 0.0 amps.

[0057] It may be difficult to ensure constant and uniform power transfer from the power divider 170 to the stations 102A-102D. In some examples (e.g., in cases where the matching network and power divider are integrated), the first feedback control system may operate to adjust reactive components in the matching network 163 in real time and in a closed loop in response to variations in the reactive loads presented by the stations 102A-102D. In some embodiments, the first feedback control system may adjust one or more reactive components or elements in the matching network 163 by adjusting the position of one or more reactive components (e.g., variable capacitors, etc.). Such position adjustments may be performed by one or more stepper motors. The first feedback control system may provide substantial (i.e., complete) control to minimize reflected power and / or balance the power delivered to each station.

[0058] In some embodiments, a second feedback control system may operate as part of a second impedance matching control system to provide frequency adjustments to the RF signal generator 160. Because the second feedback control system may only be able to adjust the frequency and thus optimize a single dimension of impedance toward a desired or target value, the second feedback control system may be able to reduce reflected power without eliminating it.

[0059] Because the first feedback control system may utilize adjustments of reactive components, the first feedback control system may operate on a slower time scale than the second feedback control system. For example, the first feedback control system may make adjustments on a scale of tens or hundreds of milliseconds, while the second feedback control system may operate on a scale of microseconds. In other words, the first feedback control system may be able to perform impedance matching, reflected power minimization, and power balancing more accurately and completely than the second feedback control system, although on a slower time scale than the second feedback control system. The longer time scale required by the first feedback control system may be particularly problematic during recipe step changes where RF signal conditions are adjusted in steps.

[0060] Described herein are techniques implemented in a first feedback control system (adjusting reactive components) that allow the first feedback control system to operate in conjunction with a second feedback control system (performing frequency adjustment). Specifically, using the techniques described herein, the first feedback control system may adjust reactive components to account for an error in the second feedback control system. The error may be the difference between a measured frequency and a target frequency specified by the recipe being executed, where the measured frequency corresponds to a frequency that is a result of the frequency adjustment being made by the second feedback control system.

[0061] Referring again to FIG. 1C, in some embodiments, the reactance determination engine 180 may provide inputs to the matching network 163 indicating reactance values ​​to be utilized by the matching network 163 to perform impedance matching using the first feedback control system. In some embodiments, the reactance determination engine 180 may receive phase, voltage, current, and / or frequency information from a phase / voltage / current / frequency detection circuit 182. For example, the phase / voltage / current / frequency detection circuit 182 may measure the voltage and / or current at one or more stations of the process chamber. Continuing with the example, the reactance determination engine 180 may determine the reactance value based on the voltage and / or current, phase and / or frequency information associated with the RF signal provided to the station. It should be noted that the phase / voltage / current / frequency detection circuit may be referred to herein as a "VI probe." More detailed techniques that may be performed by the reactance determination engine 180 are illustrated in and described below in conjunction with FIGS. 3, 4, and 5.

[0062] 2 is a diagram illustrating various circuit elements utilized in an impedance matching process used during the performance of a plasma excitation process in accordance with embodiment 200. It may be understood that any number of, for example, RF power control circuits (e.g., 225A, 225B), phase / voltage / current sensing circuits (e.g., 215, 235A, 235B), and stations (e.g., 102A, 102B) may be utilized.

[0063] In FIG. 2, the matched reflection optimizer 220 comprises a variable capacitor C220. Although not shown in FIG. 2, the matched reflection optimizer 220 may include an inductor having a value selected to provide a range of admittances presentable by the combination of the inductor and C220 in series. In certain embodiments, C220 represents a variable capacitor having a value controllable via a remote signal, such as a signal from a reactance determination engine (e.g., shown in FIG. 1C and described above in connection with FIG. 1C) or other controller. Thus, in response to the phase / voltage / current sense circuit measuring an increase in inductance presented by the combination of the RF power control circuits 225A-225N (e.g., through a measurement of the voltage standing wave ratio (VSWR)), the value of the capacitance presented by C220 may be adjusted to present an admittance sufficient to return the measured VSWR to a value less than a predetermined threshold (e.g., 1.15:1, 1.10:1, etc.). Such adjustment of capacitor C220, along with any necessary adjustments of other reactive elements (eg, 225A), may increase power transfer from signal generator 205 to stations 102A and 102B.

[0064] The RF power control circuit 225A may include a series impedance represented by C225A. The RF power control circuit 225A may also include an inductor, which may be a static component having a value selected to provide a range of impedances presentable by the combination of C225A and the inductor. In certain embodiments, C225A represents a variable capacitor having a value controllable via a remote signal, such as a signal from a reactance determination engine (e.g., as shown in FIG. 1C and described above in connection with FIG. 1C). Thus, in response to the phase / voltage / current sense circuit 235A measuring a change in the impedance of station 102A, the capacitor C225A may be adjusted to provide maximum power transfer between the RF generator and stations 102A and 102B. Similar adjustments may be made to the variable capacitor C225B based on a signal from the phase / voltage / current sense circuit 235B.

[0065] In some examples, the adjustment of the first feedback control system may be performed by adjusting a variable reactance element associated with the first feedback control system. Using techniques described herein, an updated value associated with the variable reactance element may be determined based on a current value of the variable reactance element, an error associated with a second feedback control system being used to make frequency adjustments to provide impedance matching for the system, and / or measurements from a VI probe, which may include measurements or determinations of voltage, current, frequency, and / or phase. In some embodiments, the error associated with the second feedback control system may be the difference between a measured frequency and a target frequency.

[0066] In some examples, the variable reactance element may include one or more series reactances, each associated with a particular station of the process chamber (e.g., as shown in FIG. 2 and described above in connection with FIG. 2). In some embodiments, the updated series reactance value may be determined based on the current series reactance value and the revised target series reactance value. In some embodiments, the revised target series reactance value is determined by first calculating the target series reactance (generally referred to herein as X d The target series reactance may be determined by determining a target series reactance that minimizes the reflected power of a particular station associated with a series reactance element, referred to as X , as the target series reactance that minimizes the reflected power of a particular station associated with the series reactance element. The target series reactance may be determined using a circuit model, VI probe measurements (which may include magnitude and / or phase information) from one or more VI probes associated with the stations, and a desired power ratio for each station (which may be determined based on recipe settings). The target series reactance value is then modified to minimize the current series reactance (generally referred to herein as X n The uncertainty in the circuit model may be compensated for by utilizing an estimate of the current series reactance (referred to as the series reactance). An estimate of the current series reactance may be determined based on the circuit model, magnitude and / or phase information from one or more VI probes associated with each station, and VI probe measurements (which may include magnitude and / or phase) from VI probes upstream in the network. The derived value may then be further modified based on an error associated with the second feedback control system. In particular, the derived value may be modified based on an error between the frequency measured at the station associated with the series reactance element and a target frequency. The target frequency may be specified by the recipe, such as a target frequency specified by a particular step of a recipe that is being performed or is about to be performed.

[0067] In some examples, the variable reactance element may include one or more shunt reactances. For example, the one or more shunt reactances may be associated with a matched reflection optimizer as shown in and described above with respect to FIG. 2. In some embodiments, an updated shunt reactance value may be determined based on a current shunt reactance value and an error associated with a second feedback control system. For example, the error associated with the second feedback control system may be a difference between a measured frequency (e.g., an average value of the measured frequency at each station) and a target frequency. The target frequency may be recipe-specified, such as a target frequency specified by a particular stage of a recipe being performed or to be performed. It is noted that in some examples, when the process chamber is operating in a steady-state mode (e.g., not at a stage transition in a recipe being performed by the process chamber), the shunt reactance may be adjusted to an updated shunt reactance value to drive the frequency toward the target frequency by taking into account the frequency error in setting the updated shunt reactance value. Additionally, as described in more detail below in connection with FIG. 3, an updated shunt reactance value may be determined based on the error in the frequency without determining a target shunt reactance value, thereby nudging the frequency towards the target frequency. Although the techniques and systems described herein generally refer to adjusting the shunt reactance based on the frequency error to nudging the frequency towards the target frequency, and adjusting the series reactance based on the calculated target reactance, it should be understood that in some examples this may be the other way around. In other words, in some embodiments, the series reactance may be used to nudging the frequency towards the target frequency, and the shunt reactance may be adjusted based on the calculated target reactance.

[0068] 3 is a flow chart of an exemplary process 300 for coordinating two feedback control systems for impedance matching a process chamber, according to some embodiments. It should be noted that the blocks of process 300 may be performed by one or more processors and / or one or more controllers associated with the process chamber, as shown in FIG. 1A and described above in connection with FIG. 1A. In some embodiments, the blocks of process 300 may be performed in an order other than that shown in FIG. 3. In some embodiments, two or more blocks of process 300 may be performed substantially in parallel. In some embodiments, one or more blocks of process 300 may be omitted.

[0069] The process 300 can begin at 302 by determining a current series reactance value and / or shunt reactance value associated with one or more stations of a process chamber. As shown in and described above in connection with FIG. 2, there may be multiple series controlled reactance elements, each associated with a station of the process chamber. As shown in and described above in connection with FIG. 2, a shunt reactance element may be associated with all stations of the process chamber. In the instance where a series reactance element is associated with a particular station j, the current series reactance value associated with station j may be determined as X ser (j) The current shunt reactance value is X shuIn some embodiments, the current series reactance value and / or the current shunt reactance value may be determined using a calibration table or a look-up table. For example, in cases where the reactive element is a variable capacitor (whether associated with a series reactance or a shunt reactance), the current reactance value (e.g., the current series reactance value and / or the current shunt reactance value) may be determined by utilizing the current position of the variable capacitor as a key into a calibration table to identify the current reactance value associated with the current position.

[0070] At 304, the process 300 may determine frequency information indicative of a current frequency at one or more stations of the process chamber. In some examples, the frequency information may include a frequency measured at each station of the process chamber. In some embodiments, the frequency may be measured at a particular station using a VI probe associated with the corresponding station. Note that in some examples, the frequency may be measured only for the high frequency (HF) signal provided to the station.

[0071] At 306, the process 300 may obtain a target frequency associated with an RF generator that provides an RF signal to one or more stations of the process chamber. In some embodiments, the target frequency may be specified by a recipe being performed by the process chamber, such as for a particular stage of the recipe. However, in cases where frequency adjustment is not being performed (e.g., the second feedback control system is disabled), the target frequency may be identified as the frequency being output by the RF generator. Utilizing the target frequency being output by the RF generator in cases where frequency adjustment is not being performed may allow backward compatibility of implementations of blocks of the process 300 in cases where frequency adjustment is not being performed and / or frequency adjustment is disabled for a particular recipe or recipe stage.

[0072] At 308, the process 300 may determine updated series reactance and / or shunt reactance values ​​based at least in part on the current series reactance and / or shunt reactance values ​​and the difference between the measured frequency and the target frequency.

[0073] In some embodiments, for a particular station j, the updated series reactance value may be calculated by subtracting the current series reactance value X ser The modified target series reactance value may be determined based on X(j) (e.g., as determined in block 302), a modified target series reactance value, and a difference between the average of the measured frequencies across one or more stations and the target frequency (e.g., as determined in block 306 and generally referred to herein as Δf). d The target series reactance values ​​for the stations may then be determined by determining a target or desired series reactance value for the stations, represented as X(j). In some examples, the target series reactance values ​​for the stations may be determined based on a circuit model, VI probe measurements (which may include magnitude and / or phase information) from one or more VI probes associated with the stations, and a desired power ratio for each station (which may be determined based on recipe settings). The target series reactance values ​​for the stations may then be determined by n The target or desired series reactance value may be modified based on an estimate of the station's current series reactance, represented as (j). The estimate of the current series reactance for the station may be determined based on a circuit model, based on measurements from a VI probe associated with the station, and / or based on measurements from a VI probe upstream in the network. The measurements from the VI probe may be used to determine magnitude and / or phase information (e.g., associated with an RF signal being provided to the station). The measurements from the VI probe may be used to modify the target or desired series reactance value so that uncertainties in the circuit model can be compensated for.

[0074] As an example, in some embodiments, the updated series reactance value X of station j may be new_ser (j) may be determined by:

number

[0075] In the above formula, X ser (j) represents the current series reactance value of station j (e.g., determined in block 302), and X d (j) represents the target or desired series reactance value of station j, and X n (j) represents the estimated current series reactance value of station j determined based on the circuit model and / or VI probe information, and Δf represents the difference between the average measured frequency at each station and the target frequency (e.g., obtained in block 306). Furthermore, in the above equation, dampX represents the damping constant, k ser represents a weighting factor that weights the importance of the error of the second feedback control system in updating the series reactance value.

[0076] In some embodiments, the updated shunt reactance value (generally referred to herein as X new_shu The current value of the shunt reactance (usually referred to as X shu , which may be referred to as the target frequency, and the difference between the average measured frequency at each station and the target frequency. By way of example, in some embodiments, the updated shunt reactance value may be determined by:

number

[0077] In the above equation, Δf represents the difference between the average frequency measured at each station and the target frequency (e.g., obtained in block 306).shu represents a weighting coefficient that weights the importance of the error of the second feedback control system in updating the shunt reactance value.

[0078] It should be noted that the equations given above for determining the updated series reactance value and the updated shunt reactance value may be interchanged in embodiments where the series reactance is used to bring the frequency to the target frequency and the shunt reactance is used to bring the reactance to the target reactance.

[0079] In some examples, the updated series reactance value(s) and the updated shunt reactance value(s) can be used to modify the position of a variable reactance element to adjust the current series reactance value(s) and / or the current shunt reactance value toward the updated reactance value. For example, the updated reactance value (whether it is an updated series reactance value or an updated shunt reactance value) may be used as a key to a calibration or lookup table to identify a position of a variable reactance element (e.g., a variable capacitor) to achieve the updated reactance value. In some examples, the variable reactance element may then be actuated, for example, using a stepper motor, to the identified position.

[0080] In some examples, the updated series reactance value and / or the updated shunt reactance value may be determined as described above. In some embodiments, a determination of whether to use the updated series reactance value and / or the updated shunt reactance value may be made (e.g., by adjusting one or more variable reactance elements associated with the process chamber to a position corresponding to the updated reactance value). In some examples, the updated series reactance value and / or the updated shunt reactance value may be utilized in response to a determination that one or more criteria are met. The one or more criteria may include: a reflected power associated with the process chamber exceeds a reflected power threshold or is outside a reflected power range, a power balance of power delivered to two or more stations of the process chamber exceeds a power balance threshold or is outside a power balance range, and an error associated with the second feedback control system exceeds an error threshold or is outside an error range. Note that in some cases, in cases where the reflected power is within the reflected power range, the power balance is within the power balance range, and the error associated with the second feedback control system is within the error range, but there is a difference between the updated reactance value and the current reactance value, the position of the reactive element (e.g., a capacitor) may be maintained to avoid unnecessary dithering of the reactive element, thereby avoiding unnecessary wear of the reactive element.

[0081] FIG. 4 is a flow chart of an example process 400 for determining whether to use an updated series reactance value and / or an updated shunt reactance value, according to some examples. It should be noted that the blocks of process 400 may be performed by one or more processors and / or one or more controllers associated with a process chamber, as shown in FIG. 1A and described above in connection with FIG. 1A. In some embodiments, the blocks of process 400 may be performed in an order other than that shown in FIG. 4. In some embodiments, two or more blocks of process 400 may be performed substantially in parallel. In some embodiments, one or more blocks of process 400 may be omitted. In some examples, process 400 may be performed after determining the updated series reactance value and / or the updated shunt reactance value (e.g., as described above in connection with block 308 of FIG. 3) and prior to adjusting the series reactance element and / or the shunt reactance element to achieve the updated series reactance value and / or the shunt reactance value, respectively.

[0082] The process 400 begins at 402 by calculating an updated series reactance value (X new_ser (j)) and / or the updated shunt reactance value (X new_shu ) For example, the updated series reactance value and / or the updated shunt reactance value may have been determined in block 308 of FIG.

[0083] At 404, the process 400 may determine whether to use the updated series reactance value and / or the updated shunt reactance value. For example, the process 400 may determine to use the updated series reactance value and / or the updated shunt reactance value in response to determining that one or more criteria are met. In some embodiments, the one or more criteria may include a measured station power ratio indicating that the balance of power delivered to the stations of the process chamber exceeds a power balance threshold or is outside of a power balance range. The power balance threshold may be any suitable percentage away from the power balance setpoint (e.g., 0.1%, 0.5%, 1%, etc.). In some embodiments, the one or more criteria may include a measure indicative of an amount of reflected power that exceeds a reflected power threshold. For example, in an instance where the reflection coefficient is represented as Γ, the measure indicative of reflected power may be |Γ| 2 In other words, the reflection coefficient is a complex value and a measure indicative of the reflected power may be the square of the magnitude of the reflection coefficient. The measure may indicate the ratio of reflected power to transmitted forward power. Continuing with this example, |Γ| 2is greater than a reflected power threshold (e.g., 0.001, 0.005, 0.01, etc.), the one or more criteria may be considered satisfied. In some embodiments, the one or more criteria may be based on an error associated with the second feedback control system exceeding an error threshold, where the error is a difference between the measured frequency and the target frequency. For example, the criteria may include an average value of the frequency at one or more stations of the process chamber exceeding a frequency threshold (e.g., more than 0.1% away from the target frequency, more than 0.5% away from the target frequency, more than 1% away from the target frequency, etc.). Conversely, the process 400 may determine not to use the updated series reactance value and / or the updated shunt reactance value in response to determining that none of the one or more criteria are satisfied. It is noted that in some embodiments, the determination of whether to use the updated shunt reactance value may not take into account a criterion associated with a power balance between different stations of the process chamber (e.g., in cases where shunt reactance is utilized for all stations of the process chamber, as shown in the example of FIG. 2 and described above).

[0084] If, at 404, the process 400 determines not to use the updated series reactance value and / or the updated shunt reactance value ("NO" at 404), the process 400 may proceed to block 406 and may maintain the current series reactance value and / or the current shunt reactance value.

[0085] Conversely, if at 404 the process 400 determines to use the updated series reactance values ​​and / or the updated shunt reactance values ​​("YES" at 404), the process 400 may proceed to block 408, where the new series reactance value of each station may be set to the updated series reactance value and / or the shunt reactance value may be set to the updated shunt reactance value of the corresponding station. The updated values ​​may be used to adjust the position of a variable reactance element, such as a variable capacitor.

[0086] It should be noted that in some embodiments, the updated series reactance value and / or the updated shunt reactance value may be modified or adjusted prior to use. For example, if the difference between the updated reactance value and the current reactance value (whether series reactance or shunt reactance) is less than a dither threshold, the updated reactance value may be modified using a dither threshold. For example, the updated reactance value may be modified such that the change to the current reactance value is less than the dither threshold (e.g., half the dither threshold).

[0087] It is further noted that in some embodiments, the updated series reactance value may be considered separately from the updated shunt reactance value, e.g., the updated series reactance value may be modified based on a dither threshold while the updated shunt reactance value may not be modified based on a dither threshold, or vice versa.

[0088] It should be noted that the process described in connection with FIG. 3 and FIG. 4 typically describes a variable series reactance associated with each station of the process chamber and a shunt reactance associated with all stations of the process chamber. Furthermore, the variable reactance element is typically described as a variable capacitor. However, it should be understood that the technique for coordinating a first feedback control system utilizing a variable reactance for impedance matching and a second feedback control system performing frequency adjustment for impedance matching may be applied using other configurations. FIG. 5 is a flow chart of an exemplary process 500 for coordinating a first feedback control system utilizing a variable reactance for impedance matching and a second feedback control system performing frequency adjustment for impedance matching according to some embodiments. It should be noted that each block of the process 500 may be performed by one or more processors and / or one or more controllers associated with the process chamber as shown in FIG. 1A and described above in connection with FIG. 1A. In some embodiments, each block of the process 500 may be performed in an order other than that shown in FIG. 5. In some embodiments, two or more blocks of the process 500 may be performed substantially in parallel.

[0089] The process 500 can begin at 502 by obtaining a current value of a variable reactance associated with a station of the process chamber, where the variable reactance is associated with a first feedback control system for impedance matching to the process chamber and a frequency adjustment is performed on an RF generator of the process chamber in association with a second feedback control system for impedance matching to the process chamber. It should be noted that the variable reactance may include any combination of series reactance elements and / or shunt reactance elements. The reactance elements may be associated with a specific station of the process chamber or with all stations of the process chamber. Examples of the variable reactance elements may include a variable capacitor and / or a variable inductor. The variable reactance element may be a vacuum variable capacitor actuated using a stepper motor. In some embodiments, the variable reactance element may be a solid reactance element. In some embodiments, the current value of the variable reactance may be determined using a calibration table or a look-up table, as described above in connection with FIG. 3.

[0090] At 504, the process 500 may determine an updated value for a variable reactance of a station utilized in conjunction with the first feedback control system based at least in part on an error associated with the second feedback control system. For example, the error associated with the second feedback control system may be a difference between a frequency measured at one or more stations (e.g., an average measured frequency across one or more stations) and a target frequency, as described above in conjunction with FIG. 3. In some embodiments, the frequency may be measured using a VI probe. In some embodiments, the variable reactance may be determined based on a combination of an error associated with the second feedback control system and a target or desired value for the variable reactance element. In some embodiments, the target or desired value for the variable reactance element may be determined based on a circuit model. In some embodiments, the target or desired value for the variable reactance element may be modified based on measured magnitude and / or phase information (e.g., measured using a VI probe), thereby compensating for errors or inaccuracies in the circuit model.

[0091] In some embodiments, modifying the variable reactance elements to have updated values ​​of variable reactance may have the effect of minimizing or eliminating reflected power and balancing the power delivered to one or more stations of the process chamber. Additionally, modifying the variable reactance elements may drive the measured frequency at each station toward a target frequency. Context of the Disclosed Computational Embodiments

[0092] Certain embodiments disclosed herein relate to a computing system for regulating voltage during plasma operation.

[0093] Many types of computing systems having any of a variety of computer architectures may be employed as the disclosed system for implementing the algorithms described herein. For example, the system may include software components executing on one or more general-purpose processors or specially designed processors such as application specific integrated circuits (ASICs) or programmable logic devices (e.g., field programmable gate arrays (FPGAs)). Furthermore, the system may be implemented on a single device or distributed across multiple devices. The functions of the computational elements may be integrated together or further divided into multiple sub-modules.

[0094] In some embodiments, the code executed during the generation or execution of the techniques described herein on a suitably programmed system may be embodied in the form of a software element storable on a non-volatile storage medium (optical disk, flash storage device, mobile hard disk, etc.) that includes a number of instructions for creating a computing device (personal computer, server, network appliance, etc.).

[0095] At one level, software elements are implemented as a set of commands prepared by a programmer / developer. However, modular software executable by computer hardware is executable code stored using "machine code" selected from a specific set of machine language instructions, or "native instructions", designed into the hardware processor. The machine language instruction set, or native instruction set, is known to and fundamentally built into the hardware processor(s). This is the "language" by which system and application software communicates with the hardware processor. Each native instruction is a discrete piece of code, recognized by the processing architecture and capable of specifying a particular register for an operation, addressing, or control function, a particular memory location or offset, a particular addressing mode to be used to interpret the operands. More complex operations are built up by combinations of these simple native instructions, executed sequentially or as directed by control flow instructions.

[0096] The interaction between executable software instructions and hardware processors is structural. In other words, the instructions themselves are a sequence of symbols or numbers. They do not inherently convey any information. It is the processor, which is pre-configured by design to interpret the symbols / numbers, that gives the instructions meaning.

[0097] The methods and techniques used herein may be configured to execute on a single machine at a single location, multiple machines at a single location, or multiple machines at multiple locations. When multiple machines are employed, each machine may be tailored to its own specific task. For example, large blocks of code and / or operations requiring significant processing power may be implemented on large and / or stationary machines.

[0098] Additionally, certain embodiments relate to tangible and / or non-transitory computer-readable media or computer program products that include program instructions and / or data (such as data structures) for performing various computer-implemented operations. Examples of computer-readable media include, but are not limited to, semiconductor memory devices, phase change devices, disk drives, magnetic media such as magnetic tape, optical media such as CDs, magneto-optical media, and hardware devices such as read-only memory devices (ROM) and random access memories (RAM) that are specifically configured to store and execute program instructions. Computer-readable media may be directly controlled by an end user or indirectly controlled by an end user. Examples of directly controlled media include media located at a user premises and / or media that is not shared with other entities. Examples of indirectly controlled media include media that is indirectly accessible to a user via an external network and / or via a service that provides shared resources such as the "cloud". Examples of program instructions include both machine code (such as that generated by a compiler) and files containing higher level code that can be executed by a computer using an interpreter.

[0099] In various embodiments, data or information employed in the disclosed methods and apparatus is provided in electronic format. Such data or information may include various coefficients used in calculations, etc. As used herein, data or other information provided in electronic format may be stored in a machine and transmitted between machines. Traditionally, data in electronic format is provided digitally and may be stored as bits and / or bytes in various data structures, lists, databases, etc. Data may be embodied, for example, electronically or optically.

[0100] System software typically interfaces with computer hardware and associated memory. In some embodiments, system software includes operating system software and / or firmware, as well as any middleware and drivers installed on the system. System software provides the basic functionality of a computer that is not task-oriented. In contrast, modules and other application software are used to accomplish specific tasks. Each native instruction of a module is stored in a memory device and is represented by a numerical value.

[0101] 6 is a block diagram of an example of a computing device 600 suitable for use in implementing some embodiments of the present disclosure. For example, device 600 may be suitable for implementing some or all of the functionality of the image analysis logic disclosed herein.

[0102] The computing device 600 may include a bus 602 that directly or indirectly couples the following devices: memory 604, one or more central processing units (CPUs) 606, one or more graphics processing units (GPUs) 608, a communication interface 1010, input / output (I / O) ports 612, input / output components 614, a power supply 616, and one or more presentation components 618 (e.g., display(s)). In addition to the CPU 606 and GPU 608, the computing device 600 may include additional logic devices not shown in FIG. 6, such as, but not limited to, an image signal processor (ISP), a digital signal processor (DSP), an ASIC, an FPGA, etc.

[0103] Although the various blocks in FIG. 6 are shown connected by lines via bus 602, this is not intended to be limiting and is for clarity only. For example, in some embodiments, a presentation component 618, such as a display device, may be considered an I / O component 614 (e.g., if the display is a touch screen). As another example, the CPU 606 and / or the GPU 608 may include memory (e.g., the memory 604 may represent a storage device in addition to the memory of the GPU 608, the CPU 606, and / or other components). In other words, the computing devices of FIG. 6 are merely illustrative. No distinction is made between categories such as "workstations," "servers," "laptops," "desktops," "tablets," "client devices," "mobile devices," "handheld devices," "electronic control units (ECUs)," "virtual reality systems," and / or other device or system types, as all are considered within the scope of the computing devices of FIG. 6.

[0104] Bus 602 may represent one or more buses, such as an address bus, a data bus, a control bus, or a combination thereof. Bus 1002 may include one or more bus types, such as, for example, an Industry Standard Architecture (ISA) bus, an Extended Industry Standard Architecture (EISA) bus, a Video Electronics Standards Association (VESA) bus, a Peripheral Component Interconnect (PCI) bus, a Peripheral Component Interconnect Express (PCIe) bus, and / or another type of bus.

[0105] Memory 604 may include any of a variety of computer readable media. Computer readable media may be any available media that can be accessed by computing device 600. Computer readable media may include both volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, computer readable media may comprise computer storage media and / or communication media.

[0106] Computer storage media may include both volatile and nonvolatile media and / or removable and non-removable media implemented in any method or technology for storage of information, such as computer readable instructions, data structures, program modules, and / or other data types. For example, memory 1004 may store computer readable instructions (e.g., representing a program(s) and / or program element(s), such as an operating system). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVDs) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by computing device 1000. As used herein, computer storage media does not itself comprise a signal.

[0107] Communication media may embodied computer-readable instructions, data structures, program modules, and / or other data types in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery media. The term "modulated data signal" may refer to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, communication media includes wired media, such as a wired network or direct-wired connection, and wireless media, such as acoustic, RF, infrared and other wireless media. Combinations of any of the above should also be included within the scope of computer-readable media.

[0108] The CPU(s) 606 may be configured to execute computer-readable instructions to control one or more components of the computing device 600 to perform one or more of the methods and / or processes described herein. The CPU(s) 606 may each include one or more cores (e.g., 1, 2, 4, 8, 28, 72, etc.) capable of simultaneously processing multiple software threads. The CPU(s) 606 may include any type of processor, or may include different types of processors depending on the type of computing device 600 implemented (e.g., a processor for a mobile device having fewer cores and a processor for a server having more cores). For example, depending on the type of computing device 600, the processor may be an ARM processor implemented using reduced instruction set computing (RISC) or an x86 processor implemented using complex instruction set computing (CISC). The computing device 600 may include one or more CPUs 606 in addition to one or more microprocessors or auxiliary coprocessors such as math coprocessors.

[0109] The GPU(s) 608 may be used by the computing device 600 to render graphics (e.g., 3D graphics). The GPU(s) 608 may include many (e.g., tens, hundreds, or thousands) of cores capable of processing many software threads simultaneously. The GPU(s) 608 may generate pixel data for an output image in response to a rendering command (e.g., a rendering command from the CPU(s) 606 received via a host interface). The GPU(s) 608 may include a graphics memory, such as a display memory, for storing the pixel data. The display memory may be included as part of the memory 604. The GPU(s) 608 may include two or more GPUs operating in parallel (e.g., via a link). When combined, each GPU 608 may generate pixel data for a different portion of an output image or for a different output image (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU may include its own memory or may share memory with other GPUs.

[0110] In examples where the computing device 600 does not include GPU(s) 608, the CPU(s) 606 may be used to render graphics.

[0111] The communications interface 610 may include one or more receivers, transmitters, and / or transceivers that enable the computing device 600 to communicate with other computing devices over electronic communications networks, including wired and / or wireless communications. The communications interface 610 may include components and functionality that enable communication over any of a number of different networks, such as a wireless network (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, etc.), a wired network (e.g., communication over Ethernet), a low-power wide area network (e.g., LoRaWAN, SigFox, etc.), and / or the Internet.

[0112] The I / O ports 612 may enable the computing device 600 to be logically coupled to other devices, including an I / O component 614, a presentation component(s) 618, and / or other components, some of which may be built-in (e.g., integrated) to the computing device 600. Exemplary I / O components 614 include a microphone, a mouse, a keyboard, a joystick, a trackpad, a satellite dish, a scanner, a printer, a wireless device, and the like. The I / O components 614 may provide a natural user interface (NUI) that processes air gestures, voice, or other physiological input generated by a user. In some cases, the input may be sent to an appropriate network element for further processing. The NUI may implement any combination of speech recognition, stylus recognition, face recognition, biometric recognition, on-screen and near-screen gesture recognition, air gestures, head and eye tracking, and touch recognition (described in more detail below) associated with the display of the computing device 600. The computing device 600 may include a depth camera. For example, stereoscopic camera systems, infrared camera systems, RGB camera systems, touch screen technology, and combinations thereof for gesture detection and recognition. Additionally, computing device 600 may include an accelerometer or gyroscope (e.g., as part of an inertial measurement unit (IMU)) to enable detection of motion. In some examples, the output of the accelerometer or gyroscope may be used by computing device 600 to render immersive augmented or virtual reality.

[0113] The power source 616 may include a hardwired power source, a battery power source, or a combination thereof. The power source 616 may provide power to the computing device 600 to enable the components of the computing device 600 to operate.

[0114] The presentation component(s) 618 may include a display (e.g., a monitor, a touch screen, a television screen, a heads-up display (HUD), other display types, or a combination thereof), speakers, and / or other presentation components. The presentation component(s) 618 may receive data from other components (e.g., GPU(s) 608, CPU(s) 606, etc.) and output data (e.g., as images, video, sound, etc.).

[0115] The disclosure may be described in the general context of computer code or machine-usable instructions, including computer-executable instructions such as program modules, being executed by a computer or other machine, such as a personal data assistant or other handheld device. Generally, program modules, including routines, programs, objects, components, data structures, etc., refer to code that performs particular tasks or implements particular abstract data types. The disclosure may be practiced in a wide variety of system configurations, including handheld devices, consumer electronics, general purpose computers, more specialized computing devices, etc. The disclosure may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. conclusion

[0116] In this description, numerous specific details have been set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. Although the disclosed embodiments have been described in conjunction with specific embodiments, it will be understood that the specific embodiments are not intended to limit the disclosed embodiments.

[0117] Unless otherwise specified, the method operations and device features disclosed herein include techniques and apparatus commonly used in metrology, semiconductor device manufacturing technology, software design and programming, and statistics, and are within the skill of those of ordinary skill in the art.

[0118] Unless otherwise defined herein, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art.Various scientific dictionaries that contain the terms contained herein are well known and available to those skilled in the art.All methods and materials similar or equivalent to those described herein can be used in the practice or testing of the embodiments disclosed herein, but some methods and materials are described.

[0119] Numeric ranges are inclusive of the numbers defining the range. Every maximum numerical limitation recited throughout this specification is intended to include every lower numerical limitation, as if such lower numerical limitation were expressly written herein. Every minimum numerical limitation recited throughout this specification will include every higher numerical limitation, as if such higher numerical limitation were expressly written herein. Every numerical range recited throughout this specification will include every narrower numerical range that falls within such broader numerical range, as if such narrower numerical ranges were all expressly written herein.

[0120] The headings provided herein are not intended to limit the disclosure.

[0121] As used herein, singular terms (including the original articles "a," "an," and "the") include plural references unless the context clearly indicates otherwise. The term "or" as used herein means a non-exclusive or, unless otherwise specified.

[0122] Various computational elements, including processors, memories, instructions, routines, models, or other components, may be described or claimed as being "configured" to perform a task or tasks. In such contexts, the phrase "configured to" is used to connote structure by suggesting that the component includes structure (e.g., stored instructions, circuitry, etc.) that, when in operation, performs a task or tasks. In this manner, a unit / circuit / component may be said to be configured to perform a task even when the specified component is not necessarily currently operating (e.g., turned on).

[0123] A component used with the term "configured to" may refer to hardware, such as, for example, a circuit, a memory that stores executable program instructions to perform an operation. Additionally, "configured to" can refer to a general structure (e.g., a general circuit) that is operated by software and / or firmware (e.g., an FPGA or a general-purpose processor running software) to operate in a manner capable of performing the task(s) described above. Additionally, "configured to" can refer to one or more memories or memory elements that store computer-executable instructions for performing the task(s) described above. Such memory elements include memory on a computer chip with processing logic. In some contexts, "configured to" may also include adapting a production process (e.g., a semiconductor manufacturing facility) to manufacture a device (e.g., an integrated circuit) adapted to implement or perform one or more tasks.

Claims

1. 1. A computer program product for an impedance matching and power distribution network, comprising: a non-transitory computer readable medium having computer executable instructions disposed on the non-transitory computer readable medium, the computer executable instructions comprising: obtaining a current value of a variable reactance associated with a station of a process chamber, the variable reactance being associated with a first feedback control system for impedance matching to the process chamber, while a frequency adjustment is made on an RF generator of the process chamber in association with a second feedback control system for impedance matching to the process chamber; determining an update value of the variable reactance of the station utilized in conjunction with the first feedback control system based at least in part on an error associated with the second feedback control system; for a computer program product.

2. 2. The computer program product of claim 1, The computer program product, wherein an error associated with the second feedback control system comprises a difference between a frequency measured at the station and a target frequency associated with the process chamber.

3. 3. A computer program product as claimed in claim 2, comprising: A computer program product that determines the frequency at the station using one or more sensing circuits.

4. A computer program product according to any one of claims 1 to 3, The updated value of the variable reactance can be used to modify a position of one or more variable reactance elements associated with the process chamber to minimize reflected power associated with the station.

5. 5. A computer program product according to claim 4, comprising: The one or more variable reactance elements include at least one of a series capacitor or a shunt capacitor.

6. 5. A computer program product according to claim 4, comprising: nudging the frequency toward a target frequency by the second feedback control system by modifying the position of the one or more variable reactance elements associated with the first feedback control system.

7. 7. A computer program product according to claim 6, comprising: The target frequency corresponds to a specified frequency for a currently executing step of a recipe.

8. A computer program product according to any one of claims 1 to 3, The computer program product, wherein the computer-executable instructions are further configured to determine a position of one or more variable reactance elements using a calibration table and based at least in part on the updated value of the variable reactance.

9. A computer program product according to any one of claims 1 to 3, The variable reactance comprises a series reactance associated with the station of the process chamber.

10. A computer program product according to any one of claims 1 to 3, The variable reactance comprises a shunt reactance associated with the process chamber.

11. A computer program product according to any one of claims 1 to 3, the variable reactance includes a variable series reactance, and an updated series reactance is determined based on a correction to a target series reactance, the correction incorporating the error associated with the second feedback control system.

12. A computer program product according to any one of claims 1 to 3, the variable reactance comprises a variable shunt reactance, and an updated shunt reactance is determined based at least in part on the error associated with the second feedback control system without determining a target shunt reactance.

13. A computer program product according to any one of claims 1 to 3, The updated value of the variable reactance is utilized by the first feedback control system in response to one or more criteria being satisfied.

14. 14. A computer program product according to claim 13, comprising: The one or more criteria are: a reflected power associated with the process chamber exceeding a reflected power threshold; and a power balance ratio associated with a plurality of stations of the process chamber exceeding a power balance threshold; the error associated with the second feedback control system exceeds an error threshold; and 2. A computer program product comprising:

15. 14. A computer program product according to claim 13, comprising: in response to determining that a difference between the current value of the variable reactance and the updated value of the variable reactance is within a dither threshold, the updated value of the variable reactance is modified prior to use.

16. A computer program product according to any one of claims 1 to 3, determining the updated value of the variable reactance of the station based at least in part on the error associated with the second feedback control system is responsive to determining that a mode associated with controlling the first feedback control system based on the error associated with the second feedback control system has been activated in a currently utilized recipe.

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