Low-cost panel AESA with thermal management

Abstract

A method of forming a heat spreader on a printed circuit board (PCB) having a power dissipating component operably coupled to the heat spreader, comprising attaching a thermally and electrically conductive structure to a first side of the PCB to define a first PCB region including the component and a second PCB region not including the component. The underside of the component is underfilled to electrically insulate its solder contacts. A first protective layer is applied to the second region of the PCB. A conductive plating film is deposited on the first region, the second region, and the structure. A second protective layer is applied over the portion of the conductive plating film covering the second region, leaving the remaining portion of the conductive plating film exposed. An electrically conductive and thermally conductive layer is electroplated onto the exposed region of the conductive plating film to form a heat exchanger in the first region.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to devices, systems, and methods for cooling chips and printed circuit boards. [Background technology]

[0002] Antenna arrays for radar systems may include active electronically scanned array (AESA) antennas, as known in the art. Typically, the basic building block of an AESA is a transmit / receive (T / R) module, which can be packaged to form an AESA antenna element and can include a radiator, a receiver, a low-noise amplifier (LNA), a transmit power amplifier (PA), and various digitally controlled phase or delay and gain components. Several of these T / R modules are arranged in a grid format on an antenna panel to transmit and receive radar signals. By digitally controlling the transmit and receive gain and phase, the AESA antenna can point and steer the resulting antenna beam without physically moving the antenna panel. A typical modern low-cost AESA antenna panel uses printed circuit radiators connected to surface-mount monolithic microwave integrated circuit (MMIC) devices. The MMIC device includes the LNA, PA, and phase / gain control circuitry, all implemented on a single printed circuit board (PCB).

[0003] AESAs fabricated using multilayer printed circuit board panels and flip-chip die attach are attractive due to their low manufacturing costs and the potential for scaling to large array sizes. An example of this type of low-cost AESA is described in a document by Kevin Kai Wei Low et al. entitled "A Scalable Switchable Dual-Polarized 256 Element Ka-band SATCOM Transmit Phased-array with Embedded RF Driver and ±70° Beam Scanning" (2020 IEEE / MTT-S International Microwave Symposium, pp. 821-824) (hereinafter "Low Reference"), which is incorporated herein by reference. In this type of AESA, a single multilayer printed circuit board panel provides the following functions: 1) DC power distribution 2) RF signal distribution (possibly LO and IF) 3) Distribution of digital control signals 4) Providing an array of antennas with element spacing of approximately half wavelength (λ / 2) required for beam steering of ±>60° 5) Providing mechanical support.

[0004] In this type of AESA, all active and passive components are mounted on one side of a printed circuit board panel, with the antenna array on the other side of the panel. For example, FIG. 1A is a rear perspective view 100A of a prior art 2×2 element printed circuit panel AESA, such as the type referenced in the aforementioned reference, and FIG. 1B is a front perspective view 100B of the prior art 2×2 element printed circuit panel AESA of FIG. 1A. As shown in FIG. 1A, the AESA elements are formed using a multilayer printed circuit board (PCB) panel. The rear side includes multiple T / R radio frequency integrated circuit (RFIC) components 104, capacitors 106, and connectors 108, which for purposes of illustration are printed circuit board (PCB) D connectors. The front side includes multiple antenna elements 110. Summary of the Invention

[0005] The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the embodiments described herein. This summary is not an extensive overview of all possible embodiments, and is not intended to identify key or essential elements of the embodiments or to delineate their scope. Rather, the primary purpose of this summary is to present some concepts of the embodiments described herein in a simplified form as a prelude to the more detailed description that is presented later.

[0006] Prior art AESAs of the type shown in Figures 1A and 1B have a total heat dissipated by the electronics per panel area of ​​the printed circuit board of approximately 1 / cm² (W) / cm². 2 It is suitable for applications where the heat flux density is less than 5 watts per square inch because the large height mismatch between mounted components makes it difficult to integrate an effective thermal management solution that supports higher heat flux densities into a flat panel topology.

[0007] The high RF power gallium nitride (GaN) MMICs required to extend AESA range are rated at 5 watts per square centimeter (W / cm2 () and are therefore incompatible with multilayer printed circuit board AESA architectures. However, silicon germanium (SiGe) and complementary metal oxide semiconductor (CMOS) radio frequency integrated circuits (RFICs) can generate low to moderate levels of RF power (output power ranging from 1 milliwatt (mW) to 100 mW) while providing beamforming capabilities. This beamforming panel can provide up to 5 W / mW per area. cm2 Because less heat density is generated, multi-layer printed circuit board panels are suitable for AESAs.

[0008] For a given aperture arrangement and frequency band, what is the maximum range R of a communications RF system? max teeth,

number

number

[0009] High RF power GaN or GaAs MMIC components (output power in the 1W to 100W range) can achieve the maximum operating range R of the AESA communications array. max 3 to 30 times のRmax This is very attractive for AESAs because it can be scaled to the same aperture size as AESAs using only SiGe or CMOS RFICs. However, high-power GaN or GaAs MMIC components also generate much more heat than low-power RFICs, which makes their integration within AESA panels on printed circuit boards difficult.

[0010] Recent developments have involved the use of heat spreaders fabricated by electroplating copper (Cu) sheets directly onto bare chip dies. These arrangements have shown significant improvements in heat dissipation for high-power light-emitting diodes (see, for example, Y. K. Su et al., "Novel Package Technology of Ultra High Power Light-Emitting Diodes by Electroplating," 2007 IEEE Compound Semiconductor Integrated Circuits Symposium, DOI: 10.1109 / CSICS07.2007.9, incorporated herein by reference, and, for GaN MMIC chips, A. Margomenos et al., "Wafer-Level Packaging Method Incorporating Embedded Thermal Management for GaN-Based RF Front-Ends," 14th IEEE ITHERM Conference, pp. 976-981, DOI: 10.1109 / ITHERM.2014.6892387, incorporated herein by reference). Additionally, several U.S. patents have been issued on this subject, including: - US #8617927 ("METHOD OF MOUNTING ELECTRONIC CHIPS") (shares a common inventor with the present disclosure) - UW #9214404 ("APPARATUS FOR MOUNTING ELECTRONIC CHIPS") (a common inventor with the present disclosure), US #9508652 (“DIRECT IC-TO-PACKAGE WAFER LEVEL PACKAGING WITH INTEGRATED THERMAL HEAT SPREADERS”), - US #9780014 ("SIMULTANEOUS CONTROLLED DEPTH HOT EMBOSSING AND ACTIVE SIDE PROTECTION DURING PACKAGING AND ASSEMBLY OF WIDE BANDGAP DEVICES") (a common inventor with the present disclosure), - US #9837372 ("WAFER-LEVEL DIE TO PACKAGE AND DIE TO DIE INTERCONNECTS SUSPENDED OVER INTEGRATED HEAT SINKS") (a common inventor with the present disclosure); - US #10026672 ("RECURSIVE METAL EMBEDDED CHIP ASSEMBLY") (a common inventor with the present disclosure); US #10079160 "SURFACE MOUNT PACKAGE FOR SEMICONDUCTOR DEVICES WITH EMBEDDED HEAT SPREADERS" (sharing a common inventor with the present disclosure); and - US #10483184 ("RECURSIVE METAL EMBEDDED CHIP ASSEMBLY") (a common inventor with the present disclosure).

[0011] Each of the above publications and US patents is incorporated herein by reference.

[0012] Certain embodiments herein provide systems, methods, and apparatus for implementing effective thermal management in panel AESA architectures. According to certain embodiments herein, at least some of these improvements in thermal management enable the integration of high-power MMICs into low-cost printed circuit board panel AESA. Furthermore, at least some embodiments herein provide advantageous techniques for integrating heat exchangers into printed circuit board AESA panels as part of the panel manufacturing process.

[0013] In one embodiment, a method for forming a heat spreader on a printed circuit board (PCB) is provided. The PCB includes a first side and a second side, the power dissipation component operably coupled to the first side of the PCB. The power dissipation component has a bottom surface disposed adjacent to the first side of the PCB and a plurality of solder contacts disposed on the bottom surface. A structure is attached to the first side of the PCB, the structure including a thermally and electrically conductive material having a shape configured to define and separate a first region and a second region of the PCB, the first region of the PCB including the power dissipation component and the second region of the PCB not including the power dissipation component. A space between the underside of the power dissipation component and the first side of the PCB is underfilled with a first electrically insulating material configured to electrically insulate the solder contacts of the power dissipation component. A first layer of temporary protective material is applied to the second region of the PCB. A conductive plating film is deposited on the first region, the second region, and the structure, with a first portion of the conductive plating film configured to cover the structure, the power dissipation component, and the first region, and a second portion of the conductive plating film configured to cover the second region. A second layer of temporary protective material is applied over the second portion of the conductive plating film, with the second layer of temporary protective material configured to leave the first portion of the conductive plating film exposed. A continuous sheet of electrically conductive and thermally conductive material is electroplated over the exposed first portion of the conductive plating film, with the electroplating configured to bond the continuous sheet of electrically conductive and thermally conductive material to the structure, the power dissipation component, and the region on the first side of the PCB in the first region. When not operably coupled to the power dissipation component, it forms a heat exchanger.

[0014] In some embodiments, after attaching the structure and before underfilling the space, a solder reflow is performed, the solder reflow configured to establish a soldered bonded contact between the power dissipation component, the structure, and the PCB. In some embodiments, the PCB further includes at least one passive component disposed in the first region of the PCB, and the method further includes forming a protective structure around the passive component using a second electrically insulating material before depositing the conductive plating film.

[0015] In some embodiments, the electroplating is configured to provide a void-free interface between the heat exchanger and the power dissipation component. In some embodiments, the electroplating is configured to provide a void-free interface between the heat exchanger and the heat dissipation component and between the heat exchanger and a protective structure. In some embodiments, the structure includes a heat exchanger frame configured to surround the power dissipation component.

[0016] In some embodiments, a forced-flow cooling manifold is bonded to the structure after electroplating. In some embodiments, the structure and the continuous sheet of electrically and thermally conductive material resulting from the electroplating are configured together to form a cavity in the heat exchanger, and the method further includes disposing a portion of a fusible material in the cavity, melting the fusible material to bring the fusible material into thermal contact with a portion of the heat exchanger that is coupled to the power dissipation component, and bonding a lid to the structure after the fusible material solidifies, the lid being configured to be in thermal contact with the fusible material.

[0017] In some embodiments, the portion of the fusible material is sufficient to fill the cavity when melted and form a leak-proof seal between the fusible material and the structure. In some embodiments, after electroplating, the second layer of temporary protective material is removed to expose a second portion of the conductive plating film, the second portion of the conductive plating film is removed, and the first layer of temporary protective material is removed.

[0018] In some embodiments, a forced-flow cooling manifold is bonded to the structure after the first layer of temporary protective material is removed. In some embodiments, the structure and the continuous sheet of electrically and thermally conductive material obtained from electroplating are configured to together form a cavity in the heat exchanger, and the method further includes, after the first layer of temporary protective material is removed, disposing a portion of a fusible material in the cavity, melting the fusible material to cause the fusible material to be in thermal contact with a portion of the heat exchanger that is coupled to the power dissipation component, and bonding a lid to the structure after the fusible material solidifies, the lid being configured to be in thermal contact with the fusible material.

[0019] In another aspect, a cooling device is provided. The cooling device includes a structure configured to couple to a first side of a printed circuit board (PCB) having first and second sides and having a power dissipation component operably coupled to at least the first side, a bottom surface of the power dissipation component including a plurality of solder contacts in operative communication with the PCB, the structure including a thermally and electrically conductive material and configured to define and separate first and second regions of the PCB when the structure is attached to the PCB, the first region of the PCB configured to surround the power dissipation component, and the second region of the PCB being outside the structure and not including the power dissipation component. The cooling device also includes a continuous sheet of electrically and thermally conductive material thermally and electrically coupled to the structure, the continuous sheet configured to make void-free thermal contact with the power dissipation component and with all areas within the first region of the PCB that do not include the power dissipation component. The structure and the sheet of electrically and electrically conductive material together form a heat exchanger when thermally and electrically coupled.

[0020] In some embodiments, the cooling apparatus further comprises a forced-fluid cooling manifold coupled to the structure. In some embodiments, the structure and the continuous sheet of electrically and thermally conductive material are configured to together form a cavity within the heat exchanger, and a portion of the thermally conductive fusible material disposed thereon is configured to fill the cavity and form a leak-proof seal between the portion of the thermally conductive fusible material and the structure. In some embodiments, the structure includes a heat exchanger frame configured to surround the power dissipation component.

[0021] In a further aspect, a method is provided for cooling a power dissipation component operably coupled to a first side of a printed circuit board (PCB), the power dissipation component having a bottom surface disposed adjacent the first side of the PCB and having a plurality of solder contacts disposed thereon. The method includes attaching a structure to the first side of the PCB, the structure including a thermally and electrically conductive material having a shape configured to define and separate first and second regions of the PCB, the first region of the PCB including the power dissipation component and the second region of the PCB not including the power dissipation component. The method also includes underfilling a space between the underside of the power dissipation component and the first side of the PCB with a material configured to electrically insulate the solder contacts of the power dissipation component. The method also includes applying a first layer of temporary protective material to the second region of the PCB. The method also includes depositing a conductive plating film on the first region, the second region, and the structure, where a first portion of the conductive plating film is configured to cover the structure, the power dissipating component, and the first region, and a second portion of the conductive plating film is configured to cover the second region. The method also includes applying a layer of a second temporary protective material over the second portion of the conductive plating film, where the second layer of temporary protective material is configured to leave the first portion of the conductive plating film exposed. The method also includes electroplating a continuous sheet of electrically conductive and thermally conductive material over the exposed first portion of the conductive plating film, where the electroplating is configured to couple the continuous sheet of electrically conductive and thermally conductive material to the structure, the power dissipating component, and a region of the first side of the PCB within the first region that is not operably coupled to the power dissipating component, as well as to form a heat exchanger configured to cool the power dissipating component, where the electroplating is configured to provide a void-free interface between the heat exchanger and the power dissipating component.

[0022] In some embodiments, the method of cooling a power dissipating component further includes coupling a forced-fluid cooling manifold to the structure after electroplating. In some embodiments, the structure and the continuous sheet of electrically and thermally conductive material obtained from electroplating are configured together to form a cavity in a heat exchanger, and the method of cooling a power dissipating component includes disposing a portion of a fusible material in the cavity, melting the fusible material to allow the fusible material to be in thermal contact with a portion of the heat exchanger coupled to the power dissipating component, and coupling a lid to the structure after the fusible material solidifies, the lid being configured to be in thermal contact with the fusible material.

[0023] In some embodiments, the method of cooling the power dissipating component after electroplating further includes removing the second layer of temporary protective material to expose a second portion of the conductive plating film, removing the second portion of the conductive plating film, and removing the first layer of temporary protective material.

[0024] It should be understood that individual elements of different embodiments described herein can be combined to form other embodiments not specifically described above. Various elements that are described in the context of a single embodiment may be provided separately or in any suitable subcombination. It should also be understood that other embodiments not specifically described herein are within the scope of the claims contained herein.

[0025] Details regarding these and other embodiments are described more fully herein.

[0026] Advantages and aspects of the described embodiments, as well as the embodiments themselves, will be more fully understood in conjunction with the following detailed description and accompanying drawings. [Brief explanation of the drawings]

[0027] [Figure 1A]FIG. 1 is a rear perspective view of a prior art 2×2 element printed circuit panel AESA. [Figure 1B] FIG. 1B is a front perspective view of the prior art 2×2 element printed circuit panel AESA of FIG. 1A. [Figure 2] 15A is a flowchart of a high-level process for manufacturing the AESA panel of FIGS. 4-15D according to one embodiment. [Figure 3A] 1A-1D are a first portion of a detailed process for manufacturing the AESA panel of FIGS. 4-15D according to one embodiment. [Figure 3B] 4-15D according to one embodiment. [Figure 4A] FIG. 1 is a perspective view of the rear of a 2×2 element printed circuit panel AESA constructed in accordance with one embodiment. [Figure 4B] FIG. 4B is a perspective view of the front side of the 2×2 element printed circuit panel AESA of FIG. 4A constructed in accordance with one embodiment. [Figure 5] 4A-4B according to one embodiment. [Figure 6A] 1 is a perspective view of a manufacturing step in which the RFIC, MMIC, and passive components are attached to corresponding solder pads on a PCB according to one embodiment. [Figure 6B] 6B is a perspective view of the same manufacturing step as FIG. 6A, showing the attachment of the heat exchanger frame to the PCB panel, according to one embodiment. [Figure 7] 6B includes two enlarged perspective views of the heat exchanger frame of FIG. 6B, showing details after deposition of the underfill and protective box, according to one embodiment. [Figure 8A] 8 is a cross-sectional view of the AESA board panel of FIGS. 6A-7 after underfilling and deposition of a protective box, according to one embodiment, including deposition of a protective box, and a first temporary protective resin is applied. [Figure 8B] 8B is a cross-sectional view of the AESA board panel of FIG. 8A after applying a second layer of conductive plating and temporary protective resin, according to one embodiment. [Figure 9A] 8C is a cross-sectional view of the AESA board panel of FIG. 8B after electroplating and before removal of the first and second temporary protective resins and before removal of the exposed plating, according to one embodiment. [Figure 9B] 9B is a cross-sectional view of the AESA board panel of FIG. 9A after removal of the second layer of temporary protective resin, according to one embodiment. [Figure 9C] FIG. 9C is a cross-sectional view of the AESA substrate panel of FIG. 9B after removal of the exposed conductive plating, according to one embodiment. [Figure 9D] 9D is a cross-sectional view of the AESA board panel of FIG. 9C after applying a first layer of temporary protective resin, according to one embodiment. [Figure 10] FIG. 1 is a perspective view of an AESA board panel after a conductive metal electrodeposition process is completed, according to one embodiment. [Figure 11] 10 is a perspective view of the AESA board panel of FIG. 9 after a connector attachment step, according to one embodiment. [Figure 12A] 12 is a perspective view 1200a showing an exemplary embodiment and stack-up for forming a cooling manifold for the AESA board panel of FIG. [Figure 12B] 12 is a perspective view 1200b showing an exemplary embodiment and stack-up for forming a cooling manifold for the AESA board panel of FIG. [Figure 12C] 12 is a perspective view 1200c illustrating an exemplary embodiment and stack-up for forming a cooling manifold for the AESA board panel of FIG. [Figure 12D] 12 is a perspective view 1200d showing an exemplary embodiment and stack-up for forming a cooling manifold for the AESA board panel of FIG. [Figure 12E] 12 is a perspective view 1200e showing an exemplary embodiment and stack-up for forming a cooling manifold for the AESA board panel of FIG. [Figure 12F]FIG. 12 is a perspective view 1200f illustrating an exemplary implementation and stackup for forming a cooling manifold for the AESA board panel of FIG. 11. The stackup is configured such that the supply nozzles are positioned above the active components, according to one embodiment. [Figure 13A] FIG. 1 is a first perspective view illustrating the attachment of a manifold for forced liquid cooling to a heat exchanger frame, according to one embodiment. [Figure 13B] FIG. 10 is a second perspective view illustrating the attachment of a manifold for forced liquid cooling to a heat exchanger frame, according to one embodiment. [Figure 14A] FIG. 1 is a perspective view of the rear of a fully assembled AESA panel with an integrated forced liquid flow heat exchanger, according to one embodiment. [Figure 14B] FIG. 1 is a perspective view of the antenna side of a fully assembled AESA panel with an integrated forced liquid flow heat exchanger, according to one embodiment. [Figure 15A] 1 is a perspective view of a first aspect of a fusible material attachment process, according to one embodiment. FIG. [Figure 15B] FIG. 10 is a perspective view of a second aspect of the fusible material attachment process, according to one embodiment. [Figure 15C] FIG. 1 is a first perspective view of a fully assembled AESA panel after a fusible material deposition process, according to one embodiment. [Figure 15D] FIG. 13D is a second perspective view of the fully assembled AESA panel of FIG. 13C showing the antenna side, according to one embodiment.

[0028] The drawings are not to scale, emphasis instead being placed upon illustrating the principles and features of embodiments of the present disclosure. Moreover, in the drawings, like reference numerals refer to like elements. DETAILED DESCRIPTION OF THE INVENTION

[0029] Before describing the details of particular systems, devices, and methods, it should be noted that the concepts disclosed herein include, but are not limited to, novel structural combinations of components and circuits, and are not necessarily limited to their particular detailed configurations. Accordingly, the structure, method, function, control, and arrangement of components and circuits have been illustrated in the drawings, for the most part, by easily understood simplified block diagrams and schematic illustrations, so as not to obscure the disclosure with structural details that will be readily apparent to those skilled in the art having the benefit of the description herein.

[0030] For convenience, certain concepts and terms used herein are summarized below. The definitions of the following terms may be helpful in understanding one or more embodiments described herein and should be taken into account in light of the description herein, the context in which they are used, and the knowledge of one of ordinary skill in the art.

[0031] Unless otherwise specified, those skilled in the art will understand that throughout this detailed description, discussions using terms such as “open,” “configure,” “receive,” “detect,” “acquire,” “convert,” “provide,” “store,” “verify,” “upload,” “send,” “determine,” “read,” “load,” “override,” “write,” “create,” “contain,” “generate,” “associate,” and “deposit” refer to, at a minimum, the operations and processes of a computer system or similar electronic computing device. A computer system or similar electronic computing device manipulates data, represented as physical (electronic) quantities in the computer system's registers and memory, and converts it to other data, also represented as physical quantities, in the computer system's memory, registers, or other information storage, transmission, or display device. The disclosed embodiments are also suitable for use with other computer systems, such as optical computers and mechanical computers. Additionally, it should be understood that one or more steps in the embodiments disclosed herein can be performed manually.

[0032] Before describing the details of certain improved systems, devices, and methods, it should be noted that the concepts disclosed herein include, but are not limited to, novel structural combinations of software, components, and / or circuits, and are not necessarily limited to their particular detailed configurations. Accordingly, the structure, methods, functions, control, and arrangements of components and circuits have been illustrated in the drawings, for the most part, by easily understood simplified block diagrams and schematic illustrations, so as not to obscure the disclosure with structural details that will be readily apparent to those skilled in the art having the benefit of the present description.

[0033] Certain embodiments herein provide systems, methods, and apparatuses that include techniques for attaching a heat exchanger to a printed circuit board (PCB) AESA panel by electroplating a sheet of conductive material (e.g., a 100 μm to 200 μm thick copper (Cu) sheet). The sheet of conductive material is positioned directly over the active components attached to the PCB panel to achieve a void-free thermal interface between the active components and the heat exchanger. This electrodeposited conductive sheet (e.g., a Cu sheet) functions as a heat spreader and is an integral part of the heat exchanger. The conductive sheet also provides a leak-proof seal between the heat exchanger and the active components, enabling highly efficient heat extraction techniques such as forced-flow liquid cooling, forced-flow liquid-vapor two-phase cooling, or heat extraction via phase change of a fusible material. Additionally, certain embodiments herein provide a process for applying this sheet to achieve a void-free thermal interface between the active components and the heat exchanger.

[0034] The following description includes detailed exemplary processes that describe how a heat exchanger is attached to a printed circuit board panel AESA according to certain embodiments. The processes and embodiments include at least two potential implementations of the heat exchanger assembly. (1) Heat extraction by forced liquid flow or forced liquid-vapor two-phase cooling

[0035] (2) Heat extraction by phase change of fusible materials.

[0036] Figures 2A-15B illustrate a manufacturing flow for a printed circuit board panel AESA, according to some embodiments, and are described further below. Figure 2 is a flowchart of a high-level process 200 for manufacturing the AESA panel of Figures 4-15D, according to one embodiment. The high-level process of Figure 2 is also applicable to other types of printed circuit panels. High-level process steps include substrate fabrication (block 205), component attachment and solder reflow (block 210), underfill and passive component protection (block 215), electroplating (block 420), and a choice between two alternative final steps: forced-flow cooling liquid manifold attachment (block 225) or fusible material deposition (block 230). Each of these steps is described in more detail herein, including in the more detailed exemplary manufacturing process of Figures 3A-3B and the drawings of Figures 4A-15D.

[0037] FIG. 3A illustrates a first portion 300A of a detailed process for fabricating the AESA panel of FIGS. 4-15D according to one embodiment. FIG. 3B illustrates a second portion 300B of a detailed process for fabricating the AESA panel of FIGS. 4-15D according to one embodiment. Referring to FIG. 3A, in block 305, a multilayer printed circuit board panel is constructed using conventional printed circuit board manufacturing techniques. For example, FIG. 4A illustrates a perspective view 400A of the back side of a 2×2 element printed circuit panel AESA PCB 102 constructed according to one embodiment. FIG. 4B illustrates a perspective view 400B of the front side of the 2×2 element printed circuit panel AESA PCB 102 of FIG. 4A. One side of the PCB 102, the back side in this example, includes solder pads and solder traces for attaching active and passive components, such as solder pads 402 for an RFIC, solder pads 404 for passive components, solder traces 406 for a heat exchanger frame (described further herein), solder pads 208 for a GaN MMIC, and pads for a board connector 210.

[0038] FIG. 5 is a cross-sectional view 500 of an exemplary printed circuit board stack 103 for manufacturing the panel AESA PCB 102 of FIGS. 4A-4B, according to one embodiment. That is, FIG. 5 is a cross-sectional view of a portion of the PCB 102 of FIGS. 4A-4B. The stack 103 of FIG. 5 uses two metal layers 510a, 510b for routing DC bias and control communications, one metal layer 308 for RF routing, and one metal layer 304 for antenna fabrication. The stack 103, consisting of a dielectric 512, ground metal layers 506a, 506b, 506c, and more dielectric 512, separates these "active" metal layers to minimize crosstalk and interference between the active metal traces.

[0039] Referring again to Figure 3A and the method of Figure 6A, Figure 6A is a perspective view 600A of a manufacturing step in which RFICs, MMICs, and passive components are attached to corresponding solder pads on a PCB, according to one embodiment. During step 210 of the fabrication flow shown in FIG. 6A , power dissipating components (e.g., active components such as RFIC 706, GaN or GaAs MMIC 708, and passive components such as capacitor 106) are attached to corresponding solder pads on PCB 102. In certain embodiments, the power dissipating components are operably attached to the printed circuit board, allowing for testing and / or rework of circuits formed using these components before later attachment of a heat spreader. In one embodiment, RFIC 706 and MMIC 708 are in bare chip form to minimize thermal resistance between the chip and a heat sink (not shown in FIG. 6A ). RFIC 706 and MMIC 708 have solder balls 602 a, 602 b or solder bumps attached to pads on the circuit side of the chip. Alternatively, in certain embodiments, RFIC 706 and MMIC 708 can also be mounted in a ball grid array or solder bump array package, so long as there is a low-resistance thermal path between the chip and the side of the package opposite the solder.

[0040] Reference is now made to block 215 of FIG. 3A and also to FIG. 6B. FIG. 6B is a perspective view 600b of the same manufacturing step as FIG. 6A, illustrating the attachment of a heat exchanger frame 608 to the panel PCB 102, according to one embodiment. The heat exchanger frame 608 is a structure configured to surround at least a portion of the heat-generating components on the PCB 102 to define a first interior region including one or more heat-generating components for which a heat exchanger is formed, and a second exterior region outside the heat exchanger frame 608 and defined by the outer boundary of the heat exchanger frame 608. No heat exchanger is formed outside the heat exchanger frame 608. In a particular embodiment, the PCB substrate 102 has solder traces formed along a first surface to define one or more locations for placing the heat exchanger frame 608. The heat exchanger frame 608 is used to help form a heat exchanger (described further herein) by electroplating a sheet of thermally and electrically conductive material onto both the heat exchanger frame 608 and the area enclosed by the heat exchanger frame 608, which includes one or more heat-generating components (described further herein). The sheet of thermally and electrically conductive material is configured to surround and embed the heat-generating components (advantageously, in certain embodiments, each heat-generating component) to create a substantially void-free interface between the heat exchanger and at least a portion of the heat-generating component without interfering with the operation of that component (due to the insulating underfill 702 resin, described further below). The heat exchanger frame 608 can have any shape and need not be a continuous, monolithic structure (although in certain advantageous embodiments, the heat exchanger frame 608 is formed from a single, monolithic piece of electrically and thermally conductive material, such as a metallic material, such as an alloy). In certain embodiments, the heat exchanger frame 608 can be formed using several sections of material bonded together. In certain embodiments, the heat exchanger frame 608 may be formed using several portions of material that together define an area therebetween when coupled to the PCB 102, but that are not aligned to define an area until operably coupled and attached to the PCB 102.

[0041] A unique aspect of this embodiment is that, as shown in FIG. 6B , a heat exchanger frame 608 is also attached to the panel PCB 102 at this manufacturing step. In certain embodiments, the heat exchanger frame 608 is made from an electrically conductive material, preferably a metallic material. Additionally, in certain embodiments, the material used for the heat exchanger frame 608 also has good thermal conductivity. In certain embodiments, the heat exchanger frame 608 is made using any electrically conductive material that can be used as a heat sink-type material, or any material that has both electrical conductivity and suitably high thermal conductivity (e.g., copper / aluminum alloy (CuAl), copper-carbon nanotube composite (Cu-CNT), gold (Au), silver (Ag), etc.). Solder reflow is performed after all components, including the heat exchanger frame 608, are placed on the substrate (block 317) to establish soldered bonds between the attached components and the substrate. In an alternative embodiment, the heat exchanger frame 608 can be attached separately using a low-temperature adhesive after solder reflow. This technique can be advantageous in certain embodiments and applications because the use of low-temperature adhesives can help reduce problems associated with thermal coefficient mismatch between the PCB 102 and the heat exchanger frame 608 during high-temperature solder reflow steps. The illustrated shape of the heat exchanger frame 608 is exemplary and not limiting. The heat exchanger frame 608 can have any desired shape or contour, so long as it is configured to enclose the desired portion of the active and / or passive components requiring cooling and on which the heat exchangers described herein may be formed. In certain embodiments, the heat exchanger frame 608 is configured to form a continuous perimeter defining any desired shape, regular (e.g., circular, square, oval, rectangular, triangular, etc.) or irregular, so long as the processes described in the blocks of FIGS. 3A-3B can be performed. In certain embodiments, the heat exchanger frame 608 is configured to form a perimeter that is not 100% continuous, but may have one or more openings or gaps around its perimeter, so long as the heat exchanger frame 608 is capable of providing a tight, leak-free, and void-free seal to the heat dissipation components enclosed within the area defined by the frame.In certain embodiments, the gaps between discontinuous frame portions are not electroplated if they are treated similarly to the areas outside the frame and are (eventually) coated with the second temporary protective insulating resin as described further herein. In certain embodiments, the gaps between discontinuous frame portions can be configured not to receive the second temporary protective insulating resin and can therefore be electroplated as described herein.

[0042] Figure 7 includes two enlarged perspective views 700A, 700B, respectively, of the heat exchanger frame of Figure 6B, showing the details after deposition of the underfill and protective box, according to one embodiment. Figure 7B is an enlarged view of the area indicated by arrows 703, 704. Figure 8A is a cross-sectional view 800A of the AESA board panel of Figures 6A-7 after deposition of the underfill 702 and protective box 710 (and optionally application of a first layer of temporary protective resin 814, described further below), according to one embodiment.

[0043] 3A, 7, and 8A, after the heat exchanger frame is attached (block 315), the space between the attached components (e.g., components 706, 708, such as RFIC 806 and GaN MMIC 808) and the substrate panel PCB 102 is completely filled with an electrically insulating material, such as underfill resin 702 (block 320). In a specific embodiment, the underfill resin 702 is an electrically insulating resin material, such as, but not limited to, organic resin, alkyd resin, polycarbonate resin, epoxy resin, polyurethane resin, polyethylene resin, polystyrene resin, or BCB resin. Another example of an electrically insulating resin that can be used is 3M SCOTCH CAST resin, but this is also not limited thereto. In a specific embodiment, the underfill resin 702 is applied to cover only the solder contacts of the components, such as the RFIC 806 and MMICS 808, as shown in FIG. 8A. The underfill resin 702 does not cover the heat exchanger frame 608. That is, as shown in FIG. 8, the heat exchanger frame 608 is not covered by any protective coating.

[0044] Additionally, in certain embodiments, all passive components (e.g., resistors, capacitors, etc.) having metal not completely covered by underfill resin 702 (e.g., capacitor 802) are encapsulated in a protective structure (referred to herein as a "protective box") 710 (block 323). The protective structure, as shown via the exemplary dotted-line boxes 710a-710f in FIG. 7 and the dotted-line protective box 710 in FIG. 8A, is made from electrically insulating protective resin 804 and encapsulates capacitor 802 with protective resin 804. Various methods can be used to create the protective structure, including an automated needle-tip nozzle dispenser. In certain embodiments, the material used for underfill resin 702 can be the same as the material used for protective resin 804, but this is not intended to be limiting. In certain embodiments, if the protective resin 804 is the same material as underfill resin 702, it may be advantageous for the protective resin 804 to be a material with a higher viscosity to achieve a coating thick enough to prevent electrical shorts on the passive components. For example, in some embodiments, protective resin 804 is a reformulated type of material used as underfill resin 702. In other embodiments, protective resin 804 can be any of the materials described above as being usable for underfill resin 702. As one skilled in the art will appreciate, additional types of resins can also be used. For example, the material used as protective resin 804 can include a UV-curable material, such as a material that can be easily exposed to UV light during manufacturing, unlike underfill resin 702 under components that are UV-covered.

[0045] It will also be appreciated that protective structure 710 need not have a "box" shape, but may in fact have any shape suitable for encapsulating the passive components with an electrically insulating material and protecting the passive components from being electroplated (in a later step) with a thermally and electrically conductive material. In certain embodiments, underfill resin 702 is a different electrically insulating resin material than protective resin 804, but both underfill resin 702 and protective resin 804 are electrically insulating resin materials. In certain embodiments, components such as RFIC 806 and MMIC 808 have all their solder joints 810 protected by underfill resin 702 and are not otherwise covered by protective box 710 to minimize thermal resistance between the chip die and the heat exchanger, as shown in FIGS. 7 and 8A .

[0046] 3A and 8A, after the protective box 710 with the underfill resin 702 (block 320) and the protective resin 804 (block 323) is applied, all surface areas of the PCB 102 that are not encapsulated by the heat exchanger frame 608 are coated with a first layer of temporary protective material, such as insulating resin (block 325). Meanwhile, the heat exchanger frame 608 and the substrate area encapsulated by the heat exchanger frame 608 remain exposed (as shown in FIG. 8A, the heat exchanger frame 608 is not covered by any protective coating or resin). Furthermore, in block 325, the front side 810 (antenna side) (FIG. 8A) is also protected with a surface layer 815 of temporary protective resin or temporary adhesive tape. As those skilled in the art will appreciate, because the front side 810 of the PCB is substantially flat, a protective material such as tape can work well to form a protective layer as the surface layer 815 makes good contact with the surface 810. As shown in cross-sectional view 800a of FIG. 8A , the area not surrounded by the heat exchanger frame 608 is the area to the right of the heat exchanger frame 608 in FIG. 8A . The area of ​​the first layer of temporary protective resin 614 is shown in cross-section. The first layer of temporary protective resin 814 is made of an electrically insulating material. In some embodiments, the first layer of temporary protective resin 814 is a spin-on insulating polymer material. For example, in some embodiments, the first layer of temporary protective resin 814 comprises an easily dissolvable resin, such as a photolithography photoresist, which is advantageous for temporary protection because it is more easily removed than some other resins. In certain embodiments, the first layer of temporary protective resin 814 can be almost any type of resin that is easily removed by a solvent. Examples of such resins that can be used as the temporary protective resin 814 include, but are not limited to, polydimethylglutatrimide (PMGI) resist and lift-off resist (LOR) resist, such as those available from KAYuKU Advanced Material of Westborough, Massachusetts. As one skilled in the art will appreciate, there are many low cost resins that are easily removed by solvent and can be used as temporary protective resin 814 .In some embodiments, the first layer of temporary protective resin 814 is selectively applied with an automated dispenser instead of via a spin-on technique. In some embodiments, a combined method is used in which the first layer of temporary protective resin 814 is applied around the outside perimeter of the frame (as shown in FIG. 8A ) and then the PCB 102 is rotated to remove excess first layer of temporary protective resin 814. A second layer of protective resin 818 (discussed further below) can be applied in a similar manner. This first layer of temporary protective resin 814 is applied in block 335 to help ensure that the subsequently applied conductive plating (block 530) and electroplated material (block 340) do not adhere to other parts of the PCB 102, as such conductive material could, of course, short out other components or conductive areas of the PCB 102.

[0047] Furthermore, because the insulating underfill resin 702 is applied under the mounted components and covers the exposed solder contacts 810 (including those of components on the PCB 102, such as RFICs and MMICs encapsulated by the heat exchanger frame 608), the solder contacts 810 are protected and insulated from both the subsequent conductive plating film 816 (see FIG. 8B below) and subsequent electroplating (see FIG. 10A below), preventing short circuits. Similarly, because the protective resin 804 is applied around passive components such as the capacitors 802, the operation of these components is also unaffected by the conductive plating film 816 and the applied electroplated conductive material.

[0048] Referring again to FIG. 3A , in block 330, a conductive plating film 816 (also known in the art as a seed metal layer) is deposited on the backside of the PCB 102; this deposition can be achieved by a variety of methods, including, but not limited to, sputtering or atomic layer deposition. FIG. 8B is a cross-sectional view 800A of the AESA board panel of FIG. 8A after application of the conductive plating film 816 (and after application of a second layer of temporary protective resin 818, as described further herein), according to one embodiment. The conductive plating film 816 is not drawn to scale but is shown enlarged for illustrative purposes. The conductive plating film 816 contacts the entire backside of the PCB 102, including the covered area coated with the first layer of temporary protective insulating resin in block 525, the area encapsulated by the heat exchanger frame 608, the area outside the heat exchanger frame 608, and the heat exchanger frame itself.

[0049] As further described herein, the ability to electroplate metallic materials onto non-metallic surfaces while continuing electroplating down to the heat exchanger frame 608 is useful for constructing form-fitted heat exchangers that create a void-free thermal interface between the active components and the form-fitted heat exchanger.

[0050] In certain embodiments, the conductive plating film 816 is a metal film having a thickness ranging from 20 nm to 1 micron. Examples of materials that can be used for the conductive plating film include, but are not limited to, films made using combinations of several metals, such as tantalum (Ta) / Cu stacks, tantalum nitride (TaN) / Cu stacks, titanium (Ti) films, Ti / Au stacks, Ti stacks with other metals (e.g., Ti / Cu), and Ni / Cu stacks.

[0051] 3A and 8B, in block 335, the conductive plating film 816 is then covered with a second layer of temporary protective resin 818 over the same areas where the temporary protective resin was applied prior to deposition of the plating film (i.e., over the first layer of temporary protective resin 814) (block 335). Thus, because the first layer of temporary protective resin 814 was applied to areas not encapsulated by the heat exchanger frame 608, the second layer of temporary protective resin 818 is likewise applied to areas not encapsulated by the heat exchanger frame 608, covering the portions of the layer of conductive plating film 816 that cover those areas.

[0052] Referring again to FIG. 3A , in block 340, the AESA substrate panel PCB102 (also referred to herein as PCB102) is then transferred to an electroplating bath (e.g., a solution containing ionic species (plateable ions of a conductive material, such as a metal like copper (Cu) as understood in the art). During the electroplating process (sometimes referred to in the art as an electrodeposition process), a conductive metal sheet is electroplated onto the exposed areas of the conductive plating film 816 to produce an electrically and thermally conductive metal coating or continuous sheet on these areas by applying an electric current to a conductive material (also referred to as a plateable material) immersed in a solution containing a salt of the metal to be deposited. The electroplating in block 340 is configured to bond the continuous sheet of electrically and thermally conductive material to the heat exchanger frame 608, the components surrounded by the heat exchanger frame 608, and the areas of the PCB 102 encapsulated by the heat exchanger frame 608. 9A (described herein), a continuous sheet 902 of electrically and thermally conductive material, when mechanically / chemically bonded to the heat exchanger frame 608, forms a void-free heat exchanger that, as part of the continuous sheet, makes void-free contact with the top surfaces of the heat dissipation components (e.g., RFICs 806 and MMICs 808) and void-free contact with the protective box 710.

[0053] The areas of the conductive plating film 816 that are not exposed (i.e., the areas covered by the second layer of temporary protective insulating resin 818) are prevented from being electroplated during immersion in the electroplating bath due to the absence of a metallic surface thereon, and as will be appreciated, may be reactive with ions in the electroplating bath.

[0054] As is understood in the art, electroplating baths may contain, in addition to platable metal ions, other electrolytes, surfactants, and / or other additives known in the art, such as brighteners, levelers, and / or accelerators. Furthermore, as is known in the art, electroplating bath solutions may be of one composition or may change composition during the electroplating process. In some embodiments, electroplating bath solutions may contain salts of metal ions or complex metal ions and other components, such as acids or bases, buffers, surfactants, and / or other additives known in the electroplating art. As will be understood, the platable metal in an electroplating solution may have either a positive or negative charge.

[0055] FIG. 9A is a cross-sectional view 900A of the AESA board panel of FIG. 8B after electroplating in block 540 and before removing the first temporary protective resin 814, the exposed conductive plating film 816, and the second layer of protective resin 818, according to one embodiment.

[0056] In a particular embodiment, the conductive metal sheet applied at block 340 is a copper (Cu) metal sheet having a thickness of 100 μm to 200 μm, although one skilled in the art will appreciate that this material is not limiting. Other highly conductive and electroplatable materials (e.g., metals, alloys), such as silver, gold, nickel, and tin (Sn), can also be used for electroplating using the electroplating bath, as will be appreciated.

[0057] After the electroplating in block 340 is completed, the following steps are performed in order to remove the second layer of temporary protective insulating resin 818, the exposed conductive plating film 816, and the first layer of temporary protective insulating resin 814. In block 545, the second layer of temporary protective insulating resin 818 is removed using a method appropriate for the particular material used for the second layer of protective insulating resin, such as a solvent. Removal of the second layer of temporary protective resin 818 exposes the portion of the conductive plating film 816 that was previously protected by the second layer of temporary protective resin 818. FIG. 9B is a cross-sectional view 900B of the AESA board panel of FIG. 9A after removal of the second layer of temporary protective resin 818, showing the exposed portion of the previously protected conductive plating film 816.

[0058] In block 350, the exposed portions of the conductive plating film 816 are removed. This removal can be accomplished using various methods known in the art, including but not limited to using solvents, ion milling, dry etching, etc. to remove the temporary protective resin on top and expose the protected portions of the plating film. Figure 9C is a cross-sectional view 900c of the AESA substrate panel of Figure 19B after removal of the exposed conductive plating film 816, according to one embodiment.

[0059] 3A-3B, which is a second portion of a detailed process for fabricating the AESA panel of FIGS. 4-15D according to one embodiment. Referring to FIG. 3B, in block 355, the first layer of temporary protective resin 814 is removed (e.g., using a solvent), and the temporary protective layer (surface layer 815) on the front side 810 (e.g., the resin or tape described above) is also removed. This completes the conductive metal electrodeposition or electroplating process. FIG. 9D is a cross-sectional view 900D of the AESA board panel PCB 102 of FIG. 9C after the first layer of temporary protective resin 814 has been removed according to one embodiment. FIG. 10 is a perspective view 1000 of the AESA board panel PCB 102 of FIG. 9C after the conductive metal electrodeposition process has been completed according to one embodiment.

[0060] 9D and 10, an electroplated electrically and thermally conductive sheet 902 (e.g., a metal sheet such as Cu) is chemically bonded to the heat exchanger frame 608 and is an integral part of the formed heat exchanger 1002. Figures 9D and 10 also show how the active components are embedded in the electroplated metal (e.g., Cu) sheet, resulting in a void-free, low-thermal-resistance interface. The electroplated electrically and thermally conductive sheet 902 acts as a heat spreader and provides a leak-proof seal to separate the chips from the heat exchanger's cooling medium (described further herein). 9D and 10 also show that, in certain embodiments, there is a continuous, uninterrupted, thermally and electrically conductive, void-free connection between all sides of the heat exchanger frame 608 and across all active and passive components of the AESA board panel PCB 102, such that the active and passive components (e.g., RFICs 806, MMICs 808, capacitors 802, etc.) are embedded in the electroplated electrically and thermally conductive sheet 902. The electroplated electrically and thermally conductive sheet 902 is also chemically and mechanically bonded to the heat exchanger frame 608 (as a result of the electroplating process).

[0061] As will be appreciated by those skilled in the art, the continuous connection from end to end of the heat exchanger frame 608, with the built-in components embedded in the electroplated electrically and thermally conductive sheet 902, effectively forms a heat exchanger 1002 (which is the heat exchanger 1002 being heat exchanged). The heat exchanger 1002 is the bonded combination of the heat exchanger frame 608 and the continuous sheet of metal 902 with the components embedded therein. The heat exchanger 1002 formed in this manner helps to provide a leak-proof seal between the heat exchanger 1002 and the active components, which allows for more effective heat extraction via forced-flow liquid cooling, forced-flow liquid-vapor two-phase cooling, and / or phase change of fusible materials, as further discussed below.

[0062] In step 5 of the manufacturing process connectors for DC bias, communication control and RF interface are attached to the AESA panel. Figure 9 shows the AESA board panel after the connector attachment step.

[0063] Referring again to FIG. 3A , in block 360 of the fabrication process, AESA board connectors 1102 (e.g., connectors for DC bias, communications control, and radio frequency (RF) interfaces) are attached to the AESA panel PCB 102. FIG. 11 is a perspective view 1100 of the AESA board panel PCB 102 of FIGS. 9D and 10 after the connector attachment step, according to one embodiment. In block 365 of fabrication, final assembly of the heat exchanger 1002 occurs. In certain embodiments, two versions or options for adding cooling to the heat exchanger 1002 can be fabricated, as indicated by a first “Version 1” path (blocks 370, 375, 380) and a second “Version 2” path (blocks 385, 387, 389, 391, and 395). Each version is further described below.

[0064] In certain embodiments, the Version 1 pathway results in the creation of a heat exchanger 1002 using forced-flow cooling (block 370), which may be useful for AESA systems operating continuously for extended periods of time. In block 375, a manifold 1202 for forced-flow liquid or forced-flow liquid / vapor two-phase cooling is attached to the heat exchanger frame 608 using fastener screws 1214, as shown in FIGS. 12A-12F, which are perspective views 1200a-1200f, respectively, showing an exemplary implementation for forming the cooling manifold 1202 for the AESA board panels of FIG. 11, stacked. The stack of cooling manifolds 1202 is configured such that the supply nozzles are positioned above the active components, according to one embodiment.

[0065] FIG. 12A shows the complete lamination of the cooling manifold 1202, attached by fastener screws 1204 that hold each layer of the lamination together and connect them to the heat exchanger frame 608. The complete lamination in FIG. 12A has five layers, with the top four layers overlapping the edges of the heat exchanger frame 608 and the bottom layer (shown in FIG. 12F) sized to fit within the heat exchanger frame 608 so as to contact the internal heat exchanger 1002, formed by electroplating as described above. FIG. 12A shows the lamination with all five layers, as described above: the four layers that cover the heat exchanger frame 608 and the bottom layer (not visible in FIG. 12A) that is within the frame. FIG. 12B shows the lamination with three layers overlapped and the top layer removed. FIG. 12C shows the lamination with the top two overlapping layers removed, leaving two overlapping layers. Figure 12D shows the bottom layer overlying the heat exchanger frame 608, and as mentioned above, Figure 12E shows the layers within the heat exchanger frame. When all five layers of the manifold are mechanically coupled together (e.g., via screws 1204) and bonded to the heat exchanger frame 608, they provide a path for forced flow cooling (e.g., via channels 1206). Additionally, as will be appreciated by those skilled in the art, the total surface area of ​​the manifold stack in thermal contact with the heat exchanger frame 608 and heat exchanger 1002 provides additional heat dissipation.

[0066] FIG. 13A is a first perspective view 1300A illustrating the attachment of a manifold 1202 for forced-flow liquid cooling to a heat exchanger frame, according to one embodiment, and FIG. 13B is a second perspective view 1200b illustrating the attachment of a manifold 1202 for forced-flow liquid cooling to a heat exchanger frame, according to one embodiment. FIG. 13A shows an exemplary implementation of a cooling manifold 1202 for forced convection cooling, including a leak-proof seal 1304 and providing a path 1306 for cold liquid and a hot path 1308 for hot liquid or liquid-vapor mixture. As shown in FIG. 13B, supply nozzles 1310 are positioned directly above the centers of the active components (embedded within the heat exchanger 1002) to maximize the flow of liquid over the hottest areas of the chip. Return nozzles 1312 are located between the active components. In the exemplary embodiment of Figure 13B, the manifold 1202 is attached by, but not limited to, one or more fastening screws 1014. Of course, other fastening means may also be used.

[0067] Figure 14A is a perspective view 1400A of the rear of a fully assembled AESA panel with an integrated forced liquid flow heat exchanger, and Figure 14B is a perspective view 1400B of the antenna side of a fully assembled AESA panel with an integrated forced liquid flow heat exchanger, according to one embodiment.

[0068] In certain embodiments, optionally, fabricated liquid microchannels 1402 (block 380 in FIG. 3B) may be formed in the heat exchanger 1002 during the metal plating process or added later to further enhance cooling near heat-generating components.

[0069] Referring again to FIG. 3B , the Version 2 pathway cools via the attachment of a fusible material (block 385), which may be useful for AESA systems operating intermittently for short periods of time, as it eliminates the need for a secondary heat exchanger required to extract heat from a cooling liquid or liquid / vapor mixture. For example, FIG. 15A is a perspective view 1500a of a first aspect of the fusible material attachment process, according to one embodiment. Referring to FIGS. 3B and 15A , in block 387, a portion or block of low-temperature fusible material 1502 is placed inside the heat exchanger cavity, which in certain embodiments corresponds to the area enclosed by the heat exchanger frame 608 located above the heat exchanger 1002 itself. In certain embodiments, the block of low-temperature fusible material 1502 corresponds to a block of fusible alloy material (known in the art as eutectic and non-eutectic alloys), without limitation. By "low temperature" fusible or meltable material, it refers to an alloy that melts at least below 360°F (160°C). In certain embodiments, the heat exchanger frame 608 and the structure formed by electroplating a continuous sheet form a cavity within the heat exchanger, and the low temperature fusible material is configured to melt and substantially fill the cavity.

[0070] In certain embodiments, the block of low-temperature fusible material is configured to form a leak-proof seal (when melted and then solidified) between the power dissipation component it covers and at least a portion of the heat exchanger frame 608. In certain embodiments, the low-temperature fusible material is configured to have a volume sufficient to fill the entire cavity and form a leak-proof seal that completely fills the heat exchanger frame (e.g., as shown in FIG. 15A). Referring to FIG. 3B, after the low-temperature fusible material is placed inside the heat exchanger cavity (block 3487), it is subsequently melted (block 1589) to ensure good thermal contact between the block of low-temperature fusible material 1502 and the active components embedded within the heat exchanger 1002.

[0071] After the fusible material 1501 solidifies (block 1591), the heat exchanger cavity is covered (block 1595) by a lid 1506, which is attached, for example, via screws 1504, as shown in FIG. 15B. FIG. 15B is a perspective view 1500b of a second aspect of the fusible material deposition process, according to one embodiment. In certain embodiments, the lid 1506 is made from a thermally conductive material to ensure thermal and conductive continuity between the heat exchanger structure 1002 (including the heat dissipation components), the fusible material 1501, and the heat exchanger frame 608. For example, the lid can be made from a metal (e.g., copper (Cu), aluminum (Al), etc.). In some embodiments, the lid 1506 is made from the same material as the heat exchanger frame 608. However, in certain embodiments, the lid 1506 need not be made from a thermally and electrically conductive material. Figure 15C is a first perspective view of a fully assembled AESA panel after a fusible material deposition process, according to one embodiment. Figure 15D is a second perspective view of the fully assembled AESA panel of Figure 13C, showing the antenna side, according to one embodiment.

[0072] As the foregoing description and figures illustrate, embodiments herein provide a method for implementing effective thermal management of high-power components on a printed circuit board panel using a simpler and more flexible configuration than other techniques. The embodiments described in Figures 2-15D allow integrated circuits (including those with solder balls and bumps) to be attached directly to a fabricated printed circuit board panel using conventional bump attachment techniques, with an underfill process in which interconnections between chips are made through the printed circuit board panel. This process allows time for potential testing and rework of the chip-attached printed circuit board panel, after which a metal heat spreader is deposited on the backside of the printed circuit board panel using electroplating.

[0073] This configuration is simpler and faster than other arrangements in which a heat sink is formed on the backside of the printed circuit board before chip interconnections are made. For example, one alternative method for forming a heat sink or heat spreader is to electroplate a metal sheet directly onto the bare chip die. This can be done, for example, by (1) attaching one or more bare ICs to a temporary carrier wafer with the circuit side facing the carrier wafer, (2) depositing a metal heat sink on the backside of the bare IC using electroplating, (3) releasing the heat sink with embedded chips from the temporary carrier wafer, (4) forming electrical interconnections between the chips by photolithography or wire bonding, and (5) forming additional chip interconnections by substrate attachment. This alternative method has fewer advantages than the embodiment of Figures 2-15D because it requires the provision and use of a temporary carrier wafer and additional manufacturing steps to interconnect the chips. This alternative method is also difficult to scale to multilayer printed circuit board panels and panel-based AESAs.

[0074] In contrast, the techniques described herein reduce manufacturing steps and simplify the manufacturing process. Depositing and later removing (after electroplating) the temporary protective resin layer and exposed plating film is a simpler and faster process than the alternatives described above. Furthermore, the arrangements and embodiments of FIGS. 2-15D are compatible with conventional circuit card assembly (CCA) tools and CCA manufacturing processes. No temporary carrier wafer is required. Furthermore, as described above, the ability to form a heat spreader on a chip already attached to a circuit board panel allows for the ability and possibility to test and rework the formed circuitry before depositing the metal heat spreader. This saves considerable money and time by allowing testing and rework before the heat spreader is attached. This is because once a heat spreader is electroplated on something, it is difficult to remove if rework of the underlying circuitry becomes necessary.

[0075] Those skilled in the art will appreciate that the embodiments illustrated in Figures 2-15D apply to virtually any type of circuit where effective heat dissipation is required. While the above examples have been described in the context of an AESA substrate panel, the embodiments are not limited to those types of circuits and have applicability to many different types of circuits.

[0076] The terms "comprises," "comprising," "includes," "including," "having," and compounds thereof mean at least "including, but not limited to." As used herein, the singular forms "a," "an," and "the" include plural references unless the context clearly indicates otherwise. Various elements that are described in the context of a single embodiment may also be provided separately or in any suitable subcombination. Furthermore, it will be understood that various changes in the details, materials, and arrangements of parts described and illustrated herein may be made by those skilled in the art without departing from the scope of the following claims.

[0077] Throughout this disclosure, unless the context clearly dictates to the contrary, it should be understood that individual elements, as described, may be singular or plural. For example, the terms "circuit" and "circuitry" can include either a single component or multiple components, either active and / or passive, connected or coupled together to provide a described functionality. Within the drawings, like or related elements have like or related alphanumeric characters or alphanumeric designators. Furthermore, while the disclosed embodiments have been described in the context of implementations using separate components, with some components comprising one or more integrated circuit chips, the functionality of any component or circuit may alternatively be implemented using one or more appropriately programmed processors, depending on the signal frequencies or data rates to be processed and / or the functions to be accomplished.

[0078] Similarly, in the illustrations of this application, the total number of elements or components shown is not intended to be limiting, and one skilled in the art will recognize that the number of particular components may be selected to suit the needs of a particular user, in some cases.

[0079] In describing and illustrating the embodiments herein, specific terminology (e.g., language, phrases, product brand names, etc.) may be used in the text and drawings for the sake of clarity. These designations are merely exemplary and not limiting. The embodiments described herein are not limited to the specific terminology so selected, and each specific term includes at least all grammatical, literal, scientific, technical, and functional equivalents, as well as any other equivalents that operate in a similar manner to accomplish a similar purpose. Furthermore, in the drawings, diagrams, and text, specific features, elements, circuits, modules, tables, software modules, systems, etc. may be given specific names. However, such terminology as used herein is for purposes of description and not limitation.

[0080] While the embodiments contained herein have been described and illustrated in a preferred manner with a particular degree of detail, it will be understood that the present disclosure has been described by way of example only, and that many changes in the details of construction and the combination and arrangement of parts may be made without departing from the spirit and scope of the described embodiments. While at least some principles of the technology have been described and illustrated with reference to specific implementations, it will be recognized that the technology and embodiments described herein can be implemented in many other different forms and in many different environments. The technology and embodiments disclosed herein can be used in combination with other technologies. Furthermore, all publications and references cited herein are expressly incorporated herein by reference in their entirety. Individual elements of different embodiments described herein can be combined to form other embodiments not specifically described above. Various elements described in the context of a single embodiment may be provided separately or in any suitable subcombination. Other embodiments not specifically described herein should be understood to be within the scope of the following claims.

Claims

1. 1. A method of forming a heat spreader on a printed circuit board (PCB), comprising: providing a PCB having a first side and a second side, the PCB having a power dissipation component operably coupled to the first side of the PCB, the power dissipation component having a bottom surface disposed adjacent the first side of the PCB and having a plurality of solder contacts disposed on the bottom surface; attaching a structure to the first side of the PCB, the structure comprising a thermally and electrically conductive material having a shape configured to define and separate first and second regions of the PCB, the first region of the PCB comprising the power dissipation components and the second region of the PCB not comprising power dissipation components; underfilling a space between an underside of the power dissipating component and the first side of the PCB with a first electrically insulating material configured to electrically insulate the solder contacts of the power dissipating component; applying a first layer of temporary protective material to the second region of the PCB; depositing a conductive plating film on the first region, the second region, and the structure, a first portion of the conductive plating film configured to cover the structure, the power dissipating component, and the first region, and a second portion of the conductive plating film configured to cover the second region; applying a second layer of temporary protective material over the second portion of the conductive plating, the second layer of temporary protective material configured to leave the first portion of the conductive plating exposed; electroplating a continuous sheet of electrically conductive and thermally conductive material over the exposed first portion of the electrically conductive plating, the electroplating configured to couple the continuous sheet of electrically conductive and thermally conductive material to the structure, the power dissipating component, and to an area of ​​the first side of the PCB within a first region and not operably coupled to the power dissipating component, forming a heat exchanger. method.

2. 10. The method of claim 1, further comprising performing a solder reflow after attaching the structure and before underfilling the space, the solder reflow configured to establish soldered bond contact between the power dissipation component, the structure, and the PCB.

3. 10. The method of claim 1, wherein the PCB further comprises at least one passive component disposed in the first region of the PCB, the method further comprising forming a protective structure around the passive component using a second electrically insulating material prior to depositing the conductive plating film.

4. The method of claim 1 , wherein the electroplating is configured to provide a void-free interface between the heat exchanger and the power dissipating component.

5. The method of claim 3 , wherein the electroplating is configured to provide a void-free interface between the heat exchanger and a heat dissipation component, and between the heat exchanger and a protective structure.

6. The method of claim 1 , wherein the structure comprises a heat exchanger frame configured to enclose the power dissipation component.

7. The method of claim 1 , further comprising coupling a forced flow cooling manifold to said structure after said electroplating.

8. the continuous sheet of electrically and thermally conductive material from the structure and the electroplating are configured together to form a cavity within the heat exchanger; The method comprises: disposing a portion of a fusible material within the cavity; melting the fusible material to bring the fusible material into thermal contact with a portion of the heat exchanger that is coupled to the power dissipation component; and bonding a lid to the structure after the fusible material has solidified, the lid being configured to be in thermal contact with the fusible material. The method of claim 1.

9. The method of claim 8 , wherein the portion of the fusible material, when melted, is sufficient to fill the cavity and form a leak-proof seal between the fusible material and the structure.

10. After electroplating, removing the second layer of temporary protective material to expose the second portion of the conductive plating; removing the second portion of the conductive plating film; removing the first layer of temporary protective material. The method of claim 1.

11. The method of claim 10 further comprising coupling a forced-flow cooling manifold to the structure after the first layer of temporary protective material is removed.

12. the structure and the continuous sheet of electrically and thermally conductive material from the electroplating are configured together to form a cavity within the heat exchanger, the method including, after the first layer of temporary protective material is removed, disposing a portion of a fusible material within the cavity; melting the fusible material to bring the fusible material into thermal contact with a portion of the heat exchanger that is coupled to the power dissipation component; and coupling a lid to the structure after the fusible material has solidified, the lid being configured to be in thermal contact with the fusible material. The method of claim 10.

13. 1. A structure configured to couple to a first side of a printed circuit board (PCB), the structure having a first side and a second side, the first side having a power dissipation component operably coupled to at least the first side, the structure comprising: the power dissipating component has a bottom surface including a plurality of solder contacts in operative communication with the PCB, the structure including a thermally and electrically conductive material; the structure is configured, when attached to the PCB, to define and separate a first region and a second region of the PCB, the first region of the PCB configured to surround the power dissipation component, and the second region of the PCB is outside the structure and does not include the power dissipation component; The structure; a continuous sheet of electrically and thermally conductive material thermally and thermally coupled to the structure, the continuous sheet being configured to make void-free thermal contact with the power dissipation component and to make void-free thermal contact with all areas within a first region of the PCB that do not include power dissipation components, the structure and the sheet of electrically and thermally conductive material forming a heat exchanger when thermally and electrically coupled. Cooling device.

14. The cooling system of claim 13 , further comprising a forced-flow cooling manifold coupled to the structure.

15. 14. The cooling apparatus of claim 13, wherein the structure and the continuous sheet of electrically and thermally conductive material are configured together to form a cavity in the heat exchanger, and further comprising a portion of the thermally conductive fusible material disposed within the sheet and configured to fill the cavity and form a leak-proof seal between the portion of the thermally conductive fusible material and the structure.

16. The cooling arrangement of claim 13 , wherein the structure comprises a heat exchanger frame configured to enclose the power dissipation component.

17. 1. A method for cooling a power dissipating component operably coupled to a first side of a printed circuit board (PCB), comprising: The power dissipating component has a bottom surface disposed adjacent the first side of the PCB and has a plurality of solder contacts disposed thereon, the method comprising: attaching a structure to the first side of the PCB, the structure comprising thermal and conductive material having a shape configured to define and separate first and second regions of the PCB, the first region of the PCB comprising the power dissipation components and the second region of the PCB not comprising power dissipation components; underfilling a space between an underside of the power dissipation component and the first side of the PCB with a material configured to electrically insulate the solder contacts of the power dissipation component; applying a first layer of temporary protective material to the second region of the PCB; depositing a conductive plating film on the first region, the second region, and the structure, a first portion of the conductive plating film configured to cover the structure, the power dissipating component, and the first region, and a second portion of the conductive plating film configured to cover the second region; applying a second layer of temporary protective material over the second portion of the conductive plating, the second layer of temporary protective material configured to leave the first portion of the conductive plating exposed; electroplating a continuous sheet of electrically conductive and thermally conductive material over the exposed first portion of the conductive plating, the electroplating configured to couple the continuous sheet of electrically conductive and thermally conductive material to the structure, the power dissipating component, and to an area of ​​the first side of the PCB in a first region and not operably coupled to the power dissipating component, forming a heat exchanger configured to cool the power dissipating component, the electroplating configured to provide a void-free interface between the heat exchanger and the power dissipating component. method.

18. The method of claim 17 further comprising coupling a forced flow cooling manifold to the structure after said electroplating.

19. The continuous sheet of electrically and thermally conductive material from the structure and the electroplating are configured together to form a cavity within the heat exchanger, the method comprising: disposing a portion of a fusible material within the cavity; melting the fusible material to bring the fusible material into thermal contact with a portion of the heat exchanger that is coupled to the power dissipation component; and bonding a lid to the structure after the fusible material has solidified, the lid being configured to be in thermal contact with the fusible material.

20. The method of claim 17.

20. After the electroplating, removing the layer of the second temporary protective material to expose the second portion of the conductive plating; removing the second portion of the conductive plating film; removing the first layer of temporary protective material.

20. The method of claim 17.

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