Transition metal dichalcogenide

Abstract

A structure comprising a substrate having a polycrystalline transition metal dichalcogenide nanolayer disposed on a surface of the substrate, wherein the polycrystalline transition metal dichalcogenide nanolayer has a surface and a portion of a plurality of grains protrudes out of the plane from the surface is provided.

Description

Technical Field

[0001] The present invention relates to transition metal dichalcogenides, methods for their production, and their use.

Background Art

[0002] Transition metal dichalcogenide (TMDC) materials are becoming increasingly economically attractive due to their higher conductivity, high carrier mobility, and their tunable electrical properties and bandgaps. Considering these desirable properties, TMDC materials are used in various ways in electronics, for example as transistors or as electrical sensors.

[0003] Currently, to the best knowledge of the inventors, the incorporation of TMDC materials in electronic devices is limited by expensive and difficult fabrication procedures. In particular, using current fabrication techniques, it is generally only possible to produce very small single crystal films of TMDC materials. Considering these limitations, TMDC materials have found little commercial incorporation.

[0004] The object of the present invention is to address at least one drawback of the prior art and / or to provide a useful alternative.

[0005] Any reference in this specification to prior art is not an admission, suggestion or endorsement that such prior art forms part of the common general knowledge in any jurisdiction, that such prior art is understood and relevant by a person skilled in the art, and / or that it would be reasonably foreseeable that such prior art could be combined with other parts of the prior art.

Summary of the Invention

[0006] In a first aspect of the present invention, there is provided a structure comprising a substrate having a polycrystalline transition metal dichalcogenide nanolayer disposed on a substrate surface, the polycrystalline transition metal dichalcogenide nanolayer having a surface, and a portion of a plurality of grains protruding out-of-plane from the surface.

[0007] Conventional approaches for forming metal dichalcogenide layers have focused on providing these in the form of single-crystalline monolayers with smooth surfaces. This is generally because the presence of grains and grain boundaries adversely affects the desired properties of the resulting metal dichalcogenide layer. The inventors have unexpectedly found that in some cases, the additional surface area provided by a polycrystalline transition metal dichalcogenide layer having grains protruding out-of-plane from the surface is beneficial, for example, in increasing the surface density of any probes particularly bound to the surface.

[0008] In one embodiment, the polycrystalline transition metal dichalcogenide nanolayer is formed from a plurality of grains, and the plurality of grains have a D50 of from about 20 nm to about 400 nm. Preferably, the D50 is about 50 nm or more. More preferably, the D50 is about 100 nm or more. Most preferably, the D50 is about 150 nm or more. Alternatively, or additionally, the D50 is about 350 nm or less. More preferably, the D50 is about 300 nm or less. Most preferably, the D50 is about 250 nm or less.

[0009] In one embodiment, the polycrystalline transition metal dichalcogenide nanolayer has an average thickness of from about 4 nm to about 20 nm. Preferably, it is about 6 nm or more. More preferably, it is about 8 nm or more. Further, or alternatively, the average thickness is preferably about 18 nm or less. More preferably, it is about 16 nm or less. Even more preferably, it is about 14 nm or less. Most preferably, it is about 12 nm or less.

[0010] In one embodiment, the polycrystalline transition metal dichalcogenide nanolayer is substantially continuous. Substantially continuous means that the grains are in substantial contact with each other and there are substantially no pinhole defects in the layer.

[0011] In one embodiment, the polycrystalline transition metal dichalcogenide nanolayer is formed from a transition metal dichalcogenide in the form of MX2, where M represents a transition metal selected from the group consisting of Mo, Pt, Sn, W, and Zr, and X represents a chalcogenide selected from the group consisting of S, Se, and Te.

[0012] In one embodiment, the substrate is an electrically insulating material. Preferably, the substrate is selected from the group consisting of silica, alumina, silicon, glass, or a polymer. However, in other embodiments, one of ordinary skill in the art will understand that the substrate may be a dielectric material or a metal.

[0013] In one embodiment, the substrate has a planar surface and the polycrystalline transition metal dichalcogenide nanolayer is disposed on the planar surface. However, in an alternative embodiment, the substrate has a 3D structure with a non-planar surface and the polycrystalline transition metal dichalcogenide nanolayer is disposed on the non-planar surface.

[0014] In one embodiment, the polycrystalline transition metal dichalcogenide nanolayer has a surface roughness of about 0.5 nm to about 2 nm. Preferably, the surface roughness is about 0.6 nm or more. More preferably, the surface roughness is about 0.7 nm or more. Most preferably, the surface roughness is about 0.8 nm or more. Alternatively, or additionally, the surface roughness is preferably about 1.8 nm or less. More preferably, the surface roughness is about 1.6 nm or less. Most preferably, the surface roughness is about 1.4 nm or less. In one example, a preferred surface roughness is about 0.8 nm to about 1.4 nm.

[0015] In a second aspect of the present invention, a device comprising a structure according to the first aspect of the present invention and / or an embodiment thereof, a source electrode, a drain electrode, A device is provided in which a source electrode and a drain electrode are separated from each other by a polycrystalline transition metal dichalcogenide nanolayer, and each is disposed in electrical contact with the polycrystalline transition metal dichalcogenide nanolayer.

[0016] In the above case, the structure functions as a channel layer between the source electrode and the drain electrode. The channel layer preferably defines a channel length of about 15 μm to about 25 μm between the source electrode and the drain electrode.

[0017] In one embodiment, the structure further comprises a gate electrode for applying a gate voltage to the structure. Preferably, the gate electrode is separated from the structure by a layer of dielectric or insulating material.

[0018] In one form of the above embodiment, the device is a field effect transistor.

[0019] In one embodiment, the surface of the polycrystalline transition metal dichalcogenide nanolayer is functionalized with a probe for detection of an analyte.

[0020] In one form of the above embodiment, the probe is configured to change the electron mobility and / or conductivity and / or mutual conductance of the polycrystalline transition metal dichalcogenide nanolayer upon detection of the analyte. That is, when the analyte binds or interacts with the probe, the analyte attracts / rejects electrons, causing a change in the electron mobility or conductivity or mutual conductance of the polycrystalline transition metal dichalcogenide nanolayer.

[0021] In one form of the above embodiment, the probe is selected from the group consisting of a ligand, a surfactant, a nanoparticle, a polymer, an oligomer, an antibody, a gas molecule, or a combination thereof.

[0022] The inventors have found that polycrystalline transition metal dichalcogenide nanolayers, i.e., nanolayers of about 4 nm to about 20 nm, are useful in such devices. In contrast, in Si-based devices, Si layers in the micron range are required. Considering this, the use of polycrystalline transition metal dichalcogenide nanolayers enables flexible devices and wearable devices. Therefore, in an embodiment of the second aspect of the present invention, the device is a wearable device and / or a flexible device.

[0023] In a third aspect of the present invention, an assay method comprising detecting an analyte using a structure according to the first aspect of the present invention and / or an embodiment thereof, or detecting an analyte using a device according to the second aspect of the present invention and / or an embodiment and / or a form thereof, is provided.

[0024] In one embodiment, the method comprises contacting a sample receiving surface of the structure or device with a sample, and measuring the electron mobility of the polycrystalline transition metal dichalcogenide nanolayer, and determining the presence of an analyte in the sample based on a change in the electron mobility of the polycrystalline transition metal dichalcogenide nanolayer.

[0025] In one form of the above embodiment, the sample receiving surface is the surface of the polycrystalline transition metal dichalcogenide nanolayer. In another embodiment, the sample receiving surface is one or more probes attached to the polycrystalline transition metal dichalcogenide nanolayer.

[0026] In a fourth aspect of the present invention, a method for forming a structure comprising a polycrystalline transition metal dichalcogenide nanolayer, comprising providing a structure having a transition metal surface, and depositing a chalcogenide on the transition metal surface in an atmosphere having a deposition temperature in the range of 300 °C to 500 °C. A method is provided that includes annealing a chalcogenide on a transition metal surface at a temperature in the range of 300°C to 500°C for a time sufficient to form a polycrystalline transition metal dichalcogenide nanolayer.

[0027] In one embodiment, the step of depositing a chalcogenide on a transition metal surface includes entraining the chalcogenide in a carrier gas stream at a first temperature and a first location, transporting the chalcogenide in the carrier gas stream to the transition metal surface, and depositing the chalcogenide on the transition metal surface at a second temperature lower than the first temperature. Preferably, the first temperature is higher than the vaporization temperature of the chalcogenide, and the second temperature is lower than the vaporization temperature of the chalcogenide.

[0028] In one embodiment, the step of depositing a chalcogenide on a transition metal surface is a physical vapor deposition process. Preferably, it is an electron beam physical vapor deposition process.

[0029] In one embodiment, the atmosphere / carrier gas is an inert gas or a mixture of an inert gas and hydrogen. Hydrogen has been found to advantageously affect the bond between the transition metal and the dichalcogenide and affect the stoichiometry and surface roughness of the resulting polycrystalline transition metal dichalcogenide nanolayer. Preferred inert gases are nitrogen or argon.

[0030] In one embodiment, the structure further comprises a substrate. Preferably, the method includes depositing a transition metal on the surface of the substrate using a carrier gas at a temperature in the range of 300°C to 500°C to form a structure having a transition metal surface. Preferably, the step of depositing the transition metal is performed at a temperature lower than the vaporization temperature of the transition metal. Preferably, the transition metal layer has a thickness of about 1 to 5 nm.

[0031] In one form of the above embodiment, the carrier gas is an inert gas or a mixture of an inert gas and hydrogen. Preferred inert gases are nitrogen or argon.

[0032] In one embodiment, the step of depositing the transition metal on the substrate surface is a physical vapor deposition process. Preferably, it is an electron beam physical vapor deposition process.

[0033] In one embodiment, the annealing temperature is higher than the deposition temperature.

[0034] In a fifth aspect of the present invention, there is provided the use of a structure according to the first aspect of the present invention and / or an embodiment thereof as a sensor, or the use of a device according to the second aspect of the present invention and / or an embodiment thereof, and / or the use of those forms. The sensor may be, for example, a biosensor, a gas detection sensor, a photonics sensor, or an optoelectronic sensor.

[0035] Preferably, the structure or device is used as a sensor for detecting the presence of an analyte, for example, in a sample. Such analytes include cancer markers, heart disease markers, food and / or water contaminants, biohazards, and pollutants.

[0036] In a sixth aspect of the present invention, there is provided the use of a structure according to the first aspect of the present invention and / or an embodiment thereof as a catalyst in petrochemical hydrolysis, in thermoelectric applications, in photodetection, as an energy storage device or in an energy storage device, as a supercapacitor or in a supercapacitor, as an optoelectronic device such as a laser or a spaser, or the use of a device according to the second aspect of the present invention and / or an embodiment thereof.

[0037] Further aspects of the present invention and further embodiments of the aspects described in the preceding paragraphs will become apparent from the following description, which is given by way of example, and from the accompanying drawings.

[0038] As used herein, unless the context requires otherwise, the term "comprise", and variations such as "comprising", "comprises" and "comprised", are not intended to exclude further additional elements, components, integers or steps.

Brief Description of the Drawings

[0039]

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[0040] The present invention relates to a structure comprising a substrate having a polycrystalline transition metal dichalcogenide nanolayer disposed thereon. The polycrystalline transition metal dichalcogenide nanolayer is formed from grains, and a plurality of grains protrude in an out-of-plane direction from the surface of the nanolayer.

[0041] The term "nanolayer" is generally intended to refer to a layer having a thickness within the nanometer scale. In a preferred form, the nanolayer has a thickness of about 4 nm to 20 nm.

[0042] Contrary to conventional techniques directed to the production of transition metal dichalcogenides in the form of smooth single-crystalline monolayers, the inventors have unexpectedly found that providing a rough polycrystalline surface has several advantages over single-crystalline monolayers. Generally, smooth single-crystalline monolayers provide easily controllable and measurable electronic properties because of these things. In contrast, grain boundaries are thought to impede electrical properties such as conductivity. Nevertheless, the inventors have found that the increased surface provided by a rough surface (e.g., grains protruding out-of-plane from the surface plane) removes some of these drawbacks and, furthermore, in situations where transition metal dichalcogenides are used as sensor elements, unexpectedly provides a template for high-density adsorption or attachment of probes for improving sensor resolution and detection limit.

[0043] Advantageously, the structure of the present invention is particularly used as a component of an electrical device such as a transistor or a sensor.

[0044] The inventors have also developed a method for forming the above-described structure. Typical techniques for forming transition metal dichalcogenides such as the aforementioned smooth single-crystalline monolayers require high processing temperatures and are generally only suitable for forming small-area layers (on the micron scale) on flat 2D substrates.

[0045] The method employs significantly lower temperatures and can be used to form large-area sheets of the polycrystalline transition metal dichalcogenide nanolayers of the present invention and can be readily adapted to coat 3D substrates.

[0046] The method generally includes providing a structure having a transition metal surface (which may also include first coating the structure with a transition metal and forming the transition metal surface, for example, by using a physical vapor deposition process), depositing a chalcogenide on the transition metal surface under an atmosphere having a deposition temperature in the range of 300°C to 500°C, and subsequently annealing the chalcogenide on the transition metal surface at a temperature in the range of 300°C to 500°C for a time sufficient to form a polycrystalline transition metal dichalcogenide layer.

[0047] Here, the present invention will be described with reference to the following specific embodiments of PtTe2 transition metal dichalcogenide (TDMC). However, those skilled in the art will understand that other TDMC materials are also contemplated.

[0048] Example 1 In this example, the fabrication and characterization of TMDC (PtTe2) layers are reported.

[0049] A 1.2 nm thick Pt film was deposited on a 50 μm × 50 μm sized patterned region of a 285 nm thick SiO2 / Si substrate by electron beam evaporation using a deposition rate of 0.1 Å. The thickness of the Pt layer was confirmed by atomic force microscopy (AFM).

[0050] Subsequently, the Pt-deposited SiO2 / Si substrate was placed inside a quartz tube downstream of a Te powder source. The Pt-deposited SiO2 / Si substrate was maintained at a temperature of 300°C. The Te powder was contained in a quartz boat at the upstream position at a temperature of 430°C.

[0051] The tellurization process was carried out in an Ar / H2 gas environment with a gas flow rate of 100 sccm in the direction from the upstream position to the downstream position. Te powder was vaporized at a temperature of 430 °C for 15 minutes and then deposited on the Pt surface of the Pt-coated SiO2 / Si substrate. Subsequently, the PtTe layer was annealed at a temperature of 450 °C for 75 minutes in an Ar environment of 100 sccm to form PtTe2 and remove excess Te from the surface. This process is schematically shown in Figure 1.

[0052] Broadly, the process is shown as including three steps. In step 1, a SiO2 / Si substrate is provided. In step 2, a thin nanolayer of a transition metal (in this case, Pt) is applied to the surface of the substrate using physical vapor deposition. The Pt-coated substrate is then processed to form a platinum dichalcogenide material. In this case, the dichalcogenide material is Te, and this process is generally referred to as the tellurization process. In step 3, and after the tellurization process, a PtTe2 layer is formed. The inserted image shows the tellurization process in more detail. In the tellurization process, a Te source (in this case, Te powder) is vaporized, entrained in an Ar / H2 carrier gas, and directed downstream of the Pt-coated SiO2 / Si substrate. The Pt-coated SiO2 / Si substrate is held at a lower temperature to promote the deposition of Te from the carrier gas onto its surface and form a PtTe layer. The PtTe layer is then annealed, as shown in step 3, to form a PtTe2 layer.

[0053] The Pt film, PtTe2 layer, and the surface and particle size of the PtTe2 layer were observed using AFM, and the obtained AFM images are shown in Fig. 2. Fig. 2 shows the change in particle size from the Pt film to the PtTe layer and the final PtTe2 layer. The average particle size in the PtTe2 layer is about 200 nm in the lateral dimension. From Fig. 2, it can be seen that the size of the Pt particles increases after the tellurization process, that Te atoms are attached to the Pt film, and that no gap is observed in the PtTe2 layer after annealing. Thus, it is confirmed that the stability of the PtTe layer is improved after annealing and that the PtTe2 layer is formed. Figs. 3 and 4 are planar and 3D AFM images showing the surface morphology and particle size in the PtTe2 layer. The 3D image shows the out-of-plane orientation of the grains. The surface roughness of this film is 1.03 nm. Fig. 5 shows the thickness measurement of the deposited Pt film, which is 1.801 nm. After forming the PtTe2 layer, the thickness increases to 9.507 nm as shown in Fig. 6.

[0054] Fig. 7 shows the Raman spectra before and after annealing for forming the PtTe2 layer. As can be seen from the figure, the Raman shift of the tellurized PtTe layer is 116.71 cm g for the E lg mode and 159.78 cm -1 for the A -1 mode, respectively. After annealing and the formation of the PtTe2 layer, the Raman E g and A 1g peaks become sharper, and the peak positions shift to 109.15 cm -1 and 156.16 cm -1 respectively. These results confirm the formation of PtTe2.

[0055] One skilled in the art will understand that while this example reports the formation of a thin film of PtTe2 on a planar surface, the method may be adapted to form a thin film of PtTe2 on a three-dimensional structure or surface, or otherwise coat at least a portion of the three-dimensional structure with a thin film of PtTe2.

[0056] Example 2 In this example, the fabrication of a field-effect transistor (FET) device from the PtTe2 layer formed in Example 1 is reported.

[0057] To form the sensor element, the PtTe2 layer was fabricated into a field-effect transistor (FET) device using a photolithography process, whereby a 7 / 100 nm Ti / Au layer was deposited on a portion of the PtTe2 layer by an electron beam evaporation process to fabricate metal electrode contacts. The channel length and width of the fabricated PtTe2 FET device were 40 μm and 50 μm, respectively. Subsequently, the FET device was annealed at 200 °C for 2 hours under 10 / 100 sccm of Ar / H2 to reduce the contact resistance.

[0058] A thin 50 nm Al2O3 layer was also deposited by photolithography and evaporation methods to cover the metal electrodes for the purpose of minimizing the interaction between the metal electrodes and the environment.

[0059] For the characterization of the FET device, a drain-source voltage (V ds ) and a back-gate voltage (V g ) were applied to the FET device, and the output characteristics and transfer characteristics of the device were observed.

[0060] Figure 8 shows the transfer characteristic curve of the FET device as a function of V ds changing from -4 V to 2 V at a constant V g of 0.05 V. The inset is an optical image of the FET device.

[0061] The measured carrier mobility of the FET device was 413 cm 2 V -1 s -1 . Note that this value is higher than the theoretical calculated value of 367 cm 2 V -1 s -1 for multilayer pTTe2. The difference between the experimental value and the theoretical calculated value is considered to be due to the difference in the physical properties between the experimental structure and the theoretical structure. For example, the theoretical structure is a single crystal structure.

[0062] Figure 9 shows the output characteristic curves of the FET device as a function of V ds and I d . As can be seen, I d decreases linearly with V ds in accordance with Ohm's law. It was found that the carrier mobility of the FET device increases linearly with voltage. The conductivity of the device was found to be 3.72×10 6 s.m -1 , which is much higher than the previously reported value of 1.7×10 6 s.m -1 in Wang, M., et al., Wafer-Scale Growth of 2D PtTe2 with Layer Orientation Tunable High Electrical Conductivity and Superior Hydrophobicity. ACS Applied Materials & Interfaces, 2020.12(9): p. 10839-10851. The difference in conductivity is thought to be due to the lack of 2D grain orientation and annealing and the 3D grain orientation and annealing in the films disclosed herein.

[0063] When calculating the subthreshold voltage of the FET device, it was 204.3 mVdec -1 .

[0064] FET devices with three different channel lengths of 10 μm, 20 μm, and 45 μm were also fabricated, and the variations in carrier mobility and current on / off ratio with channel length were observed. The carrier mobilities of these FET devices were 225 cm 2 V -1 s -1 , 361 cm 2 V -1 s -1 and 278 cm 2 V -1 s -1It was found that. Notably, a channel length of 20 μm exhibited the highest carrier mobility.

[0065] Example 3 In this example, the modification of the FET device in Example 2 into a sensor for detecting liver cancer is reported.

[0066] α-Fetoprotein (AFP) plays an important role in clinically diagnosing liver cancer. Therefore, to form the sensor, (3-aminopropyl)triethoxysilane (APTES) and gold nanoparticles (AuNP) were used to immobilize the antibody of AFP on the surface of the PtTe2 layer of the FET device. A schematic diagram of the overall process for forming a functionalized PtTe2 FET sensor for detecting AFP protein is shown in Fig. 10.

[0067] For surface modification, the FET device fabricated in Example 2 was immersed in a solution containing 0.4 mL of APTES mixed with 19 / 1 mL of ethanol / DI solution for 2 hours. Then, the device was washed with DI water and dried with N2 air. Subsequently, the device was heated at 120 °C for 5 minutes in an Ar environment.

[0068] Fig. 11 shows the APTES-modified PtTe2 conductive surface, and Fig. 12 shows the Raman spectra of the PtTe2 layer before and after surface modification by APTES. E g The peak was at 109.15 cm -1 to 110.05 cm -1 and shifted, and for A 1g it was at 156.16 cm -1 to 156.57 cm -1 and shifted. The difference between the two peaks was from 47.1 cm -1 to 46.52 cm -1It changes to. Since APTES provides an amino group (-NH2 part)-based cathode that electrostatically extrudes electrons from the APTES / PtTe2 interface, this result is due to the negative charge of APTES induced on the PtTe2 surface. Negatively charged APTES reduces the conductance of the PtTe2 channel observed in the transfer characteristic curve shown in Fig. 15, which results in a decrease in the drain current on the PtTe2FET surface.

[0069] Next, the APTES-functionalized PtTe2 surface was further functionalized with AuNPs. AuNPs play an important role in the adsorption and stabilization of antibodies. For surface functionalization, AuNPs were deposited on APTES-modified PtTe2 by using an electron beam evaporation process at a deposition rate of 0.1 Å / s. Unexpectedly, AuNPs were found to adsorb at a high density. The AFM image in Fig. 13 shows the thickness of the formed AuNPs, and the SEM image in Fig. 14 confirms the high-density AuNPs formed on the APTES / PtTe2 surface. The presence of grain boundaries and the increase in surface area due to grains protruding out-of-plane from the surface are considered to contribute to the high surface density of AuNPs.

[0070] The higher surface density of AuNPs is beneficial because it increases the total amount of antibodies that can adsorb to the FET device and thus increases the sensitivity of the sensor to the target protein.

[0071] Referring back to Fig. 12, after the functionalization of AuNPs on the APTES / PtTe2 surface, E g and A 1g for, respectively, the Raman peaks shifted from 110.05 cm -1 to 111.38 cm -1 and, and from 156.57 cm -1 to 158.15 cm -1 were observed. The difference between the E g peak and the A lg peak is 46.77 cm -1increases. This result is highly likely due to the high-density AuNPs pushing electrons out of the conductive surface. The drain current of the PtTe2 FET sensor decreases (as shown in Fig. 15), and V th shifts and the conductance decreases. This is also highly likely due to the effect of AuNPs pushing electrons out of the conductive surface.

[0072] Subsequently, the AFP antibody was immobilized on the AuNP-functionalized surface. To achieve this, the AuNP-functionalized surface was treated with a solution containing 100 μg mL -1 of anti-AFP.

[0073] When the negatively charged antibody of AFP is absorbed on the functionalized PtTe2 surface, the threshold voltage shifts positively by inducing hole carriers on the PtTe2 surface. In particular, Fig. 15 shows that the drain current of the FET device increased with the adsorption of anti-AFP, increasing the conductance of the PtTe2 surface.

[0074] For non-specific binding and to ensure selective detection of AFP protein due to its interaction with anti-AFP, a blocking agent of casein solution was introduced onto the anti-AFP immobilized surface. The drain current of the PtTe2 sensor increased by adding the casein solution onto the conductive surface and then increased the conductance of the surface by shifting the threshold voltage. Regarding the specificity and selective detection of AFP protein, control experiments were conducted with different concentrations of human serum albumin (HSA). As shown in Fig. 16, no current change was observed while adding the HSA protein. This result confirms that the casein blocking agent plays an important role in reducing non-specific binding and improving the efficiency of detection selectivity.

[0075] Subsequently, the functionalized FET device was fabricated into a microfluidic device using photolithography and soft lithography processes, and a microfluidic channel was etched therein.

[0076] Example 4

[0077] In this example, the use of the device of Example 3 for diagnosing liver cancer by detecting AFP protein is reported.

[0078] For the detection of AFP protein, AFP protein at concentrations of 1 fg mL-1 to 10 ng mL-1 in PBS solution was passed through the microfluidic channel at a flow rate of 10 μL / min and an incubation time of 30 minutes. Figure 17 shows a schematic diagram of AFP protein detection by the functionalized FET device.

[0079] After incubation, V g and V ds were applied to measure the transfer characteristics and output characteristics of the sensor. Figure 18 shows the transfer characteristic curve of the functionalized FET device as a function of AFP concentration. Notably, the functionalized FET device can detect an AFP protein concentration 500 times lower than previously reported, at 1 fg mL -1 .

[0080] It has been observed that the drain current of the functionalized FET device increases linearly with the increase in AFP protein concentration. This is caused by the change in the conductance of the PtTe2 conductive channel. In particular, the sensing mechanism of the functionalized FET device is thought to be caused by the change in the carrier density of the PtFe2 layer due to antigen binding or other interactions with the immobilized antibody that functionalizes the channel. In particular, without being bound by theory, the inventors believe that this binding results in an electrostatic effect that affects the electron behavior in the channel, causing a change in the carrier density.

[0081] These results can be explained by the positively shifted threshold voltage and the increase in the number of hole carriers on the conductive surface. Figure 19 shows the change in the average threshold voltage as a function of AFP protein concentration, and it has been observed that the threshold voltage changes positively while AFP protein interacts with anti-AFP due to the change in the charge carriers on the PtTe2 conductive surface.

[0082] The sensitivity of the PtTe2 device at AFP concentration was calculated as a function of the AFP concentration and is shown in Fig. 20. The sensitivity of the functionalized FET sensor was 22.13% for low concentrations of AFP protein, e.g., 1 fg / ml -1 and was below 302.69% at a concentration of 1 ng / ml -1 . This result indicates that the functionalized FET device is highly sensitive to low concentrations of AFP protein in PBS solution. Fig. 21 shows the output characteristics of the functionalized FET sensor at 1 fg / ml -1 with the gate voltage varied. The results indicate that the functionalized FET device is capable of detecting high sensitivity and low concentrations. The output characteristics of the functionalized FET sensor for different concentrations of AFP protein as a function of the drain-source voltage are shown in Fig. 22, and by increasing the conductance of the PtTe2 conductive surface, I d has been confirmed to increase with the increase in AFP concentration.

[0083] Fig. 23 shows the time-dependent response curve of the response of the functionalized FET device as a function of the AFP concentration at a drain-source voltage of 50 mV. It is observed that the drain current of the PtTe2 sensor increases linearly with the increase in AFP concentration, and the segmented FET device can detect the AFP concentration of 1 fg / ml -1 as the drain current increases from 0.03 μA to 0.04 μA. Although not bound by theory, the inventors believe that this result is caused by changes in the carrier density and conductance of the conductive surface of the PtTe2 channel. The response time of the functionalized FET device was about 3 - 4 seconds after interacting with AFP, and the drain current was stable at about 20 seconds. The instantaneous sensitivity calculated based on the change in drain current over time and the average sensitivity is shown in Fig. 24. As can be seen from the figure, the sensitivity of the functionalized FET sensor was 1 fg / ml -1 and 10 ng / ml -1The AFP concentrations were 49.20% and 719.31% respectively. Therefore, the functionalized FET sensor is highly sensitive to low concentrations of AFP protein and has the potential to be used in point-of-care applications for diagnosing early-stage liver cancer. Figure 25 shows the stabilized drain current over time when different concentrations of AFP are introduced onto the surface. The results indicate that the stability of the drain current improves with the increase in AFP concentration. The response of the functionalized FET sensor as a function of AFP concentration and stabilized current is shown in Figure 26. The response of the functionalized FET sensor is 33.14% and 88.19% at AFP concentrations of 1 fg / mL -1 and 10 ng / mL -1 respectively.

[0084] Example 5 In this example, we report the testing of a large 1 mm × 1 mm PtpTTe2 film of the present invention. The PtTe2 material for the device reported below was prepared using the approach discussed in the above examples and is thus expected to exhibit similar characteristics with respect to characterization.

[0085] Figure 27 is an image of a 1 mm × 1 mm deposition of a 9 mm thick PtTe2 film 2700 on a silicon substrate 2702 having electrical contacts 2704 and 2706 formed from gold. The scale bar in Figure 27 represents 100 microns. The Raman spectrum shown in Figure 28 confirms that the film is PtTe2.

[0086] The PtTe2 film was tested for its electrical sensitivity to a standard silicon film to determine the effectiveness of the PtTe2 film for sensor applications. A typical field-effect transistor (FET) configuration with a 30-nm-thick PtTe2 and amorphous Si layer forming the channel of each FET device was adopted. The surfaces of the PtTe2 and Si layers were further functionalized with Au / Pd nanoparticles. To achieve this, after forming the semiconductor channel, a 3-nm to 5-nm-thick Au layer was deposited on the channel, followed by deposition of a 3-nm to 5-nm-thick Pd layer using an electron beam evaporator. The sample was then annealed at 200 °C for 20 minutes under nitrogen. During this annealing step, the Au-Pd film was changed into self-organized nanoparticles.

[0087] The PtTe2 FET sensor was found to operate advantageously at a lower bias than the Si FET (low power consumption, energy efficient). While the Si device operates at a 6-V bias, the PtTe2 device operates at a 1-V bias. The sensitivity test results for both the PtTe2 and Si devices are shown in FIGS. 29 and 30, and the results indicate that an FET with an Si channel in the gate bias range of -5 to 5 V for Si showed a sensitivity of 14.7%, while the PtTe2 device showed a sensitivity of 99.8%.

[0088] The inventors have also found that the PtTe2 layer can be beneficially functionalized to provide sensor selectivity. That is, by different surface functionalizations, it is possible to tune the sensor and achieve selective detection. In particular, the inventors have found that functionalization of the PtTe2 surface with Au-Pd nanoparticles results in a sensor that responds to many gases. However, selectivity can be achieved by employing different surface functionalizations. Figures 31, 32, 33 and 34 are graphs showing the sensitivity results of two FETs having channels formed from a silicon layer functionalized with Au-Pd nanoparticles, and the sensitivity results of two FETs having channels formed from the PtTe2 layer according to the present invention functionalized with CuO nanoparticles, respectively. The results indicate that the FET having a channel formed from a silicon layer did not show selectivity between NH3 and H2S gases, whereas the FET having a channel formed from the PtTe2 layer showed selectivity.

[0089] It is understood that the invention disclosed and defined herein extends to all alternative combinations of two or more of the individual features mentioned, or evident from the text or drawings. All of these different combinations constitute various alternative aspects of the invention.

Claims

1. A structure comprising a substrate having a polycrystalline transition metal dichalcogenide nanolayer arranged on the substrate surface, wherein the polycrystalline transition metal dichalcogenide nanolayer has a surface, and some of the particles of a plurality of particles protrude out of the surface.

2. The structure according to claim 1, wherein the polycrystalline transition metal dichalcogenide nanolayer is formed from a plurality of particles, and the plurality of particles have a D50 of about 20 nm to about 400 nm.

3. The structure according to claim 1 or 2, wherein the polycrystalline transition metal dichalcogenide nanolayer has an average thickness of about 4 nm to about 20 nm.

4. The structure according to claim 1, wherein the polycrystalline transition metal dichalcogenide nanolayer is substantially continuous.

5. The structure according to claim 1, wherein the polycrystalline transition metal dichalcogenide nanolayer is formed from a transition metal dichalcogenide in the form of MX2, where M represents a transition metal selected from the group consisting of Mo, Pt, Sn, W, and Zr, and X represents a chalcogenide selected from the group consisting of S, Se, and Te.

6. The structure according to claim 1, wherein the substrate is an electrical insulating material, a semiconductor material, or a metal.

7. The structure according to claim 1, wherein the substrate is selected from the group consisting of silica, alumina, or polymer.

8. (i) The substrate has a planar surface and the polycrystalline transition metal dichalcogenide nanolayer is arranged on the planar surface, or (ii) The substrate has a 3D structure having a non-planar surface and the polycrystalline transition metal dichalcogenide nanolayer is arranged on the non-planar surface, according to claim 1.

9. The structure according to claim 1, wherein the polycrystalline transition metal dichalcogenide nanolayer has a surface roughness of about 0.5 nm to about 2 nm.

10. A device comprising the structure according to claim 1, wherein the source electrode and the drain electrode are separated from each other by a polycrystalline transition metal dichalcogenide nanolayer and are each arranged in electrical contact with the polycrystalline transition metal dichalcogenide nanolayer, and the source electrode and the drain electrode.

11. The device according to claim 10, wherein the surface of the polycrystalline transition metal dichalcogenide nanolayer is functionalized with a probe for detecting the analyte.

12. The device according to claim 11, wherein the probe is configured to change the electron mobility and / or conductivity and / or transconductance of a polycrystalline transition metal dichalcogenide nanolayer when detecting an analyte.

13. The device according to claim 11 or 12, wherein the probe is selected from the group consisting of ligands, surfactants, nanoparticles, polymers, oligomers, antibodies, gas molecules, or combinations thereof.

14. In order to detect the analyte, A step of using the structure described in claim 1, or Steps using the device described in claim 10 Analytical methods, including those mentioned above.

15. A step of bringing the sample receiving surface of the structure or device into contact with a sample. A step of measuring the electron mobility of the polycrystalline transition metal dichalcogenide nanolayer, and The process of determining the presence of the analyte in the sample based on the change in electron mobility of the polycrystalline transition metal dichalcogenide nanolayer. The method according to claim 14, further comprising:

16. A process for providing a structure having a transition metal surface, A process of depositing a chalcogenide onto a transition metal surface under atmospheric conditions at a deposition temperature in the range of 300°C to 500°C, and A process of annealing chalcogenides on a transition metal surface at a temperature in the range of 300°C to 500°C for a sufficient time to form a polycrystalline transition metal dichalcogenide nanolayer. A method for forming a structure containing a polycrystalline transition metal dichalcogenide nanolayer.

17. The method according to claim 16, wherein the step of depositing the chalcogenide onto the transition metal surface is performed by physical vapor deposition.

18. The method according to claim 16 or 17, wherein the structure further comprises a substrate, and further comprises the step of depositing a transition metal onto the substrate surface in an inert atmosphere at a temperature in the range of 300°C to 500°C in order to form a structure having a transition metal surface.

19. The method according to claim 16, wherein the step of depositing a transition metal onto the substrate surface is performed by physical vapor deposition.

20. The method according to claim 16, wherein the annealing temperature is higher than the adhesion temperature.

21. Use of the structure described in claim 1 or the device described in claim 10 as a sensor.

22. Use of the structure according to claim 1 or the device according to claim 10 as a catalyst, in petrochemical water splitting, in thermoelectric applications, in photodetection, as or in an energy storage device, as or in a supercapacitor, or in an optoelectronic device.

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