Line array photoelectric focal plane detector and method of manufacturing the same

Abstract

A line array photoelectric focal plane detector and a manufacturing method thereof, the line array photoelectric focal plane detector including a photosensitive chip (2) and a readout circuit (1), the readout circuit (1) having a plurality of rows of first metal electrodes (11) on the upper surface thereof, the first metal electrodes (11) of each row being arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes (11) of adjacent rows being arranged in a staggered pattern along the row direction, the photosensitive chip (2) having at least one row of photosensitive pixels (21) arranged parallel to each other, the photosensitive chip (2) having second metal electrodes (22) on the lower surface thereof being arranged parallel to each other at equal intervals along the row direction, the second metal electrodes (22) of at least one row being connected to a corresponding one of the first metal electrodes (11). By matching and designing a variety of photosensitive chips with different structures based on one readout circuit, line array photoelectric focal plane detectors with different detection scales and center-to-center spacing between pixels can be produced, which can significantly reduce manufacturing costs. By adopting the same structure of the readout circuit (1), the adjustment of the mechanical interface and electrical characteristics is effectively avoided, and the ease of use of the photoelectric detector is improved.

Description

[Technical Field]

[0001] This application claims priority from Chinese Patent Application No. 2022111316074, filed on September 15, 2022. This application cites the above Chinese patent application in its entirety.

[0002] The present invention relates to the field of semiconductor technology, and more particularly to a line array photoelectric focal plane detector and a method for fabricating the same. [Background technology]

[0003] Photoelectric detectors convert optical signals into electrical signals, enabling electronic image processing of specific scene information and extracting the necessary data. Photoelectric detectors are widely used in fields such as digital imaging, spectrum analysis, industrial detection, and scientific research. Compared to area array photoelectric detectors, line array detectors have the advantages of low cost and ease of implementation, making them commonly used in industrial detection and grain color sorting.

[0004] For non-silicon-based photosensitive chips, silicon-based readout circuits must be used in combination, so the photosensitive chip and readout circuit structures of each photoelectric focal plane detector usually need to be consistent with each other. The readout circuits of each photoelectric detector must be individually designed and processed, which increases the manufacturing costs of the photoelectric detector, and the back-end electronics must be individually designed according to the mechanical interface and electrical characteristics of each photoelectric detector, which increases the application costs and difficulty of the photoelectric detector. Summary of the Invention

[0005] The technical problem that the present invention aims to solve is to provide a line array photoelectric focal plane detector and a manufacturing method thereof to overcome the drawbacks of the prior art that the photosensitive chip of each flat panel detector needs to be matched with a corresponding readout circuit structure, resulting in high manufacturing and application costs.

[0006] The present invention solves the above technical problems through the following technical solutions. In a first aspect, the present invention provides a line array photoelectric focal plane detector, the line array photoelectric focal plane detector comprising a photosensitive chip and a readout circuit, the photosensitive chip is electrically connected to the readout circuit, the readout circuit is fixed below the photosensitive chip and is used to read photoelectric conversion signals from the photosensitive chip; a plurality of rows of first metal electrodes are provided on an upper surface of the readout circuit, the first metal electrodes of each row are arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes of adjacent rows are arranged in a staggered pattern along the row direction; The photosensitive chip includes at least one row of photosensitive pixels arranged in parallel, and second metal electrodes arranged in parallel at equal intervals along the row direction are provided on the underside of the photosensitive chip, and at least one row of the second metal electrodes are connected to correspond to the first metal electrodes.

[0007] Preferably, the line array photoelectric focal plane detector further includes an interconnection layer, and the photosensitive chip and the readout circuit are electrically connected through the interconnection layer.

[0008] Preferably, the interconnection layer includes metal interconnection bumps arranged corresponding to the upper surface of the readout circuit and the lower surface of the photosensitive chip, and distributed in an array shape.

[0009] Preferably, the metal interconnection bumps include a first metal interconnection bump protruding from the first metal electrode and a second metal interconnection bump protruding from the second metal electrode.

[0010] Preferably, the second metal electrode and the photosensitive pixel are electrically connected via a signal electrode.

[0011] Preferably, a plurality of metal pads are further provided on the top surface of the readout circuit, and the metal pads are electrically connected to an external interface and are used to transmit the photoelectric conversion signal processed by the readout circuit to the external interface.

[0012] Preferably, the metal pad transmits the photoelectric conversion signal processed by the readout circuit to the external interface via a wire bonding method.

[0013] Preferably, the photosensitive pixels are arranged in a plurality of rows, and the photosensitive pixels in each row have the same photosensitive surface size.

[0014] In a second aspect, the present invention provides a method of manufacturing a line array photoelectric focal plane detector, said method comprising: providing a plurality of rows of first metal electrodes on an upper surface of a readout circuit, the first metal electrodes of each row being arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes of adjacent rows being arranged in a staggered pattern along the row direction; obtaining a plurality of different types of photosensitive chips, each of the photosensitive chips including at least one row of photosensitive pixels arranged in parallel; The method includes providing second metal electrodes arranged in parallel and at equal intervals along the row direction on the underside of each of the photosensitive chips, wherein the second metal electrodes in at least one row are connected to correspond to the first metal electrodes.

[0015] Preferably, the manufacturing method comprises: providing a first metal interconnect bump protruding from the first metal electrode and a second metal interconnect bump protruding from the second metal electrode; forming an interconnect layer based on the first metal interconnect bump and the second metal interconnect bump; and / or The method further includes electrically connecting the photosensitive pixel and the second metal electrode through a signal electrode.

[0016] The positive advances of the present invention are as follows: The present invention provides a line array photoelectric focal plane detector and a manufacturing method thereof, which uses one readout circuit to match and design a variety of photosensitive chips with different structures, thereby producing line array photoelectric focal plane detectors with different detection scales and inter-pixel center spacings, thereby reducing the manufacturing cost of the photoelectric detector; by using readout circuits with the same structure, the need to adjust the mechanical interface and electrical characteristics when developing the back-end electronics structure is effectively avoided, and only the signal processing algorithm on the software side needs to be modified, which significantly reduces the application cost and improves the ease of use of the photoelectric detector. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a first structural schematic diagram of a line array photoelectric focal plane detector with a pixel size of 512×2 according to Example 1 of the present invention; [Figure 2] 2 is a second structural schematic diagram of a line array photoelectric focal plane detector with a pixel size of 512×2 according to Example 1 of the present invention; FIG. [Figure 3] 1 is a first structural schematic diagram of a line array photoelectric focal plane detector with a pixel size of 1024×1 according to Example 1 of the present invention; [Figure 4] 1 is a first structural schematic diagram of a line array photoelectric focal plane detector with a pixel size of 256×2 according to Example 1 of the present invention; [Figure 5] 10 is a schematic flowchart of a method for manufacturing a line array photoelectric focal plane detector according to a second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] The present invention will be further described below by way of examples, but the present invention is not limited to the scope of the examples.

[0019] Example 1 1 and 2 are a first and second structural schematic diagrams of a line array photoelectric focal plane detector with a pixel size of 512×2 according to a first embodiment of the present invention. The line array photoelectric focal plane detector includes a readout circuit 1 and a photosensitive chip 2, the readout circuit 1 is electrically connected to the photosensitive chip 2, the readout circuit 1 is fixed below the photosensitive chip 2, and is used to read photoelectric conversion signals from the photosensitive chip 2. A plurality of rows of first metal electrodes 11 are provided on the top surface of the readout circuit 1, the first metal electrodes 11 of each row are arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes 11 of adjacent rows are arranged in a staggered pattern along the row direction; The photosensitive chip 2 includes at least one row of photosensitive pixels 21 arranged in parallel, and the underside of the photosensitive chip 2 is provided with second metal electrodes 22 arranged in parallel at equal intervals along the row direction, and the second metal electrodes 22 of at least one row are connected to correspond to the first metal electrodes 11.

[0020] In this embodiment, the absorption layer of the line array photodetector may adopt InGaAs material or HgCdTe material, which can detect infrared signals.

[0021] FIG. 1 shows a 512×2 pixel line array photoelectric focal plane detector. The photosensitive chip 2 includes two parallel rows of photosensitive pixels 21, with a 30 μm center-to-center spacing between adjacent pixels in the row and column directions. The photosensitive chip 2 employs a back-illuminated optical structure, i.e., optical signals are received from the backside of the chip. The readout circuit 1 functions as electrical signal reading, processing, and amplification. The photosensitive pixels 21 each measure 30 μm×30 μm, and the size of the photosensitive pixels 21 can be adjusted according to actual requirements. The top surface of the readout circuit 1 is provided with 256×4 first metal electrodes 11, and the bottom surface of the photosensitive chip 2 is provided with 256×4 second metal electrodes 22. Specifically, 256×2 second metal electrodes 22 are distributed above and below the photosensitive pixels 21, respectively. Each first metal electrode 11 and each second metal electrode 22 is positioned in a corresponding position and connected to each other, and the first metal electrodes 11 in each row and the second metal electrodes 22 in each row are arranged in a staggered manner in the column direction.

[0022] FIG. 3 shows a line array photoelectric focal plane detector with a pixel size of 1024×1. The photosensitive chip 2 includes a row of photosensitive pixels 21 arranged parallel to one another. The center-to-center spacing between adjacent pixels in the row direction is 15 μm, and the size of the photosensitive pixels 21 is 15 μm×15 μm. The size of the photosensitive pixels 21 can be adjusted according to actual conditions. The readout circuits 1 of the line array photoelectric detectors with a pixel size of 1024×1 and 512×2 are identical, enabling two types of photoelectric detectors with different readout circuits and pixel sizes to be obtained based on the same readout circuit 1. Specifically, the readout circuit 1 of the line array photoelectric focal plane detector includes 256×4 first metal electrodes 11 on the upper surface, and 256×4 second metal electrodes 22 on the lower surface of the photosensitive chip 2. Each first metal electrode 11 and each second metal electrode 22 are positioned in a corresponding position and electrically connected.

[0023] FIG. 4 shows a line array photoelectric focal plane detector with a pixel size of 256 × 2. The photosensitive chip 2 includes two parallel rows of photosensitive pixels 21, with a center-to-center spacing between adjacent pixels in the row direction of 60 μm. The size of the photosensitive pixels 21 is 60 μm × 60 μm, and the size of the photosensitive pixels 21 can be adjusted according to actual conditions. Above and below each photosensitive pixel 21, a row of second metal electrodes 22 are provided, arranged parallel and equally spaced along the row direction. On the top surface of the readout circuit 1, two rows of first metal electrodes 11 are provided corresponding to the positions of the second metal electrodes 22, and two rows of first metal electrodes 11 are provided that do not correspond to the positions of the second metal electrodes 22. The second metal electrodes 22 and first metal electrodes 11 are sequentially arranged in a staggered pattern along the row direction. Note that the terms "upper" and "lower" are used to describe the relative positions of the metal electrodes and the photosensitive pixels 21.

[0024] In a preferred embodiment, the line array photoelectric focal plane detector further includes an interconnection layer 3, through which the photosensitive chip 2 and the readout circuit 1 are electrically connected.

[0025] The interconnection layer 3 is obtained by bonding and interconnecting the first metal electrodes 11 and the second metal electrodes 22 correspondingly provided on the photosensitive chip 2 and the readout circuit 1 through a flip-chip process, thereby completing the electrical connection and mechanical support between the photosensitive chip 2 and the readout circuit 1, and thus realizing the readout of the photoelectric conversion signal.

[0026] 2 and 3, the interconnection layer 3 is disposed corresponding to the upper surface of the readout circuit 1 and the lower surface of the photosensitive chip 2, and includes metal interconnection bumps distributed in an array shape. The metal interconnection bumps include first metal interconnection bumps protruding from the first metal electrodes 11 and second metal interconnection bumps protruding from the second metal electrodes 22.

[0027] Each of the first metal electrodes 11 and each of the second metal electrodes 22 are connected to each other, and the first metal interconnection bumps and the second metal interconnection bumps are electrode bumps having a certain height.

[0028] In a preferred embodiment, the second metal electrodes 22 and the photosensitive pixels 21 are electrically connected via signal electrodes 4. As shown in Figures 2, 3 and 4, electrical signals from various photosensitive chips 2 with different line array pixel sizes and pixel center-to-center spacings are extracted from the photosensitive pixels 21 via the signal electrodes 4 to the second metal electrodes 22 that correspond to the positions of the surface metal electrodes of the readout circuit 1.

[0029] In a preferred embodiment, the readout circuit 1 further has a plurality of metal pads 12 on the top surface thereof, which are used for electrically connecting to an external interface so as to transmit the photoelectric conversion signal processed by the readout circuit 1 to the external interface.

[0030] As shown in FIG. 2, metal pads 12 are provided on both sides of the top surface of the readout circuit 1, and the metal pads 12 are metal electrodes that transmit the photoelectric conversion signals processed by the readout circuit 1 to an external interface via wire bonding, thereby realizing the transmission of electrical signals.

[0031] In a preferred embodiment, the photosensitive pixels 21 are arranged in a single row or multiple rows, and the photosensitive pixels 21 in each row have the same photosensitive surface size.

[0032] 2 and 4, the photosensitive pixels 21 in each row are arranged at equal intervals along the row direction, the photosensitive pixels 21 in adjacent rows are arranged at the same position along the row direction, and the size of the photosensitive surface of the photosensitive pixels 21 is the same in both the column direction and the row direction. Note that the size of the photosensitive surface of the photosensitive pixels 21 can be reset or adjusted according to actual conditions and is not particularly limited here.

[0033] In this embodiment, a variety of photosensitive chips with different structures are matched and designed based on one readout circuit, thereby generating line array photoelectric focal plane detectors with different detection scales and center-to-center spacing between pixels, which can significantly reduce manufacturing costs. By adopting readout circuits with the same structure, the need for mechanical interface and electrical characteristic adjustments can be effectively avoided, and the ease of use of the photoelectric detectors can be improved.

[0034] <Example 2> FIG. 5 is a schematic flowchart of a method for manufacturing a line array photoelectric focal plane detector according to a second embodiment of the present invention, the method including the following steps:

[0035] In S11, multiple rows of first metal electrodes are provided on the upper surface of the readout circuit, and the first metal electrodes of each row are arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes of adjacent rows are arranged in a staggered pattern along the row direction.

[0036] In S12, a plurality of different types of photosensitive chips are obtained, each of which includes at least one row of photosensitive pixels arranged in parallel.

[0037] In S13, second metal electrodes are provided on the underside of each photosensitive chip, the second metal electrodes being arranged in parallel at equal intervals along the row direction, and the second metal electrodes in at least one row are connected to corresponding first metal electrodes.

[0038] In the above step S11, a type of silicon-based readout circuit having a multi-row line array electrical signal readout unit structure is manufactured to simultaneously satisfy various types of photosensitive chip structures, and the first metal electrodes provided on the upper surface of the readout circuit have the characteristics that the electrodes are parallel to each other in the horizontal direction, have the same center spacing, and are arranged in a staggered pattern in the vertical direction.

[0039] In step S12, various photosensitive chips with different line array pixel sizes and center-to-center spacings are obtained, such as a photosensitive chip with a pixel size of 512x2 and a pixel spacing of 30 μm, a photosensitive chip with a pixel size of 1024x1 and a pixel spacing of 15 μm, and a photosensitive chip with a pixel size of 256x2 and a pixel spacing of 60 μm. Each photosensitive chip may include one row of photosensitive pixels arranged parallel and equally spaced along the row direction, or two rows of photosensitive pixels arranged parallel and equally spaced along the row direction. In this embodiment, the arrangement of the photosensitive pixels can be adjusted according to actual conditions and is not particularly limited.

[0040] In the above step S13, for different types of photosensitive chips, the second metal electrodes are arranged in different rows and columns, and the second metal electrodes in each row are arranged parallel to each other at equal intervals along the row direction. For example, for a photosensitive chip with a pixel size of 512 x 2 and a center-to-center spacing between pixels of 30 μm, if 256 x 4 first metal electrodes are provided on the upper surface of the readout circuit, 256 x 4 second metal electrodes are provided on the lower surface of the photosensitive chip at positions corresponding to the first metal electrodes. Specifically, 256 x 2 second metal electrodes are distributed above and below the photosensitive pixels, respectively.

[0041] For a photosensitive chip with a pixel size of 256x2 and a center-to-center spacing of 60 μm, if 256x4 first metal electrodes are provided on the upper surface of the readout circuit, then 256x2 second metal electrodes are provided on the lower surface of the photosensitive chip. Specifically, 256x1 second metal electrodes are distributed above and below the photosensitive pixels, respectively, i.e., only 256x1 second metal electrodes are present above or below the photosensitive pixel, and are connected to corresponding 256x1 first metal electrodes at the relative positions on the readout circuit.

[0042] In a preferred embodiment, the photosensitive pixel and the second metal electrode are electrically connected via a signal electrode, and the electrical signal from the bottom surface of the photosensitive pixel is transferred to the second metal electrode provided on the top surface of the readout circuit at the position corresponding to the first metal electrode.

[0043] In a preferred embodiment, the manufacturing method further comprises the following steps:

[0044] In S14, a first metal interconnect bump is provided protruding from the first metal electrode, and a second metal interconnect bump is provided protruding from the second metal electrode.

[0045] In S15, an interconnect layer is formed based on the first metal interconnect bump and the second metal interconnect bump.

[0046] In the above step S14, there are metal interconnection bumps, i.e., first metal interconnection bumps, having a certain height on the upper surface of the metal electrodes of the readout circuit, and there are second metal interconnection bumps, also having a certain height, on the lower surface of the metal electrodes of the photosensitive chip at positions corresponding to some of the first metal interconnection bumps.

[0047] In the above step S15, the first metal interconnection bumps protruding from the first metal electrodes of the readout circuit and the second metal interconnection bumps protruding from the second metal electrodes of the photosensitive chip are bonded and interconnected through a flip-chip process to form an interconnection layer, which not only enables electrical connection and mechanical support between a specific readout circuit and each type of photosensitive chip, but also enables reading of photoelectric conversion signals.

[0048] In a preferred embodiment, based on the signal electrode design logic of each pixel on the photosensitive chip, the electrical signals obtained from the readout circuit are processed through the back-end electronics structure, and effective photoelectric conversion signals are selected therefrom, and the positional relationship of the signals is combined to form a complete detection image, thereby realizing the application of various line array photoelectric focal plane detectors based on one readout circuit.

[0049] For example, when the detector starts operation, a line array detector with a pixel size of 512x2 reads out electrical signals sequentially from left to right or right to left, and the back-end electronics structure outputs a detection image consisting of two rows of pixels, each with 512 pixels. A line array detector with a pixel size of 1024x1 requires the back-end electronics structure to concatenate and read out electrical signals, i.e., the upper and lower electrical signals are concatenated alternately to form a detection image consisting of one row of pixels, each with 1024 pixels. A line array detector with a pixel size of 256x2 requires the back-end electronics structure to interlace and read out electrical signals, i.e., the even signals are concatenated sequentially while the odd signals are concatenated to read out one side of the electrical signals, and a detection image consisting of two rows of pixels, each with 256 pixels. This method allows the same type of readout circuit to be used to acquire a variety of photoelectric detectors with different pixel scales and sizes, resulting in high versatility of the readout circuit.

[0050] In this embodiment, the manufacturing method of the line array photoelectric focal plane detector realizes that various photosensitive chip structures are matched and designed based on one readout circuit structure, and line array photoelectric focal plane detectors with different detection scales and center-to-center spacing between pixels are constructed. By adopting the same readout circuit structure, it is possible to avoid adjusting the mechanical interface and electrical characteristics when developing the corresponding backend electronics structure, and effectively improve the ease of use of the photoelectric focal plane detector and the versatility of the high readout circuit.

[0051] Although specific embodiments of the present invention have been described above, those skilled in the art should understand that these are merely illustrative descriptions, and the scope of protection of the present invention is limited by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principle and essence of the present invention, and all of these changes and modifications should fall within the scope of protection of the present invention.

Claims

1. The photosensitive chip includes a photosensitive chip and a readout circuit, the photosensitive chip is electrically connected to the readout circuit, the readout circuit is fixed below the photosensitive chip, and is used to read a photoelectric conversion signal from the photosensitive chip; a plurality of rows of first metal electrodes are provided on an upper surface of the readout circuit, the first metal electrodes of each row are arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes of adjacent rows are arranged in a staggered pattern along the row direction; A line array photoelectric focal plane detector, characterized in that the photosensitive chip includes at least one row of photosensitive pixels arranged in parallel, and the underside of the photosensitive chip is provided with second metal electrodes arranged in parallel at equal intervals along the row direction, and the second metal electrodes of at least one row are connected to correspond to the first metal electrodes.

2. 2. The line array photoelectric focal plane detector of claim 1, wherein the line array photoelectric focal plane detector further includes an interconnection layer, and the photosensitive chip and the readout circuit are electrically connected through the interconnection layer.

3. 3. The line array photoelectric focal plane detector of claim 2, wherein the interconnection layer includes metal interconnection bumps arranged corresponding to the upper surface of the readout circuit and the lower surface of the photosensitive chip, and distributed in an array shape.

4. 4. The line array photoelectric focal plane detector of claim 3, wherein the metal interconnection bumps include a first metal interconnection bump protruding from the first metal electrode and a second metal interconnection bump protruding from the second metal electrode.

5. 2. The line array photoelectric focal plane detector according to claim 1, wherein the second metal electrode and the photosensitive pixel are electrically connected via a signal electrode.

6. 2. The line array photoelectric focal plane detector according to claim 1, characterized in that a plurality of metal pads are further provided on the top surface of the readout circuit, and the metal pads are used for electrically connecting with an external interface and transmitting the photoelectric conversion signals processed by the readout circuit to the external interface.

7. 7. The line array photoelectric focal plane detector according to claim 6, wherein the metal pad transmits the photoelectric conversion signal processed by the readout circuit to the external interface via a wire bonding method.

8. 2. The line array photoelectric focal plane detector according to claim 1, wherein the photosensitive pixels are arranged in a plurality of rows, and the photosensitive pixels in each row have the same photosensitive surface size.

9. providing a plurality of rows of first metal electrodes on an upper surface of a readout circuit, the first metal electrodes of each row being arranged parallel to each other at equal intervals along the row direction, and the first metal electrodes of adjacent rows being arranged in a staggered pattern along the row direction; obtaining a plurality of different types of photosensitive chips, each of said photosensitive chips including at least one row of photosensitive pixels arranged in parallel; A method for manufacturing a line array photoelectric focal plane detector, characterized in that it includes a step of providing second metal electrodes arranged in parallel and at equal intervals along the row direction on the underside of each of the photosensitive chips, wherein the second metal electrodes in at least one row are connected to correspond to the first metal electrodes.

10. providing a first metal interconnect bump protruding from the first metal electrode and a second metal interconnect bump protruding from the second metal electrode; forming an interconnect layer based on the first metal interconnect bump and the second metal interconnect bump; and / or 10. The method for manufacturing a line array photoelectric focal plane detector according to claim 9, further comprising the step of electrically connecting the photosensitive pixels and the second metal electrodes via signal electrodes.

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