magnetic tunnel junction devices

Abstract

An embodiment of the present invention provides a magnetic tunnel junction (MTJ) structure including an MTJ stack having a tunnel barrier layer on a reference layer and a free layer on the tunnel barrier layer, the free layer including a plurality of sub-free layers, the sub-free layers being a plurality of ferromagnetic strips arranged parallel to each other on the tunnel barrier layer, the plurality of ferromagnetic strips including respective first ends connected to a first electrode and respective second ends connected to a second electrode. Also provided is a method of forming the MTJ structure.

Description

[Technical Field]

[0001] This application relates to the fabrication of semiconductor integrated circuits, and more particularly to methods of forming magnetic tunnel junction devices and structures formed thereby. [Background technology]

[0002] Magnetic tunnel junction (MTJ) devices with programmable domain walls have been proposed for use in many advanced fields, such as analog artificial intelligence (AI) hardware. Generally, the weights of AI algorithms can be encoded into the conductance of the MTJ device. For example, by moving the position of the programmable domain wall in the free layer of the MTJ device, the conductance of the MTJ device can be tuned through a range of conductivity values.

[0003] In practice, however, there is considerable variability in the movement of the domain wall position. Due to variations in the size and shape of the free layer and the external voltages applied to the device to adjust or move the domain wall, the domain wall position may generally follow a statistical distribution, but with a standard deviation. In some cases, the standard deviation of the domain wall position may become so large that it hinders the ability to accurately program the MTJ device for any intended use or application. Summary of the Invention

[0004] An embodiment of the present invention provides an MTJ structure comprising an MTJ stack having a tunnel barrier layer on a reference layer and a free layer on the tunnel barrier layer, the free layer including a plurality of sub-free layers, the sub-free layers being ferromagnetic strips arranged parallel to one another on the tunnel barrier layer, the ferromagnetic strips including respective first ends connected to a first electrode and respective second ends connected to a second electrode. The use of multiple sub-free layers of ferromagnetic strips reduces statistical variation in the effective domain wall position of the free layer, as the variation is reduced with an increasing number of sub-free layers.

[0005] In one embodiment, the plurality of ferromagnetic strips are patterned to have notches formed along the respective lengths of the plurality of ferromagnetic strips. In a further embodiment, the notches of the plurality of ferromagnetic strips are substantially aligned with one another along the respective lengths. During operation of the MTJ structure, the notches increase the likelihood or certainty of a domain wall location by creating discrete locations at which a domain wall location is more likely to be determined or located.

[0006] In one embodiment, each of the ferromagnetic strips is covered by a spin-orbit coupling layer that is patterned to have the same shape as the ferromagnetic strips it covers, and the use of this spin-orbit coupling layer significantly reduces the threshold current that causes the domain wall position to move.

[0007] In another embodiment, the reference layer is a ferromagnetic layer that perpendicularly overlaps the plurality of sub-free layers via the tunnel barrier layer.

[0008] In one embodiment, the MTJ structure further comprises a third electrode, the third electrode contacting the reference layer at a substantially central location of the reference layer.

[0009] In another embodiment, the plurality of sub-free layers include respective domain wall positions defined by an applied voltage, each domain wall position corresponding to a conductance value G with a standard deviation S1, and the free layer includes effective domain wall positions defined by the applied voltage, corresponding to a conductance value G*N with a standard deviation S2=S1*sqrt(N), where N is the total number of the sub-free layers. Obviously, the more sub-free layers are used, the smaller the standard deviation of the conductance.

[0010] An embodiment of the present invention provides a method of forming an MTJ structure, the method comprising: forming a blanket tunnel barrier layer on a blanket reference layer; forming a blanket free layer on the blanket tunnel barrier layer; patterning the blanket free layer into a free layer having a plurality of sub-free layers, the sub-free layers being a plurality of ferromagnetic strips arranged parallel to one another on the blanket tunnel barrier layer; and forming a first electrode in contact with a first end of each of the plurality of ferromagnetic strips and a second electrode in contact with a second end of each of the plurality of ferromagnetic strips.

[0011] In one embodiment, patterning the blanket free layer includes forming the plurality of ferromagnetic strips with notches along their respective lengths, and in a further embodiment, the notches of the plurality of ferromagnetic strips are substantially aligned with one another along their respective lengths.

[0012] In another embodiment, the method further comprises forming a blanket spin-orbit coupled layer over the blanket free layer, and patterning the blanket free layer further comprises patterning the blanket spin-orbit coupled layer into a plurality of spin-orbit coupled strips over the plurality of ferromagnetic strips.

[0013] In one embodiment, the method further comprises, after patterning the blanket free layer, patterning the blanket tunnel barrier layer and the blanket reference layer into a tunnel barrier layer and a reference layer, respectively.

[0014] In another embodiment, the method further comprises depositing a dielectric layer overlying the plurality of sub-free layers, the tunnel barrier layer, and the reference layer.

[0015] In yet another embodiment, the method further comprises forming the blanket reference layer over a conductive via, the conductive via being embedded in a dielectric layer and serving as a third electrode for the MTJ structure.

[0016] An embodiment of the present invention provides yet another method of forming an MTJ structure, the method comprising: forming a blanket spin-orbit coupled layer on a substrate; forming a blanket free layer on the blanket spin-orbit coupled layer; patterning the blanket free layer into a free layer, the free layer having a plurality of sub-free layers arranged parallel to one another and overlying the blanket spin-orbit coupled layer; depositing a blanket tunnel barrier layer on the plurality of sub-free layers; depositing a blanket reference layer on the blanket tunnel barrier layer; patterning the blanket tunnel barrier layer and the blanket reference layer into a tunnel barrier layer and a reference layer, respectively, the patterning exposing first ends and second ends of the plurality of sub-free layers; and forming a first electrode in contact with the first ends of the plurality of sub-free layers and a second electrode in contact with the second ends of the plurality of sub-free layers.

[0017] In one embodiment, the method further comprises, after patterning the blanket reference layer and the blanket tunnel barrier layer into the tunnel barrier layer and the reference layer, depositing a dielectric layer covering the reference layer, the tunnel barrier layer, and the plurality of sub-free layers.

[0018] In another embodiment, the method further comprises patterning the dielectric layer to create first and second openings that expose the first and second ends of the plurality of sub-free layers, and then forming the first and second electrodes in the first and second openings.

[0019] In yet another embodiment, the method further comprises patterning the dielectric layer to create a third opening exposing a portion of the reference layer between the first and second openings, and then depositing a conductive material in the third opening to form a third electrode. [Brief explanation of the drawings]

[0020] The present invention will be more fully understood and appreciated from the following detailed description of the embodiments thereof, read in conjunction with the accompanying drawings.

[0021] [Figure 1A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 1B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 2A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 2B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 3A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 3B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 4A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 4B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 5A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to one embodiment of the present invention. [Figure 5B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to one embodiment of the present invention.

[0022] [Figure 6A] 10A to 10C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to another embodiment of the present invention. [Figure 6B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 7A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 7B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 8A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 8B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 9A] 1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 9B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 10A]1A to 1C are diagrams exemplarily illustrating cross-sectional views of an MTJ structure during a manufacturing process according to an embodiment of the present invention. [Figure 10B] 1A to 1C are diagrams exemplarily illustrating top views of an MTJ structure during a manufacturing process according to an embodiment of the present invention.

[0023] [Figure 11] FIG. 1 exemplarily shows a flowchart of a method for fabricating an MTJ structure, according to one embodiment of the present invention.

[0024] [Figure 12] FIG. 10 exemplarily illustrates a flowchart of a method for fabricating an MTJ structure according to another embodiment of the present invention.

[0025] [Figure 13] 1A-1C are diagrams illustrating exemplary operation of an MTJ structure according to one embodiment of the present invention.

[0026] It will be understood that for purposes of simplicity and clarity, elements shown in the figures have not necessarily been drawn to scale. Further, where applicable, in various functional block diagrams, two devices and / or elements that are connected may not necessarily be shown as connected. In some other instances, the grouping of certain elements in the functional block diagrams may be for illustrative purposes only and does not necessarily indicate that they are within or embodied in a single physical entity. DETAILED DESCRIPTION OF THE INVENTION

[0027] In the following detailed description and the accompanying drawings, it should be understood that the various layers, structures, and regions shown in the drawings are exemplary and schematic views thereof and are not drawn to scale. Also, for ease of explanation, one or more layers, structures, and regions of a type commonly used in forming semiconductor devices or structures may not be explicitly shown in a given figure or drawing. This is not to suggest that any layers, structures, and regions not explicitly shown are omitted from an actual semiconductor structure. Furthermore, it should be understood that the embodiments discussed herein may not be limited to the specific materials, features, and processing steps shown and described herein. In particular, with respect to semiconductor processing steps, it is emphasized that the descriptions provided herein are not intended to be exhaustive of all processing steps that may be required to form a functional semiconductor integrated circuit device. Rather, certain processing steps commonly used in forming semiconductor devices, such as wet cleaning and annealing steps, may not be described herein intentionally for the sake of efficiency of explanation.

[0028] It should be understood that the terms "about" or "substantially" used herein with respect to thickness, width, percentage, range, etc. are intended to indicate close or approximate, but not exact. For example, the terms "about" or "substantially" used herein indicate, by way of example only, that there may be a slight deviation, such as 1% or less, from the recited amount. Similarly, the terms "on," "above," or "above" used herein to describe the positional relationship between two layers or structures are intended to be interpreted broadly and should not be interpreted to exclude the presence of one or more intervening layers or structures.

[0029] To provide spatial context for different structural orientations of semiconductor structures shown in the figures, an XYZ Cartesian coordinate system may be provided in some of the figures. As used herein, the terms "vertical" or "vertical direction" or "vertical height" refer to the Z direction of the Cartesian coordinate system shown in the figures, and the terms "horizontal" or "horizontal direction" or "lateral direction" as used herein refer to the X and / or Y directions of the Cartesian coordinate system shown in the figures.

[0030] Also, although different reference numbers may be used across different drawings, the same or similar reference numbers are used throughout the drawings to indicate the same or similar features, elements, or structures, and therefore detailed descriptions of the same or similar features, elements, or structures may not be repeated for each of the drawings for efficiency of description. The labeling of the same or similar elements in some drawings may also be omitted to avoid overfilling the drawings.

[0031] 1A and 1B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure during fabrication, according to one embodiment of the present invention. More specifically, in forming the MTJ structure 10, an embodiment of the present invention provides for forming a conductive via 111 in a support structure, such as a dielectric layer 110, or alternatively, receiving the dielectric layer 110 with the conductive via 111 already formed therein. In one embodiment, the dielectric layer 110 may be part of a substrate, such as a semiconductor substrate. Meanwhile, the conductive via 111 may be made of, for example, tantalum nitride (TaN), titanium nitride (TiN), copper (Cu), tungsten (W), or other suitable conductive material and may function as an electrode (e.g., a third electrode) of the MTJ structure 10, the fabrication of which is described in more detail below.

[0032] Further, embodiments of the present invention provide forming a blanket reference layer 120 over the conductive via 111 and the dielectric layer 110, a blanket tunnel barrier layer 130 over the blanket reference layer 120, a blanket free layer 140 over the blanket tunnel barrier layer 130, and a blanket spin-orbit coupling layer 150 over the blanket free layer 140.

[0033] In one embodiment, the blanket reference layer 120 and the blanket free layer 140 may be blanket ferromagnetic layers. Each blanket ferromagnetic layer may independently be a layer of a cobalt (Co), iron (Fe), and boron (B)-based material (CoFeB), such as an alloy of Co, Fe, and B, although other types of ferromagnetic materials, such as an alloy of Co and Fe (CoFe) or an alloy of nickel (Ni) and Fe (NiFe), may also be used. In some embodiments, the blanket reference layer may include a combination of a ferromagnetic layer and a Co-based synthetic antiferromagnetic layer. The blanket reference layer and the blanket free layer may each be formed to have a thickness ranging from about 0.5 nm to about 30 nm.

[0034] In one embodiment, the blanket tunnel barrier layer 130 may be a layer of magnesium oxide (MgO) or other suitable material, including, for example, aluminum oxide (Al2O3) or titanium oxide (TiO2), and may be formed to have a thickness typically in the range of about 0.5 nm to about 1.5 nm, although other thicknesses are possible.

[0035] In one embodiment, blanket spin-orbit coupling layer 150 may be a layer of spin-orbit torque material, which may include, for example, tantalum (Ta), platinum (Pt), or other suitable material. Blanket spin-orbit coupling layer 150 may be formed to have a thickness typically in the range of about 0.5 nm to about 5 nm.

[0036] Embodiments of the present invention further provide for forming a hard mask layer 160 over the spin-orbit coupling layer 150. The hard mask layer 160 is then patterned to form an etch mask that can be used in patterning the blanket free layer 140 in a subsequent step, as described in more detail below.

[0037] 2A and 2B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a stage of fabrication after the stage shown in FIGS. 1A and 1B according to one embodiment of the present invention. More specifically, an embodiment of the present invention provides a step of patterning a hard mask layer 160 into a hard mask 161, the hard mask 161 including a plurality of hard mask strips, such as parallel hard mask strips 1611, 1612, 1613, 1614, 1615, and 1616. While six (6) hard mask strips are illustratively shown in FIG. 2B, a greater or lesser number of hard mask strips is possible and fully contemplated by embodiments of the present invention. In a further embodiment, the plurality of hard mask strips 1611, 1612, 1613, 1614, 1615, and 1616 may preferably and optionally have a plurality of notches formed continuously along their respective longitudinal directions. The notches may be uniform or non-uniform along the length of each strip, although generally uniform notches are more preferred. The hard mask 161 may be made from silicon nitride (SiN) or other suitable material.

[0038] Embodiments of the present invention may further provide transferring the pattern of the hard mask 161 to the underlying blanket spin-orbit coupling layer 150 and the blanket free layer 140, for example, by an anisotropic etching process. The anisotropic etching process may stop at the blanket tunnel barrier layer 130. The transfer of the pattern of the hard mask 161 thereby forms the free layer 141 including multiple parallel sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416. Because the blanket free layer 140 is a layer of ferromagnetic material, the multiple sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416 may be multiple ferromagnetic strips. The multiple sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416 may each have multiple notches formed along their respective longitudinal directions. Creating notches along the sub-free layer helps to create discrete (or digitized) conductance / resistance values ​​of the MTJ structure or device, and the more notches there are, the higher the conductance / resistance resolution the MTJ device can provide during device operation.

[0039] In one embodiment, the notches of the sub-free layers may be substantially aligned with one another along their longitudinal direction. The notches may have a uniform pitch, and the pitch may be the same among the sub-free layers. However, embodiments of the present invention are not limited in this respect. For example, the notches of the sub-free layers may not necessarily have the same pitch and / or may not be aligned with one another in the vertical direction. However, increasing the pitch and / or aligning the notches may help increase the resolution and / or uniformity of the conductance / resistance during operation of the MTJ device.

[0040] Similarly, the transfer of the pattern of hard mask 161 may also form spin-orbit coupling layer 151 including a plurality of parallel spin-orbit coupling strips 1511, 1512, 1513, 1514, 1515, and 1516. Because the transfer process is an anisotropic etching process, hard mask 161, spin-orbit coupling layer 151, and free layer 141 have substantially the same shape. Hard mask 161 is illustratively shown in a top view in FIG. 2B , with spin-orbit coupling layer 151 and free layer 141 underneath and covered by hard mask 161.

[0041] 3A and 3B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a manufacturing stage after the stage shown in FIGS. 2A and 2B according to one embodiment of the present invention. More specifically, embodiments of the present invention provide for patterning the blanket tunnel barrier layer 130 and the blanket reference layer 120 into the tunnel barrier layer 131 and the reference layer 121. For example, embodiments of the present invention provide for forming an organic planarization layer (OPL) over the MTJ structure 10 being manufactured and forming an etch mask over the OPL. Then, embodiments of the present invention provide for etching the OPL and the underlying blanket tunnel barrier layer 130 and blanket reference layer 120 using the etch mask in an anisotropic etching process, thereby creating or forming the tunnel barrier layer 131 and the reference layer 121. Because the blanket reference layer 120 is a layer of ferromagnetic material, the reference layer 121 formed therefrom is also a ferromagnetic layer. In one embodiment, etching the blanket reference layer 120 may place the conductive via 111 in a substantially central portion of the resulting reference layer 121. The conductive via 111 may form or function as a third electrode of the MTJ structure being fabricated, as described in more detail below, and may also be referred to as the third electrode 111.

[0042] 4A and 4B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a manufacturing stage after the stage shown in FIGS. 3A and 3B according to one embodiment of the present invention. More specifically, an embodiment of the present invention provides depositing a dielectric layer 170 to encapsulate the MTJ structure 10 during fabrication. For example, an embodiment of the present invention provides forming the dielectric layer 170 to cover the sidewalls and / or lateral surfaces of the hard mask 161, the spin-orbit coupling layer 151, the free layer 141, the tunnel barrier layer 131, and the reference layer 121. The dielectric layer 170 also covers the exposed top surface of the dielectric layer 110. The dielectric layer 170 can be formed to have an upper surface that is coplanar with the top surface of the hard mask 161. For example, the dielectric layer 170 is first deposited above and covering the hard mask 161. Dielectric layer 170 may then be planarized by a chemical-mechanic-polishing (CMP) process so that it has an upper surface that is coplanar with the upper surface of hard mask 161 .

[0043] 5A and 5B are illustrative cross-sectional and top views of an MTJ structure at a manufacturing stage after the stage shown in FIGS. 4A and 4B, according to one embodiment of the present invention. More specifically, the present invention provides forming a first electrode 181 in contact with a first end of the free layer 141, e.g., the left end in FIGS. 5A and 5B. The first end of the free layer 141 can include first ends of each of multiple sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416. The present invention also provides forming a second electrode 182 in contact with a second end of the free layer 141, e.g., the right end in FIGS. 5A and 5B. The second end of the free layer 141 may include the second ends of each of the multiple sub-free layers 1411 , 1412 , 1413 , 1414 , 1415 , and 1416 .

[0044] In one embodiment, the first and second electrodes 181 and 182 may be formed by a selective metal growth process, such as an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, or a physical vapor deposition (PVD) process, and may be made of, for example, tantalum nitride (TaN), titanium nitride (TiN), copper (Cu), tungsten (W), or other suitable conductive material. In another embodiment, the first and second electrodes 181 and 182 need only be formed to contact the first and second ends of the spin-orbit coupling layer 151 because the spin-orbit coupling layer 151 is in direct contact with the underlying free layer 141.

[0045] 6A and 6B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of another MTJ structure during fabrication, according to one embodiment of the present invention. More specifically, in forming the MTJ structure 20, an embodiment of the present invention provides receiving a dielectric layer 210, which may be part of a substrate such as a semiconductor substrate; forming a blanket spin-orbit coupling layer 220 on the dielectric layer 210; and forming a blanket free layer 230 on the blanket spin-orbit coupling layer 220.

[0046] In one embodiment, blanket spin-orbit coupling layer 220 may be a layer of spin-orbit torque material, which may include, for example, tantalum (Ta), platinum (Pt), or other suitable material. Blanket spin-orbit coupling layer 220 may be formed to have a thickness ranging from about 0.5 nm to about 5 nm, although other thicknesses are possible and fully contemplated.

[0047] In another embodiment, the blanket free layer 230 may be a blanket ferromagnetic layer, which may be a layer of a Co, Fe, and B-based material (CoFeB), such as an alloy of Co, Fe, and B, although other types of ferromagnetic materials may also be used, such as an alloy of Co and Fe (CoFe) or an alloy of Ni and Fe (NiFe). The blanket ferromagnetic layer may be formed to have a thickness ranging from about 0.5 nm to about 30 nm, although other thicknesses are possible and fully contemplated.

[0048] 7A and 7B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a stage of fabrication after the stage shown in FIGS. 6A and 6B, according to one embodiment of the present invention. More specifically, embodiments of the present invention provide for patterning a blanket free layer 230 into a free layer 231, which includes multiple sub-free layers, such as parallel sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316. Here, six (6) sub-free layers are shown in FIG. 7B by way of example only, although more or fewer sub-free layers are possible and fully contemplated by embodiments of the present invention.

[0049] In a further embodiment, the plurality of sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316 are optionally formed with a plurality of notches formed continuously along their respective lengths. The blanket free layer 230 is patterned, for example, by forming a hard mask on the blanket free layer 230 by a lithographic patterning process, and then transferring the pattern of the hard mask onto the blanket free layer 230 by an anisotropic etching process. The hard mask is then removed after the anisotropic etching process.

[0050] 8A and 8B are exemplary diagrams illustrating a cross-sectional view (A) and a top view (B) of an MTJ structure at a manufacturing stage after the stage illustrated in FIGS. 7A and 7B according to one embodiment of the present invention. More specifically, an embodiment of the present invention provides forming a blanket tunnel barrier layer 240 on a free layer 231 including a plurality of sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316, and forming a blanket reference layer 250 on the blanket tunnel barrier layer 240. The blanket tunnel barrier layer 240 and the blanket reference layer 250 can cover the sidewalls or lateral surfaces of the free layer 231.

[0051] In one embodiment, the blanket tunnel barrier layer 240 is a layer of magnesium oxide (MgO) or other suitable material, including, for example, aluminum oxide (Al2O3) or titanium oxide (TiO2), and may be formed to have a thickness ranging from about 0.5 nm to about 1.5 nm, although other thicknesses are possible. In another embodiment, the blanket reference layer 250 is a blanket ferromagnetic layer, which may be a layer of a Co, Fe, and B-based material (CoFeB), such as an alloy of Co, Fe, and B, although other types of ferromagnetic materials, such as an alloy of Co and Fe (CoFe) or an alloy of Ni and Fe (NiFe), may also be used. The blanket ferromagnetic layer may be formed to have a thickness ranging, for example, from about 0.5 nm to about 30 nm.

[0052] 9A and 9B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a manufacturing stage after the stage shown in FIGS. 8A and 8B according to one embodiment of the present invention. More specifically, an embodiment of the present invention provides for patterning the blanket reference layer 250 and the blanket tunnel barrier layer 240 into the reference layer 251 and the tunnel barrier layer 241. For example, an embodiment of the present invention provides for forming a hard mask on the blanket reference layer 250 and then transferring the pattern of the hard mask onto the blanket reference layer 250 and the underlying blanket tunnel barrier layer 240, thereby forming the reference layer 251 and the tunnel barrier layer 241. The hard mask pattern transfer process can be an anisotropic selective etching process that can stop at the free layer 231 and the blanket spin-orbit coupling layer 220.

[0053] In one embodiment, patterning the blanket reference layer 250 and the blanket tunnel barrier layer 240 exposes a first or left end (in FIGS. 9A and 9B ) of the free layer 231, or a first end of each of the plurality of sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316. The patterning process also exposes a second or right end (in FIGS. 9A and 9B ) of the free layer 231, or a second end of each of the plurality of sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316.

[0054] 10A and 10B are illustrative diagrams showing a cross-sectional view (A) and a top view (B) of an MTJ structure at a manufacturing stage after the stage shown in FIGS. 9A and 9B according to one embodiment of the present invention. More specifically, an embodiment of the present invention provides a step of depositing a dielectric layer 270 to encapsulate the MTJ structure 20 during manufacturing. For example, the dielectric layer 270 can cover the exposed top surfaces of the reference layer 251, the free layer 231, and the spin-orbit coupling layer 220, and can cover the sidewalls or lateral surfaces of the reference layer 251, the tunnel barrier layer 241, and the free layer 231. The dielectric layer 270 is then planarized by a CMP process.

[0055] Embodiments of the present invention further provide forming a first electrode 261 through the dielectric layer 270 to contact a first end of the free layer 231 or a first end of each of the sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316; forming a second electrode 262 through the dielectric layer 270 to contact a second end of the free layer 231 or a second end of each of the sub-free layers 2311, 2312, 2313, 2314, 2315, and 2316; and forming a third electrode 263 through the dielectric layer 270 and between the first and second electrodes 261 and 262 to contact the reference layer 251. In one embodiment, the third electrode 263 may be fabricated in a substantially central portion of the reference layer 251. The first, second, and third electrodes 261, 262, 263 may be made of, for example, tantalum nitride (TaN), titanium nitride (TiN), copper (Cu), tungsten (W), or other suitable conductive material and may be made by, for example, an ALD, CVD, or PVD process.

[0056] 11 is an exemplary flowchart illustrating a method for fabricating an MTJ structure according to one embodiment of the present invention. The method includes the following steps: (911) receiving a support structure, such as a dielectric layer having a conductive via or a third electrode embedded therein; (912) sequentially forming a blanket reference layer, a blanket tunnel barrier layer, a blanket free layer, and a blanket spin-orbit coupling layer over the dielectric layer and the conductive via; (913) patterning the blanket free layer into a plurality of sub-free layers of a plurality of ferromagnetic strips arranged parallel to one another and patterning the blanket spin-orbit coupling layer into a spin-orbit coupling layer of a plurality of spin-orbit coupling strips over the plurality of sub-free layers, wherein the plurality of ferromagnetic strips (914) patterning the blanket tunnel barrier layer and the blanket reference layer into a tunnel barrier layer and a reference layer; (915) depositing a dielectric layer covering the plurality of sub-free layers, the tunnel barrier layer, and the reference layer; (916) creating openings in the dielectric layer to expose a first end and a second end of each of the plurality of sub-free layers; and (917) filling the openings with a conductive material to form first and second electrodes contacting the first and second ends of each of the plurality of sub-free layers.

[0057] 12 is an exemplary flowchart illustrating a method for fabricating an MTJ structure according to one embodiment of the present invention. The method includes the steps of: (921) forming a blanket spin-orbit coupled layer on a substrate and a blanket free layer on the blanket spin-orbit coupled layer; (922) patterning the blanket free layer into a free layer, the free layer including multiple sub-free layers arranged or patterned to be parallel to one another. The sub-free layers have multiple notches formed along their longitudinal direction. (923) depositing a blanket tunnel barrier layer on the plurality of sub-free layers and depositing a blanket reference layer on the blanket tunnel barrier layer; (924) patterning the blanket reference layer and blanket tunnel barrier layer into a reference layer and a tunnel barrier layer to expose first and second ends of the free layer, or first and second ends of each of the plurality of sub-free layers; (925) depositing a dielectric layer to cover the reference layer, the tunnel barrier layer, and the plurality of sub-free layers; (926) creating first and second openings in the dielectric layer to expose the first and second ends of the free layers and creating a third opening in the dielectric layer between the first and second openings to expose a substantially central portion of the reference layer; and (927) depositing a conductive material in the first, second, and third openings to form first, second, and third electrodes of the MTJ structure.

[0058] FIG. 13 is an exemplary diagram illustrating the operation of an MTJ structure according to one embodiment of the present invention. To illustrate, by way of example, how the use of multiple sub-free layers of ferromagnetic strips can help reduce statistical variations in domain wall positions of the free layer in an MTJ structure, FIG. 13 shows a top view of the programmed states of multiple sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416 at the level of the free layer 141 during operation of the MTJ structure 10. Generally, the magnetic orientation of a portion of the sub-free layer can be changed by applying a magnetic field or a programming voltage. For example, a programming voltage, such as a voltage pulse, can be applied between the first electrode 181 and the second electrode 182 for a certain duration. The applied voltage can result in a domain wall in the sub-free layer at a location between a first portion where the magnetic orientation (or polarization) has changed and a second portion where the magnetic orientation (or polarization) remains unchanged.

[0059] For example, in the example shown in FIG. 13, the magnetic directions (or polarizations) of first portion 1421 (i.e., the first five notches) of sub-free layer 1411, first portion 1422 (i.e., the first three notches) of sub-free layer 1412, first portion 1423 (i.e., the first four notches) of sub-free layer 1413, first portion 1424 (i.e., the first five notches) of sub-free layer 1414, first portion 1425 (i.e., the first three notches) of sub-free layer 1415, and first portion 1426 (i.e., the first four notches) of sub-free layer 1416 change under the application of a programming voltage or voltage pulse. In other words, the domain wall positions of the sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416 are at the fifth notch (1421), the third notch (1422), the fourth notch (1423), the fifth notch (1424), the third notch (1425), and the fourth notch (1426) of the sub-free layers 1411, 1412, 1413, 1414, 1415, and 1416, respectively.

[0060] Assume that for all sub-free layers, the domain wall position of the programmed sub-free layer corresponds to a conductance value G, and that this domain wall position is allowed to vary statistically, with the conductance value G having a standard deviation S1. The effective or combined domain wall position of the free layer 141 corresponds to a conductance value G*N, which has a standard deviation S2 equal to S1*sqrt(N), where N is the total number of sub-free layers, i.e., the total number of sub-free layers. In other words, if a free layer 141 (having N sub-free layers) has the same conductance value as a sub-free layer, such as G, then this conductance value of the free layer 141 may be sqrt(N) times smaller than S1 of a single sub-free layer, i.e., have a standard deviation of S1 / sqrt(N). Also, the more sub-free layers there are, the smaller the standard deviation of the free layer 141. The use of multiple sub-free layers also allows programming of partial conductance / resistance states that would not otherwise be accessible with a single free layer. For example, assuming a single free layer has access to four conductance / resistance states, the use of multiple sub-free layers provides a greater number of discrete conductance / resistance states due to averaging of slightly different domain wall positions in each sub-free layer.

[0061] It should be understood that the exemplary methods discussed herein may be readily combined with other semiconductor process flows, semiconductor devices, and integrated circuits having various analog and digital or mixed-signal circuits. In particular, integrated circuit dies can be fabricated with a variety of devices, such as field-effect transistors, bipolar transistors, metal-oxide-semiconductor transistors, diodes, capacitors, inductors, and the like. Integrated circuits according to the present invention can be utilized in applications, hardware, and / or electronic systems. Suitable hardware and systems for implementing the present invention may include, but are not limited to, personal computers, communications networks, electronic commerce systems, portable communications devices (e.g., mobile phones), solid-state media storage devices, functional circuits, and the like. Systems and hardware incorporating such integrated circuits are considered part of the embodiments described herein. Given the teachings of the present invention provided herein, those skilled in the art will contemplate other implementations and applications of the techniques of the present invention.

[0062] Thus, at least a portion of one or more of the semiconductor structures described herein may be implemented in an integrated circuit. The resulting integrated circuit chips may be distributed by a manufacturer in raw wafer form (i.e., a single wafer having multiple unpackaged chips), as bare die, or in packaged form. In the latter case, the chip may be mounted in a single-chip package (such as a plastic carrier with leads affixed to a motherboard or other higher-level carrier) or in a multi-chip package (such as a ceramic carrier with surface and / or embedded interconnects). In either case, the chip may then be integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of either an intermediate product such as a motherboard or a final product. The final product may be any product containing the integrated circuit chip, ranging from toys and other low-cost applications to advanced computer products with displays, keyboards or other input devices, and central processing units.

[0063] The descriptions of various embodiments of the present invention are presented for purposes of illustration and are not intended to be exhaustive, and the present invention is not limited to the disclosed embodiments. The terms used herein were chosen to best explain the principles of the embodiments, practical applications or technical improvements to technology found in the market, and to enable those skilled in the art to understand the embodiments disclosed herein. Numerous modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. Such changes, modifications, and / or alternative embodiments may be made without departing from the scope of the present invention, and all are hereby considered to be contemplated and within the scope of the present invention. It should therefore be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of the present invention.

Claims

1. 1. A magnetic tunnel junction (MTJ) structure comprising: a MTJ stack having a tunnel barrier layer on a reference layer and a free layer on the tunnel barrier layer; the free layer includes a plurality of sub-free layers, each of which is a plurality of ferromagnetic strips arranged parallel to one another on the tunnel barrier layer, each of which has a first end connected to a first electrode and a second end connected to a second electrode; MTJ structure.

2. 10. The MTJ structure of claim 1, wherein the plurality of ferromagnetic strips are patterned to have a notch formed along the length of each of the plurality of ferromagnetic strips.

3. The MTJ structure of claim 2 , wherein the notches of the plurality of ferromagnetic strips are substantially aligned with one another along the respective longitudinal directions.

4. 2. The MTJ structure of claim 1, wherein each of the plurality of ferromagnetic strips is covered by a spin-orbit coupling layer, the spin-orbit coupling layer being patterned to have the same shape as the ferromagnetic strips it covers.

5. The MTJ structure of claim 1 , wherein the reference layer is a ferromagnetic layer that perpendicularly overlaps the plurality of sub-free layers via the tunnel barrier layer.

6. 10. The MTJ structure of claim 1, further comprising a third electrode, said third electrode contacting said reference layer at a substantially central location thereof.

7. 2. The MTJ structure of claim 1, wherein the plurality of sub-free layers include respective domain wall positions defined by an applied voltage, the respective domain wall positions corresponding to a conductance value G having a standard deviation S1, and the free layer includes effective domain wall positions defined by the applied voltage corresponding to a conductance value G*N having a standard deviation S1*sqrt(N), where N is a total number of the plurality of sub-free layers.

8. 1. A method of forming an MTJ structure, comprising: forming a blanket tunnel barrier layer over the blanket reference layer; forming a blanket free layer over the blanket tunnel barrier layer; patterning the blanket free layer into a free layer having a plurality of sub-free layers, the sub-free layers being a plurality of ferromagnetic strips arranged parallel to one another on the blanket tunnel barrier layer; and forming a first electrode in contact with a first end of each of the plurality of ferromagnetic strips and a second electrode in contact with a second end of each of the plurality of ferromagnetic strips; A method comprising:

9. The method of claim 8 , wherein patterning the blanket free layer comprises forming the plurality of ferromagnetic strips with a notch along the length of each of the plurality of ferromagnetic strips.

10. The method of claim 9 , wherein the notches in the plurality of ferromagnetic strips are substantially aligned with one another along the respective longitudinal directions.

11. 9. The method of claim 8 , further comprising forming a blanket spin-orbit coupled layer over the blanket free layer, and wherein patterning the blanket free layer further comprises patterning the blanket spin-orbit coupled layer into a plurality of spin-orbit coupled strips over the plurality of ferromagnetic strips.

12. 9. The method of claim 8, further comprising, after patterning the blanket free layer, patterning the blanket tunnel barrier layer and the blanket reference layer into a tunnel barrier layer and a reference layer, respectively.

13. The method of claim 8 , further comprising depositing a dielectric layer over the plurality of sub-free layers, the tunnel barrier layer, and the reference layer.

14. 10. The method of claim 8, further comprising forming the blanket reference layer over a conductive via, the conductive via being embedded in a dielectric layer and serving as a third electrode to the MTJ structure.

15. 1. A method of forming an MTJ structure, comprising: forming a blanket spin-orbit coupling layer over a substrate; forming a blanket free layer on the blanket spin-orbit coupled layer; patterning the blanket free layer into a free layer, the free layer having a plurality of sub-free layers arranged parallel to one another and overlying the blanket spin-orbit coupled layer; depositing a blanket tunnel barrier layer over the plurality of sub-free layers; depositing a blanket reference layer over the blanket tunnel barrier layer; patterning the blanket tunnel barrier layer and the blanket reference layer into a tunnel barrier layer and a reference layer, respectively, the patterning exposing first ends and second ends of the plurality of sub-free layers; and forming a first electrode in contact with the first ends of the plurality of free sub-layers and a second electrode in contact with the second ends of the plurality of free sub-layers; A method comprising:

16. 16. The method of claim 15, wherein the blanket free layer is a layer of ferromagnetic material, the plurality of sub-free layers are a plurality of ferromagnetic strips, and patterning the blanket free layer includes forming the plurality of ferromagnetic strips, each ferromagnetic strip having a notch formed along its length.

17. The method of claim 16 , wherein the notches in the plurality of ferromagnetic strips are substantially aligned with one another along the length of each of the plurality of ferromagnetic strips.

18. 16. The method of claim 15, further comprising, after patterning the blanket tunnel barrier layer and the blanket reference layer, depositing a dielectric layer covering the reference layer, the tunnel barrier layer, and the plurality of free sub-layers.

19. 20. The method of claim 18, further comprising: patterning the dielectric layer to create first and second openings that expose the first ends and the second ends of the plurality of sub-free layers; and then forming the first and second electrodes in the first and second openings.

20. 20. The method of claim 19, further comprising patterning the dielectric layer to create a third opening that exposes a portion of the reference layer between the first and second openings, and then depositing a conductive material in the third opening to form a third electrode.

Images