Display panel and method for manufacturing the same
The display panel design with an exposed substrate and encapsulation layer at the edge portion effectively prevents water vapor and oxygen ingress, enhancing the lifespan and reliability of micro LED panels.
Patent Information
- Application Number
- JP2023578013
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-11
- Filing Date
- 2023-10-20
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2043-10-20
AI Technical Summary
Water vapor and oxygen can enter the micro LED display panel from the side edges, leading to a reduction in service life and potential damage.
A display panel design with an edge portion where the array composite layer exposes the substrate, and an encapsulation layer is in contact with the substrate, forming a sealing structure that prevents water vapor and oxygen ingress.
The sealing structure enhances the lifespan and reliability of the display panel by blocking the diffusion of water vapor and oxygen, preventing display defects and improving overall performance.
Smart Images

Figure 2025534562000001_ABST
Abstract
Description
[Technical Field]
[0001] The present application relates to the display field, and in particular to a display panel and a method for manufacturing the display panel. [Background technology]
[0002] With the development of display technology, display panels are widely used in people's daily lives, such as the display screens of mobile phones, computers, televisions, etc. Micro light-emitting diode (Min-LED, Micro-LED, etc.) display panels have been developed, which have cross-generation advantages in terms of brightness, resolution, energy consumption, service life, response speed, thermal stability, etc., and are recognized as a cutting-edge display technology worldwide.
[0003] However, the current micro LED display panel has a problem that water vapor and oxygen can enter the inside from the side edges, which can shorten the lifespan of the micro LED display panel and cause damage. Summary of the Invention [Problem to be solved by the invention]
[0004] The embodiments of the present application provide a display panel and a manufacturing method for the display panel, which can solve the problem of water vapor and oxygen entering the interior of the current micro LED display panel from the side edges, causing a reduction in the service life and failure of the micro LED display panel. [Means for solving the problem]
[0005] The present application provides a display panel, the display panel including an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel comprising: A substrate; an array composite layer disposed on the substrate; a plurality of light emitting diodes disposed in the array composite layer; an encapsulation layer disposed on the light emitting diode; Here, at the edge portion, the array composite layer exposes the substrate, and the sealing layer is disposed in contact with the substrate.
[0006] Preferably, in some embodiments of the present application, the encapsulation layer includes a cover layer and an optical adhesive layer, the optical adhesive layer is disposed between the cover layer and the light-emitting diode, and the optical adhesive layer is connected to the substrate and the cover layer at the edge portion.
[0007] Preferably, in some embodiments of the present application, the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion; The edge portion includes a first edge portion, the non-edge portion includes a first non-edge portion, the first edge portion corresponds to the bezel portion, and the first non-edge portion corresponds to the display portion.
[0008] Preferably, in some embodiments of the present application, the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion; the display unit includes a plurality of the light-emitting diodes, and at least one opening is disposed between at least two adjacent light-emitting diodes; The edge portion includes a second edge portion, the non-edge portion includes a second non-edge portion, the second edge portion corresponds to the opening, and the second non-edge portion corresponds to the light-emitting diode on the opening side.
[0009] Preferably, in some embodiments of the present application, the array composite layer forms a first inclined surface at the boundary between the edge portion and the non-edge portion, the optical adhesive layer covers the first inclined surface, and the included angle between the first inclined surface and the substrate at the edge portion is an obtuse angle.
[0010] Preferably, in some embodiments of the present application, the array composite layer includes a conductive metal oxide layer and a thin film transistor layer, the thin film transistor layer forms a second slope corresponding to the first slope, the metal oxide layer includes a first sub-protection portion, the first sub-protection portion covers the second slope and extends to the edge portion to contact the substrate, and the optical adhesive layer covers the first sub-protection portion.
[0011] Preferably, in some embodiments of the present application, the angle between the second bevel and the substrate at the edge portion is in the range of 110° to 140°.
[0012] Preferably, in some embodiments of the present application, the array composite layer further includes a first insulating layer disposed between the thin film transistor layer and the metal oxide layer, and the metal oxide layer includes a second sub-protection portion located in the non-edge portion, and the entire second sub-protection portion is disposed on the first insulating layer.
[0013] Preferably, in some embodiments of the present application, the first insulating layer is a planar layer of organic material.
[0014] Preferably, in some embodiments of the present application, the layer structure of the thin film transistor layer is a plurality of thin film transistors disposed on the substrate, each including at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain; a first insulating layer disposed on a side of the plurality of thin film transistors away from the substrate; a plurality of first through holes penetrating at least the first insulating layer; a first metal layer disposed on a side of the first insulating layer away from the substrate and including a plurality of pads, at least some of the pads being connected to the drains of the corresponding thin film transistors via the first through holes;
[0015] Preferably, the metal oxide layer further includes a third sub-protective portion, and the third sub-protective portion covers the first metal layer.
[0016] Preferably, in some embodiments of the present application, the third sub-protector includes a plurality of protective members, each of which covers a corresponding one of the pads, and the light-emitting diode is connected to the corresponding one of the pads by the protective members.
[0017] Preferably, in some embodiments of the present application, the thin film transistor layer further includes a second insulating layer, the second insulating layer is disposed between the plurality of thin film transistors and the first insulating layer, the second insulating layer is an inorganic material, the first insulating layer is an organic material, and the first through hole further penetrates the second insulating layer.
[0018] In response to the above, an embodiment of the present application further provides a method for manufacturing a display panel, the method comprising: providing a substrate; forming an array composite layer on the substrate, the array composite layer exposing the substrate and forming a first bevel, the first bevel dividing the display panel into an edge portion and a non-edge portion at least partially surrounded by the edge portion; transferring a plurality of light emitting diodes to the array composite layer; forming an encapsulation layer on the light emitting diode, the encapsulation layer being disposed in contact with the substrate at the edge portion.
[0019] Preferably, in some embodiments of the present application, manufacturing an encapsulating layer on the light-emitting diode includes disposing a cover layer and an optical adhesive layer on the light-emitting diode, wherein the optical adhesive layer is disposed between the cover layer and the light-emitting diode, and at the edge portion, the optical adhesive layer contacts the substrate and connects the substrate and the cover layer.
[0020] Preferably, in some embodiments of the present application, forming the array composite layer comprises: forming a thin film transistor layer on the substrate, and forming a first insulating layer on the thin film transistor layer, the thin film transistor layer including a plurality of thin film transistors disposed on the substrate and a second insulating layer disposed on the plurality of thin film transistors, the second insulating layer being an inorganic material, the first insulating layer being an organic material, and the thin film transistor including at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain; forming a first through-hole in the first insulating layer and removing the first insulating layer at the edge portion; Drilling holes in the second insulating layer to penetrate the second insulating layer further into the first insulating layer, and removing the second insulating layer and other film layers in the array composite layer at the edge portion; Here, the first insulating layer, the second insulating layer and other film layers in the array composite layer form a second inclined surface at the edge portion.
[0021] Preferably, in some embodiments of the present application, forming the array composite layer includes, after opening holes in the second insulating layer: The method further includes forming a first metal layer on the first insulating layer, patterning the first metal layer to form a plurality of pads, and electrically connecting at least some of the pads to the drain via the first through holes.
[0022] Preferably, in some embodiments of the present application, forming the array composite layer includes forming a first metal layer on the first insulating layer, after which: The method further includes forming a metal oxide layer on the first metal layer, and patterning the metal oxide layer to form a first sub-protector, a second sub-protector, and a third sub-protector, wherein the first sub-protector covers the second slope to form the first slope and extends to the edge to contact the substrate, the entire second sub-protector is disposed on the first insulating layer, the third sub-protector covers the first metal layer, and the third sub-protector includes a plurality of protective members, each protective member covering a corresponding one of the pads. [Effects of the Invention]
[0023] In an embodiment of the present application, a display panel and a manufacturing method thereof are provided, the display panel including an edge portion and a non-edge portion at least partially surrounded by the edge portion. The display panel includes a substrate, an array composite layer disposed on the substrate, a plurality of light-emitting diodes disposed on the array composite layer, and an encapsulation layer disposed on the light-emitting diodes, wherein the array composite layer exposes the substrate at the edge portion and the encapsulation layer is disposed in contact with the substrate. In the present application, the array composite layer exposes the substrate at the edge portion and the encapsulation layer is disposed in contact with the substrate to form a encapsulation structure between the encapsulation layer and the substrate. When this encapsulation structure is located between the bezel portion and the display portion, it prevents the array composite layer from being exposed to the side edges of the display panel and prevents water vapor and oxygen from diffusing or being transmitted through the array composite layer into the display panel, thereby improving the lifespan and reliability of the display panel. At the same time, when this encapsulation structure is located between two adjacent pixels or light-emitting diodes in the display portion, it blocks the path of diffusion or transmission of water vapor and oxygen, preventing the expansion of display defects and thereby improving the lifespan and reliability of the display panel. [Brief explanation of the drawings]
[0024] In order to more clearly explain the technical solutions in the embodiments of the present application, the accompanying drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present application, and those skilled in the art can derive other figures from these drawings without any creative efforts.
[0025] [Figure 1] 1 is a first-type schematic top view showing a first-type display panel according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a second type of schematic top view showing a first type of display panel according to the first embodiment of the present invention. [Figure 3] 1 is a cross-sectional view schematically illustrating a structure of a portion of a first type display panel according to a first embodiment of the present invention. [Figure 4] 1 is a schematic top view of a part of a second type display panel according to a first embodiment of the present invention; [Figure 5] FIG. 5 is a cross-sectional view taken along dashed line DD in FIG. [Figure 6] 5A to 5C are schematic diagrams showing flow steps of a method for manufacturing a display panel according to Example 2 of the present invention. [Figure 7] 10A to 10C are schematic diagrams illustrating other flow steps of the manufacturing method of the display panel according to the second embodiment of the present invention. [Figure 8] 10A and 10B are schematic diagrams illustrating a first intermediate step in the method for manufacturing a display panel according to Example 2 of the present invention. [Figure 9] 10A and 10B are schematic diagrams illustrating a second intermediate step in the method for manufacturing a display panel according to the second embodiment of the present invention. [Figure 10] 10 is a schematic diagram showing a third intermediate step in the method for manufacturing a display panel according to the second embodiment of the present invention. FIG. [Figure 11] 10 is a schematic diagram showing a fourth intermediate step of the method for manufacturing a display panel according to the second embodiment of the present invention. FIG. [Figure 12] FIG. 10 is a schematic view showing a fifth intermediate step of the method for manufacturing a display panel according to the second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0026] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. It is clear that the described embodiments are only a portion of the embodiments of the present application, and do not represent all of the embodiments. All other embodiments obtained by those skilled in the art without inventive efforts based on the embodiments of the present application fall within the scope of protection of the present application. It should be understood that the detailed description of the present application is merely for the purpose of illustrating and explaining the present application and is not intended to be limiting. In the present application, unless stated to the contrary, directional terms such as "upper" and "lower" generally refer to the upper and lower sides of the device in its actual use or operating state, particularly in the accompanying drawings. Meanwhile, "inner" and "outer" refer to the contours of the device.
[0027] An embodiment of the present application provides a display panel, the display panel including an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel including a substrate, an array composite layer disposed on the substrate, a plurality of light-emitting diodes disposed on the array composite layer, and an encapsulation layer disposed on the light-emitting diodes, wherein at the edge portion, the array composite layer exposes the substrate and the encapsulation layer is disposed in contact with the substrate.
[0028] The present application further provides a method for manufacturing a display panel. Each of the methods will be described in detail below. Note that the order in which the following embodiments are described does not limit the preferred order of the embodiments.
[0029] Example 1
[0030] Referring to FIGS. 1 to 5, FIG. 1 is a first type of top view schematic diagram showing a first type of display panel according to Example 1 of the present application. FIG. 2 is a second type of top view schematic diagram showing a first type of display panel according to Example 1 of the present application. FIG. 3 is a cross-sectional view schematic diagram showing a partial structure of a first type of display panel according to Example 1 of the present application. FIG. 4 is a top view schematic diagram of a part of a second type of display panel according to Example 1 of the present application. FIG. 5 is a cross-sectional view schematic diagram taken along dashed line DD in FIG. 4. FIGS. 1 to 3 show the first type of display panel, and FIG. 2 shows the shape of the metal oxide layer in comparison with FIG. 1. FIGS. 4 and 5 show the second type of display panel. Here, features related to the first type of display panel embodiment can be combined with features related to the second type of display panel embodiment.
[0031] An embodiment of the present application provides a display panel 100, which includes an edge portion 100B and a non-edge portion 100A at least partially surrounded by the edge portion, and the display panel 100 includes a substrate 11, an array composite layer 101Z, a plurality of light-emitting diodes 30, and an encapsulation layer 431. The array composite layer 101Z is disposed on the substrate 11. The plurality of light-emitting diodes 30 are disposed on the array composite layer 101Z. The encapsulation layer 431 is disposed on the light-emitting diodes 30. Here, at the edge portion 100B, the array composite layer 101Z exposes the substrate 11, and the encapsulation layer 431 is disposed in contact with the substrate 11.
[0032] Specifically, the substrate 11 may be a glass substrate, but is not limited to this.
[0033] In this embodiment, at the edge portion 100B, the array composite layer 101Z exposes the substrate 11, and the sealing layer 431 is disposed in contact with the substrate 11 to form a sealing structure between the sealing layer 431 and the substrate 11. When this sealing structure is located between the bezel portion BB and the display portion AA, it prevents the array composite layer 101Z from being exposed to the side edge of the display panel 100 and can prevent water vapor and oxygen from diffusing or being transmitted into the display panel 100 by the array composite layer 101Z, thereby improving the lifespan and reliability of the display panel 100. On the other hand, when this sealing structure is located between two adjacent pixels or light-emitting diodes 30 in the display portion AA, it blocks the path of diffusion or transmission of water vapor and oxygen, preventing the expansion of display defects and thereby improving the lifespan and reliability of the display panel.
[0034] In some embodiments, the encapsulating layer 431 includes a cover layer 40 and an optical adhesive layer 31, the optical adhesive layer 31 being disposed between the cover layer 40 and the light-emitting diode 30, and at the edge portion 100B, the optical adhesive layer 31 being connected to the substrate 11 and the cover layer 40.
[0035] Specifically, the optical adhesive layer 31 may be an optically clear adhesive (abbreviated as OCA) or an optically clear resin (abbreviated as OCR).
[0036] Specifically, the cover layer 40 may be, but is not limited to, a glass cover, a metal cover, a ceramic cover, or the like.
[0037] Specifically, at the edge portion 100B, the optical adhesive layer 31 connects the substrate 11 and the cover layer 40 to form a sealing structure.
[0038] 1-3, in some embodiments, the display panel 100 includes a bezel portion BB and a non-edge display portion AA at least partially surrounded by the bezel portion BB. The edge portion 100B includes a first edge portion 101B, and the non-edge portion 100A includes a first non-edge portion 101A, where the first edge portion 101B corresponds to the bezel portion BB and the first non-edge portion 101A corresponds to the display portion AA.
[0039] Specifically, as shown in Figures 1 to 3, the first edge portion 101B corresponds to the bezel portion BB, and the first non-edge portion 101A corresponds to the display portion AA, i.e., in the edge portion 100B, the array composite layer 101Z contracts relative to the substrate 11, and the sealing layer 431 is positioned in contact with the substrate 11.
[0040] Specifically, as shown in FIG. 1, the display panel 100 includes an edge portion 100B (or a first edge portion 101B) and a non-edge portion 100A (or a first non-edge portion 101A), and the edge portion 100B completely or partially surrounds the non-edge portion 100A. In FIG. 1, the boundary between the edge portion 100B and the non-edge portion 100A is a first inclined surface 101 and / or a second inclined surface 102, which will be described in the examples below.
[0041] Specifically, the array composite layer 101Z may include a driving circuit and wiring for driving the micro light-emitting diodes 30 to emit light.
[0042] Specifically, the display panel 100 includes a plurality of light-emitting diodes 30 arranged on a substrate 11, and the light-emitting diodes 30 may be used as light sources for backlighting the display panel, or the light-emitting diodes 30 may be used as part of sub-pixels of an image directly displayed by the display panel.
[0043] Specifically, as shown in FIG. 1, the first edge portion 101B refers to a portion close to a side edge of the display panel 100, and the first edge portion 101B is usually located in the non-display area or bezel portion BB.
[0044] Specifically, the non-edge portion 100A may refer to a portion that includes the display portion AA, or may refer to the display portion AA.
[0045] Specifically, a part of the first edge portion 101B surrounds the first non-edge portion 101A, or the first edge portion 101B surrounds the first non-edge portion 101A. Specifically, the array composite layer 101Z shrinks relative to the substrate 11 means that the edge of the array composite layer 101Z does not overlap with the edge of the substrate 11 in the plane of the display panel, and the edge of the array composite layer 101Z is located on the side of the edge of the substrate 11 that is closer to the center of the substrate 11.
[0046] Specifically, the array composite layer 101Z shrinks relative to the substrate 11 means that the edge of the substrate 11 is positioned outside the edge of the array composite layer 101Z in the plane of the display panel.
[0047] In this embodiment, at the edge portion 100B, the array composite layer 101Z shrinks against the substrate 11, exposing the substrate 11, and the sealing layer 431 is arranged in contact with the substrate 11, thereby preventing the array composite layer 101Z from being exposed to the side edge of the display panel 100 and preventing water vapor and oxygen from diffusing or being transmitted into the interior of the display panel 100 through the array composite layer 101Z, thereby improving the lifespan and reliability of the display panel 100.
[0048] 4 and 5 , in some embodiments, the display panel 100 includes a bezel portion BB and a display portion AA at least partially surrounded by the bezel portion BB. The display portion AA includes a plurality of light-emitting diodes 30, and at least one opening 301 is disposed between at least some of two adjacent light-emitting diodes 30. The edge portion 100B includes a second edge portion 102B, and the non-edge portion 100A includes a second non-edge portion 102A, where the second edge portion 102B corresponds to the opening 301 and the second non-edge portion 102A corresponds to the light-emitting diodes 30 on the opening 301 side.
[0049] Specifically, at least one opening 301 is disposed between at least some of two adjacent light emitting diodes 30 , that is, the display panel 100 includes at least one opening 301 .
[0050] Specifically, the second edge portion 102B corresponds to the opening 301, and the second non-edge portion 102A corresponds to the light-emitting diode 30 on the opening 301 side. That is, in this embodiment, the edge portion 100B or the second edge portion 102B is disposed between two adjacent subpixels or two adjacent light-emitting diodes 30 in the display unit AA, and since the two adjacent light-emitting diodes 30 need to be driven by the same wiring such as the same scan line or the same data line, it is difficult to dispose the second edge portion 102B so as to completely surround the corresponding subpixel or light-emitting diode 30. Therefore, it is necessary to dispose the opening 301 to form the second edge portion 102B.
[0051] Specifically, as shown in Figures 4 and 5, the display panel 100 includes an edge portion 100B (or a first edge portion 102B) and a non-edge portion 100A (or a first non-edge portion 102A), and the edge portion 100B completely or partially surrounds the non-edge portion 100A. In Figure 4, the boundary between the edge portion 100B and the non-edge portion 100A is the first inclined surface 101 and / or the second inclined surface 102 described in the examples below. In Figure 4, the boundary between the edge portion 100B and the non-edge portion 100A is also the edge of the opening 301.
[0052] Specifically, as shown in Figures 4 and 5, in the edge portion 100B (or the second edge portion 102B), the array composite layer 101Z exposes the substrate 11, and the sealing layer 431 is arranged in contact with the substrate 11 to form a sealing structure between the sealing layer 431 and the substrate 11. When this sealing structure is located between two adjacent pixels or light-emitting diodes 30 in the display section AA, the sealing structure blocks the path for the diffusion or transmission of water vapor or oxygen, preventing the expansion of display defects and thereby improving the lifespan and reliability of the display panel.
[0053] In this embodiment, a first type display panel 100 shown in Figures 1 to 3 and a second type display panel shown in Figures 4 and 5 are described, and the first edge portion 101B of the first type display panel and the second edge portion 102B of the second type display panel may be arranged on the same display panel, in which case the beneficial effects of both are obtained.
[0054] In the above embodiment, the division between the first edge portion 101B and the first non-edge portion 101A is the same as the division between the second edge portion 102B and the second non-edge portion 102A, so in this embodiment, the structure will be described in detail using the edge portion 100B and the non-edge portion 100A.
[0055] In some embodiments, as shown in Figures 1 to 5, the array composite layer 101Z forms a first inclined surface 101 at the boundary between the edge portion 100B and the non-edge portion 100A, the optical adhesive layer 31 covers the first inclined surface 101, and the included angle between the first inclined surface 101 and the substrate 11 at the edge portion 100B is an obtuse angle.
[0056] Specifically, the array composite layer 101Z shrinks to form a first inclined surface 101, and the included angle between the first inclined surface 101 and the substrate 11 at the edge portion 100B is an obtuse angle, which prevents air bubbles from occurring between the array composite layer 101Z and the optical adhesive layer 31 when it is bonded.
[0057] Specifically, as shown in Figures 3 and 5, the first inclined surface 101 or an extension line of the first inclined surface 101 intersects with the substrate 11, and the included angle between the first inclined surface 101 and the substrate 11 at the edge portion 100B refers to the included angle located at the edge portion 100B, or refers to the included angle on the side of the first inclined surface 101 away from the non-edge region 100A.
[0058] 3 and 5, the first slope 101 divides the display panel into an edge portion 100B and a non-edge portion 100A. In the plane of the display panel, the side of the first slope 101 closer to the light-emitting diodes 30 is the non-edge portion 100A, and the side of the first slope 101 farther from the light-emitting diodes 30 is the edge portion 100B.
[0059] In some embodiments, the array composite layer 101Z includes a conductive metal oxide layer 22 and a thin film transistor layer 101Y, the thin film transistor layer 101Y forms a second slope 102 corresponding to the first slope 101, the metal oxide layer 22 includes a first sub-protection portion 221 that covers the second slope 102 and extends to the edge portion 100B to contact the substrate 11, and the optical adhesive layer 31 covers the first sub-protection portion 221. In addition, the optical adhesive layer 31 may also cover a portion of the substrate 11 that protrudes from the first sub-protection portion 221 in the plane of the display panel.
[0060] Specifically, the portion of the substrate 11 that protrudes relative to the first sub-protective portion 221 in the plane of the display panel means that the first sub-protective portion 221 contracts relative to the substrate 11 in the plane of the display panel, and the substrate 11 protrudes relative to the first sub-protective portion 221, and this protruding portion is the portion of the substrate 11 that protrudes relative to the first sub-protective portion 221 in the plane of the display panel.
[0061] Specifically, the thin film transistor layer 101Y refers to a plurality of film layers between the metal oxide layer 22 and the substrate 11, and the thin film transistor layer 101Y may include a plurality of thin film transistors 103.
[0062] Specifically, the conductive metal oxide layer 22 may be indium tin oxide (ITO).
[0063] Specifically, as shown in Figures 2 and 3, in the first type of display panel, the entire metal oxide layer 22 is disposed, and the metal oxide layer 22 includes oxide openings 220 corresponding to the light-emitting diodes 30 or pads, and the oxide openings 220 expose the pads connected to the light-emitting diodes 30.
[0064] Specifically, the first sub-protective portion 221 covers the second slope portion 102 and extends to the edge portion 100B to contact the substrate 11. The first sub-protective portion 221 has excellent water vapor and oxygen blocking ability, thereby preventing the thin film transistor layer 101Y from being exposed to the edge portion 100B, or forming a barrier to block the transmission of water vapor and oxygen, thereby preventing water vapor and oxygen from entering the inside of the display panel through the thin film transistor layer 101Y, or preventing water vapor and oxygen from being transmitted to the inside of the display panel through the thin film transistor layer 101Y, thereby improving the lifespan and reliability of the display panel.
[0065] Specifically, the first sub-protector 221 covers the second inclined surface 102 and extends to the edge portion 100B to come into contact with the substrate 11, thereby blocking the diffusion path of water vapor and oxygen and fulfilling the role of blocking water vapor and oxygen.
[0066] In some embodiments, the angle between the second bevel 102 and the substrate 11 at the edge portion 100B is in the range of 110° to 140°.
[0067] Specifically, since the included angle α between the second inclined surface 102 and the substrate 11 at the edge portion 100B is in the range of 110° to 140°, the first sub-protective portion 221 is made to cover or adhere well to the second inclined surface 102, and also extends to the edge portion 100B to contact the substrate 11, thereby improving the covering performance and contact performance of the metal oxide layer 22 and preventing cracks and the like from occurring.
[0068] In some embodiments, the array composite layer 101Z further includes a first insulating layer 20 disposed between the thin film transistor layer 101Y and the metal oxide layer 22, and the metal oxide layer 22 includes a second sub-protection portion 222 located in the non-edge portion 100A, and the entire second sub-protection portion 222 is disposed on the first insulating layer 20.
[0069] Specifically, the entire second sub-protective portion 222 is disposed on the first insulating layer 20, thereby further fulfilling the role of blocking water vapor and oxygen. The second sub-protective portion 222 functions as a protective layer, and even if water vapor or oxygen enters the optical adhesive layer 31, the second sub-protective portion 222 can also block the water vapor or oxygen from entering the thin-film transistor 103.
[0070] In some embodiments, first insulating layer 20 is a planar layer of organic material.
[0071] Specifically, the first insulating layer 20 is a planar layer of organic material, and therefore can function as a planar layer, allowing the metal oxide layer 22 to adhere well to the thin film transistor layer 101Y without undesired cracking.
[0072] In some embodiments, the layer structure of the thin film transistor layer 101Y includes a plurality of thin film transistors 103, a first insulating layer 20, a plurality of first through holes 201, and a first metal layer 21. The plurality of thin film transistors 103 are disposed on the substrate 11, and the thin film transistors 103 include at least a semiconductor layer 14, a gate insulating layer 15, a gate 16, a source 181, and a drain 182. The first insulating layer 20 is disposed on a side of the plurality of thin film transistors 103 away from the substrate 11. The plurality of first through holes 201 penetrate at least the first insulating layer 20. The first metal layer 21 is disposed on a side of the first insulating layer 20 away from the substrate 11, and includes a plurality of pads, at least some of which are connected to the drains 182 of the corresponding thin film transistors 103 via the first through holes 201.
[0073] Specifically, the plurality of pads include a first pad 211 and a second pad 212, and two electrodes of the micro light-emitting diode 30 are connected to the corresponding first pad 211 and the corresponding second pad 212, respectively.
[0074] Specifically, the thin film transistor 103 drives the corresponding micro light emitting diode 30 to emit light.
[0075] In some embodiments, the metal oxide layer 22 further includes a third sub-protector 223 , which covers the first metal layer 21 .
[0076] Specifically, the metal oxide layer 22 has excellent conductive properties and blocking properties against water vapor and oxygen, the third sub-protective part 223 covers the first metal layer 21, and the third sub-protective part 223 functions as the first metal layer 21, so that even if water vapor or oxygen enters the inside of the display panel, the third sub-protective part 223 can prevent oxidation or corrosion of the first metal layer 21.
[0077] In some embodiments, the thin film transistor layer 101Y further includes a second insulating layer 19, the thin film transistor layer 101Y is disposed between the plurality of thin film transistors 103 and the first insulating layer 20, the second insulating layer 19 is an inorganic material, the first insulating layer 20 is an organic material, and the first through hole 201 further penetrates the second insulating layer 19.
[0078] Specifically, since the first insulating layer 20 is an organic material, it can provide a smooth adhesion surface for the metal oxide layer 22 and provide excellent planarity for the micro LEDs 30, thereby improving the transfer yield of the micro LEDs.
[0079] Specifically, the second insulating layer 19 is made of an inorganic material and has excellent blocking properties against water vapor and oxygen. Even if water vapor or oxygen enters the interior of the display panel, the second insulating layer 19 can also block the water vapor or oxygen from entering the thin-film transistor 103.
[0080] 3 and 5 show the layer structure of the display panel 100. The display panel 100 includes a substrate 11, a light-shielding layer 12, a buffer layer 13, a semiconductor layer 14, a gate insulating layer 15, a gate 16, an interlayer insulating layer 17, a source / drain metal layer 18, a second insulating layer 19, a first insulating layer 20, a first metal layer 21, a metal oxide layer 22, a micro light-emitting diode 30, an optical adhesive layer 31, and a cover layer 40, which are stacked in order. The source / drain metal layer 18 is patterned to form a source 181 and a drain 182.
[0081] Example 2
[0082] 6 to 12, FIG. 6 is a schematic diagram showing flow steps of a method for manufacturing a display panel according to Example 2 of the present application. FIG. 7 is a schematic diagram showing other flow steps of a method for manufacturing a display panel according to Example 2 of the present application. FIG. 8 is a schematic diagram showing a first intermediate step of the method for manufacturing a display panel according to Example 2 of the present application. FIG. 9 is a schematic diagram showing a second intermediate step of the method for manufacturing a display panel according to Example 2 of the present application. FIG. 10 is a schematic diagram showing a third intermediate step of the method for manufacturing a display panel according to Example 2 of the present application. FIG. 11 is a schematic diagram showing a fourth intermediate step of the method for manufacturing a display panel according to Example 2 of the present application. FIG. 12 is a schematic diagram showing a fifth intermediate step of the method for manufacturing a display panel according to Example 2 of the present application.
[0083] The display panel 100 of any one of the above embodiments can be manufactured by the method for manufacturing a display panel according to this embodiment.
[0084] Specifically, as shown in FIG. 6, this embodiment provides a method for manufacturing a display panel, which includes steps S100, S200, S300, and S400.
[0085] In S100, a substrate is provided.
[0086] Specifically, a substrate 11 is provided.
[0087] In S200, an array composite layer is formed on a substrate, the array composite layer exposing the substrate and forming a first bevel, the first bevel dividing the display panel into an edge portion and a non-edge portion at least partially surrounded by the edge portion.
[0088] Specifically, an array composite layer 101Z is formed on a substrate 11, and the array composite layer 101Z shrinks relative to the substrate 11 to form a first inclined surface 101, which divides the display panel 100 into an edge portion 100B and a non-edge portion 100A that is at least partially surrounded by the edge portion 100B.
[0089] In S300, a plurality of light emitting diodes are transferred to the array composite layer.
[0090] Specifically, a plurality of light emitting diodes 30 are transferred to the array composite layer 101Z.
[0091] In S400, an encapsulation layer is fabricated on the light emitting diode, and the encapsulation layer is disposed in contact with the substrate at the edge portion.
[0092] Specifically, the encapsulation layer 431 is formed on the light-emitting diode 30, and the encapsulation layer 431 is disposed in contact with the substrate 11 at the edge portion 100B.
[0093] In some embodiments, fabricating an encapsulating layer on the light emitting diode includes disposing a cover layer 40 and an optical adhesive layer 31 on the light emitting diode 30. Here, the optical adhesive layer 31 is disposed between the cover layer 40 and the light emitting diode 30, and at the edge portion 100B, the optical adhesive layer 31 contacts the substrate 11 and connects the substrate 11 and the cover layer 40.
[0094] In some embodiments, as shown in FIG. 7, forming the array composite layer includes steps S210, S220, and S230.
[0095] In S210, a thin film transistor layer is formed on a substrate, and a first insulating layer is formed on the thin film transistor layer, the thin film transistor layer including a plurality of thin film transistors arranged on the substrate and a second insulating layer arranged on the plurality of thin film transistors, the second insulating layer being an inorganic material, the first insulating layer being an organic material, and the thin film transistor including at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain.
[0096] Specifically, as shown in FIG. 8, a thin film transistor layer 101Y is formed on a substrate 11, a first insulating layer 20 is formed on the thin film transistor layer 101Y, the thin film transistor layer 101Y includes a plurality of thin film transistors 103 arranged on the substrate 11 and a second insulating layer 19 arranged on the plurality of thin film transistors 103, the second insulating layer 19 being an inorganic material, the first insulating layer 20 being an organic material, and the thin film transistor 103 including at least a semiconductor layer 14, a gate insulating layer 15, a gate 16, a source 181, and a drain 182.
[0097] In S220, the first insulating layer is drilled to form the first through-hole 201, and the first insulating layer is removed at the edge portion 100B.
[0098] Specifically, as shown in FIG. 9, a first through-hole 201 is formed in the first insulating layer 20, and the first insulating layer 20 is removed at the edge portion 100B.
[0099] In S230, a hole is drilled in the second insulating layer to allow the first through-hole to penetrate the second insulating layer further, and the second insulating layer and other film layers in the array composite layer are removed at the edge portion, where the first insulating layer, the second insulating layer, and other film layers in the array composite layer form a second slope at the edge portion.
[0100] 10, holes are opened in the second insulating layer 19 to allow the first through-holes 201 to penetrate the second insulating layer 19 further, and the second insulating layer 19 and other film layers in the array composite layer 101Z are removed at the edge portion 100B. Here, the first insulating layer 20, the second insulating layer 19, and other film layers in the array composite layer 101Z form a second inclined surface 102 at the edge portion 100B.
[0101] In some embodiments, as shown in FIG. 11, forming the array composite layer 101Z further includes the steps of forming a first metal layer 21 on the first insulating layer 20 after opening holes in the second insulating layer 19, and patterning the first metal layer 21 to form a plurality of pads 211, and at least some of the pads 211 are electrically connected to the drain 182 via the first through holes 201.
[0102] In some embodiments, as shown in FIG. 12 , forming the array composite layer 101Z further includes the steps of forming a first metal layer 21 on a first insulating layer 20, forming a metal oxide layer 22 on the first metal layer 21, and patterning the metal oxide layer 22 to form a first sub-protective portion 221, a second sub-protective portion 222, and a third sub-protective portion 223, wherein the first sub-protective portion 221 covers the second sloping surface 102 to form the first sloping surface 101 and extends to the edge portion 100B to contact the substrate 11, the entire second sub-protective portion 222 is disposed on the first insulating layer 20, the third sub-protective portion 223 covers the first metal layer 21, the third sub-protective portion 223 includes a plurality of protective members, and the protective members cover corresponding pads.
[0103] This embodiment has the same beneficial effects as the first embodiment, and the description thereof will be omitted here.
[0104] Although the display panel and the manufacturing method thereof provided by the embodiments of the present application have been described in detail above, the present application uses specific examples to describe the principles and embodiments of the present application, and the explanation of the above examples is intended to facilitate understanding of the method and its core idea of the present application. Furthermore, it should be understood that those skilled in the art may make changes in the specific embodiments and application scope based on the idea of the present application, and the disclosure of the present application is not intended to limit the present application. [Explanation of symbols]
[0105] 11: Substrate 12: Light shielding layer 13: Buffer layer 14: Semiconductor layer 15: Gate insulating layer 16: Gate 17: Interlayer insulating layer 18: Source / drain metal layer 19: Second insulating layer 20: First insulating layer 21: 1st metal layer 22: Conductive metal oxide layer 30: Light-emitting diode 31: Optical adhesive layer 40: Cover layer 100: Display panel 101: First slope 102: Second slope 103: Thin film transistor 181: Source 182: Drain 201: First through hole 211: First pad 212: Second pad 220: oxide opening 221: First sub-protection unit 222: Second sub-protection unit 223: Third sub-protection unit 301 :Aperture 431: Sealing layer
Claims
1. A display panel including an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel comprising: A substrate; an array composite layer disposed on the substrate; a plurality of light emitting diodes disposed in the array composite layer; an encapsulation layer disposed on the light emitting diode; wherein, at the edge portion, the array composite layer exposes the substrate, and the sealing layer is disposed in contact with the substrate. Display panel.
2. the encapsulation layer includes a cover layer and an optical adhesive layer, the optical adhesive layer is disposed between the cover layer and the light-emitting diode, and the optical adhesive layer is connected to the substrate and the cover layer at the edge portion. The display panel according to claim 1 .
3. the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion; the edge portion includes a first edge portion, the non-edge portion includes a first non-edge portion, the first edge portion corresponds to the bezel portion, and the first non-edge portion corresponds to the display portion; The display panel according to claim 2 .
4. the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion; the display unit includes a plurality of the light-emitting diodes, and at least one opening is disposed between at least some of two adjacent light-emitting diodes; the edge portion includes a second edge portion, the non-edge portion includes a second non-edge portion, the second edge portion corresponds to the opening, and the second non-edge portion corresponds to the light-emitting diode on the opening side; The display panel according to claim 2 .
5. the array composite layer forms a first inclined surface at the boundary between the edge portion and the non-edge portion, the optical adhesive layer covers the first inclined surface, and an included angle between the first inclined surface and the substrate at the edge portion is an obtuse angle; The display panel according to claim 2 .
6. the array composite layer includes a conductive metal oxide layer and a thin film transistor layer, the thin film transistor layer forms a second slope corresponding to the first slope, the metal oxide layer includes a first sub-protection portion, the first sub-protection portion covers the second slope and extends to the edge portion to contact the substrate, and the optical adhesive layer covers the first sub-protection portion; The display panel according to claim 5 .
7. the angle between the second inclined surface and the substrate at the edge portion is in the range of 110° to 140°; The display panel according to claim 6 .
8. the array composite layer further includes a first insulating layer disposed between the thin film transistor layer and the metal oxide layer, the metal oxide layer including a second sub-protector located in the non-edge portion, and the second sub-protector is entirely disposed on the first insulating layer; The display panel according to claim 6 .
9. the first insulating layer is a planar layer of organic material; The display panel according to claim 8 .
10. The layer structure of the thin film transistor layer is a plurality of thin film transistors disposed on the substrate, each including at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain; the first insulating layer disposed on a side of the plurality of thin film transistors away from the substrate; a plurality of first through holes penetrating at least the first insulating layer; a first metal layer disposed on a side of the first insulating layer away from the substrate and including a plurality of pads, wherein at least some of the pads are connected to the drains of the corresponding thin film transistors via the first through holes; The display panel according to claim 8 .
11. the metal oxide layer further includes a third sub-protector, the third sub-protector covering the first metal layer; The display panel according to claim 10.
12. the third sub-protector includes a plurality of protective members, each of which covers a corresponding one of the pads, and the light-emitting diode is connected to the corresponding one of the pads by the protective members; The display panel according to claim 11 .
13. the thin film transistor layer further includes a second insulating layer, the second insulating layer is disposed between the plurality of thin film transistors and the first insulating layer, the second insulating layer is made of an inorganic material, the first insulating layer is made of an organic material, and the first through hole further penetrates the second insulating layer; The display panel according to claim 10.
14. providing a substrate; forming an array composite layer on the substrate, the array composite layer exposing the substrate and forming a first bevel, the first bevel dividing the display panel into an edge portion and a non-edge portion at least partially surrounded by the edge portion; transferring a plurality of light emitting diodes to the array composite layer; forming an encapsulation layer on the light emitting diode, the encapsulation layer being disposed in contact with the substrate at the edge portion; A method for manufacturing a display panel.
15. fabricating an encapsulation layer on the light emitting diode includes disposing a cover layer and an optical adhesive layer on the light emitting diode; wherein the optical adhesive layer is disposed between the cover layer and the light-emitting diode, and the optical adhesive layer is in contact with the substrate at the edge portion and connects the substrate and the cover layer. The method for manufacturing the display panel according to claim 14 .
16. forming the array composite layer forming a thin film transistor layer on the substrate, and forming a first insulating layer on the thin film transistor layer, the thin film transistor layer including a plurality of thin film transistors disposed on the substrate and a second insulating layer disposed on the plurality of thin film transistors, the second insulating layer being an inorganic material, the first insulating layer being an organic material, and the thin film transistor including at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain; drilling a first through hole in the first insulating layer and removing the first insulating layer at the edge portion; Drilling holes in the second insulating layer to further penetrate the second insulating layer into the first insulating layer, and removing the second insulating layer and other film layers in the array composite layer at the edge portion; wherein the first insulating layer, the second insulating layer, and other film layers in the array composite layer form a second inclined surface at the edge portion; The method for manufacturing the display panel according to claim 15 .
17. The forming of the array composite layer includes, after opening holes in the second insulating layer, forming a first metal layer on the first insulating layer; and patterning the first metal layer to form a plurality of pads, at least some of the pads being electrically connected to the drains through the first through holes. The method for manufacturing the display panel according to claim 16 .
18. The forming of the array composite layer includes forming a first metal layer on the first insulating layer, forming a metal oxide layer on the first metal layer; and patterning the metal oxide layer to form a first sub-protector, a second sub-protector, and a third sub-protector, the first sub-protector covering the second slope to form the first slope and extending to the edge to contact the substrate, the second sub-protector being entirely disposed on the first insulating layer, the third sub-protector covering the first metal layer, the third sub-protector including a plurality of protective members, each of which covers a corresponding one of the pads; The method for manufacturing the display panel according to claim 17 .
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