Method and system for measurement of semiconductor structures with active tilt correction

Abstract

Wafer tilt is measured and compensated for based on a corrected measurement of tilt derived from a set of height measurements across the wafer. A set of wafer orientation correction values ​​is generated by the measurement system at multiple wafer locations. At each location, a wafer orientation correction value is determined based on the difference between the local wafer tilt of the calibration wafer measured by the optical tilt sensor and a corresponding estimated value of the local slope of the calibration wafer derived from the Z measurements. The same measurement system performs Z measurements on a sample wafer to estimate the local slope at each location. The difference between the corresponding wafer orientation correction value and the local slope at each location accurately estimates the wafer orientation at each measurement location. The wafer orientation is adjusted based on the corrected value of wafer orientation.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This patent application claims priority under 35 U.S.C. § 119 from U.S. Provisional Patent Application No. 63 / 424,468, entitled "Metrology and Inspection based on active tilt correction," filed November 10, 2022, the subject matter of which is incorporated herein by reference in its entirety.

[0002] The described embodiments relate to metrology and inspection systems and methods, and more particularly to methods and systems with improved measurement accuracy. [Background technology]

[0003] Semiconductor devices, such as logic and memory devices, are typically fabricated by a series of processing steps applied to a specimen. The various features and structural levels of a semiconductor device are formed by these processing steps. For example, lithography, among other processes, is one semiconductor fabrication process that involves generating patterns on a semiconductor wafer. Further examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etching, deposition, and ion implantation. Multiple semiconductor devices can be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.

[0004] Metrology and inspection processes are used at various steps during the semiconductor manufacturing process to detect defects on wafers and promote higher yields. Available semiconductor metrology systems include film and critical dimension (CD) metrology, overlay metrology, bare wafer, and product wafer inspection. In many instances, X-ray and optical metrology techniques offer the potential for high throughput without the risk of sample destruction. Several X-ray and optical metrology-based techniques, including scatterometry, reflectometry, and ellipsometry implementations, and associated analysis algorithms, are commonly used to characterize the critical dimensions, film thickness, composition, overlay, and other parameters of nanoscale structures.

[0005] Typically, a wafer is positioned within the optical path of a metrology and inspection system during measurement. However, wafers and the positioning systems used to position them are not perfectly flat. Therefore, the orientation of the wafer surface at the measurement spot varies depending on the lateral, or xy, position of the wafer relative to the measurement system. This is problematic for several reasons. In some instances, metrology and inspection systems have very thin focal planes, and variations in wafer tilt cause measurements to be out of focus. In other instances, variations in wafer tilt result in variations in the illumination angle of incidence, which in turn results in undesirable variations in the measurement signal. A significant challenge faced in the development of many metrology and inspection systems is performing accurate measurements in the presence of local wafer tilt.

[0006] Local wafer tilt arises for a variety of reasons. In one example, the wafer positioning stage used to position the wafer in the optical path of the measurement system is constructed with finite mechanical tolerances. Due to practical fabrication limitations, the wafer positioning stage itself does not maintain the wafer at the same orientation throughout its workspace; i.e., the orientation of the axis normal to the top surface of the wafer positioning stage depends on the lateral position of the stage. Similarly, the wafer chuck used to secure the wafer to the wafer positioning stage is not perfectly flat. In another example, thickness variations across the wafer, the presence of backside particles, or both, result in flatness errors, such that the orientation of the axis normal to the wafer surface under measurement changes depending on the location on the wafer surface.

[0007] Local wafer tilt shifts the incidence location of the illumination beam spot on the wafer. This results in an induced shift of the measurement results, e.g., the measured spectrum, which leads to measurement inaccuracies. Furthermore, because local wafer tilt depends on individual tool characteristics, the induced local wafer tilt varies from one measurement tool to another. This increases tool-to-tool measurement variability and limits the achievable tool-to-tool matching.

[0008] In some examples, local wafer tilt is measured and corrected by adjusting system model calibration values. However, adjusting the system model values ​​does not physically change the incident location of the illumination beam spot at each measurement location on the wafer. Therefore, this approach cannot compensate for all of the induced errors. Achievable measurement accuracy and sensitivity remain limited using existing measurement and calibration algorithms. Furthermore, determining appropriate changes to the system model calibration values ​​is not always practical, or even possible, within reasonable constraints on computational effort and time to solution. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] U.S. Patent Application Publication No. 2014 / 0071457 [Patent Document 2] U.S. Patent Application Publication No. 2021 / 0262950 Summary of the Invention [Problem to be solved by the invention]

[0010] Future metrology and inspection applications will present challenges due to ever smaller resolution requirements and ever higher wafer area values. Therefore, methods and systems for improved measurements in the presence of wafer tilt are desirable. [Means for solving the problem]

[0011] Described herein are methods and systems for measuring and compensating for local wafer tilt based on a corrected measurement of tilt derived from a set of height measurements across the wafer.

[0012] A set of wafer orientation correction values ​​is generated at multiple locations across the wafer surface, i.e., a wafer orientation correction map, and at each location, a wafer orientation correction value is determined based on the difference between the local wafer tilt of the calibration wafer measured by the optical tilt sensor and a corresponding estimated value of the local slope of the calibration wafer derived from the Z measurements.

[0013] Because the calibration wafer does not contain thick or patterned structures that would introduce undesirable measurement errors, the optical tilt sensor accurately measures the actual local wafer tilt. The estimated value of local tilt derived from the Z measurements includes the actual local wafer tilt and also includes wafer tilt errors resulting from measured changes in wafer height. The difference value, i.e., the wafer orientation correction value, quantifies the wafer tilt error present in the estimated value of local tilt derived from the Z measurements.

[0014] When the same measurement system is used to perform subsequent measurements on the sample wafer, the induced wafer tilt error present in the estimated value of the local slope derived from the Z measurements is the same as the wafer tilt error captured by the wafer orientation correction value. When the wafer orientation correction value is subtracted from the local slope derived from the Z measurements of the sample wafer, the wafer orientation is accurately estimated at each measurement location.

[0015] In a further aspect, the corrected value of the wafer orientation is communicated to a wafer stage, which adjusts the orientation of the sample wafer based on the corrected value of the wafer orientation to orient the surface of the wafer at the measurement spot in a desired in-plane orientation relative to the measurement subsystem.

[0016] The foregoing is a summary and thus contains, by necessity, simplifications, generalizations, and omissions of detail; as a result, those skilled in the art will appreciate that the summary is illustrative only and is in no way limiting. Other aspects, inventive features, and advantages of the devices and / or processes described herein will become apparent in the non-limiting detailed description set forth herein. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 illustrates a system for measuring values ​​of one or more parameters of interest that characterize a semiconductor structure after correcting for wafer tilt error according to exemplary methods presented herein. [Figure 2] 2 is another diagram of the measurement system 100 shown in FIG. 1. [Figure 3] 3 is a plot showing the orientation of a best-grade bare silicon wafer about the YW axes shown in FIG. 2 across the surface of the wafer. [Figure 4] 1 is a plot showing the vertical position of a best-grade bare silicon wafer along the ZW axis measured at several selected locations across the wafer surface. [Figure 5]5 is a plot showing the calculated local gradients associated with each of selected locations across the surface of the best grade bare silicon wafer described with reference to FIG. 4. [Figure 6] FIG. 1 illustrates a method for estimating a desired correction to the orientation of a semiconductor wafer based on a corrected value of a measured tilt as described herein. DETAILED DESCRIPTION OF THE INVENTION

[0018] Reference will now be made in detail to background examples and certain embodiments of the present invention, examples of which are illustrated in the accompanying drawings.

[0019] Described herein are methods and systems for measuring and compensating for local wafer tilt based on a corrected measurement of tilt derived from a set of height measurements across the wafer.

[0020] Many important metrology and inspection applications involve measuring wafers that contain thick structures, patterned structures, e.g., critical dimension (CD) structures, or both. Unfortunately, direct measurement of local wafer tilt using optical tilt sensors is prone to error when the wafer being measured contains thick structures, patterned structures, or both.

[0021] Accurate measurements of the position of a semiconductor wafer relative to a measurement subsystem in a direction perpendicular to the surface of the semiconductor wafer, also known as Z measurements, can be achieved using a variety of sensors, including Z focal sensors that are currently integrated with many metrology and inspection tools. In some examples, Z measurements adjacent to a measurement location are used to estimate the local slope at that measurement location. While the estimated local slope includes the actual wafer tilt, local slope values ​​derived from the Z measurements also include wafer tilt errors resulting from measured changes in wafer height rather than the actual wafer tilt. In one example, changes in measured wafer height result from movement of the wafer stage relative to the measurement subsystem in the Z direction, for example, as the wafer stage changes the location of the measurement on the wafer surface due to finite mechanical tolerances and alignment of wafer stage components.

[0022] To address these limitations, a set of wafer orientation correction values ​​is generated at multiple locations across the wafer surface, i.e., a wafer orientation correction map. At each location, a wafer orientation correction value is determined based on the difference between the local wafer tilt of the calibration wafer measured by the optical tilt sensor and the corresponding estimated value of the local slope of the calibration wafer derived from the Z measurements. In a preferred embodiment, the calibration wafer is a bare semiconductor wafer or a bare semiconductor wafer coated with a thin film having a thickness of less than 5 nanometers.

[0023] Because the calibration wafer does not contain thick or patterned structures that would introduce undesirable measurement errors, the optical tilt sensor accurately measures the actual local wafer tilt. The estimated value of local tilt derived from the Z measurements includes the actual local wafer tilt and also includes wafer tilt errors resulting from measured changes in wafer height. The difference value, i.e., the wafer orientation correction value, quantifies the wafer tilt error present in the estimated value of local tilt derived from the Z measurements.

[0024] When the same measurement system is used to perform subsequent measurements on the sample wafer, the induced wafer tilt error present in the estimated value of the local slope derived from the Z measurements is the same as the wafer tilt error captured by the wafer orientation correction value. When the wafer orientation correction value is subtracted from the local slope derived from the Z measurements of the sample wafer, the wafer tilt is accurately estimated at each measurement location. In a preferred embodiment, the sample wafer includes one or more thick film structures, one or more patterned structures, or both.

[0025] Figure 1 shows an exemplary metrology system 100 for performing measurements of structural features of semiconductor devices. As shown in Figure 1, metrology system 100 is configured as a broadband spectroscopic ellipsometer. However, in general, metrology system 100 may be configured as a spectroscopic reflectometer, a scatterometer, a single wavelength ellipsometer, a beam profile reflectometer, or any combination thereof.

[0026] The metrology system 100 includes an illumination source 110 that generates a beam of illumination light 117 that is incident on the wafer 120. In some embodiments, the illumination source 110 is a broadband illumination source that emits illumination light in the ultraviolet, visible, and infrared spectrums. In one embodiment, the illumination source 110 is a laser-sustained plasma (LSP) light source (also known as a laser-driven plasma source). The pump laser of an LSP light source can be continuous wave or pulsed. Laser-driven plasma sources can generate significantly more photons than xenon lamps across a wavelength range of 150 nanometers to 2000 nanometers. The illumination source 110 can be a single light source or a combination of multiple broadband or discrete wavelength light sources. The light generated by the illumination source 110 includes a continuous spectrum or portions of a continuous spectrum from ultraviolet to infrared (e.g., from vacuum ultraviolet to mid-infrared). In general, the illumination source 110 can include a supercontinuum laser source, an infrared helium-neon laser source, an arc lamp, or any other suitable light source.

[0027] In a further aspect, the amount of illumination light is broadband illumination light that includes a range of wavelengths spanning at least 500 nanometers. In one example, the broadband illumination light includes wavelengths below 250 nanometers and above 750 nanometers. Generally, broadband illumination light includes wavelengths between 120 nanometers and 3,000 nanometers. In some embodiments, broadband illumination light that includes wavelengths greater than 3,000 nanometers may be used.

[0028] As shown in FIG. 1, metrology system 100 includes an illumination subsystem configured to direct illumination light 117 onto one or more structures formed on wafer 120 at an angle of incidence α defined relative to an axis normal to the surface of wafer 120, e.g., the Z-axis shown in FIG. 1. The illumination subsystem is shown to include a light source 110, one or more optical filters 111, a polarization component 112, a field stop 113, an aperture stop 114, and illumination optics 115. The one or more optical filters 111 are used to control the light level, spectral output, or both from the illumination subsystem. In some examples, one or more multi-zone filters are used as optical filters 111. The polarization component 112 generates a desired polarization state exiting the illumination subsystem. In some embodiments, the polarization component is a polarizer, a compensator, or both, and may include any suitable commercially available polarization component. The polarization component may be fixed, rotatable to different fixed positions, or continuously rotating. While the illumination subsystem shown in FIG. 1 includes one polarization component, the illumination subsystem may include two or more polarization components. Field stop 113 controls the field of view (FOV) of the illumination subsystem and may include any suitable commercially available field stop. Aperture stop 114 controls the numerical aperture (NA) of the illumination subsystem and may include any suitable commercially available aperture stop. Light from illumination source 110 is directed through illumination optics 115 to be focused onto one or more structures (not shown in FIG. 1 ) on wafer 120. The illumination subsystem may include any type and configuration of optical filters 111, polarizing components 112, field stop 113, aperture stop 114, and illumination optics 115 known in the art of spectroscopic ellipsometry, reflectometry, and scatterometry.

[0029] 1, a beam of illumination light 117 passes through optical filter 111, polarizing component 112, field stop 113, aperture stop 114, and illumination optics 115 as the beam propagates from illumination source 110 to wafer 120. Beam 117 illuminates a portion of wafer 120 on measurement spot 116.

[0030] Measurement system 100 also includes a collection optics subsystem configured to collect light generated by the interaction between one or more structures and incident illumination beam 117. A beam of collected light 127 is collected from measurement spot 116 by collection optics 122. Collected light 127 passes through collection aperture stop 123, polarizing element 124, and field stop 125 of the collection optics subsystem.

[0031] The collection optics 122 includes any suitable optical element for collecting light from one or more structures formed on the wafer 120. The collection aperture stop 123 controls the NA of the collection optics subsystem. The polarizing element 124 analyzes the desired polarization state. The polarizing element 124 may be a polarizer or a compensator. The polarizing element 124 may be fixed, rotatable to different fixed positions, or continuously rotating. While the collection subsystem shown in FIG. 1 includes one polarizing element, the collection subsystem may include two or more polarizing elements. The collection field stop 125 controls the field of view of the collection subsystem. The collection subsystem extracts light from the wafer 120 and directs the light through the collection optics 122 and the polarizing element 124 so that it is focused at the collection field stop 125. In some embodiments, the collection field stop 125 is used as a spectrometer slit for a spectrometer in the detection subsystem. In other embodiments, the collection field stop 125 may be positioned at or near the spectrometer slit of the spectrometer in the detection subsystem.

[0032] The collection subsystem may include any type and configuration of collection optics 122, aperture stop 123, polarizing element 124, and field stop 125 known in the arts of spectroscopic ellipsometry, reflectometry, and scatterometry.

[0033] In the embodiment shown in FIG. 1 , the collection optics subsystem directs light to a spectrometer 126. The spectrometer 126 generates an output in response to light collected from one or more structures illuminated by the illumination subsystem. In one example, the detectors of the spectrometer 126 are charge-coupled devices (CCDs) sensitive to ultraviolet and visible light (e.g., light having wavelengths between 190 nanometers and 860 nanometers). In another example, one or more of the detectors of the spectrometer 126 are photodetector arrays (PDAs) sensitive to infrared light (e.g., light having wavelengths between 950 nanometers and 2500 nanometers). However, in general, other detector technologies (e.g., position-sensitive detectors (PSDs), infrared detectors, photovoltaic detectors, etc.) are contemplated. Each detector converts incident light into an electrical signal indicative of the spectral intensity of the incident light. In general, the spectrometer 126 generates an output signal 128 indicative of the spectral response of the structure being measured to the illumination light.

[0034] Metrology system 100 also includes a computing system 130 configured to receive a signal 128 indicative of the measured spectral response of the structure of interest and to estimate, based on the measured spectral response, values ​​129 of one or more parameters of interest, e.g., film thickness, critical dimension, overlay, etc., that characterize the one or more structures being measured. Signal 128 indicative of the measured spectral response of the structure of interest is collected after the orientation of semiconductor wafer 120 has been corrected by wafer stage 140 to minimize local wafer tilt at the measurement site, as described herein.

[0035] The wafer stage 140 positions the wafer 120 relative to the ellipsometer subsystem 101. In some embodiments, the wafer stage 140 moves the wafer 120 in the XY plane by combining two orthogonal translational movements (e.g., movements in the X and Y directions) to position the wafer 120 relative to the ellipsometer. In some embodiments, the wafer stage 140 is configured to control the location of the wafer 120 relative to the illumination provided by the optical ellipsometer with six degrees of freedom. In one embodiment, the wafer stage 140 is configured to control the azimuthal angle AZ of the wafer 120 relative to the illumination provided by the optical ellipsometer by rotation about the z-axis. In general, the sample positioning system 140 may include any suitable combination of mechanical elements to achieve desired linear and angular positioning performance, including, but not limited to, a goniometer stage, a magnetic levitation stage, a hexapod stage, an angular stage, and a linear stage. The computing system 130 is communicatively coupled to the wafer stage 140 and communicates operation command signals 141 to the wafer stage 140. In response, wafer stage 140 positions wafer 120 relative to the ellipsometer according to the motion control commands.

[0036] Figure 2 is another diagram of the metrology system 100 shown in Figure 1. Figure 2 does not include elements of the ellipsometer 101 to allow for a clearer illustration of the wafer stage 140.

[0037] As shown in Figure 2, the wafer coordinate frame {X W ,Y W ,Z W} is attached to the wafer 120. W The X axis is perpendicular to the surface of the wafer 120 at the measurement spot 116. W Axis and Y W The axes are orthogonal to each other and aligned with the surface of wafer 120. Wafer 120 is removably mounted to wafer chuck 147 using, for example, a vacuum clamp, an electrostatic clamp, an edge grip clamp, or the like.

[0038] 2, wafer stage 140 includes a base frame 142, an X-stage 143, a Y-stage 144, and a three-degree-of-freedom wafer stage supporting wafer chuck 147. In some embodiments, base frame 142 is mechanically coupled to a mechanical frame to which a measurement subsystem, e.g., ellipsometer 101, is also mechanically coupled. X-stage 143 rotates in an X-direction relative to base frame 142. W It is mechanically constrained by a bearing assembly, e.g., a mechanical, magnetic, or air bearing, so as to move freely in the X direction. W One or more actuators, e.g., linear motors (not shown), are used to control the position of the X-stage 143 relative to the base frame 142 in the Y direction. W It is mechanically constrained by a bearing assembly, e.g., a mechanical, magnetic, or air bearing, so as to move freely in the Y direction. W One or more actuators, e.g., linear motors (not shown), are used to control the position of the Y stage 144 relative to the X stage 143 in the X direction. As shown in Figures 1 and 2, the Y stage 144 is stacked on top of the X stage 143. Both the X stage 143 and the Y stage 144 have long stroke capabilities, i.e., W Direction and Y W The ellipsometer 101 provides a workspace of at least 300 millimeters in both directions, allowing the X-stage 143 and Y-stage 144 to be controlled to position any location on the surface of the wafer 120 below the measurement spot 116 defined by the optical elements of the ellipsometer 101.

[0039] 1 and 2, the three-degree-of-freedom wafer stage includes actuators 145A-C, such as voice coil motors, piezoelectric motors, etc. Each of the actuators 145A-C is mechanically coupled between the wafer chuck 147 and the Y-stage 144. The extension direction of each of the actuators 145A-C is Z-axis.W 1 and 2, the actuators 145A-C are arranged in a direction substantially parallel to the X axis, i.e., an axis perpendicular to the surface of the wafer 120 clamped to the wafer chuck 147. W Direction and Y W In this configuration, the movement of the actuators 145A-C is determined by the position of the wafer 120 in the Z direction and the X direction. W The orientation of the wafer 120 around the Y axis W The wafer 120 is adjusted to independently control the orientation of the wafer 120 about the axis. x ,R x The movement of the wafer 120 specified in {X, Z} coordinates is controlled by the actuators 145A-C and {X, Z}. W ,Y W ,Z W} coordinate frame. x ,R x , Z} coordinates are easily mapped to the movements of each actuator, which are realized at the actuator level by one or more motion controllers of the wafer stage 140.

[0040] Similarly, position measuring devices 146A-C, such as linear encoders, linear variable differential transformers, inductive probes, capacitive probes, interferometers, etc., may be used to measure the X W Direction and Y W In this configuration, the position of the wafer 120 relative to the Y stage 144 in the Z direction and the X W The orientation of the wafer 120 around the Y axis W The orientation of the wafer 120 around the axis is captured by the position measuring devices 146A-C. The displacement captured by the position measuring devices 146A-C is expressed as a function of the position measuring devices 146A-C and {R x ,R y , Z} coordinate frame, is characterized by the geometric distance between the x ,Ry , Z} coordinates. In this way, the displacements measured by the position measuring devices 146A-C are mapped to the displacement of the wafer 120 expressed in {R x ,R y , Z} coordinate displacements. The displacements are communicated to computing system 130 for tilt correction, as described herein. In some embodiments, the displacements are communicated to one or more motion controllers of wafer stage 140 to implement a feedback positioning controller that places wafer 120 at a desired position and orientation based on measurements by position measuring devices 146A-C.

[0041] In some embodiments, the position measuring devices 146A-C are co-located with the actuators 145A-C. Each of the position sensors is positioned proximate to a corresponding actuator and therefore measures the displacement of each corresponding actuator in the extension direction. However, in general, the position measuring devices 146A-C may be located in different locations from the actuators 145A-C.

[0042] The wafer stage 140 shown in FIG. 2 can be rotated in three different locations to control the wafer 120 in three degrees of freedom. W The wafer stage may include a wafer stage with three actuators for generating forces in the Z direction. However, typically, the wafer stage may have four or more locations for controlling the wafer 120 in three degrees of freedom. W It is possible to include four or more actuators to generate directional forces. Although such a configuration is over-constrained, it may be desirable to include four or more actuators to limit the force requirements for any one actuator, to stabilize bending modes in wafer chuck 147, to work in concert as part of magnetically levitated wafer chuck 147, etc.

[0043] Metrology system 100 also includes a wafer orientation measurement subsystem 150 coupled to the same mechanical frame as measurement subsystem, e.g., ellipsometer 101. As shown in FIGS. 1 and 2 , wafer orientation measurement subsystem includes optical illumination source 151 configured to generate optical illumination beam 154 directed toward the surface of wafer 120 at measurement spot 116. Light 155 reflected from the surface of wafer 120 in response to optical illumination beam 154 is focused by focusing optics 153 onto optical detector 152. Optical detector 152 generates signal 156 indicative of the orientation of wafer 120 relative to measurement subsystem, e.g., ellipsometer 101, at measurement spot 116 on the surface of wafer 120 based on the location of incidence of light 155 on optical detector 152. The measured orientation may be in-plane orientation of wafer 120, e.g., X-axis, which by definition is in the same plane as the surface of the wafer. W axis and Y W Orientation expressed in terms of angular position around the axis Z W Rotational displacements about the axis are not captured by the wafer orientation measurement subsystem 150 .

[0044] By moving wafer 120 under wafer orientation measurement subsystem 150 so that measurement spot 116 is incident on selected locations across the surface of wafer 120, wafer orientation measurement subsystem 150 measures the in-plane orientation of wafer 120 at each location and calculates the in-plane orientation measurement, e.g., the in-plane axis X corresponding to the selected location. W and Y W Generate a map of orientations around

[0045] In some embodiments, optical illumination source 151 is a light-emitting diode (LED)-based light source. In other embodiments, optical illumination source 151 is a laser-based light source. In some embodiments, optical illumination source 151 is a xenon arc lamp-based light source. In some of these embodiments, the optical illumination source is the same illumination source used by the measurement subsystem, for example, illumination source 110 of ellipsometer 101. In some embodiments, optical detector 152 is a quadrant cell receiver. However, in general, any suitable optical illumination source and optical detector can be used to measure the in-plane orientation of wafer 120 relative to the measurement subsystem at measurement spot 116 on the surface of wafer 120.

[0046] As previously explained, measurements of the in-plane orientation of wafer 120 using optical detectors, such as quadrant cell receivers, are affected by structures fabricated on the surface of wafer 120, particularly high aspect ratio structures and thick films.

[0047] Metrology system 100 also includes a wafer vertical position sensor subsystem 160 coupled to the same mechanical frame as measurement subsystem, e.g., ellipsometer 101. As shown in FIGS. 1 and 2 , wafer vertical position sensor subsystem 160 includes an optical illumination source 161 configured to generate an optical illumination beam 164 directed at the surface of wafer 120 at measurement spot 116 via optical element 163. Light 165 reflected from the surface of wafer 120 in response to optical illumination beam 164 is focused onto optical detector 162. Optical detector 162 generates signal 166 indicative of the vertical position of wafer 120 relative to measurement subsystem, e.g., ellipsometer 101, at measurement spot 116 on the surface of wafer 120 based on the location of incidence of light 165 on optical detector 162. Each vertical position value is measured in a direction perpendicular to the surface of wafer 120, i.e., Z W The position of the wafer 120 relative to the measurement subsystem, eg, the ellipsometer 101, along the axis.

[0048] By moving the wafer 120 under the wafer vertical position sensor subsystem 160 so that the measurement spot 116 is incident on selected locations across the surface of the wafer 120, the wafer vertical position sensor subsystem 160 measures the vertical position of the wafer 120 at each location and generates a map of vertical position measurements corresponding to the selected locations.

[0049] In some embodiments, the optical detector of the wafer vertical position sensor subsystem is a bi-cell photoreceiver. In some embodiments, the optical detector of the wafer vertical position sensor subsystem 160 is a position-sensitive detector comprising an array of photosensitive cells. In some embodiments, the optical detector of the wafer vertical position sensor subsystem 160 is an interferometer. In some embodiments, the optical illumination source of the wafer vertical position sensor subsystem, e.g., illumination source 161, is the same illumination source used to provide illumination to the illumination source 110 of the measurement subsystem, e.g., ellipsometer 101.

[0050] In some embodiments, the wafer vertical position sensor subsystem is a component of an autofocus subsystem of a semiconductor measurement system, such as metrology system 100. The autofocus subsystem is configured to position the semiconductor wafer within the focal plane of a measurement subsystem, for example, ellipsometer 101.

[0051] In some other embodiments, the wafer vertical position sensor subsystem includes a linear encoder subsystem or a grid encoder subsystem.

[0052] As previously explained, measuring the vertical position of wafer 120 using an optical detector, such as a bi-cell receiver, is not affected by structures fabricated on the surface of wafer 120, particularly high aspect ratio structures and thick films.

[0053] In one aspect, a measurement of wafer tilt at a measurement spot based on local gradients derived from neighboring Z measurements is corrected using a wafer orientation correction map. The corrected measurement of wafer tilt accurately estimates the change in wafer orientation required to orient the surface of the wafer at the measurement spot in a desired in-plane orientation relative to the measurement subsystem. In one example, the measurement subsystem is represented by its illumination source and detector.

[0054] In a further aspect, a wafer orientation correction value at each wafer location is determined based on the difference between the orientation of the calibration wafer relative to the measurement subsystem measured by the wafer orientation measurement subsystem at each location and the corresponding estimated value of the local gradient derived from the Z measurements at each location and adjacent locations.

[0055] In one example, the wafer orientation measurement subsystem 150 is used to measure the in-plane orientation of the calibration wafer relative to the ellipsometer 101 at selected locations on the surface of the calibration wafer to generate a map of in-plane orientation measurements corresponding to the selected locations.

[0056] Figure 3 shows the Y axis shown in Figure 2 across the surface of the wafer. W 1 is a plot 170 showing the orientation of a best-grade bare silicon wafer around an axis, Y, which corresponds to a rotational displacement in and out of the plane of incidence of the ellipsometer 101. As shown in FIG. W The range of orientation variations around the axis is greater than 30 arc-seconds. These variations represent non-flatness of the wafer stage and wafer chuck.

[0057] In a further aspect, wafer vertical position sensor subsystem 160 is used to measure the vertical position of the calibration wafer at selected locations on the surface of the calibration wafer relative to ellipsometer 101. In this manner, wafer vertical position sensor subsystem 160 generates a map of vertical position measurements corresponding to the selected locations.

[0058] FIG. 4 shows the Z W 4 is a plot 171 showing the vertical position of the best grade bare silicon wafer along the Z axis. W The range of vertical position variations along the axis is as much as 80 micrometers. These variations represent non-flatness of the wafer stage, wafer chuck, and wafer.

[0059] In a further aspect, values ​​characterizing local gradients associated with each selected location across the surface of the calibration semiconductor wafer are estimated based on vertical position values. More specifically, at each selected location, gradient values ​​are calculated in the X and Y directions based on the vertical position value at the selected location and the vertical position values ​​adjacent to the selected location. The gradient values ​​represent the change in vertical position (along the Z direction) divided by the change in lateral position (along the X and Y directions).

[0060] FIG. 5 is a plot 172 showing the calculated local gradients associated with each of selected locations across the surface of the best grade bare silicon wafer described with reference to FIG.

[0061] In a further aspect, a wafer orientation correction map is generated based on the difference between an estimated orientation of the calibration semiconductor wafer relative to the measurement subsystem and an estimated value characterizing a local gradient at each of selected locations across the surface of the calibration semiconductor wafer.

[0062] At each selected location, a difference is calculated between the estimated orientation of the calibration semiconductor wafer measured by wafer orientation measurement subsystem 150 and the value of the local slope derived from the vertical position measurements. In this manner, the map of wafer orientation measurement subsystem 150 generates a map of wafer orientation correction values ​​corresponding to the selected locations.

[0063] As shown by equation (1), X W axis and Y W a set of wafer orientation correction values ​​around the axis, {R XW ,R YW} CORR is the X value derived from the Z measurements on the calibration wafer W axis and Y W local gradient around the axis, CAL {R XW ,R YW} Z and X measured by the optical tilt sensor W axis and Y W the orientation of the calibration wafer around the axis, CAL {R XW ,R YW} TILT It is calculated as the difference between

number

[0064] R XW and R XY and are vectors of the same length. Each pair of wafer orientation correction values ​​corresponds to a different selected location on the wafer. Therefore, XW ,R YW} CORR is a map of wafer orientation correction values ​​corresponding to selected locations.

[0065] In a further embodiment, wafer vertical position sensor subsystem 160 is used to measure the vertical position of the sample wafer at selected locations on the surface of the sample wafer relative to ellipsometer 101. In this manner, wafer vertical position sensor subsystem 160 generates a map of vertical position measurements corresponding to the selected locations.

[0066] In a further aspect, a value characterizing a local gradient associated with each of the selected locations across the surface of the sample semiconductor wafer is estimated based on the vertical position values.

[0067] In a further aspect, for each selected location across the surface of the sample wafer, a corrected value of wafer orientation is determined by subtracting the wafer orientation correction value corresponding to the selected location from the local gradient calculated at the selected location. In this way, induced measurement errors due to height variations are removed from the local gradient value calculated at each selected location.

[0068] As shown by equation (2), X W axis and Y W a set of corrected orientation values ​​around the axis, S {R XW ,R YW} is the X derived from the Z measurement of the sample wafer W axis and Y W local gradient around the axis, S {R XW ,R YW} Z and the wafer orientation correction value, {R XW ,R YW} CORR It is calculated as the difference between

number

[0069] If a wafer orientation correction value directly corresponds to the selected location, the wafer orientation correction value is used directly. However, if there is no wafer orientation correction value directly corresponding to the selected location, interpolation between wafer orientation correction values ​​corresponding to wafer locations adjacent to the selected location is used to calculate the wafer orientation correction value.

[0070] As shown in FIGS. 1 and 2, the wafer stage 140 rotates at an angle X based on the desired correction of the orientation to minimize wafer tilt at the measurement spot 116. W Rotational degrees of freedom around the axis and Y W The wafer 120 is configured to position the wafer 120 with multiple degrees of freedom, including a rotational degree of freedom about an axis.

[0071] In a further aspect, the corrected value of the wafer orientation is communicated to the wafer stage 140, which adjusts the orientation of the sample wafer based on the corrected value of the wafer orientation to orient the surface of the wafer at the measurement spot in the desired in-plane orientation relative to the measurement subsystem.

[0072] In some embodiments, active correction of local tilt in a spectroscopic ellipsometer, single wavelength ellipsometer, or beam profile reflectometer is achieved by manipulating the orientation of the wafer during measurement based on an active measurement of the local tilt. In some of these embodiments, the local tilt is measured and the wafer stage is rotated in an X direction. W axis and Y W In some other embodiments, the wafer stage adjusts the orientation of the wafer based on a local wafer orientation correction map. The local wafer orientation correction map adjusts the orientation of the wafer based on the location of the measurement spot on the wafer. W axis and Y W The wafer stage adjusts the wafer orientation according to the value of the local wafer orientation correction corresponding to the measurement location on the wafer.

[0073] 6 illustrates a method 200 suitable for implementation by a metrology system, such as the metrology system 100 illustrated in FIGS. 1 and 2 of the present invention. It is recognized that, in one aspect, the data processing blocks of method 200 may be performed via pre-programmed algorithms executed by one or more processors of computing system 130, or any other general-purpose computing system. It is recognized that the specific structural aspects of metrology system 100 herein are not intended to represent limitations and should be construed as illustrative only.

[0074] Vertical position values ​​at a first plurality of locations across a surface of a semiconductor wafer are measured in block 201. Each vertical position value is a position of the semiconductor wafer relative to an illumination source and a detector of a semiconductor metrology system in a direction perpendicular to the surface of the semiconductor wafer.

[0075] At block 202, a value characterizing a local gradient associated with each of a first plurality of locations across a surface of the semiconductor wafer is estimated based on vertical position values ​​at the first plurality of locations.

[0076] In block 203, a desired correction for the orientation of the semiconductor wafer at the measurement location of the semiconductor wafer is estimated based on the values ​​characterizing the local gradient and the values ​​of the wafer orientation correction map.

[0077] Exemplary measurement techniques that can benefit from the wafer tilt correction described herein include, but are not limited to, Mueller ellipsometers, spectroscopic ellipsometers, single wavelength ellipsometers, spectroscopic reflectometers, beam profile reflectometers, imaging reflectometers, imaging spectroscopic reflectometers, polarized spectroscopic imaging reflectometers, scanning reflectometer systems, systems having two or more reflectometers capable of parallel data acquisition, systems having two or more spectroscopic reflectometers capable of parallel data acquisition, systems having two or more polarized spectroscopic reflectometers capable of parallel data acquisition, systems having two or more polarized spectroscopic reflectometers capable of serial data acquisition without moving the wafer stage or moving optical elements or the reflectometer stage, imaging spectrometers, systems having wavelength filters, Optical spectroscopy tools, such as imaging systems with long-pass wavelength filters, imaging systems with short-pass wavelength filters, imaging systems without wavelength filters, interferometric imaging systems, imaging ellipsometers, imaging spectroscopic ellipsometers, scanning ellipsometer systems, systems with two or more ellipsometers capable of parallel data acquisition, systems with two or more ellipsometers capable of serial data acquisition without moving the wafer stage or moving optical elements or the ellipsometer stage, Michelson interferometers, Mach-Zehnder interferometers, Sagnac interferometers, scanning angle of incidence systems, scanning azimuthal angle systems, wafer inspection systems, X-ray based metrology systems, and electron beam metrology tools, are also included. Additionally, measurement data typically collected by different measurement techniques and analyzed according to the methods described herein may be collected from multiple tools rather than a single tool integrating multiple techniques.

[0078] In further embodiments, system 100 may include one or more computing systems 130 used to perform measurements according to the methods described herein. The one or more computing systems 130 may be communicatively coupled to detectors 126, 152, and 162. In one aspect, one or more computing systems 130 are configured to receive measurement data 128 related to measurements of metrology targets disposed on sample 120.

[0079] It should be appreciated that the various steps described throughout this disclosure may be performed by a single computer system 130, or alternatively, by multiple computer systems 130. Additionally, different subsystems of system 100, such as detectors 126, 152, and 162, wafer stage 140, etc., may include computer systems suitable for performing at least some of the steps described herein. Accordingly, the above description should not be construed as a limitation on the present invention, but merely as an example. Additionally, one or more computing systems 130 may be configured to perform any other steps of any of the method embodiments described herein.

[0080] Additionally, computer system 130 may be communicatively coupled to detectors 126, 152, and 162 in any manner known in the art. For example, one or more computing systems 130 may be coupled to computing systems associated with detectors 126, 152, and 162. In another example, detectors 126, 152, and 162 may be directly controlled by a single computer system coupled to computer system 130.

[0081] The computer system 130 of the measurement system 100 may be configured to receive and / or acquire data or information from the system's subsystems (e.g., detectors 126, 152, and 162, etc.) over a transmission medium that may include wired and / or wireless portions. In this manner, the transmission medium may serve as a data link between the computer system 130 and other subsystems of the system 100.

[0082] The computer system 130 of the measurement system 100 may be configured to receive and / or acquire data or information (e.g., measurement results, modeling inputs, modeling results, etc.) from other systems via a transmission medium, which may include wired and / or wireless portions. In this manner, the transmission medium may serve as a data link between the computer system 130 and other systems (e.g., the memory-equipped measurement system 100, an external memory, a reference measurement source, or other external systems). For example, the computing system 130 may be configured to receive measurement data from a storage medium (i.e., the memory 132 or an external memory) via the data link. For example, measurement results obtained using the detectors 126, 152, and 162 may be stored in a persistent or semi-persistent memory device (e.g., the memory 132 or an external memory). In this regard, the measurement results may be imported from an internal memory or an external memory system. Additionally, the computer system 130 may transmit data to other systems via the transmission medium. For example, a measurement model or estimated values ​​of one or more parameters of interest 129 determined by the computer system 130 may be communicated and stored in an external memory. In this regard, the measurement results may be exported to another system.

[0083] Computing system 130 may include, but is not limited to, a personal computer system, a cloud-based computer system, a mainframe computer system, a workstation, an image computer, a parallel processor, or any other device known in the art. In general, the term "computing system" may be broadly defined to encompass any device having one or more processors that execute instructions from a memory medium.

[0084] Program instructions 134 implementing methods such as those described herein may be transmitted over a transmission medium such as a wire, cable, or wireless transmission link. For example, as shown in Figures 1 and 2, program instructions 134 stored in memory 132 are transmitted to processor 131 via bus 133. Program instructions 134 are stored on a computer-readable medium (e.g., memory 132). Exemplary computer-readable media include read-only memory, random-access memory, a magnetic or optical disk, or magnetic tape.

[0085] In another further aspect, the metrology system (e.g., metrology system 100) used to perform measurements as described herein includes an infrared optical measurement system. In these embodiments, metrology system 100 includes an infrared light source (e.g., an arc lamp, an electrodeless lamp, a laser-sustained plasma (LSP) source, or a supercontinuum source). Infrared supercontinuum laser sources are preferred over conventional lamp sources due to their higher achievable power and brightness in the infrared region of the optical spectrum. In some examples, the power provided by a supercontinuum laser enables measurements of overlay structures having opaque film layers.

[0086] A potential problem in overlay measurements is insufficient light penetration into the lower grating. In many cases, there is a non-transparent (i.e., opaque) film layer between the upper and lower gratings. Examples of such opaque film layers include amorphous carbon, tungsten silicide (WSI), andX ), tungsten, titanium nitride, amorphous silicon, and other metallic and non-metallic layers. Often, illumination light limited to wavelengths in and below the visible range (e.g., between 250 nm and 700 nm) does not penetrate to the sub-lattice. However, illumination light in and above the infrared spectrum (e.g., above 700 nm) often penetrates opaque layers more effectively.

[0087] In yet another aspect, the measurements described herein can be used to provide active feedback to a process tool (e.g., a lithography tool, an etch tool, a deposition tool, etc.). For example, values ​​of film thickness, critical dimension, overlay, etc. determined using the methods described herein can be communicated to the lithography tool to adjust the lithography system to achieve a desired output. Similarly, etching parameters (e.g., etch time, diffusion rate, etc.) or deposition parameters (e.g., time, concentration, etc.) can be included in the measurements to provide active feedback to an etch tool or a deposition tool, respectively.

[0088] In general, the systems and methods described herein may be implemented as part of an offline or on-tool metrology process.

[0089] As described herein, the term "critical dimension" includes any critical dimension of a structure (e.g., bottom critical dimension, middle critical dimension, top critical dimension, sidewall angle, grating height, etc.), the critical dimension between any two or more structures (e.g., the distance between two structures), and the displacement between two or more structures (e.g., the overlay displacement between overlapping grating structures, etc.). The structures may include three-dimensional structures, patterned structures, overlay structures, etc.

[0090] As described herein, the terms "critical dimension application" or "critical dimension measurement application" include any critical dimension measurement.

[0091] As described herein, the term "metrology system" includes any system used at least in part to characterize a specimen in any manner, including measurement applications such as critical dimension metrology, overlay metrology, focus / dose metrology, and composition metrology. However, such terminology does not limit the scope of the term "metrology system" as described herein. Furthermore, the metrology system 100 may be configured for measurements of patterned and / or unpatterned wafers. The metrology system may be configured as an LED inspection tool, an edge inspection tool, a backside inspection tool, a macro inspection tool, or a multi-mode inspection tool (including data from one or more platforms simultaneously), as well as any other metrology or inspection tool that benefits from compensation for wafer tilt.

[0092] Various embodiments are described herein in terms of semiconductor processing systems (e.g., inspection systems or lithography systems) that can be used to process specimens. The term "specimen" is used herein to refer to a wafer, a reticle, or any other sample that can be processed (e.g., printed or inspected for defects) by means known in the art.

[0093] As used herein, the term "wafer" generally refers to a substrate formed of a semiconductor or non-semiconductor material. Examples include, but are not limited to, monocrystalline silicon, gallium arsenide, and indium phosphide. Such substrates may be commonly found and / or processed in semiconductor fabrication facilities. In some cases, a wafer may include only the substrate (i.e., a bare wafer). Alternatively, a wafer may include one or more layers of different materials formed on the substrate. The one or more layers formed on the wafer may be "patterned" or "unpatterned." For example, a wafer may include multiple dies having repeatable pattern features.

[0094] A "reticle" can be a reticle at any stage in the reticle fabrication process or a completed reticle that may or may not be released for use in a semiconductor fabrication facility. A reticle or "mask" is generally defined as a substantially transparent substrate having substantially opaque regions formed thereon and configured with a pattern. The substrate may comprise, for example, a glass material such as amorphous SiO2. The reticle may be placed over a resist-covered wafer during the exposure step of the lithography process so that the pattern on the reticle can be transferred to the resist.

[0095] One or more layers formed on a wafer may be patterned or unpatterned. For example, a wafer may include multiple dies, each having repeatable pattern features. The formation and processing of such material layers may ultimately result in a completed device. Many different types of devices may be formed on a wafer, and the term wafer, as used herein, is intended to encompass a wafer on which any type of device known in the art has been fabricated.

[0096] In one or more exemplary embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media, including any medium that facilitates transfer of a computer program from one place to another. Storage media may be any available medium that can be accessed by a general-purpose or special-purpose computer. By way of example, and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. As used herein, disk and disc include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, where disks typically reproduce data magnetically and discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0097] Although several specific embodiments are described above for instructional purposes, the teachings of this patent document have general applicability and are not limited to the specific embodiments described above. Accordingly, various modifications, adaptations, and combinations of various features of the described embodiments may be made without departing from the scope of the invention as set forth in the claims.

Claims

1. 1. A semiconductor measurement system comprising: an illumination source configured to generate an amount of illumination radiation incident on a semiconductor wafer, wherein one or more structures are fabricated on a surface of the semiconductor wafer; a detector configured to detect an amount of radiation collected from the semiconductor wafer in response to the incident amount of illumination radiation; a wafer vertical position sensor subsystem configured to measure vertical position values ​​at a first plurality of locations across the surface of the semiconductor wafer, each vertical position value being a position of the semiconductor wafer relative to the illumination source and the detector in a direction perpendicular to the surface of the semiconductor wafer; estimating a value characterizing a local gradient associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the vertical position values ​​at the first plurality of locations; estimating a desired correction for the orientation of the semiconductor wafer at the measurement location of the semiconductor wafer based on the value characterizing the local gradient and a wafer orientation correction map value; and a computing system configured to: A semiconductor measurement system comprising:

2. a sample positioning system configured to orient the semiconductor wafer about a first axis and a second axis at the measurement location based on the desired correction of orientation, the first axis and the second axis being aligned with the surface of the semiconductor wafer and the second axis being orthogonal to the first axis; The semiconductor measurement system of claim 1 further comprising:

3. The computing system includes: estimating values ​​of parameters of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first axis and the second axis based on the desired correction of orientation. The semiconductor measurement system of claim 2 , further configured to:

4. a first optical illumination source configured to generate an optical illumination beam directed toward a surface of the calibration semiconductor wafer; a first optical detector configured to detect light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam, wherein the computing system comprises: estimating an orientation of the calibration semiconductor wafer relative to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the light reflected from the calibration semiconductor wafer onto the first optical detector at each of the second plurality of locations across the surface of the calibration semiconductor wafer. a first optical detector further configured to: a wafer orientation measurement subsystem comprising: The semiconductor measurement system of claim 1 further comprising:

5. the wafer vertical position sensor subsystem is further configured to measure vertical position values ​​at the second plurality of locations across the surface of the calibration semiconductor wafer, each vertical position value being a position of the unpatterned semiconductor wafer relative to the illumination source and the detector in a direction perpendicular to the surface of the calibration semiconductor wafer; the computing system, estimating a value characterizing a local gradient associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the vertical position values ​​at the second plurality of locations; generating the wafer orientation correction map based on a difference between the estimated values ​​characterizing the local gradients at each of the second plurality of locations across the surface of the calibration semiconductor wafer and the estimated orientation of the calibration semiconductor wafer relative to the illumination source and the detector; The semiconductor measurement system of claim 4 , further configured to:

6. 10. The semiconductor metrology system of claim 1, wherein the wafer vertical position sensor subsystem is a component of an autofocus subsystem of the semiconductor metrology system configured to position the semiconductor wafer within a focal plane of the illumination source and the detector.

7. 10. The semiconductor metrology system of claim 1, wherein the illumination source and the detector are elements of one of a single wavelength ellipsometer, a spectroscopic ellipsometer, a beam profile reflectometer, an X-ray based scatterometer, and a spectroscopic reflectometer.

8. 10. The semiconductor metrology system of claim 1, wherein the one or more structures fabricated on the surface of the semiconductor wafer include one or more film structures, one or more critical dimension structures, or a combination thereof.

9. The semiconductor metrology system of claim 4 , wherein the optical illumination source is a light emitting diode (LED)-based light source, a laser-based light source, or a xenon-based light source.

10. 5. The semiconductor measurement system of claim 4, wherein the optical detector is a quadrant cell receiver.

11. the wafer vertical position sensor subsystem: an optical illumination source configured to generate an amount of optical illumination directed to the surface of the semiconductor wafer; an optical detector configured to detect light reflected from the semiconductor wafer in response to the incident optical illumination, wherein the computing system is further configured to estimate the vertical position value at the first plurality of locations across the surface of the semiconductor wafer based on a location of incidence of the light reflected from the semiconductor wafer onto the optical detector at each of the first plurality of locations across the surface of the semiconductor wafer; The semiconductor measurement system of claim 1 , comprising:

12. 12. The semiconductor metrology system of claim 11, wherein the optical detector is a bi-cell photoreceiver, a position-sensitive detector comprising an array of photosensitive cells, or an interferometer.

13. The semiconductor metrology system of claim 11 , wherein the illumination source and the optical illumination source are the same illumination source.

14. the sample positioning system a two-axis wafer stage configured to position the semiconductor wafer relative to the illumination source and the detector at any location on the surface of the semiconductor wafer; a wafer chuck configured to removably couple the semiconductor wafer to the specimen positioning system; at least three actuators spaced apart from one another, each of the at least three actuators being mechanically coupled between the wafer chuck and the two-axis wafer stage, and each of the at least three actuators having an extension direction substantially parallel to a direction perpendicular to the surface of the semiconductor wafer when coupled to the wafer chuck; The semiconductor measurement system of claim 2 , comprising:

15. the sample positioning system at least three position sensors, each of which is disposed proximate to a corresponding one of the at least three actuators, and each of which is configured to measure a displacement of a corresponding one of the actuators in the extension direction; 15. The semiconductor measurement system of claim 14, further comprising:

16. measuring vertical position values ​​at a first plurality of locations across a surface of the semiconductor wafer, each vertical position value being a position of the semiconductor wafer relative to an illumination source and a detector of a semiconductor metrology system in a direction perpendicular to the surface of the semiconductor wafer; estimating a value characterizing a local gradient associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the vertical position values ​​at the first plurality of locations; estimating a desired correction for the orientation of the semiconductor wafer at the measurement location of the semiconductor wafer based on the value characterizing the local gradient and a wafer orientation correction map value; and A method comprising:

17. orienting the semiconductor wafer at the measurement location about a first axis and a second axis based on the desired correction of orientation, the first axis and the second axis being aligned with the surface of the semiconductor wafer and the second axis being orthogonal to the first axis.

17. The method of claim 16, further comprising:

18. generating an amount of illumination radiation incident on the semiconductor wafer at the measurement location, wherein one or more structures are fabricated on the surface of the semiconductor wafer; detecting an amount of radiation collected from the semiconductor wafer in response to the incident amount of illumination radiation; estimating a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer has been oriented about the first axis and the second axis based on the desired correction of orientation; and 20. The method of claim 17, further comprising:

19. measuring vertical position values ​​at a second plurality of locations across a surface of a calibration semiconductor wafer, each vertical position value being a position of the semiconductor wafer relative to the illumination source and the detector of the semiconductor metrology system in a direction perpendicular to the surface of the calibration semiconductor wafer; estimating a value characterizing a local gradient associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the vertical position values ​​at the second plurality of locations; generating the wafer orientation correction map based on a difference between the estimated values ​​characterizing the local gradients at each of the second plurality of locations across the surface of the calibration semiconductor wafer and a measured orientation of the calibration semiconductor wafer relative to the illumination source and the detector; 17. The method of claim 16, further comprising:

20. generating an optical illumination beam directed at the surface of the calibration semiconductor wafer; detecting light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam; determining the measured orientation of the calibration semiconductor wafer relative to the illumination source and the detector at each of the second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the detected light reflected from the calibration semiconductor wafer at each of the second plurality of locations across the surface of the calibration semiconductor wafer; 20. The method of claim 19, further comprising:

21. 1. A semiconductor measurement system comprising: an illumination source configured to generate an amount of illumination radiation incident on the semiconductor wafer at a measurement spot, wherein one or more critical dimension structures are fabricated on a surface of the semiconductor wafer at the measurement spot; and a detector configured to detect an amount of radiation collected from the semiconductor wafer in response to the incident amount of illumination radiation; a sample positioning system configured to position the semiconductor wafer relative to the illumination source and the detector at a desired orientation about a first axis and a second axis, the first axis and the second axis being aligned with the surface of the semiconductor wafer and the second axis being orthogonal to the first axis; estimating the desired orientation of the semiconductor wafer relative to the illumination source and the detector based on locations of the measurement spots on the semiconductor wafer and a local wafer orientation correction map; estimating a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is positioned about the first axis and the second axis in the desired orientation; and a computing system configured to: A semiconductor measurement system comprising:

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